Update the ti-dm firmware to 08.06.00 for Jacinto devices.

These were generated using SYSFW v08.06.00

j7200
RM board config size reduced

J721E
PG2.0 support (GP & HS)
RM board config size reduced

J721S2
RM board config size reduced
VPAC DMPAC clock frequency configuration

J784S4
keywriter support
VPAC DMPAC clock frequency configuration

General
Bare-metal in TIFS
MCU R5F demotion to non-secure mode
NAVSS MCRC overlapping interrupt index

MD5 Checksum:
a5eef2f8d5bcb58f0e6b0ecafa53d8b7  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
ec9b74f653d0b21c636f564e6140f148  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
8e624c59cfbb92dffd9fd76bc0ce9c6e  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f
cfd0599585fd420bc28677c4494ec1f2  ti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Chandru Dhavamani <chandru@ti.com>

Vishal Mahaveer authored 2 years ago and Vignesh Raghavendra committed 2 years ago

Update the following ti-dm firmware
08.05.02.03 for am62x and am62ax

Major changes compared to previous version:
- Fix for 6 channel am62ax CSI usecase DMA failure

MD5 Checksum:
6314ec1455ebeca39bb7cb0e61c10f14  ti-dm/am62axx/ipc_echo_testb_mcu1_0_release_strip.xer5f
698464b6f18ad316cab6454d8a5a02ae  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.05.02 for j721e
08.05.02 for j7200
08.05.02 for j721s2
08.05.02 for j784s4

These were generated using SYSFW v08.05.02

J721E
clk_no_hw_reinit flag enabled for GTC and MPU

J7200
clk_no_hw_reinit flag enabled for GTC and MPU

J721S2
clk_no_hw_reinit flag enabled for GTC and MPU

MD5 Checksums:
c9a5aacbb69cde4efa0ca8ec24ad71ed  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
4d9177d8e853aa017a6c21a0806b50dd  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
5ddabbfa1f2a44fbeb0a865b65c3a8ef  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f
e337ae8ae9c8596e1c7e877382f05c1a  ti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Chandru Dhavamani <chandru@ti.com>

Update the following ti-dm firmware
08.05.02.02 for am62x and am62ax

Major changes compared to previous version:
- SCISERVER fixes for MCAL issues
- Moved to latest PDK codebase where am62x and am62ax are combined

MD5 Checksum:
aa2903495852e3f83f04e0bd43828c1d  ti-dm/am62axx/ipc_echo_testb_mcu1_0_release_strip.xer5f
f8fbe3be35f5e4983b532ed970dcca5b  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.05.00 for j721e
08.05.00 for j7200
08.05.00 for j721s2
08.05.00 for j784s4

These were generated using SYSFW v08.05.00

J7200
New device is added for main_pll8_sel_ext_wave

J721E
New device is added for main_pll8_sel_ext_wave

J721S2
SMS TIFS to HSM Communication Enablement

J784S4
Main PLL3 vco frequency changed from 2GHz to 2.5GHz
RM boardconfig size reduced
SMS TIFS to HSM Communication Enablement

MD5 Checksums:
0abe9bcb717cee88a51cd703f3cc50e7  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
1079cfd6f0c3094921b4f84dcd1edaac  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
2e1b3f964dad6713c1a8031933e36eed  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f
e91017928d7b9b3c485e8470a2e20f25  ti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Chandru Dhavamani <chandru@ti.com>

Update the following ti-dm firmware
08.04.01.10 for AM62x

Major changes compared to previous version:
- Updated memory map to be backward compatible with old release

MD5 Checksum:
ec41f445671447c23841a576e0e31883  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Add DM R5 firmware for AM62Ax SoC. Initial version is based on
release 08.04.01.08.
supported TIFS FW version along with this DM is v08.04.07

MD5 checksum:
4029aab8b8d661281a475b081e122aab ti-dm/am62axx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Add DM FW support for J784S4 SoC.
This is part of 08.04.05

MD5 checksum:
4c886f743d1f6daa79b650332c18996d  ti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Sheng Zhao <shengzhao@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>

Update the following ti-dm firmware
08.04.01.08 for AM62x

Major changes compared to previous version:
- Switched to ipc echo test application to enable A53 <-> DM R5 IPC
- Switched to latest sitara PDK baseline

MD5 Checksum:
ec872a8f6e008b42cd4ab620dd6e6df4  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Update the following ti-dm firmware
08.04.01.07 for AM62x

Major changes compared to previous version:
- Fixed a DMA regression introduced in v08.04.06 update.

MD5 Checksum:
290289a12a5251e15d70ecb4b690f7ef  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.04.01.06 for AM62x

Major changes compared to previous version:
- Security Audit fixes
- am62x: SPI loopback clk mux changes (previously missing mux)
- Fix bug related to wake reason message

MD5 Checksum:
e356429a275b8b9534b10fcae36b191a ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.04.01.05 for AM62x

Major changes compared to previous version:
- DM trace configuration is now runtime based on TIFS boardcfg
- Add virtual device option to choose second level MCU obsclk mux option
- Fix for A53 clocks returning get freq value as 0
- Add tisci message for LPM wake reason
- Add tisci message to enable/disable IO isolation

MD5 Checksum:
881b541e9ba3bb6c2a2f9480c2c062a7  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

08.04.01.02 for AM62x

Major changes compared to previous version:
- ctrl_mmr locks to be left unlocked by DM firmware
- Software reset sequence updated to use correct ctrl_mmr registers
- ARM PLL not re-initialized by DM firmware to preserve SPL settings

MD5 Checksum:
5a4d01e4742133afd50765ae2fed2238  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.04.00.06 for j721e
08.04.00.06 for j7200
08.04.00.06 for j721s2

These were generated using SYSFW v08.04.01
J721E
PVU support enabled

J721S2
Introduction of HS-SE support, HSM boot support

General
SA2UL/SA3UL TRNG firewall open at boot on HS devices
(shared TIFS instances only)

MD5 Checksums:
239a55b0fe3d5591568b3850066e85bb  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
6669d3fae62a4ec932cb3b0d91df5252  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
2a2dfc437acc984ec66f09d9dc6bac6e  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Aditya Wadhwa <a-wadhwa@ti.com>

Update the following dm firmware for jacinto devices.

08.04.00.05 for j721e
08.04.00.05 for j7200
08.04.00.03 for j721s2

Updated for SYSFW v08.04.00

MD5 Checksums:
5b1e461a61c8e6166cfa561a9ec274c7  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
a1d82d5821fdd7d6385bf9d3f0657328  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
a781a56a170384b54ec943b0ef9afe7b  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Aditya Wadhwa <a-wadhwa@ti.com>

Update the following ti-dm firmware
08.00.04.11 for j721s2

Updated for SYSFW v2022.01a

MD5 Checksums:
d4210d9209f42a3b52eaffae8d268ade  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Aditya Wadhwa <a-wadhwa@ti.com>

Update the following ti-dm firmware
08.03.00.08 for AM62x

Major changes compared to previous version:
- Fix for PSIL pairing request failure observed with Ethernet boot
- Fix for setting clk_div load bit for UART clock dividers
- Use main ctrl_mmr for software reset instead of wkup ctrl_mmr
- Trace version updated from 3.5 to 3.6 for decoding LPM messages

MD5 Checksum:
04041de1dde94c03197764e706c4055c  ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

commit e0c2153d ("ti-dm: Update firmware to 08.03.00.xx")
Introduced am62xx DM "Device Manager" firmware in
folder ti-dm/am62x

Where-as
commit c2e5d59c

 ("ti-ipc: am62xx: Add IPC firmwares for am62xx")
uses other platform specific firmware in folder name "am62xx"

This naming even when comparing with other K3 generation
platform firmware is inconsistent.

This patch is to just rename the folder to stay consistent.
Also, while at it, update the WHENCE to reflect the correct location
of the dm firmware for am62xx.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Acked-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.03.00.07 for AM62x

This update brings in support for Low Power Mode and more
stable sequence w.r.t DDR.

MD5 Checksum:
13a92ef832f5946bd0b5aec7dffafd7d  ti-dm/am62x/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.03.00.04 for AM62x

Update to introduce ti-dm firmware for AM62x platform.

MD5 Checksum:
c9e2dca6e66fd498089e4c7600ff62d9  ti-dm/am62x/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

Update the following ti-dm firmware
08.02.00.04 for j7200
08.02.00.04 for j721e

Key fix includes HS boot regression caused by toolchain
migration.

MD5 Checksums:
3e486635bfe1dda3a562890772f8bfc5  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
a5be4e51b234bd2535e379092ae371bf  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Rishabh Garg <rishabh@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Update the following ti-dm firmware
08.02.00.03 for J7200
08.02.00.03 for J721E

Updated with SYSFW v2022.01

MD5 Checksums:
58309d20efd3c8f8cc8135331ec5ad9a ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
6f7c969325bbcbb941859ad10f7d97e9 ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Rishabh Garg <rishabh@ti.com>

Update the following ti-dm firmware
08.00.04.02 for j721s2

Updated for SYSFW v2022.01

MD5 Checksums:
3ea221a4399b37f9810f3c64b3137806  ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Rishabh Garg <rishabh@ti.com>
[praneet@ti.com: Fix WHENCE and firmware permissions]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Update the following ti-dm firmware
08.01.00.12 for J7200
08.01.00.12 for J721E

Migration to SysFw v2021.09a

MD5 Checksums:
d5ab45c9310fba0f04dde46862ce8e6d ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
3f56d2044c12871d5dc3070284335fc0 ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Ankur <ankurbaranwal@ti.com>

Update the following ti-dm firmware
08.01.00.11 for J7200
08.01.00.11 for J721E

Firmware Update for TI-Clang compiler migration

MD5 Checksums:
40e0cfd7645b1888eceb671650a6633b ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
8661368a0c26673f3dbcd4c035f9ce6c ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Ankur <ankurbaranwal@ti.com>

Update the following ti-dm firmware
08.01.00.08 for J7200
08.01.00.08 for J721E

Updated for SysFW update v2021.09

MD5 Checksums:
3b934e26fb4551e38482fefd5145f3fa ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
56fba244dd3fd5da86e8baf4762c9d30 ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Ankur <ankurbaranwal@ti.com>

To place the resource_table at aligned address

08.00.00.32 for j721e
08.00.00.32 for j7200

md5sum:
9112e017e22cdeb06929e229c142a3ae ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
7b89f1bfa0fa789498a1433ca26ae75e ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: Sujith S <sujith.s@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>

sujith authored 3 years ago and Nishanth Menon committed 3 years ago

Update the following ti-dm firmware
08.00.00.26 for J7200
08.00.00.26 for J721E

MD5 Checksums:
ca928ec609419db7f7471ad6b0c71225 ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
a2fd3680c68b23041be9766a2c92eb4f ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>

Update the ti-dm firmware from 07.03.00.xx to
08.00.00.23 for J7200
08.00.00.18 for J721E

This firmware is compatible with the TIFS 2021.05

MD5 Checksums:
b0c76d065b199a20ae9c7f2bc7c8563f ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
634b2b1d89dd7d7360cde8074bab7434 ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Signed-off-by: sujith <sujith.s@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Update the ti-dm firmware from 07.03.00.1x to
07.03.00.21 for J721E and J7200

This firmware is compatible with the TIFS v2021.01a.

MD5 Checksums:
92cffd237ccec87549a866ad6a46873e  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
cfae4b69419d7aac67c92bcb62c195a8  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f

Binaries obtained:
J7200: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J7200.07.03.00.21
J721E: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J721E.07.03.00.21



Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Update the ti-dm firmware from 07.02.00.10 to
* 07.03.00.12 for J721E
* 07.03.00.10 for J7200

This firmware is compatible with the TIFS v2021.01.

MD5 Checksums:
9a0da1df47e65d30f6c8af2d68bdd97d  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
f4fb1ecde204790866c9955bd5cb668f  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Binaries obtained:
J7200: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J7200.07.03.00.10
J721E: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J721E.07.03.00.12



Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Update the ti-dm firmware from 07.02.00.05 to 07.02.00.10

This firmware is compatible with the TIFS v2020.12a.

MD5 Checksums:

15edb8bb0b93c76fff45d1dc9d62c356  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
e7fedb6229cd9075e6c8ec07b84fbf7b  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f

Binaries obtained:
J7200: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J7200.07.02.00.10
J721e: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J721E.07.02.00.10



Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>

Update the ti-dm firmware from 07.01.00.38 to 07.02.00.05

This firmware is compatible with the TIFS v2020.12.

MD5 Checksums:

b67b93cb831df3b4c21d388b832ffa72  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
6fec17d1ba364c3b1b1cbb08265c2311  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f

Binaries obtained:
J7200: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J7200.07.02.00.05
J721e: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J721E.07.02.00.05



Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>

Update the ti-dm firmware from 07.01.00.33 to 07.01.00.38

This firmware is compatible with the TIFS 2020.08b.

MD5 Checksums:
01778fb0ad64e20651f7fe3607d1dcbc  j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
8ab57952a2869fa638dc6261cbd61e80  j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f

Binaries obtained:
J7200: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J7200.07.01.00.38
J721e: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J721E.07.01.00.38



Tested-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>

This Device Manager Firmware (version 07.01.00.33) includes
sciserver that moved from ti-sysfw for j721e and j7200 from version 2020.08b
also combined with ipc firmware for mcu1_0.

MD5 Checksums:
f75b7098b0395873ed40ec76d43476c0  ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
6aa7814305b10558ea8d2e9e15c69fb4  ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f

Binaries obtained:
J7200: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J7200.07.01.00.33
J721e: https://git.ti.com/cgit/processor-sdk/coresdk_rtos_releases/tag/?h=REL.CORESDK.J721E.07.01.00.33



Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>