.gitlab-ci.yml

 # The Docker image that will be used to build your app
-image: beagle/sphinx-build-env:latest
+image: registry.git.beagleboard.org/docs/sphinx-build-env:latest
+
 pages:
   tags:
   - docker-amd64
+  before_script:
+  - source ./venv-build-env.sh
   script:
   - "./gitlab-build.sh"
   artifacts:

_static/epilog/external.links

+.. _C:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/c.html
+
+.. _Assembly:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/assembly.html
+
+.. _Verilog:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/verilog.html
+
+.. _Zephyr:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/zephyr.html
+
+.. _Linux:
+   https://docs.beagleboard.cc/latest/intro/beagle101/linux.html
+
+.. _device-tree:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/device-tree.html
+
+.. _FPGA:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/fpga.html
+
+.. _basic wiring:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/basic-wiring.html
+
+.. _motors:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/motors.html
+
+.. _embedded serial interfaces:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/embedded-serial.html
+
+.. _OpenBeagle CI:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/openbeagle-ci.html
+
+.. _verification:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/verification.html
+
+.. _wireless communications:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/wireless-communications.html
+
+.. _Buildroot:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/buildroot.html
+
+.. _RISC-V ISA:
+   https://docs.beagleboard.cc/docs/latest/intro/beagle101/riscv.html
\ No newline at end of file

conf.py

@@ -17,15 +17,24 @@ from sphinx.application import Sphinx
 sys.path.append(str(Path(".").resolve()))
 
 project = 'gsoc.beagleboard.io'
-copyright = '2024, BeagleBoard.org'
+copyright = '2025, BeagleBoard.org'
 author = 'BeagleBoard.org'
 
+# Add epilog details to rst_epilog
+rst_epilog =""
+rst_epilog_path = "_static/epilog/"
+for (dirpath, dirnames, filenames) in os.walk(rst_epilog_path):
+    for filename in filenames:
+        with open(dirpath + filename) as f:
+            rst_epilog += f.read()
+
 # -- General configuration ---------------------------------------------------
 # https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration
 
 extensions = [
     "sphinx_design",
     "sphinxcontrib.youtube",
+    "sphinxcontrib.images",
     "sphinx_copybutton"
 ]
 
@@ -122,8 +131,8 @@ html_theme_options = {
     "use_edit_page_button": True,
     "show_toc_level": 1,
     "navbar_align": "right",
-    "show_nav_level": 2,
-    "announcement": "Welcome to the new site for BeagleBoard.org GSoC 2024 projects!",
+    "show_nav_level": 1,
+    "announcement": "Welcome to the site for BeagleBoard.org GSoC 2025 projects!",
     # "show_version_warning_banner": True,
     "navbar_center": ["navbar-nav"],
     "navbar_start": ["navbar-logo"],
@@ -181,6 +190,7 @@ latex_elements = {
     ),
 }
 
+sd_fontawesome_latex = True
 latex_engine = "xelatex"
 latex_logo = str("_static/images/logo-latex.pdf")
 latex_documents = []

guides/index.rst

@@ -12,14 +12,14 @@ Guides
 
    Spend your summer break writing code and learning about open source development while earning money!
    Accepted contributors work with a mentor and become a part of the open source community. Many become lifetime
-   open source developers! The 2024 contributor application window will be open from
-   `March 18th 2024 <https://developers.google.com/open-source/gsoc/timeline#march_18_-_1800_utc>`_ to
-   `April 2nd 2024 <https://developers.google.com/open-source/gsoc/timeline#april_2_-_1800_utc>`_!
+   open source developers! The 2025 contributor application window will be open from
+   `March 24 2025 <https://opensource.googleblog.com/2025/01/google-summer-of-code-2025-is-here.html>`_ to
+   `April April 8 2025 <https://opensource.googleblog.com/2025/01/google-summer-of-code-2025-is-here.html>`_!
    But don't wait for then to engage! Come to our `Discord <https://bbb.io/gsocchat>`_ and
    `Forum <https://bbb.io/gsocml>`_ to share ideas today.
 
 This section includes guides for :ref:`contributors <gsoc-contributor-guide>` & :ref:`mentors <gsoc-mentor-guide>` who want to participate 
-in GSoC 2024 with `BeagleBoard.org <www.beagleboard.org>`_. It's highly recommended to check `GSoC Frequently Asked Questions 
+in GSoC 2025 with `BeagleBoard.org <www.beagleboard.org>`_. It's highly recommended to check `GSoC Frequently Asked Questions 
 <https://developers.google.com/open-source/gsoc/faq>`_. For anyone who just want to contribute to this site we also have 
 a step by step :ref:`contribution guide <gsoc-site-editing-guide>`.
 

ideas/index.rst

@@ -28,30 +28,31 @@ Ideas
    | :bdg-info:`Low complexity`         | :bdg-info-line:`90 hours`     |
    +------------------------------------+-------------------------------+
 
-.. card:: Low-latency I/O RISC-V CPU core in FPGA fabric
+.. tip::
+   
+   Below are the latest project ideas, you can also check our our :ref:`gsoc-old-ideas` and :ref:`Past_Projects` for inspiration.
 
-   :fas:`microchip;pst-color-primary` FPGA gateware improvements :bdg-success:`Medium complexity` :bdg-success-line:`175 hours`
+.. card:: A Conversational AI Assistant for BeagleBoard using RAG and Fine-tuning
 
-   ^^^^
+   :fas:`brain;pst-color-secondary` Deep Learning :bdg-success:`Medium complexity` :bdg-success-line:`175 hours`
 
-   BeagleV-Fire features RISC-V 64-bit CPU cores and FPGA fabric. In that FPGA fabric, we'd like to
-   implement a RISC-V 32-bit CPU core with operations optimized for low-latency GPIO. This is similar
-   to the programmable real-time unit (PRU) RISC cores popularized on BeagleBone Black.
+   ^^^^
 
-   | **Goal:** RISC-V-based CPU on BeagleV-Fire FPGA fabric with GPIO
-   | **Hardware Skills:** Verilog, Verification, FPGA
-   | **Software Skills:** RISC-V ISA, assembly, `Linux`_
-   | **Possible Mentors:** `Cyril Jean <https://forum.beagleboard.org/u/vauban>`_, `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_
+   BeagleBoard currently lacks an AI-powered assistant to help users troubleshoot errors. This project aims to address that need while also streamlining the onboarding process for new contributors, enabling them to get started more quickly.
 
+   | **Goal:** Develop a domain-specific chatbot for BeagleBoard using a combination of RAG and fine-tuning of an open-source LLM (like Llama 3, Mixtral, or Gemma).  This chatbot will assist users with troubleshooting, provide information about BeagleBoard products, and streamline the onboarding process for new contributors.
+   | **Hardware Skills:** Ability to test applications on BeagleBone AI-64/BeagleY-AI and optimize for performance using quantization techniques.
+   | **Software Skills:** Python, RAG, Scraping techniques, Fine tuning LLMs, Gradio, Hugging Face Inference Endpoints, NLTK/spaCy, Git
+   | **Possible Mentors:** `Aryan Nanda <https://forum.beagleboard.org/u/aryan_nanda/>`_
+   
    ++++
 
-   .. button-link:: https://forum.beagleboard.org/t/low-latency-risc-v-i-o-cpu-core/37156
+   .. button-link:: https://forum.beagleboard.org/t/beaglemind/40806
       :color: danger
       :expand:
 
       :fab:`discourse;pst-color-light` Discuss on forum
 
-
 .. card:: Update beagle-tester for mainline testing
 
    :fab:`linux;pst-color-primary` Linux kernel improvements :bdg-success:`Medium complexity` :bdg-danger-line:`350 hours`
@@ -63,8 +64,8 @@ Ideas
    and device-tree overlays on various Beagle computers.
 
    | **Goal:** Execution on Beagle test farm with over 30 mikroBUS boards testing all mikroBUS enabled cape interfaces (PWM, ADC, UART, I2C, SPI, GPIO and interrupt) performing weekly mainline Linux regression verification
-   | **Hardware Skills:** basic wiring, familiarity with embedded serial interfaces
-   | **Software Skills:** device-tree, `Linux`_, `C`_, continuous integration with GitLab, Buildroot
+   | **Hardware Skills:** `basic wiring`_, `embedded serial interfaces`_
+   | **Software Skills:** `device-tree`_, `Linux`_, `C`_, `OpenBeagle CI`_, `Buildroot`_
    | **Possible Mentors:** `Deepak Khatri <https://forum.beagleboard.org/u/lorforlinux>`_, `Anuj Deshpande <https://forum.beagleboard.org/u/Anuj_Deshpande>`_, `Dhruva Gole <https://forum.beagleboard.org/u/dhruvag2000>`_
 
    ++++
@@ -86,7 +87,7 @@ Ideas
    acceptable upstream.
 
    | **Goal:** Add functional gaps, submit upstream patches for these drivers and respond to feedback
-   | **Hardware Skills:** Familiarity with wireless communication
+   | **Hardware Skills:** `wireless communications`_
    | **Software Skills:** `C`_, `Linux`_
    | **Possible Mentors:** `Ayush Singh <https://forum.beagleboard.org/u/ayush1325>`_, `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_
 
@@ -108,7 +109,7 @@ Ideas
    needs to be cleaned up. We can also work on support for Raspberry Pi if UCSD releases their Hat for it.
 
    | **Goal:** Update librobotcontrol for Robotics Cape on BeagleBone AI, BeagleBone AI-64 and BeagleV-Fire
-   | **Hardware Skills:** Basic wiring, some DC motor familiarity
+   | **Hardware Skills:** `basic wiring`_, `motors`_
    | **Software Skills:** `C`_, `Linux`_
    | **Possible Mentors:** `Deepak Khatri <https://forum.beagleboard.org/u/lorforlinux>`_, `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_
    
@@ -122,7 +123,7 @@ Ideas
 
 .. card:: Upstream Zephyr Support on BBAI-64 R5
 
-   :fas:`timeline;pst-color-secondary` RTOS/microkernel imporvements :bdg-success:`Medium complexity` :bdg-success-line:`350 hours`
+   :fas:`timeline;pst-color-secondary` RTOS/microkernel imporvements :bdg-success:`Medium complexity` :bdg-danger-line:`350 hours`
    
    ^^^^
 
@@ -143,41 +144,9 @@ Ideas
 
       :fab:`discourse;pst-color-light` Discuss on forum
 
-.. card:: Enhanced Media Experience with AI-Powered Commercial Detection and Replacement
-
-   :fas:`brain;pst-color-secondary` Deep Learning :bdg-success:`Medium complexity` :bdg-success-line:`350 hours`
-   
-   ^^^^
 
-   Leveraging the capabilities of BeagleBoard’s powerful processing units, the project will focus on creating a real-time, efficient solution that enhances media consumption experiences by seamlessly integrating custom audio streams during commercial breaks.
 
-   | **Goal:** Build a deep learning model, training data set, training scripts, and a runtime for detection and modification of the video stream.
-   | **Hardware Skills:** Ability to capture and display video streams using `Beagleboard ai-64 <https://www.beagleboard.org/boards/beaglebone-ai-64>`_
-   | **Software Skills:** `Python <https://www.python.org/>`_, `TensorFlow <https://www.tensorflow.org/>`_, `TFlite <https://www.tensorflow.org/lite>`_, `Keras <https://www.tensorflow.org/guide/keras>`_, `GStreamer <https://gstreamer.freedesktop.org/>`_, `OpenCV <https://opencv.org/>`_
-   | **Possible Mentors:** `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_, `Deepak Khatri <https://forum.beagleboard.org/u/lorforlinux>`_
-
-   ++++
 
-.. card:: Embedded differentiable logic gate networks for real-time interactive and creative applications
-
-   :fas:`brain;pst-color-secondary` Creative AI :bdg-success:`Medium complexity` :bdg-success-line:`350 hours`
-   
-   ^^^^
-
-   This project seeks to explore the potential of creative embedded AI, specifically using `Differentiable Logic (DiffLogic) <https://github.com/Felix-Petersen/difflogic>`_, by creating a system that can perform tasks like machine listening, sensor processing, sound and gesture classification, and generative AI.
-
-   | **Goal:** Develop an embedded machine learning system on BeagleBone that leverages `Differentiable Logic (DiffLogic) <https://github.com/Felix-Petersen/difflogic>`_ for real-time interactive music creation and environment sensing. 
-   | **Hardware Skills:** Audio and sensor IO with `Bela.io <http://bela.io>`_
-   | **Software Skills:** Machine learning, deep learning, BeagleBone Programmable Real Time Unit (PRU) programming (see `PRU Cookbook <https://docs.beagleboard.org/latest/books/pru-cookbook/index.html>`_).
-   | **Possible Mentors:** `Jack Armitage <https://forum.beagleboard.org/u/jarm>`_, `Chris Kiefer <https://forum.beagleboard.org/u/luuma>`_
-
-   ++++
-
-   .. button-link:: https://forum.beagleboard.org/t/enhanced-media-experience-with-ai-powered-commercial-detection-and-replacement/37358
-      :color: danger
-      :expand:
-
-      :fab:`discourse;pst-color-light` Discuss on forum
 
 .. button-link:: https://forum.beagleboard.org/tag/gsoc-ideas
    :color: danger
@@ -186,13 +155,7 @@ Ideas
 
    :fab:`discourse;pst-color-light` Visit our forum to see newer ideas being discussed!
 
+.. toctree::
+   :hidden:
 
-.. tip::
-   
+   old/index
\ No newline at end of file
-   You can also check our our :ref:`gsoc-old-ideas` and :ref:`Past_Projects` for inspiration.
-
-.. _Linux:
-   https://docs.beagleboard.org/latest/intro/beagle101/linux.html
-
-.. _C:
-   https://jkridner.beagleboard.io/docs/latest/intro/beagle101/learning-c.html

ideas/old/automation-and-industrial-io.rst

@@ -17,13 +17,15 @@ into professional automation tasks, is strongly desired.
     ^^^^
 
     - **Goal:** Complete implementation of librobotcontrol on BeagleBone AI/AI-64.
-    - **Hardware Skills:** Basic wiring
-    - **Software Skills:** C, Linux
-    - **Possible Mentors:** jkridner, lorforlinux
-    - **Expected Size of Project:** 350 hrs
+    - **Hardware Skills:** `basic wiring`_, `motors`_
+    - **Software Skills:** `C`_, `Linux`_
+    - **Possible Mentors:** `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_, `Deepak Khatri <https://forum.beagleboard.org/u/lorforlinux>`_ 
+    - **Expected Size of Project:** 175 hrs
     - **Rating:** Medium
-    - **Upstream Repository:** https://github.com/jadonk/librobotcontrol/tree/bbai
-    - **References:** 
+    - **Upstream Repository:** `BeagleBoard.org / librobotcontrol · GitLab <https://openbeagle.org/beagleboard/librobotcontrol>`_
+    - **References:**
+        - `Robotics Control Library — BeagleBoard Documentation <https://docs.beagle.cc/projects/librobotcontrol/docs/index.html>`_
+        - `Robot Control Library: Main Page <https://old.beagleboard.org/static/librobotcontrol/>`_
         - http://www.strawsondesign.com/docs/librobotcontrol/index.html
 
     ++++

ideas/old/deep-learning.rst

@@ -14,6 +14,48 @@ For some background, be sure to check out `simplify embedded edge AI development
 <https://e2e.ti.com/blogs_/b/process/posts/simplify-embedded-edge-ai-development>`_ 
 post from TI.
 
+.. card:: Enhanced Media Experience with AI-Powered Commercial Detection and Replacement
+
+   :fas:`brain;pst-color-secondary` Deep Learning :bdg-success:`Medium complexity` :bdg-danger-line:`350 hours`
+   
+   ^^^^
+
+   Leveraging the capabilities of BeagleBoard’s powerful processing units, the project will focus on creating a real-time, efficient solution that enhances media consumption experiences by seamlessly integrating custom audio streams during commercial breaks.
+
+   | **Goal:** Build a deep learning model, training data set, training scripts, and a runtime for detection and modification of the video stream.
+   | **Hardware Skills:** Ability to capture and display video streams using `BeagleBone AI-64 <https://www.beagleboard.org/boards/beaglebone-ai-64>`_
+   | **Software Skills:** `Python <https://www.python.org/>`_, `TensorFlow <https://www.tensorflow.org/>`_, `TFlite <https://www.tensorflow.org/lite>`_, `Keras <https://www.tensorflow.org/guide/keras>`_, `GStreamer <https://gstreamer.freedesktop.org/>`_, `OpenCV <https://opencv.org/>`_
+   | **Possible Mentors:** `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_, `Deepak Khatri <https://forum.beagleboard.org/u/lorforlinux>`_
+
+   ++++
+
+   .. button-link:: https://forum.beagleboard.org/t/enhanced-media-experience-with-ai-powered-commercial-detection-and-replacement/37358
+    :color: danger
+    :expand:
+
+    :fab:`discourse;pst-color-light` Discuss on forum
+
+.. card:: Embedded differentiable logic gate networks for real-time interactive and creative applications
+
+   :fas:`brain;pst-color-secondary` Creative AI :bdg-success:`Medium complexity` :bdg-danger-line:`350 hours`
+   
+   ^^^^
+
+   This project seeks to explore the potential of creative embedded AI, specifically using `Differentiable Logic (DiffLogic) <https://github.com/Felix-Petersen/difflogic>`_, by creating a system that can perform tasks like machine listening, sensor processing, sound and gesture classification, and generative AI.
+
+   | **Goal:** Develop an embedded machine learning system on BeagleBone that leverages `Differentiable Logic (DiffLogic) <https://github.com/Felix-Petersen/difflogic>`_ for real-time interactive music creation and environment sensing. 
+   | **Hardware Skills:** Audio and sensor IO with `Bela.io <http://bela.io>`_
+   | **Software Skills:** Machine learning, deep learning, BeagleBone Programmable Real Time Unit (PRU) programming (see `PRU Cookbook <https://docs.beagleboard.org/latest/books/pru-cookbook/index.html>`_).
+   | **Possible Mentors:** `Jack Armitage <https://forum.beagleboard.org/u/jarm>`_, `Chris Kiefer <https://forum.beagleboard.org/u/luuma>`_
+
+   ++++
+
+   .. button-link:: https://forum.beagleboard.org/t/embedded-differentiable-logic-gate-networks-for-real-time-interactive-and-creative-applications/37768
+      :color: danger
+      :expand:
+
+      :fab:`discourse;pst-color-light` Discuss on forum
+
 .. card:: 
 
     :fas:`brain;pst-color-secondary` **YOLO models on the X15/AI-64**

ideas/old/fpga-projects.rst

@@ -3,6 +3,29 @@
 FPGA based projects
 ####################
 
+.. card:: Low-latency I/O RISC-V CPU core in FPGA fabric
+
+   :fas:`microchip;pst-color-primary` FPGA gateware improvements :bdg-success:`Medium complexity` :bdg-success-line:`175 hours`
+
+   ^^^^
+
+   BeagleV-Fire features RISC-V 64-bit CPU cores and FPGA fabric. In that FPGA fabric, we'd like to
+   implement a RISC-V 32-bit CPU core with operations optimized for low-latency GPIO. This is similar
+   to the programmable real-time unit (PRU) RISC cores popularized on BeagleBone Black.
+
+   | **Goal:** RISC-V-based CPU on BeagleV-Fire FPGA fabric with GPIO
+   | **Hardware Skills:** `Verilog`_, `verification`_, `FPGA`_
+   | **Software Skills:** `RISC-V ISA`_, `assembly`_, `Linux`_
+   | **Possible Mentors:** `Cyril Jean <https://forum.beagleboard.org/u/vauban>`_, `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_
+
+   ++++
+
+   .. button-link:: https://forum.beagleboard.org/t/low-latency-risc-v-i-o-cpu-core/37156
+      :color: danger
+      :expand:
+
+      :fab:`discourse;pst-color-light` Discuss on forum
+      
 .. card:: 
 
     :fas:`microchip;pst-color-secondary` **RISC-V Based PRU on FPGA**

ideas/old/index.rst

-:orphan:
-
 .. _gsoc-old-ideas:
 
 Old GSoC Ideas

projects/2024.rst

+.. _gsoc-2024-projects:
+
+:far:`calendar-days` 2024
+##########################
+
+
+.. note:: Only 3 out of 4 :ref:`accepted students <gsoc-2024-proposals>` were able to complete the program in 2024.
+
+Enhanced Media Experience with AI-Powered Commercial Detection and Replacement
+********************************************************************************
+
+.. youtube:: Kagg8JycOfo
+   :width: 100%
+
+| **Summary:** Leveraging the capabilities of BeagleBoard’s powerful processing units, the project will focus on creating a real-time, efficient solution that enhances media consumption experiences by seamlessly integrating custom audio streams during commercial breaks.
+
+- Develop a neural network model: Combine Convolutional Neural Networks (CNNs) and Recurrent Neural Networks (RNNs) to analyze video and audio data, accurately identifying commercial segments within video streams.
+- Implement a real-time pipeline: Create a real-time pipeline for BeagleBoard that utilizes the trained model to detect commercials in real-time and replace them with alternative content or obfuscate them, alongside replacing the audio with predefined streams.
+- Optimize for BeagleBoard: Ensure the entire system is optimized for real-time performance on BeagleBoard hardware, taking into account its unique computational capabilities and constraints.
+
+
+**Contributor:** Aryan Nanda
+
+**Mentors:** `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_, `Deepak Khatri <https://forum.beagleboard.org/u/lorforlinux>`_, Kumar Abhishek
+
+.. grid:: 2 2 2 2
+
+   .. grid-item::
+
+      .. button-link:: https://summerofcode.withgoogle.com/archive/2024/projects/UOX7iDEU
+         :color: info
+         :shadow:
+         :expand:
+
+         :fab:`google;pst-color-light` - GSoC Registry
+   
+   .. grid-item::
+
+      .. button-ref:: gsoc-2024-proposal-aryan-nanda
+         :color: primary
+         :shadow:
+         :expand:
+
+         Proposal
+
+
+Low-latency I/O RISC-V CPU core in FPGA fabric
+************************************************
+
+.. youtube:: ic0RRK6d3hg
+  :width: 100%
+
+| **Summary:** Implementation of PRU subsystem on BeagleV-Fire’s FPGA fabric, resulting in a real-time microcontroller system working alongside the main CPU, providing low-latency access to I/O.
+
+**Contributor:** Atharva Kashalkar
+
+**Mentors:** `Cyril Jean <https://forum.beagleboard.org/u/vauban>`_, `Jason Kridner <https://forum.beagleboard.org/u/jkridner>`_, Vedant Paranjape, Kumar Abhishek
+
+.. grid:: 2 2 2 2
+
+   .. grid-item::
+
+      .. button-link:: https://summerofcode.withgoogle.com/archive/2024/projects/KjUoFlg2
+         :color: info
+         :shadow:
+         :expand:
+
+         :fab:`google;pst-color-light` - GSoC Registry
+   
+   .. grid-item::
+
+      .. button-ref:: gsoc-2024-proposal-roger18
+         :color: primary
+         :shadow:
+         :expand:
+
+         Proposal
+
+Differentiable Logic for Interactive Systems and Generative Music - Ian Clester
+********************************************************************************
+
+.. youtube:: NvHxMCF8sAQ
+  :width: 100%
+
+| **Summary:** Developing an embedded machine learning system on BeagleBoard that leverages Differentiable Logic (DiffLogic) for real-time interactive music creation and environment sensing. The system will enable on-device learning, fine-tuning, and efficient processing for applications in new interfaces for musical expression.
+
+**Contributor:** Ian Clester
+
+**Mentors:** `Jack Armitage <https://forum.beagleboard.org/u/jarm/summary>`_, Chris Kiefer
+
+.. grid:: 2 2 2 2
+
+   .. grid-item::
+
+      .. button-link:: https://summerofcode.withgoogle.com/archive/2024/projects/FBk0MM8g
+         :color: info
+         :shadow:
+         :expand:
+
+         :fab:`google;pst-color-light` - GSoC Registry
+   
+   .. grid-item::
+
+      .. button-ref:: gsoc-2024-proposal-ijc
+         :color: primary
+         :shadow:
+         :expand:
+
+         Proposal
\ No newline at end of file

projects/index.rst

@@ -14,6 +14,11 @@ GSoC over the previous years is given in the section that follows.
     :margin: 4 4 0 0 
     :gutter: 4
 
+    .. grid-item-card:: :far:`calendar-days` 2024
+        :text-align: center
+        :link: gsoc-2024-projects
+        :link-type: ref
+
     .. grid-item-card:: :far:`calendar-days` 2023
         :text-align: center
         :link: gsoc-2023-projects
@@ -83,6 +88,7 @@ GSoC over the previous years is given in the section that follows.
     :maxdepth: 1
     :hidden:
 
+    2024
     2023
     2022
     2021

proposals/2024/index.rst

+.. _gsoc-2024-proposals:
+
+:far:`calendar-days` 2024
+##########################
+
+.. toctree::
+    :maxdepth: 1
+    
+    ijc/index
+    aryan_nanda/index
+    roger18/index
+    melta101/index
\ No newline at end of file