- Jan 25, 2020
-
-
Jon Maloy authored
Reflecting new realities. Signed-off-by:
Jon Maloy <jmaloy@redhat.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
- Jan 24, 2020
-
-
Johan Jonker authored
Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node and should be changed to 'mmc'. Signed-off-by:
Johan Jonker <jbx6244@gmail.com> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200116152230.29831-2-jbx6244@gmail.com Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
-
Dave Jiang authored
The idxd driver introduces the Intel Data Stream Accelerator [1] that will be available on future Intel Xeon CPUs. One of the kernel access point for the driver is through the dmaengine subsystem. It will initially provide the DMA copy service to the kernel. Some of the main functionality introduced with this accelerator are: shared virtual memory (SVM) support, and descriptor submission using Intel CPU instructions movdir64b and enqcmds. There will be additional accelerator devices that share the same driver with variations to capabilities. This commit introduces the probe and initialization component of the driver. [1]: https://software.intel.com/en-us/download/intel-data-streaming-accelerator-preliminary-architecture-specification Signed-off-by:
Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/157965023991.73301.6186843973135311580.stgit@djiang5-desk3.ch.intel.com Signed-off-by:
Vinod Koul <vkoul@kernel.org>
-
- Jan 23, 2020
-
-
Beniamin Bia authored
Add Beniamin Bia and Michael Hennerich as a maintainer for ADM1177 ADC. Signed-off-by:
Beniamin Bia <beniamin.bia@analog.com> Link: https://lore.kernel.org/r/20200114112159.25998-3-beniamin.bia@analog.com Signed-off-by:
Guenter Roeck <linux@roeck-us.net>
-
Andrew Lunn authored
phylink and phylib are interconnected. It makes sense for phylib and phy driver patches to be also reviewed by the phylink maintainer. So add Russell King as a designed reviewer of phylib. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
- Jan 22, 2020
-
-
David S. Miller authored
Signed-off-by:
David S. Miller <davem@davemloft.net> Acked-by:
Jakub Kicinski <kuba@kernel.org>
-
- Jan 16, 2020
-
-
Manivannan Sadhasivam authored
Since I've been doing the maintainership work for couple of cycles, we've decided to add myself as the co-maintainer along with Andreas. Link: https://lore.kernel.org/r/20200114084348.25659-2-manivannan.sadhasivam@linaro.org Cc: "Andreas Färber" <afaerber@suse.de> Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Olof Johansson <olof@lixom.net>
-
- Jan 15, 2020
-
-
Logan Gunthorpe authored
Some PLX Switches can expose DMA engines via extra PCI functions on the upstream port. Each function will have one DMA channel. This patch is just the core PCI driver skeleton and dma engine registration. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Link: https://lore.kernel.org/r/20200103212021.2881-2-logang@deltatee.com Signed-off-by:
Vinod Koul <vkoul@kernel.org>
-
- Jan 14, 2020
-
-
Ley Foon Tan authored
@altera.com email is going to removed. Change to @intel.com email. Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
-
- Jan 13, 2020
-
-
Srinivas Pandruvada authored
Add an entry for drivers/platform/x86/intel-uncore-frequency.c. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-
- Jan 11, 2020
-
-
Jakub Kicinski authored
My Netronome email address may become inactive soon. Signed-off-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
- Jan 10, 2020
-
-
John Garry authored
Set John Garry @ Huawei as the maintainer. Signed-off-by:
John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1575900490-74467-4-git-send-email-john.garry@huawei.com Signed-off-by:
Mark Brown <broonie@kernel.org>
-
- Jan 08, 2020
-
-
Niklas Cassel authored
As I am no longer with Linaro, I no longer have access to documentation for this IP. The Linaro email will start bouncing soon. Vinod is fully capable to maintain this driver by himself, therefore remove myself as co-maintainer for qcom-ethqos. Signed-off-by:
Niklas Cassel <niklas.cassel@wdc.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
Saravanan Sekar authored
Add MAINTAINERS entry for Monolithic Power Systems mpq7920 PMIC driver. Signed-off-by:
Saravanan Sekar <sravanhome@gmail.com> Link: https://lore.kernel.org/r/20200108131234.24128-5-sravanhome@gmail.com Signed-off-by:
Mark Brown <broonie@kernel.org>
-
- Jan 05, 2020
-
-
Krzysztof Kozlowski authored
The emails to ks.giri@samsung.com and vipul.pandya@samsung.com bounce with 550 error code: host mailin.samsung.com[203.254.224.12] said: 550 5.1.1 Recipient address rejected: User unknown (in reply to RCPT TO command)" Drop Girish K S and Vipul Pandya from sxgbe maintainers entry. Cc: Byungho An <bh74.an@samsung.com> Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
Paul Walmsley authored
Formalize, in kernel documentation, the patch acceptance policy for arch/riscv. In summary, it states that as maintainers, we plan to only accept patches for new modules or extensions that have been frozen or ratified by the RISC-V Foundation. We've been following these guidelines for the past few months. In the meantime, we've received quite a bit of feedback that it would be helpful to have these guidelines formally documented. Based on a suggestion from Matthew Wilcox, we also add a link to this file to Documentation/process/index.rst, to make this document easier to find. The format of this document has also been changed to align to the format outlined in the maintainer entry profiles, in accordance with comments from Jon Corbet and Dan Williams. Signed-off-by:
Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Krste Asanovic <krste@berkeley.edu> Cc: Andrew Waterman <waterman@eecs.berkeley.edu> Cc: Matthew Wilcox <willy@infradead.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Jonathan Corbet <corbet@lwn.net>
-
- Jan 02, 2020
-
-
David S. Miller authored
Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
- Dec 25, 2019
-
-
Netanel Belgazal authored
Signed-off-by:
Netanel Belgazal <netanel@amazon.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
- Dec 22, 2019
-
-
Paolo Bonzini authored
Radim's kernel.org email is bouncing, which I take as a signal that he is not really able to deal with KVM at this time. Make MAINTAINERS match the effective value of KVM's bus factor. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
James Hogan authored
I haven't been active for 18 months, and don't have the hardware set up to test KVM for MIPS, so mark it as orphaned and remove myself as maintainer. Hopefully somebody from MIPS can pick this up. Signed-off-by:
James Hogan <jhogan@kernel.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: kvm@vger.kernel.org Cc: linux-mips@vger.kernel.org Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Dec 20, 2019
-
-
Christoph Hellwig authored
The sifive_l2_cache.c is in no way related to RISC-V architecture memory management. It is a little stub driver working around the fact that the EDAC maintainers prefer their drivers to be structured in a certain way that doesn't fit the SiFive SOCs. Move the file to drivers/soc and add a Kconfig option for it, as well as the whole drivers/soc boilerplate for CONFIG_SOC_SIFIVE. Fixes: a967a289 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs") Signed-off-by:
Christoph Hellwig <hch@lst.de> Reviewed-by:
Borislav Petkov <bp@suse.de> [paul.walmsley@sifive.com: keep the MAINTAINERS change specific to the L2$ controller code] Signed-off-by:
Paul Walmsley <paul.walmsley@sifive.com>
-
Niklas Cassel authored
CPR (Core Power Reduction) is a technology that reduces core power on a CPU or other device. It reads voltage settings in efuse from product test process as initial settings. Each OPP corresponds to a "corner" that has a range of valid voltages for a particular frequency. While the device is running at a particular frequency, CPR monitors dynamic factors such as temperature, etc. and adjusts the voltage for that frequency accordingly to save power and meet silicon characteristic requirements. This driver is based on an RFC by Stephen Boyd[1], which in turn is based on work by others on codeaurora.org[2]. [1] https://lkml.org/lkml/2015/9/18/833 [2] https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/drivers/regulator/cpr-regulator.c?h=msm-4.14 Co-developed-by:
Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by:
Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by:
Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-
Rafael J. Wysocki authored
The Erik's last name and email address have changed recently, so update MAINTAINERS and .mailmap to reflect that change. Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-
- Dec 19, 2019
-
-
Stanislaw Gruszka authored
My RedHat email address does not work any longer. Change to my private one. Signed-off-by:
Stanislaw Gruszka <stf_xl@wp.pl> Signed-off-by:
Kalle Valo <kvalo@codeaurora.org>
-
- Dec 13, 2019
-
-
Subash Abhinov Kasiviswanathan authored
Add myself and Sean as maintainers for rmnet driver. Signed-off-by:
Sean Tranchetti <stranche@codeaurora.org> Signed-off-by:
Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> Signed-off-by:
Jakub Kicinski <jakub.kicinski@netronome.com>
-
- Dec 11, 2019
-
-
Andy Shevchenko authored
When gpiolib.h internal header had been split to few, the commit 77cb907a ("gpiolib: acpi: Split ACPI stuff to gpiolib-acpi.h") in particular missed the MAINTAINERS database update. Do it here. Fixes: 77cb907a ("gpiolib: acpi: Split ACPI stuff to gpiolib-acpi.h") Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com>
-
- Dec 10, 2019
-
-
Amir Goldstein authored
It is already formatted as RST. Signed-off-by:
Amir Goldstein <amir73il@gmail.com> Signed-off-by:
Miklos Szeredi <mszeredi@redhat.com>
-
Simona Vetter authored
I've spent a bit too much time reviewing all kinds of users all over the kernel for this buffer sharing infrastructure. And some of it is at least questionable. Make sure we at least see when this stuff flies by. Acked-by:
Alex Deucher <alexander.deucher@amd.com> Acked-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Sumit Semwal <sumit.semwal@linaro.org> Acked-by:
Dave Airlie <airlied@gmail.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Rob Herring <robh@kernel.org> Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Link: https://patchwork.freedesktop.org/patch/msgid/20191204215105.874074-1-daniel.vetter@ffwll.ch
-
- Dec 09, 2019
-
-
Krzysztof Kozlowski authored
Samsung SoC (S3C, S5P and Exynos) serial driver does not have dedicated reviewing person so some patches might be missed be Samsung-related folks (e.g. not even reaching Samsung SoC mailing list). Include them in generic Samsung SoC maintainer entry to provide some level of reviewing and care. This will not change handling of patches (via serial tree). Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org>
-
Lukasz Luba authored
Update Lukasz Luba's email address to @arm.com in MAINTAINERS and map it correctly in .mailmap file. Signed-off-by:
Lukasz Luba <lukasz.luba@arm.com> Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org>
-
Lukas Bulwahn authored
Commit ae24f2b6 ("MAINTAINERS: add myself as maintainer of Cadence I3C master controller driver") slips in some formatting with spaces instead of tabs, which ./scripts/checkpatch.pl -f MAINTAINERS complains about: #7838: FILE: MAINTAINERS:7838: M: Przemysław Gaj <pgaj@cadence.com> WARNING: MAINTAINERS entries use one tab after TYPE: #7839: FILE: MAINTAINERS:7839: S: Maintained WARNING: MAINTAINERS entries use one tab after TYPE: #7840: FILE: MAINTAINERS:7840: F: Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt WARNING: MAINTAINERS entries use one tab after TYPE: #7841: FILE: MAINTAINERS:7841: F: drivers/i3c/master/i3c-master-cdns.c Fixes: ae24f2b6 ("MAINTAINERS: add myself as maintainer of Cadence I3C master controller driver") Signed-off-by:
Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com>
-
- Dec 08, 2019
-
-
Dan Murphy authored
Adding myself to support the TI TCAN4X5X SPI CAN device. Signed-off-by:
Dan Murphy <dmurphy@ti.com> Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de>
-
Dan Murphy authored
Since I refactored the code to create a m_can framework and we have a MMIO MCAN IP as well add myself to help maintain the code. Signed-off-by:
Dan Murphy <dmurphy@ti.com> Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de>
-
- Dec 07, 2019
-
-
Daniel Lezcano authored
The thermal trees were merged into a single one shared with the maintainer of the subsystem. Update the location of this group git tree. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Link: https://lore.kernel.org/r/20191205121227.19203-1-daniel.lezcano@linaro.org
-
Zhang Rui authored
Add Daniel Lezcano as the co-maintainer of thermal subsystem. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191205115150.18836-1-rui.zhang@intel.com
-
Florian Fainelli authored
The last two emails to Eduardo were returned with: 452 4.2.2 The email account that you tried to reach is over quota. Please direct the recipient to https://support.google.com/mail/?p=OverQuotaTemp j17sor626162wrq.49 - gsmtp Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191123154303.2202-1-f.fainelli@gmail.com
-
- Dec 05, 2019
-
-
Robert Richter authored
Switch all addresses from @cavium.com to @marvell.com. On that occasion, switch also to my Marvell address for all my Cavium/Marvell entries. Link: https://lore.kernel.org/r/20191119190436.17875-3-rrichter@marvell.com Cc: Sunil Goutham <sgoutham@marvell.com> Cc: George Cherian <gcherian@marvell.com> Cc: soc@kernel.org Signed-off-by:
Robert Richter <rrichter@marvell.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
-
Jan Glauber authored
Remove my maintainer entries for ThunderX drivers as I'm moving on and won't have access to ThunderX hardware anymore and add Robert. Also remove the obsolete addresses of David Daney and Steven Hill. Add an entry to .mailmap for my various email addresses. Link: https://lore.kernel.org/r/20191119190436.17875-2-rrichter@marvell.com Cc: Ganapatrao Prabhakerrao Kulkarni <gkulkarni@marvell.com> Cc: soc@kernel.org Signed-off-by:
Jan Glauber <jglauber@marvell.com> Signed-off-by:
Robert Richter <rrichter@marvell.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
-
- Dec 03, 2019
-
-
Sriram Dash authored
Since we are actively working on MMIO MCAN device driver, as discussed with Marc, I am adding myself as a maintainer. Signed-off-by:
Sriram Dash <sriram.dash@samsung.com> Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de>
-
Appana Durga Kedareswara rao authored
Added entry for xilinx CAN driver. Signed-off-by:
Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de>
-