- Nov 18, 2024
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Zain Siddavatam authored
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- Sep 04, 2024
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Jason Kridner authored
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vision-apps.dtbo also disables capture and display related peripherals from Linux so that it can be used by RTOS Signed-off-by:
Rahul T R <r-ravikumar@ti.com>
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Assert reset in probe. This ensures the DSP is in reset and does not start running bogus code when remote proc driver invokes prepare call to load firmware. Signed-off-by:
Hari Nagalla <hnagalla@ti.com>
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The arm64 defconfig does not support the docker usecase. Enable the missing configuration options. The resulting .config was validated with [1]. ... Generally Necessary: - CONFIG_NAMESPACES: missing - CONFIG_NET_NS: missing - CONFIG_PID_NS: missing - CONFIG_IPC_NS: missing - CONFIG_UTS_NS: missing Optional Features: - CONFIG_USER_NS: missing - CONFIG_MEMCG_SWAP: missing (cgroup swap accounting is currently enabled) - CONFIG_BLK_DEV_THROTTLING: missing - CONFIG_CGROUP_NET_PRIO: missing - CONFIG_CFS_BANDWIDTH: missing - CONFIG_RT_GROUP_SCHED: missing - CONFIG_IP_NF_TARGET_REDIRECT: missing - CONFIG_IP_VS_NFCT: missing - CONFIG_IP_VS_PROTO_TCP: missing - CONFIG_IP_VS_PROTO_UDP: missing - CONFIG_EXT3_FS_XATTR: missing - CONFIG_EXT3_FS_POSIX_ACL: missing - CONFIG_EXT3_FS_SECURITY: missing (enable these ext3 configs if you are using ext3 as backing filesystem) - CONFIG_EXT4_FS_SECURITY: missing (enable these ext4 configs if you are using ext4 as backing filesystem) - Network Drivers: - "overlay": Optional (for encrypted networks): - CONFIG_CRYPTO_SEQIV: missing - CONFIG_XFRM: missing - CONFIG_XFRM_USER: missing - CONFIG_XFRM_ALGO: missing - CONFIG_INET_ESP: missing ... [1] https://raw.githubusercontent.com/moby/moby/v20.10.12/contrib/check-config.sh Signed-off-by:
Chirag Shilwant <c-shilwant@ti.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com>
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The logo generation utility is capturing the source of the logo in the generated .c file. The source file is absolute (as passed by make), so the full path is captured. This makes the source fail reproducibility tests. We use basename() to just get the source file name, and use that in the generated .c file. Signed-off-by:
Bruce Ashfield <bruce.ashfield@gmail.com> Upstream-Status: Inappropriate Signed-off-by:
Denys Dmytriyenko <denys@konsulko.com>
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The file generated by conmakehash capture the application path used to generate the file. While that can be informative, it varies based on where the kernel was built, as the full path is captured. We tweak the application to use a second input as the "capture name", and then modify the Makefile to pass the basename of the source, making it reproducible. This could be improved by using some sort of path mapping, or the application manipualing argv[1] itself, but for now this solves the reprodicibility issue. Signed-off-by:
Bruce Ashfield <bruce.ashfield@gmail.com> Upstream-Status: Inappropriate Signed-off-by:
Denys Dmytriyenko <denys@konsulko.com>
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The script build_OID_registry captures the full path of itself in the generated data. This causes reproduciblity issues as the path is captured and packaged. We use the basename of the script instead, and that allows us to be reprodicible, with slightly less information captured in the output data (but the generating script can still easily be found). Signed-off-by:
Bruce Ashfield <bruce.ashfield@gmail.com> Upstream-Status: Inappropriate Signed-off-by:
Denys Dmytriyenko <denys@konsulko.com>
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Jason Kridner authored
This reverts commit 39293280.
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Jason Kridner authored
This reverts commit 81df1ad6.
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Jason Kridner authored
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- Aug 28, 2024
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Jason Kridner authored
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- Aug 01, 2024
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Hari Nagalla authored
The C7xv deep learning engine dsp core in AM62A has a local reset line from power state controller. In the absence of using the local reset, it is in an unknown state and when the module is turned on, CPU starts executing and may go into a bad state. Set local reset to 'true' for AM62A, so that the remote proc driver properly asserts the local reset before enabling the module to load the firmware. And it is deasserted after firmware load is complete to start the core. Signed-off-by:
Hari Nagalla <hnagalla@ti.com>
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Hari Nagalla authored
update the compatible string for c7xv deep learning DSP core in J722S. Signed-off-by:
Hari Nagalla <hnagalla@ti.com>
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Hari Nagalla authored
J722S uses the C7xv DSP based deep learning engine similar to AM62A, but the reset and module enable integration in the SoC is little different. It does not have local reset from power state controller. So, add a new compatible string to distinguish this difference. Signed-off-by:
Hari Nagalla <hnagalla@ti.com>
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Hari Nagalla authored
J722S uses the C7xv DSP based deep learning engine similar to AM62A, but the reset and module enable integration in the SoC is little different. It does not have local reset from power state controller. So, add a new compatible string to distinguish this difference. Signed-off-by:
Hari Nagalla <hnagalla@ti.com>
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Santhosh Kumar K authored
Move cqspi_restore_context() to cqspi_runtime_resume(), so that it can be called for both system resume and runtime resume. Also, add a call to cqspi_phy_set_dll_master() from cqspi_restore_context() for SDR mode. Signed-off-by:
Santhosh Kumar K <s-k6@ti.com>
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Santhosh Kumar K authored
After the PHY calibration process, store the final tuning point in the flash private data's phy_setting (f_pdata->phy_setting) Signed-off-by:
Santhosh Kumar K <s-k6@ti.com>
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Santhosh Kumar K authored
PHY DLL Master Control Register contains the details like bypass mode, delay element, master delay line locks on full/half cycle, which is configured before the calibration process. Move the configuration part to cqspi_phy_set_dll_master() to reuse it during runtime_resume restore_contest call. Signed-off-by:
Santhosh Kumar K <s-k6@ti.com>
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Prasanth Babu Mantena authored
This is no longer needed as we have PHY enabled for NAND SDR read and write and PHY can operate at 166 MHz. This reverts commit a34768f6 . Signed-off-by:
Prasanth Babu Mantena <p-mantena@ti.com> Acked-by:
Santhosh Kumar K <s-k6@ti.com>
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Prasanth Babu Mantena authored
Revert back the frequency settings that were done to work with OSPI NAND 8s mode. As we have enabled PHY for NAND read and write, we can now operate at 166 MHz. Reverts commit 742bc197 ("arm64: dts: ti: k3-j784s4: Update Nand node for Octal SDR") Signed-off-by:
Prasanth Babu Mantena <p-mantena@ti.com>
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Prasanth Babu Mantena authored
Revert back the frequency settings that were done to work with OSPI NAND 8s mode. As we have enabled PHY for NAND read and write, we can now operate at 166 MHz. Reverts commit dc50d257 ("arm64: dts: ti: k3-j721s2: Update Nand node for Octal SDR") Signed-off-by:
Prasanth Babu Mantena <p-mantena@ti.com>
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Prasanth Babu Mantena authored
Add status register check by polling the busy bit. This returns the completion status of the operation and data can be read only after this step. Signed-off-by:
Prasanth Babu Mantena <p-mantena@ti.com>
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Prasanth Babu Mantena authored
Depending on the probing order of dma vs ospi, dma failure is seen when ospi controller probes first and checks for available dma channel and fails. This patch fixes it by sending EPROBE_DEFER, which helps acquire dma channel after the dma controller probes. Signed-off-by:
Prasanth Babu Mantena <p-mantena@ti.com>
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- Jul 31, 2024
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Logan Bristol authored
Introduce minimal devicetree initializing only UART and SD capability for minimal platform board bring-up. SD features are reduced to 3.3V signaling and 25 MHz legacy mode. Signed-off-by:
Logan Bristol <l-bristol@ti.com>
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Brandon Brnich authored
Compliance test failing when trying to use format not supported by driver. This should fail gracefully and use default format parameters. Fixes: 06e248b5 ("media: chips-media: wave5: Use helpers to calculate bytesperline and sizeimage.") Signed-off-by:
Brandon Brnich <b-brnich@ti.com>
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- Jul 26, 2024
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MD Danish Anwar authored
There is a HW errata for 10M issues which is present on AM65x but not on AM64x. The workaround for this errata is to enable IEP1. Since both AM64x and AM65x shares the same ICSSG firmware, firmware is expecting IEP1 to be enabled for both AM64x and AM65x. As a result 10M Link fails on AM64x. Enable the quirk_10m_link_issue so that IEP1 can be enabled for AM64x Signed-off-by:
MD Danish Anwar <danishanwar@ti.com> Reviewed-by:
Daolin Qiu <d-qiu@ti.com>
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Santhosh Kumar K authored
PHY is tuned with optimal tuning point which allows controller to run at higher speeds. Hence, increase the data writes' throughput in OSPI/QSPI NAND flashes by enabling PHY for data writes to the NAND flash devices. The aim is to enable PHY only for the OSPI/QSPI NAND data writes, so, exclude other operations like register writes to NAND flashes, register and data writes to NOR flashes by introducing a check for the 'n_tx' (op->data.nbytes) value before enabling. Currently, OSPI/QSPI NOR's highest page size is 512 bytes, so, check whether 'n_tx' is greater than or equal to 1024. Signed-off-by:
Santhosh Kumar K <s-k6@ti.com>
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Santhosh Kumar K authored
Utilising PHY is limited to read operation, but, PHY can be enabled for data writes, register reads and/or writes in future. Hence, move the cqspi_phy_enable() and cqspi_readdata_capture() functions above all the read and write operations. Signed-off-by:
Santhosh Kumar K <s-k6@ti.com>
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- Jul 24, 2024
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Andrew Davis authored
Multiple mailbox users can share one interrupt line. This flag was mistakenly dropped as part of the FIFO removal. Mark the IRQ as shared. Reported-by:
Beleswar Padhi <b-padhi@ti.com> Fixes: 3f58c1f4 ("mailbox: omap: Remove kernel FIFO message queuing") Signed-off-by:
Andrew Davis <afd@ti.com> Tested-by:
Beleswar Padhi <b-padhi@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
The kernel FIFO queue has a couple issues. The biggest issue is that it causes extra latency in a path that can be used in real-time tasks, such as communication with real-time remote processors. The whole FIFO idea itself looks to be a leftover from before the unified mailbox framework. The current mailbox framework expects mbox_chan_received_data() to be called with data immediately as it arrives. Remove the FIFO and pass the messages to the mailbox framework directly as part of a threaded IRQ handler. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
It is much more clear to check if the hardware FIFO is full and return EBUSY if true. This allows us to also remove one level of indention from the core of this function. It also makes the similarities between omap_mbox_chan_send_noirq() and omap_mbox_chan_send() more obvious. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
This function only checks if mbox_chan *chan is not NULL, but that cannot be the case and if it was returning NULL which is not later checked doesn't save us from this. The second check for chan->con_priv is completely redundant as if it was NULL we would return NULL just the same. Simply dereference con_priv directly and remove this function. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
The driver stores a list of omap_mbox structs so it can later use it to lookup the mailbox names in of_xlate. This same information is already available in the mbox_controller passed into of_xlate. Simply use that data and remove the extra allocation and storage of the omap_mbox list. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
The mbox_controller struct is only needed in the probe function. Make it a local variable instead of storing a copy in omap_mbox_device to simplify that struct. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
Currently the driver loops through all mailbox child nodes twice, once to read in data from each node, and again to make use of this data. Instead read the data and make use of it in one pass. This removes the need for several temporary data structures and reduces the complexity of this main loop in probe. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
Use device life-cycle managed runtime enable function to simplify probe and exit paths. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
The driver currently creates a new device class "mbox". Then for each mailbox adds a device to that class. This class provides no file operations provided for any userspace users of this device class. It may have been extended to be functional in our vendor tree at some point, but that is not the case anymore, nor does it matter for the upstream tree. Remove this device class and related functions and variables. This also allows us to switch to module_platform_driver() as there is nothing left to do in module_init(). Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
The type of message sent using omap-mailbox is always u32. The definition of mbox_msg_t is uintptr_t which is wrong as that type changes based on the architecture (32bit vs 64bit). This type should have been defined as u32. Instead of making that change here, simply remove the header usage and fix the last couple users of the same in this driver. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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Andrew Davis authored
The mbox_kfifo_size can be changed at runtime, the sanity check on it's value should be done when it is used, not only once at init time. Signed-off-by:
Andrew Davis <afd@ti.com> Signed-off-by:
Jassi Brar <jassisinghbrar@gmail.com>
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