Cape: Add Verilog template. (8474b79e) · Commits · Prabrit B / Gateware-serv-on-fire · GitLab

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8474b79e

Commit 8474b79e authored 1 year ago by

Vauban

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Cape: Add Verilog template.

parent f951fce8

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Changes 9

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sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/ADD_CAPE.tcl 131 additions, 0 deletions

...ipt_support/components/CAPE/VERILOG_TEMPLATE/ADD_CAPE.tcl
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/HDL/CAPE.v 459 additions, 0 deletions

...cript_support/components/CAPE/VERILOG_TEMPLATE/HDL/CAPE.v
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/HDL/P8_IOPADS.v 1013 additions, 0 deletions

..._support/components/CAPE/VERILOG_TEMPLATE/HDL/P8_IOPADS.v
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/HDL/P9_11_18_IOPADS.v 221 additions, 0 deletions

...rt/components/CAPE/VERILOG_TEMPLATE/HDL/P9_11_18_IOPADS.v
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/HDL/P9_21_31_IOPADS.v 287 additions, 0 deletions

...rt/components/CAPE/VERILOG_TEMPLATE/HDL/P9_21_31_IOPADS.v
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/HDL/P9_41_42_IOPADS.v 89 additions, 0 deletions

...rt/components/CAPE/VERILOG_TEMPLATE/HDL/P9_41_42_IOPADS.v
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/HDL/apb_ctrl_status.v 47 additions, 0 deletions

...rt/components/CAPE/VERILOG_TEMPLATE/HDL/apb_ctrl_status.v
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/constraints/cape.pdc 419 additions, 0 deletions

...ort/components/CAPE/VERILOG_TEMPLATE/constraints/cape.pdc
sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/device-tree-overlay/verilog-cape.dtso 37 additions, 0 deletions

...PE/VERILOG_TEMPLATE/device-tree-overlay/verilog-cape.dtso

with 2703 additions and 0 deletions

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