M.2 interface: Reduce the PCIe root port from 4 lanes to 2 lanes.
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- script_support/components/B_V_F_BASE_DESIGN.tcl 0 additions, 16 deletionsscript_support/components/B_V_F_BASE_DESIGN.tcl
- script_support/components/M2_INTERFACE.tcl 1 addition, 3 deletionsscript_support/components/M2_INTERFACE.tcl
- script_support/components/PF_PCIE_C0.tcl 1 addition, 1 deletionscript_support/components/PF_PCIE_C0.tcl
- script_support/components/RECONFIGURATION_INTERFACE.tcl 2 additions, 2 deletionsscript_support/components/RECONFIGURATION_INTERFACE.tcl
- script_support/constraints/M2.pdc 0 additions, 32 deletionsscript_support/constraints/M2.pdc
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