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Commit 2f46673a authored by Vauban's avatar Vauban
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Robotics cape: Reorganize PWM IP blocks.

parent aa6dd93e
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...@@ -127,6 +127,11 @@ sd_instantiate_component -sd_name ${sd_name} -component_name {CAPE_PWM} -instanc ...@@ -127,6 +127,11 @@ sd_instantiate_component -sd_name ${sd_name} -component_name {CAPE_PWM} -instanc
# Add PWM_1 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CAPE_PWM} -instance_name {PWM_1}
# Add scalar net connections # Add scalar net connections
sd_create_scalar_net -sd_name ${sd_name} -net_name {P9_12} sd_create_scalar_net -sd_name ${sd_name} -net_name {P9_12}
sd_create_scalar_net -sd_name ${sd_name} -net_name {P9_PIN15} sd_create_scalar_net -sd_name ${sd_name} -net_name {P9_PIN15}
...@@ -173,10 +178,10 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_6_PAD" "P8 ...@@ -173,10 +178,10 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_6_PAD" "P8
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_7_PAD" "P8_PIN38" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_7_PAD" "P8_PIN38" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_8_PAD" "P8_PIN39" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_8_PAD" "P8_PIN39" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_9_PAD" "P8_PIN40" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:GPIO_9_PAD" "P8_PIN40" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:PCLK" "P9_GPIO_0:PCLK" "PCLK" "PWM_0:PCLK" "apb_rotary_enc_0:pclk" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:PCLK" "P9_GPIO_0:PCLK" "PCLK" "PWM_0:PCLK" "PWM_1:PCLK" "apb_rotary_enc_0:pclk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:PRESETN" "P9_GPIO_0:PRESETN" "PRESETN" "PWM_0:PRESETN" "apb_rotary_enc_0:presetn" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_GPIO_UPPER_0:PRESETN" "P9_GPIO_0:PRESETN" "PRESETN" "PWM_0:PRESETN" "PWM_1:PRESETN" "apb_rotary_enc_0:presetn" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN13_USER_LED_10" "PWM_0:PWM_3" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN13_USER_LED_10" "PWM_1:PWM_1" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN19" "PWM_0:PWM_2" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN19" "PWM_1:PWM_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN33" "apb_rotary_enc_0:enc1_b" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN33" "apb_rotary_enc_0:enc1_b" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN35" "apb_rotary_enc_0:enc1_a" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P8_PIN35" "apb_rotary_enc_0:enc1_a" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"P9_GPIO_0:PAD_0" "P9_PIN15" } sd_connect_pins -sd_name ${sd_name} -pin_names {"P9_GPIO_0:PAD_0" "P9_PIN15" }
...@@ -197,10 +202,11 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"CAPE_DEFAULT_GPIOS:GPIO_OUT" "G ...@@ -197,10 +202,11 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"CAPE_DEFAULT_GPIOS:GPIO_OUT" "G
# Add bus interface net connections # Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"APB_BUS_CONVERTER_0:APB_MASTER" "CoreAPB3_CAPE_0:APB3mmaster" } sd_connect_pins -sd_name ${sd_name} -pin_names {"APB_BUS_CONVERTER_0:APB_MASTER" "CoreAPB3_CAPE_0:APB3mmaster" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"APB_BUS_CONVERTER_0:APB_SLAVE" "APB_SLAVE" } sd_connect_pins -sd_name ${sd_name} -pin_names {"APB_BUS_CONVERTER_0:APB_SLAVE" "APB_SLAVE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave0" "PWM_0:APBslave" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave1" "P8_GPIO_UPPER_0:APB_bif" } sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave1" "P8_GPIO_UPPER_0:APB_bif" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave2" "P9_GPIO_0:APB_bif" } sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave2" "P9_GPIO_0:APB_bif" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave3" "apb_rotary_enc_0:APB_TARGET" } sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave3" "apb_rotary_enc_0:APB_TARGET" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave4" "PWM_0:APBslave" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_CAPE_0:APBmslave5" "PWM_1:APBslave" }
# Re-enable auto promotion of pins of type 'pad' # Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1 auto_promote_pad_pins -promote_all 1
......
...@@ -16,8 +16,6 @@ sd_create_scalar_port -sd_name ${sd_name} -port_name {APBslave_PREADY} -port_dir ...@@ -16,8 +16,6 @@ sd_create_scalar_port -sd_name ${sd_name} -port_name {APBslave_PREADY} -port_dir
sd_create_scalar_port -sd_name ${sd_name} -port_name {APBslave_PSLVERR} -port_direction {OUT} sd_create_scalar_port -sd_name ${sd_name} -port_name {APBslave_PSLVERR} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {PWM_0} -port_direction {OUT} sd_create_scalar_port -sd_name ${sd_name} -port_name {PWM_0} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {PWM_1} -port_direction {OUT} sd_create_scalar_port -sd_name ${sd_name} -port_name {PWM_1} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {PWM_2} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {PWM_3} -port_direction {OUT}
# Create top level Bus Ports # Create top level Bus Ports
...@@ -42,8 +40,6 @@ sd_create_bif_port -sd_name ${sd_name} -port_name {APBslave} -port_bif_vlnv {AMB ...@@ -42,8 +40,6 @@ sd_create_bif_port -sd_name ${sd_name} -port_name {APBslave} -port_bif_vlnv {AMB
sd_instantiate_component -sd_name ${sd_name} -component_name {corepwm_C1} -instance_name {corepwm_C1_0} sd_instantiate_component -sd_name ${sd_name} -component_name {corepwm_C1} -instance_name {corepwm_C1_0}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {corepwm_C1_0:PWM} -pin_slices {[0:0]} sd_create_pin_slices -sd_name ${sd_name} -pin_name {corepwm_C1_0:PWM} -pin_slices {[0:0]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {corepwm_C1_0:PWM} -pin_slices {[1:1]} sd_create_pin_slices -sd_name ${sd_name} -pin_name {corepwm_C1_0:PWM} -pin_slices {[1:1]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {corepwm_C1_0:PWM} -pin_slices {[2:2]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {corepwm_C1_0:PWM} -pin_slices {[3:3]}
...@@ -52,8 +48,6 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"PCLK" "corepwm_C1_0:PCLK" } ...@@ -52,8 +48,6 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"PCLK" "corepwm_C1_0:PCLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PRESETN" "corepwm_C1_0:PRESETN" } sd_connect_pins -sd_name ${sd_name} -pin_names {"PRESETN" "corepwm_C1_0:PRESETN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PWM_0" "corepwm_C1_0:PWM[0:0]" } sd_connect_pins -sd_name ${sd_name} -pin_names {"PWM_0" "corepwm_C1_0:PWM[0:0]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PWM_1" "corepwm_C1_0:PWM[1:1]" } sd_connect_pins -sd_name ${sd_name} -pin_names {"PWM_1" "corepwm_C1_0:PWM[1:1]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PWM_2" "corepwm_C1_0:PWM[2:2]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PWM_3" "corepwm_C1_0:PWM[3:3]" }
# Add bus interface net connections # Add bus interface net connections
......
...@@ -4,12 +4,12 @@ ...@@ -4,12 +4,12 @@
# Create and Configure the core component CoreAPB3_CAPE # Create and Configure the core component CoreAPB3_CAPE
create_and_configure_core -core_vlnv {Actel:DirectCore:CoreAPB3:4.2.100} -component_name {CoreAPB3_CAPE} -params {\ create_and_configure_core -core_vlnv {Actel:DirectCore:CoreAPB3:4.2.100} -component_name {CoreAPB3_CAPE} -params {\
"APB_DWIDTH:32" \ "APB_DWIDTH:32" \
"APBSLOT0ENABLE:true" \ "APBSLOT0ENABLE:false" \
"APBSLOT1ENABLE:true" \ "APBSLOT1ENABLE:true" \
"APBSLOT2ENABLE:true" \ "APBSLOT2ENABLE:true" \
"APBSLOT3ENABLE:true" \ "APBSLOT3ENABLE:true" \
"APBSLOT4ENABLE:false" \ "APBSLOT4ENABLE:true" \
"APBSLOT5ENABLE:false" \ "APBSLOT5ENABLE:true" \
"APBSLOT6ENABLE:false" \ "APBSLOT6ENABLE:false" \
"APBSLOT7ENABLE:false" \ "APBSLOT7ENABLE:false" \
"APBSLOT8ENABLE:false" \ "APBSLOT8ENABLE:false" \
......
...@@ -89,7 +89,7 @@ create_and_configure_core -core_vlnv {Actel:DirectCore:corepwm:4.5.100} -compone ...@@ -89,7 +89,7 @@ create_and_configure_core -core_vlnv {Actel:DirectCore:corepwm:4.5.100} -compone
"FIXED_PWM_POSEDGE14:0" \ "FIXED_PWM_POSEDGE14:0" \
"FIXED_PWM_POSEDGE15:0" \ "FIXED_PWM_POSEDGE15:0" \
"FIXED_PWM_POSEDGE16:0" \ "FIXED_PWM_POSEDGE16:0" \
"PWM_NUM:4" \ "PWM_NUM:2" \
"PWM_STRETCH_VALUE1:false" \ "PWM_STRETCH_VALUE1:false" \
"PWM_STRETCH_VALUE2:false" \ "PWM_STRETCH_VALUE2:false" \
"PWM_STRETCH_VALUE3:false" \ "PWM_STRETCH_VALUE3:false" \
......
...@@ -4,15 +4,33 @@ ...@@ -4,15 +4,33 @@
/dts-v1/; /dts-v1/;
/plugin/; /plugin/;
&{/chosen} {
overlays {
ROBOTICS-CAPE-GATEWARE = &cape_pwm0;
};
};
&{/} { &{/} {
fabric-bus@40000000 { fabric-bus@40000000 {
core_pwm0: pwm@41000000 {
cape_pwm0: pwm@41400000 {
compatible = "microchip,corepwm-rtl-v4"; compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x41000000 0x0 0xF0>; reg = <0x0 0x41400000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>; microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <2>; #pwm-cells = <3>;
status = "okay";
clocks = <&fabric_clk3>;
};
cape_pwm1: pwm@41500000 {
compatible = "microchip,corepwm-rtl-v4";
reg = <0x0 0x41500000 0x0 0xF0>;
microchip,sync-update-mask = /bits/ 32 <0>;
#pwm-cells = <3>;
status = "okay";
clocks = <&fabric_clk3>; clocks = <&fabric_clk3>;
status = "okay";
}; };
}; };
}; };
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