Merge branch 'main' into 'main'
1st revision of GSoC Proposal for "Low-latency I/O RISC-V CPU core in FPGA fabric" See merge request gsoc/gsoc.beagleboard.io!34
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- _static/images/PRU_Connections.png 0 additions, 0 deletions_static/images/PRU_Connections.png
- _static/images/PRU_diagram.png 0 additions, 0 deletions_static/images/PRU_diagram.png
- proposals/RISC-V_CPU_core_in_FPGA_fabric.rst 285 additions, 0 deletionsproposals/RISC-V_CPU_core_in_FPGA_fabric.rst
- proposals/index.rst 4 additions, 3 deletionsproposals/index.rst
_static/images/PRU_Connections.png
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_static/images/PRU_diagram.png
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proposals/RISC-V_CPU_core_in_FPGA_fabric.rst
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