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Created with Raphaël 2.2.018Mar1514131125Feb2413121121Jan1928Dec26191094323Nov22212019113231Oct191817151211108432129Sep28272524211912Aug11623Jul22212016111Jun9430May24231413129Apr225Mar5Feb29Jan1531Dec2827Nov20108722Oct87126Sep108654331Aug302912Jun1086429May27818Apr25Mar13876527Feb2120181413121198CI: Only deploy Debian packages on tags and merge completion.mainmainBuild scripts: Fix DTS overlay generation.Build scripts: Adjust source location for packages creation.Build scripts: Ensure build logs remain independent.CI: Adjust the pipeline pages stage.CI: Add FPGA synthesis to artifacts.Build scripts: Add release creation script.Build scripts: Reorganise Python build scripts.Build scripts: Use HSS's main-beaglev-fire branch.Rename git.beagleboard.org -> openbeagle.org.CI: Build build-options gateware on tag.Build scripts: Bump gateware options version numbers.BVF-0.5.0BVF-0.5.0Chip config: Adjust DDR settings.Build scripts: Adjust date time design version generation.Build scripts: Simplify FPGA design version generationAdding a check for OS and updating function nameAdding a check for device tree compilerCape: Robotics: Add encoders, adjust debounce.robotics-cape-fixrobotics-cape-fixCape: Connect CoreGPIO interrupts.Chip config: Adjust eMMC IO configuration.seeed-emmc-adjustseeed-emmc-adjustChip config: Adjust DDR settings.Build system: Non-Linux host support.Build system: Gracefully handle git describe failure.SYZYGY: Add 3 lanes loopback for Opal Kelly SZG-TST-TXR4.ci: build native riscv64 gateware package and deploy debian repo over gitlab pages part 2CI: Add repo parameter for updated gateware tester.developdevelopCI: Use git hash as version number for custom gateware CI.Cape: Add Verilog tutorial.Cape: Verilog template: Re-order cape IOs.Cape: Verilog template: Simplify APB interface.Cape: Add Verilog template.Chip config: Speed-up DDR training.seeed-ddr-speed…seeed-ddr-speed-upChip config: Adjust DDR settings.Base design: Correct ADC_MCLK connection TCL syntax.CI: Specify CI tag for Libero version.CI: Correct CI varaible used for gateware repo.SYZYGY: Make PF_TX_PLL Libero version agnostic.CI: Update CI for re-organized gateware repository.Doc: Add Readme for gateware-builder usage.Doc: Add readme for gateware builder.