.gitlab-ci.yml

 # The Docker image that will be used to build your app
-image: beagle/sphinx-build-env:latest
+image: registry.git.beagleboard.org/docs/sphinx-build-env:latest
+
 pages:
   tags:
   - docker-amd64
+  before_script:
+  - source ./venv-build-env.sh
   script:
   - "./gitlab-build.sh"
   artifacts:

proposals/RISC-V_CPU_core_in_FPGA_fabric.rst

@@ -144,31 +144,36 @@ Coding begins (May 27th)
 -------------------------------------------------------
 
 .. _RVFMilestone1:
+
 Milestone #1, Introductory YouTube video (June 3rd)
--------------------------------------------------------
+-----------------------------------------------------
  - Make an introductory video
  - Selecting the best-suited core by comparing their functionality, size, availability of extensions, etc.
  - Setting up remote access on BeagleV-Fire and completing the LED-blink tutorial given in the documentation.
 
 .. _RVFMilestone2:
+
 Milestone #2, Modifiying RV core (June 10th)
 -------------------------------------------------------
  - Modification of the selected core to meet project requirements, like memory configurations, interrupt control, etc.
  - Removing unnecessary extensions to reduce size and complexity, without changing its efficiency.
 
 .. _RVFMilestone3:
+
 Milestone #3, Verification of core (June 17th)
 -------------------------------------------------------
  - Performing Verification of PRU core using pre-determined verification methods by using Verilator or any other Verification software.
  - This is to make sure the PRU functions as required after modifications.  
 
 .. _RVFMilestone4:
+
 Milestone #4, Remote-proc setup (June 24th)
 -------------------------------------------------------
  - Integration of PRU core with BeagleV-Fire gateware. This is to ensure PRU deployment through BeagleV-Fire gateware.
  - Set up Remote-proc Interfacing between PRU and main CPU. This will ensure CPU access to PRU's instruction memory.
 
 .. _RVFMilestone5:
+
 Milestone #5, Setup Device Tree (July 1st)
 -------------------------------------------------------
  - Coninuing to work on Remote-proc framework.
@@ -184,30 +189,35 @@ Submit midterm evaluations (July 8th)
     **July 12 - 18:00 UTC:** Midterm evaluation deadline (standard coding period) 
 
 .. _RVFMilestone6:
+
 Milestone #6, Mapping I/O (July 15th)
 -------------------------------------------------------
  - Implementing required I/O functionalities.
  - Mapping I/O to registers to enable interaction with CPU. 
 
 .. _RVFMilestone7:
+
 Milestone #7, Verification of mapped I/O (July 22nd)
 -------------------------------------------------------
  - Verification of these I/O operations using simulation and generating common use cases.
  - Deploying these modules on BeagleV-Fire FPGA and testing their latency and real-time application. 
 
 .. _RVFMilestone8:
+
 Milestone #8, Add customizability (July 29th)
 -------------------------------------------------------
  - Adding customizability to CPU. This is to allow user to make small changes to CPU to observe the changes in output.
  - This will allow user to learn internal working of a RISC processor. 
 
 .. _RVFMilestone9:
+
 Milestone #9, Setup Scripts (Aug 5th)
 -------------------------------------------------------
  - Setting up gateware scripts wherever changes are needed. This will grant users easier access to CPU.
  - Editing TCL scripts wherever necessary.
 
 .. _RVFMilestone10:
+
 Milestone #10, Documentation and Tutorial(Aug 12th)
 -------------------------------------------------------
  - Documenting the project and ways to access PRU on docs.beagleboard.org.
@@ -245,7 +255,7 @@ Experience
 This project will require prior knowledge of Risc-V ISA, FPGA programming, Assembly, and Verilog.
 
 | I have previously worked on a project `Risc-V 32IM core <https://github.com/NachtSpyder04/RISC-V-Eklavya-23>`_ where I contributed towards the synthesis of a Risc-V core using Vivado Design suite and flashed it on UPduino FPGA using Yosys framework. This CPU was successfully able to run operations like the Fibonacci series and factorial of a number.
-| I was a Team Leader of the Semi-finalist Team in `E-Yantra Robotics Competition (eYRC) <https://portal.e-yantra.org/>`_, IIT Bombay on Theme "AstroTinker Bot", where we had to develop a single cycle Risc-V 32I core that was capable of implementing Dijktra Algorithm written in C code and cross-compiled to Risc-V binary instructions. This Competition exposed me to various debugging methods using JTAG connection through Quartus Prime Lite software. DE0-NANO development board with Cyclone IV FPGA was used to control the bot. The bot used PID-based Line Following and Electromagnet to pick and place blocks through an arena representing a Space Station. Verilog HDL codes for the project can be found `here <https://github.com/RapidRoger18/E-yantra_Astrotinker-bot>`_
+| I was a Team Leader of the Semi-finalist Team in `E-Yantra Robotics Competition (eYRC) <https://portal.e-yantra.org/>`_, IIT Bombay on Theme "AstroTinker Bot", where we had to develop a single cycle Risc-V 32I core that was capable of implementing Dijktra Algorithm written in C code and cross-compiled to Risc-V binary instructions. This Competition exposed me to various debugging methods using JTAG connection through Quartus Prime Lite software. DE0-NANO development board with Cyclone IV FPGA was used to control the bot. The bot used PID-based Line Following and Electromagnet to pick and place blocks through an arena representing a Space Station. Verilog HDL codes for the project can be found on `E-yantra_Astrotinker-bot github repo. <https://github.com/RapidRoger18/E-yantra_Astrotinker-bot>`_
 | I have prior experience with ESP32 microcontrollers for small projects.
 
 Approach

proposals/alecdenny.rst

@@ -27,8 +27,8 @@ About
 =====
 
 - **Forum:** :fab:`discourse` `u/alecdenny (Alec Denny) <https://forum.beagleboard.org/u/alecdenny/summary>`_
-- **OpenBeagle:** :fab:`gitlab` `alecdenny (Alec Denny) <https://openbeagle.org/alecdenny>`_
-- **Github:** :fab:`github` `alecdenny (Alec Denny) <https://github.com/alecdenny>`_
+- **OpenBeagle:** :fab:`gitlab` `openbeagle.org/alecdenny <https://openbeagle.org/alecdenny>`_
+- **Github:** :fab:`github` `github.com/alecdenny <https://github.com/alecdenny>`_
 - **School:** :fas:`school` Columbia College Chicago
 - **Country:** :fas:`flag` United States
 - **Primary language:** :fas:`language` English
@@ -244,16 +244,16 @@ Experience and approch
 ***********************
 
 I have previously used pytorch to train small neural networks for granular synthesis. My college capstone used simple audio features from analyzing individual grains to try to rearrange source samples into new compositions. 
-`here <https://alecdenny.wordpress.com/>`_
+`alecdenny.wordpress.com <https://alecdenny.wordpress.com/>`_
 
 I have also manipulated small convolutional image synthesis models for a personal project.
-`here <https://www.dropbox.com/scl/fi/mmnkrnr3l7jec3zqjfcbu/iputmyhandinthefiredraft1.mp4?rlkey=nsxpjvotrqmftidh4igbvbsxw&dl=0>`_
+`dropbox.com/scl/fi/mmnkrnr <https://www.dropbox.com/scl/fi/mmnkrnr3l7jec3zqjfcbu/iputmyhandinthefiredraft1.mp4?rlkey=nsxpjvotrqmftidh4igbvbsxw&dl=0>`_
 
 I am currently building the interface for a VST plugin in C++ through which I’ve gained experience with real time audio code and musical interface design. This project is a collaboration with Nathan Blair.
-`here <https://www.dropbox.com/scl/fi/w75xzhwyjgcfvejkrg8fv/waveshinedemo.mov?rlkey=iuxey52f6hq52pfjvui6uv058&dl=0>`_
+`dropbox.com/scl/fi/w75xzhwy <https://www.dropbox.com/scl/fi/w75xzhwyjgcfvejkrg8fv/waveshinedemo.mov?rlkey=iuxey52f6hq52pfjvui6uv058&dl=0>`_
 
 I have experience with spectral processing and synthesis. I am currently working on a python framework for spectral synthesis that mimics the structure of 3d graphics shaders called WavKitchen. 
-`here <https://github.com/alecdenny/wavkitchen>`_
+`github.com/alecdenny/wavkitchen <https://github.com/alecdenny/wavkitchen>`_
 
 I make audio / visual art and have coded a variety of visualizers and interfaces for performance which I got the chance to use all over the US last year. 
 

proposals/commercial_detection_and_replacement.rst

@@ -568,7 +568,7 @@ Contingency
 - If I get stuck on my project and my mentor isn’t around, I will use the following resources:-
     - `MoViNets <https://www.tensorflow.org/hub/tutorials/movinet>`_
     - `GStreamer Docs <https://gstreamer.freedesktop.org/>`_
-    - `BeagleBone AI-64 <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/01-introduction.html>`_
+    - `BeagleBone AI-64 docs <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/01-introduction.html>`_
     - `NNStreamer <https://nnstreamer.github.io/>`_
 - Moreover, the BeagleBoard community is extremely helpful and active in resolving doubts, which makes it a great going for the project resources and clarification.
 - I intend to remain involved and provide ongoing support for this project beyond the duration of the GSOC timeline.

proposals/drone_cape_for_beagle-v-fire.rst

@@ -30,8 +30,8 @@ About
 =====
 
 - **Forum:** :fab:`discourse` `u/saish_karole (Saish Karole) <https://forum.beagleboard.org/u/saish_karole>`_
-- **OpenBeagle:** :fab:`gitlab` `NachtSpyder04 (Saish Karole) <https://openbeagle.org/NachtSpyder04>`_
-- **Github:** :fab:`github` `NachtSpyder04 (Saish Karole) <https://github.com/NachtSpyder04>`_
+- **OpenBeagle:** :fab:`gitlab` `openbeagle.org/NachtSpyder04 <https://openbeagle.org/NachtSpyder04>`_
+- **Github:** :fab:`github` `github.com/NachtSpyder04 <https://github.com/NachtSpyder04>`_
 - **School:** :fas:`school` `Veermata Jijabai Technological Institute (VJTI), Mumbai <https://vjti.ac.in/>`_
 - **Country:** :fas:`flag` India
 - **Primary language:** :fas:`language` English, Hindi, Marathi

proposals/himanshuk.rst

@@ -27,7 +27,7 @@ Proposal
 
 Completed all the requirements listed on the `ideas page <https://gsoc.beagleboard.io/ideas/>`_
 
-* Created accounts on `openbeagle <https://openbeagle.org/Himanshuk>`_ , `forum <https://forum.beagleboard.org/u/himanshuk/summary>`_ , `Discord <https://discord.com/users/869908108565168198>`_ 
+* Created accounts on `openbeagle <https://openbeagle.org/Himanshuk>`_ , `forum <https://forum.beagleboard.org/u/himanshuk/summary>`_ , `discord.com/users/869908108565168198 <https://discord.com/users/869908108565168198>`_ 
 * Source dive and get to know with packages and examples.
 * The code for the cross-compilation task can be found, Submitted through the pull request :- `pull request <https://github.com/jadonk/gsoc-application/pull/191>`_ 
 * Proposal :- `librobotcontrol support for newer boards <https://gsoc-beagleboard-io-himanshuk-afa51c0f037cce3ef5f7bf31158de2bf3.beagleboard.io/proposals/himanshuk.html>`_ 
@@ -35,9 +35,9 @@ Completed all the requirements listed on the `ideas page <https://gsoc.beagleboa
 About 
 =====
 
-- **Forum:** :fab:`discourse` `Himanshuk (Himanshu Kohale) <https://forum.beagleboard.org/u/himanshuk/summary>`_
-- **OpenBeagle:** :fab:`gitlab` `Himanshuk (Himanshu Kohale) <https://openbeagle.org/Himanshuk>`_
-- **Github:** :fab:`github` `Himanshukohale22 (Himanshu Kohale) <https://github.com/Himanshukohale22>`_
+- **Forum:** :fab:`discourse` `u/himanshuk <https://forum.beagleboard.org/u/himanshuk/summary>`_
+- **OpenBeagle:** :fab:`gitlab` `openbeagle.org/Himanshuk <https://openbeagle.org/Himanshuk>`_
+- **Github:** :fab:`github` `github.com/Himanshukohale22 <https://github.com/Himanshukohale22>`_
 - **School:** :fas:`school` `Veermata Jijabai Technological Institute <https://vjti.ac.in/>`_
 - **Country:** :fas:`flag` India
 - **Primary language:** :fas:`language` English, Hindi, Marathi
@@ -67,8 +67,7 @@ Description
 
 **Implementation**
 
-- Device tree overlay are the data structure for Describing hardware. Rather than hard coding every details of a device into an operaing system, many aspect of hardware can be 
-described in data structure that is passed to the OS at boot time.
+- Device tree overlay are the data structure for Describing hardware. Rather than hard coding every details of a device into an operaing system, many aspect of hardware can be described in data structure that is passed to the OS at boot time.
 
 Implementation of device tree :
 
@@ -78,8 +77,7 @@ Implementation of device tree :
 
 - As above example, Root node is starting or begin the overall process of accesing hardware information after that there are CPU's, memory and various pheripherals which used as Nodes and sub-node are device-nodes where the information about specific hardware which will use that specific pheripherals is written.
 - Similar to above example robotics capes need UART, I2C, SPI and GPIO's node. for librobotcontrol package. 
-- Have to write device tree overlays with corresponding pheripherals according to cape interface with beagleboards.
-Below is simple device tree example for accesing GPIO's for blink LED's with P8_7 and P8_8 headers pin which are inbuil-led's for roboitc-cape.
+- Have to write device tree overlays with corresponding pheripherals according to cape interface with beagleboards. Below is simple device tree example for accesing GPIO's for blink LED's with P8_7 and P8_8 headers pin which are inbuil-led's for roboitc-cape.
 
 .. code-block:: 
 
@@ -100,7 +98,7 @@ Below is simple device tree example for accesing GPIO's for blink LED's with P8_
 
 - After writing the source file for robotics-cape, This Robotic-cape source file for each board can be compiled using device tree compiler:
 
-.. code-block:: linux
+.. code-block:: console
 
     $ dtc -0 .dtb -o robotic_cape.dtbo robotic-cape.dts
 
@@ -140,21 +138,21 @@ A list of hardware that you are going to use for this project.
 - `Beaglebone AI 64 <https://www.digikey.in/en/products/detail/beagleboard-by-seeed-studio/102110646/15929655?cur=INR&lang=en&utm_adgroup=&utm_source=google&utm_medium=cpc&utm_campaign=PMax%20Shopping_Product_High%20ROAS&utm_term=&productid=15929655&utm_content=&utm_id=go_cmp-20122528480_adg-_ad-__dev-c_ext-_prd-15929655_sig-Cj0KCQjw8J6wBhDXARIsAPo7QA8OHJluOkNDsca6onRdfGL-SiAdurymvfiCgGq1_E1YqW2WvDsyjZYaAnUmEALw_wcB&gad_source=1&gclid=Cj0KCQjw8J6wBhDXARIsAPo7QA8OHJluOkNDsca6onRdfGL-SiAdurymvfiCgGq1_E1YqW2WvDsyjZYaAnUmEALw_wcB>`_
 - `BeagleV-fire <https://www.digikey.in/en/products/detail/beagleboard-by-seeed-studio/102110898/21706497>`_
 - Beaglebone-capes
-   - `Robotic cape <https://in.element14.com/beagleboard/bb-cape-robotics/robotics-cape-for-beaglebone-black/dp/2612581>`_
+    - `Robotic cape <https://in.element14.com/beagleboard/bb-cape-robotics/robotics-cape-for-beaglebone-black/dp/2612581>`_
 - Additional hardware for project:-
-  - `Jumper cables <https://www.renaissancerobotics.com/JST_Jumper_Bundle.html>`_ :-
-   - 4-wire jst cables 
-   - 6-wire jst cables
-  - `DC motors <https://www.sparkfun.com/products/13302>`_
-  - `Servo motor <https://www.digikey.in/en/products/detail/900-00005/900-00005-ND/361277?WT.mc_id=IQ_7595_G_pla361277&wt.srch=1&wt.medium=cpc&WT.srch=1&gclid=CJz-qdC9n9ICFRO4wAodOjYLuQ>`_ 
-  - `FTDI-TTL serial wire <https://www.adafruit.com/product/70>`_
-  - `SD-card <https://www.amazon.in/SanDisk-Ultra-microSD-UHS-I-120MB/dp/B08L5FM4JC/ref=sr_1_3?dchild=1&keywords=64gb+sd+card&qid=1617689846&sr=8-3>`_ 
-  - `power supply 12v <https://www.amazon.in/REES52-Adapter-Switch-Charger-Raspberry/dp/B07WJ34VJL>`_
+    - `Jumper cables <https://www.renaissancerobotics.com/JST_Jumper_Bundle.html>`_ :-
+        - 4-wire jst cables 
+        - 6-wire jst cables
+    - `DC motors <https://www.sparkfun.com/products/13302>`_
+    - `Servo motor <https://www.digikey.in/en/products/detail/900-00005/900-00005-ND/361277?WT.mc_id=IQ_7595_G_pla361277&wt.srch=1&wt.medium=cpc&WT.srch=1&gclid=CJz-qdC9n9ICFRO4wAodOjYLuQ>`_ 
+    - `FTDI-TTL serial wire <https://www.adafruit.com/product/70>`_
+    - `SD-card <https://www.amazon.in/SanDisk-Ultra-microSD-UHS-I-120MB/dp/B08L5FM4JC/ref=sr_1_3?dchild=1&keywords=64gb+sd+card&qid=1617689846&sr=8-3>`_ 
+    - `power supply 12v <https://www.amazon.in/REES52-Adapter-Switch-Charger-Raspberry/dp/B07WJ34VJL>`_
 - Useful testing tools:-
-  - Oscilloscope
-  - Multimeter
-  - Soldering station
-  - Mechanical toolbox
+    - Oscilloscope
+    - Multimeter
+    - Soldering station
+    - Mechanical toolbox
 
 
 Timeline
@@ -312,8 +310,7 @@ Milestone #10 (Aug 12th)
 Final YouTube video (Aug 19th)
 -----------------------------------------------------------------------------------------------
 
-- Submit final project video, submit final work to GSoC site 
-and complete final mentor evaluation.
+- Submit final project video, submit final work to GSoC site and complete final mentor evaluation.
 
 Final Submission (Aug 24th)
 -----------------------------------------------------------------------------------------------
@@ -340,20 +337,21 @@ Experience and approch
 ***********************
 
 Experience: 
-    • I’m well experienced with Embedded System and C. I’ve in-hand experienced with Embedded programming and Hardware design for various boards and projects.
-    • Here are my projects which demonstrate my proficiency in Embedded system and Robotics.
-    1. `Martian rover used in  IRC (International rover challenge ) <https://github.com/vishwaspace>`_
-        Martian rover is a prototype of curosity the nasa mars rover which performed function like soil testing, sample collection and monitoring planet.
-        Project required Embedded hardware and firmware design for motor control, arm control and science sensor's configuration with ROS. 
-    2. `STM32 custom board <https://github.com/Himanshukohale22/stm32-custom-board-v1.2>`_
-        STM32 was custom boad which is made in purpose to learn Embedded programming and hardware design. it's a open source development project. 
-    3. `Vaayu – AQI and various concentration calculation for gases present in air <https://github.com/Himanshukohale22/FYP_GreenSpace>`_ 
-        VAAYU is air quality monitoring system device which calibrate the different gases concentration and display with a GUI and TFT-display.
-    4. `TVC rocketry – Thrust vector control <https://github.com/Himanshukohale22/CYRUS>`_
-        TVC rocketry is learning based model project about Thrust vector control rockets, which based on PID implementation and sensors configuration.
-	
-	More projects done by me can be found on my `github <https://github.com/Himanshukohale22>`_.
-    • I’ve designed various double and four layer board for clients and projects  using  Kicad , Eagle and Altium designer `(Designs) <github/Himanshu/my_designs>`_. And this shows that I’ve very good understanding for reading schematics and Circuit design for embedded development, which is required for This project. 
+
+- I’m well experienced with Embedded System and C. I’ve in-hand experienced with Embedded programming and Hardware design for various boards and projects.
+- Here are my projects which demonstrate my proficiency in Embedded system and Robotics.
+
+1. `Martian rover used in  IRC (International rover challenge ) <https://github.com/vishwaspace>`_
+    - Martian rover is a prototype of curosity the nasa mars rover which performed function like soil testing, sample collection and monitoring planet.
+    - Project required Embedded hardware and firmware design for motor control, arm control and science sensor's configuration with ROS. 
+2. `STM32 custom board <https://github.com/Himanshukohale22/stm32-custom-board-v1.2>`_
+    - STM32 was custom boad which is made in purpose to learn Embedded programming and hardware design. it's a open source development project. 
+3. `Vaayu – AQI and various concentration calculation for gases present in air <https://github.com/Himanshukohale22/FYP_GreenSpace>`_ 
+    - VAAYU is air quality monitoring system device which calibrate the different gases concentration and display with a GUI and TFT-display.
+4. `TVC rocketry – Thrust vector control <https://github.com/Himanshukohale22/CYRUS>`_
+    - TVC rocketry is learning based model project about Thrust vector control rockets, which based on PID implementation and sensors configuration.
+
+More projects done by me can be found on my `github.com/Himanshukohale22 <https://github.com/Himanshukohale22>`_. I’ve designed various double and four layer board for clients and projects  using  Kicad , Eagle and Altium designer `(Designs) <github/Himanshu/my_designs>`_. And this shows that I’ve very good understanding for reading schematics and Circuit design for embedded development, which is required for This project. 
 
 Approach:
 
@@ -374,7 +372,7 @@ Unexpected software and hardware problems are most common in any projects. In su
     - `librobotcontrol github <https://github.com/beagleboard/librobotcontrol>`_ 
     - `Getting started with beaglebone AI-64 <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/index.html>`_
     - `Getting started with beagleV-fire <https://docs.beagleboard.org/latest/boards/beaglev/fire/index.html>`_
-    - Device tree: `github <https://github.com/Himanshukohale22/BeagleBoard-DeviceTrees>`_ , `example blog <https://www.beagleboard.org/blog/2022-02-15-using-device-tree-overlays-example-on-beaglebone-cape-add-on-boards>`_ , `FDT <https://devicetree-specification.readthedocs.io/en/stable/flattened-format.html>`_ , `ref <https://elinux.org/Device_Tree_Reference>`_ `tutorial <https://octavosystems.com/app_notes/osd335x-design-tutorial/osd335x-lesson-2-minimal-linux-boot/linux-device-tree-overlay/>`_
+    - Device tree: `github.com/Himanshukohale22/BeagleBoard-DeviceTrees <https://github.com/Himanshukohale22/BeagleBoard-DeviceTrees>`_ , `example blog <https://www.beagleboard.org/blog/2022-02-15-using-device-tree-overlays-example-on-beaglebone-cape-add-on-boards>`_ , `FDT <https://devicetree-specification.readthedocs.io/en/stable/flattened-format.html>`_ , `ref <https://elinux.org/Device_Tree_Reference>`_ `tutorial <https://octavosystems.com/app_notes/osd335x-design-tutorial/osd335x-lesson-2-minimal-linux-boot/linux-device-tree-overlay/>`_
     - `Cape interface docs <https://elinux.org/Beagleboard:BeagleBone_cape_interface_spec#cite_note-2>`_
     - `TDA4VM device tree <https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-sk-tda4vm/09_01_00/exports/docs/linux/Foundational_Components_Kernel_Users_Guide.html>`_
     - `Validatin scripts for understand device tree <https://github.com/jadonk/validation-scripts>`_ 
@@ -394,6 +392,6 @@ Misc
 Please complete the requirements listed in the `General Requirements <https://gsoc.beagleboard.io/guides/contributor#general-requirements>`_ . Provide link to merge request.
 
 - All prerequisite tasks have been completed.
- * Source dive for Librobotcontrol packages and read all the documentation for packages
- * Check hardware specification, setup and device trees for BBB.
- * Here the 'Hello world' cross-compilation task Pull request : `merge request <https://github.com/jadonk/gsoc-application/pull/191>`_
+    - Source dive for Librobotcontrol packages and read all the documentation for packages
+    - Check hardware specification, setup and device trees for BBB.
+    - Here the 'Hello world' cross-compilation task Pull request : `merge request <https://github.com/jadonk/gsoc-application/pull/191>`_

proposals/ijc.rst

@@ -24,8 +24,8 @@ About
 =====
 
 - **Forum:** :fab:`discourse` `u/ijc (Ian Clester) <https://forum.beagleboard.org/u/ijc>`_
-- **OpenBeagle:** :fab:`gitlab` `ijc (Ian Clester) <https://openbeagle.org/ijc>`_
-- **Discord:** :fas:`comments` `ijc (Ian Clester) <https://bbb.io/gsocchat>`_
+- **OpenBeagle:** :fab:`gitlab` `openbeagle.org/ijc <https://openbeagle.org/ijc>`_
+- **Discord:** :fas:`comments` `bbb.io/gsocchat <https://bbb.io/gsocchat>`_
 - **Github:** :fab:`github` `ijc8 (Ian Clester) <https://github.com/ijc8>`_
 - **School:** :fas:`school` Georgia Institute of Technology
 - **Country:** :fas:`flag` United States

proposals/index.rst

@@ -9,16 +9,30 @@ Proposals
 
 .. toctree:: 
     :maxdepth: 1
+    :caption: Accepted proposals
 
-    template
+    
     melta101
+    
+    ijc
+    
+    commercial_detection_and_replacement
+    RISC-V_CPU_core_in_FPGA_fabric
+
+.. toctree:: 
+    :maxdepth: 1
+    :caption: Rejected Proposals
+
     suraj-sonawane
     upstream_zephyr_bbai64_r5
     alecdenny
     matt-davison
-    ijc
     mc
     himanshuk
     drone_cape_for_beagle-v-fire
-    commercial_detection_and_replacement
-    RISC-V_CPU_core_in_FPGA_fabric
+
+.. toctree:: 
+    :maxdepth: 1
+    :caption: Proposal template
+
+    template
\ No newline at end of file

proposals/mc.rst

@@ -270,7 +270,7 @@ Software
 Hardware
 ========
 
-- `Bela <https://shop.bela.io/collections/bela-and-bela-mini/products/bela-starter-kit>`_
+- `bela-starter-kit <https://shop.bela.io/collections/bela-and-bela-mini/products/bela-starter-kit>`_
 - `Microphone <https://github.com/sparkfun/SparkFun_Analog_MEMS_Microphone_Breakout_ICS-40180>`_
 - `BT Transmitter <https://www.amazon.com/Acxico-Bluetooth-Transmitter-Wireless-Headphones/dp/B0964T7FBP/ref=sr_1_3?crid=1A0DUBS68GI36&dib=eyJ2IjoiMSJ9.XfhF0anLttLf4GtHh30FjzfKnse9KgPZ4dgL_ZN48-GpBd6OoxkNLDibNVZurtbyvq3m1K2LiUeOT1EOpV8fuG7eiqVonqdhxSPtAUhkBZf3tlXrqPTsMbGzuYNfRW9TQEIhsSKKV4Qn4K5eew01_XLd2uQxhOmFijMYc7pexpJf4RkGFq-UwuGUw1ViehvBLsjRdC8l2tmOOXzYylBQATys1vCiJ-_Q3K3IVIZvY7A.079Tq5hqUJX1FSOhqtcWQqQOJV1Olval75tU8C7qIM4&dib_tag=se&keywords=bluetooth+audio+transmitter+board&qid=1711320174&sprefix=bluetooth+audio+transmitter+boar%2Caps%2C151&sr=8-3>`_
 
@@ -509,5 +509,5 @@ References
 - McPherson, Andrew P., Robert H. Jack, Giulio Moro, and Others. 2016. “Action-Sound Latency: Are Our Tools Fast Enough?” *Qmro.qmul.ac.uk*. `https://qmro.qmul.ac.uk/xmlui/handle/123456789/12479 <https://qmro.qmul.ac.uk/xmlui/handle/123456789/12479>`_.
 - Pelinski, Teresa, Rodrigo Diaz, A. L. B. Temprano, and Andrew J. McPherson. 2023. “Pipeline for Recording Datasets and Running Neural Networks on the Bela Embedded Hardware Platform.” *ArXiv* abs/2306.11389 (June). `https://doi.org/10.48550/arXiv.2306.11389 <https://doi.org/10.48550/arXiv.2306.11389>`_.
 - N.P. Lago and F. Kon. The quest for low latency. In Proc. ICMC, 2004.
-- D. Wessel and M. Wright. Problems and prospects for intimate musical control of computers. *Computer Music Journal*, *26*(3):11–22, 2002.
+- D. Wessel and M. Wright. Problems and prospects for intimate musical control of computers. *Computer Music Journal*, *26*(3):11–22, 2002*.
 

proposals/suraj-sonawane.rst

@@ -57,7 +57,6 @@ Overview
 `BeagleBone AI-64 <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/>`_, is built on a proven open source Linux approach, bringing a massive amount of computing power to the hands of developers in an easy to use single board computer. Leveraging the Texas Instruments TDA4VM SOC with dual 64-bit Arm® Cortex®-A72, C7x DSP along with deep learning, vision and multimedia accelerators, developers have access to faster analytics, more data storage options, more high speed interfaces including all the connectors you’ll need on board to build applications such as Autonomous Robotics, Vision and Video Analytics, Hi-End Drones, Media Servers, and Smart Buildings.
 
 `TI-SCI <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/>`_
---------
 
 - Texas Instruments’ System Control Interface (TISCI) defines the communication protocol between various processing entities to the System Control Entity on TI SoCs. This is a set of message formats and sequence of operations required to communicate and get system services processed from the System Control Entity in the SoC.
 
@@ -66,32 +65,31 @@ Overview
 **Power and Clock Management**
 Public APIs are provided to perform:
 
-    - `Device Management <https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/devices.html>'_: Enable and release a module
-      This configures both power and clock details for the module and keeps track of its usage.
-    - `Clock Management <https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/clocks.html>'_: Control the frequency of the clock to a module.
+- `Device Management <https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/devices.html>`_ Enable and release a module
+    - This configures both power and clock details for the module and keeps track of its usage.
+- `Clock Management <https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/clocks.html>`_: Control the frequency of the clock to a module.
 
 Drivers needed to implement TI-SCI:
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
 - `Mailbox controller driver <https://software-dl.ti.com/processor-sdk-sitara/esd/am64x/latest/exports/docs/rtos/pdk_am64x/docs/apiguide/am64x/html/group__DRV__MAILBOX__MODULE.html>`_
 
 - `SCIClient Driver: <https://software-dl.ti.com/processor-sdk-sitara/esd/am64x/latest/exports/docs/rtos/pdk_am64x/docs/apiguide/am64x/html/group__DRV__SCICLIENT__MODULE.html>`_
     The SCIClient is an interface to the TI-SCI protocol for RTOS and non-OS based applications. It exposes the core message details, valid module/clock IDs to the higher level software and abstracts the communication with the firmware based on the TI-SCI protocol. These APIs can be called by power, resource and security RTOS drivers or any other non-OS or RTOS based higher level software to be able to communicate with DMSC for its services. The higher level software is expected to populate the necessary message core parameters. The SCIClient would wrap the core message with the necessary protocol header and forward this to the DMSC. The SCIClient relies on the CSL-FL layer to program and interact with the Secure Proxy Threads. The SCIClient's goal is to ensure there is no duplication of the interface to the DMSC from different software components which need to interact with the DMSC or other System Control Entities in future devices. 
 
 Device Management and Security Control (DMSC)
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
 The Device Management and Security Control (DMSC) subsystem is a processing entity on Jacinto 7 family of devices which performs centralized boot, power, security, and resource management functions, and System Firmware is the firmware which executes on the subsystem.  System Firmware implements the Texas Instruments System Control Interface (TISCI) which client software can use to request various services related to device power, resources, and security functions.
 
 `J721E Device ID: <https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721e/devices.html#soc-doc-j721e-public-devices-desc-device-list>`_
-~~~~~~~~~~~~~~~~~
+
 - The device IDs represent SoC subsystems that can be modified via DMSC TISCI message APIs.
 - Some Secure, Power, and Resource Management DMSC subsystem TISCI message APIs define a device ID as a parameter allowing a user to specify management of a particular SoC subsystem.
 
 `J721E Clock ID: <https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html>`_
-~~~~~~~~~~~~~~~~
+
 - TISCI message Power Management APIs define a device ID and clock ID as parameters allowing a user to specify granular control of clocks for a particular SoC subsystem.
 
 `DM Timer Controller <http://www.ti.com/lit/pdf/spruil1>`_
----------------------
 
 In TDA4VM, there are thirty timer modules in the device. MCU_TIMER0 to MCU_TIMER9 are in MCU domain and TIMER0 to TIMER19 in MAIN domain.  All timers include specific functions to generate accurate tick interrupts to the operating system.
 
@@ -116,7 +114,7 @@ Each timer supports three functional modes:
 The capture and compare modes are disabled by default after core reset.
  
 `ADC <http://www.ti.com/lit/pdf/spruil1>`_
------
+
 Analog-to-Digital Converter (MCU_ADC) module contains a single 12-bit ADC which can be multiplexed to any 
 1 of 8 analog inputs (channels). Integrated in the MCU domain are two instances, each with the following main 
 features:
@@ -131,29 +129,28 @@ features:
 
  
 `I2C <http://www.ti.com/lit/pdf/spruil1>`_
------
+
 Device MAIN domain contains seven multi-master Inter-Integrated Circuit (I2C) interfaces, each with the 
 following main features:
- • Compliancy to the Philips I2C-bus specification version 2.1
- • Support of standard mode (up to 100 Kbps) and fast mode (up to 400 Kbps)
- • Support of 7-bit and 10-bit device addressing modes
- • Support of multi-master transmitter/slave receiver and receiver/slave transmitter modes
- • Built-in FIFOs with programmable size of 8 to 64 bytes for buffered read or write
- • 8-bit-wide data access
- • Support of Auto Idle, Idle Request/Idle Acknowledge handshake, and Asynchronous Wakeup mechanisms
- • Low power consumption
+• Compliancy to the Philips I2C-bus specification version 2.1
+• Support of standard mode (up to 100 Kbps) and fast mode (up to 400 Kbps)
+• Support of 7-bit and 10-bit device addressing modes
+• Support of multi-master transmitter/slave receiver and receiver/slave transmitter modes
+• Built-in FIFOs with programmable size of 8 to 64 bytes for buffered read or write
+• 8-bit-wide data access
+• Support of Auto Idle, Idle Request/Idle Acknowledge handshake, and Asynchronous Wakeup mechanisms
+• Low power consumption
 
 `SPI <http://www.ti.com/lit/pdf/spruil1>`_
------
-Integrated in MAIN domain eight Multi-channel Serial Peripheral Interface (MCSPI) modules have the following 
-main features:
- • Serial clock with programmable frequency, polarity, and phase for each channel
- • Wide selection of MCSPI word lengths, ranging from 4 to 32 bits
- • Up to four master channels, or single channel in slave mode
- • Support of different master multichannel modes
- • Single interrupt line for multiple interrupt source events
- • Support of start-bit write command
- • Support of start-bit pause and break sequence
+
+Integrated in MAIN domain eight Multi-channel Serial Peripheral Interface (MCSPI) modules have the following main features:
+• Serial clock with programmable frequency, polarity, and phase for each channel
+• Wide selection of MCSPI word lengths, ranging from 4 to 32 bits
+• Up to four master channels, or single channel in slave mode
+• Support of different master multichannel modes
+• Single interrupt line for multiple interrupt source events
+• Support of start-bit write command
+• Support of start-bit pause and break sequence
 
 
 Implementation Overview
@@ -179,7 +176,7 @@ West is “pluggable”: you can add your own commands to west without editing i
 
 
 `Driver Development: <https://docs.zephyrproject.org/latest/kernel/drivers/index.html>`_
----------------------
+
 **1. Devicetree bindings:**
 A devicetree binding declares requirements on the contents of nodes, and provides semantic information about the contents of valid nodes. Zephyr devicetree bindings are YAML files in a custom format (Zephyr does not use the dt-schema tools used by the Linux kernel).
 
@@ -188,27 +185,28 @@ Available under "include/drivers/". Provides a general way of unteracting with d
 
 Add basic support for Device Manager using TISCI:
 --------------------------------------------------
-    - `Device Manager <https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/devices.html>`_ enable and release a module.
-    - This configures both **power and clock** details for the module and keeps track of its usage.
-    - Add support driver to allow communication with system controller entity within the SoC using the mailbox client.
-    - There are some existing APIs by using this API's we can add basic support for Device Manager using TISCI:    
-        - Device configuration and control APIs
-            +----------------------+-----------------------------+
-            | TISCI Message ID     | Message Name                |
-            +======================+=============================+
-            | 0x0200               | TISCI_MSG_SET_DEVICE        |
-            +----------------------+-----------------------------+
-            | 0x0201               | TISCI_MSG_GET_DEVICE        |
-            +----------------------+-----------------------------+
-            | 0x0202               | TISCI_MSG_SET_DEVICE_RESETS |
-            +----------------------+-----------------------------+
-
-    1. TISCI_MSG_SET_DEVICE : Request for a device state to be set.
-       This is used to set or release various resets of the hardware block. This is typically used for hardware blocks which require special handling prior to specific resets being released. Typical example is when starting up a processing entity like ICSS/DSP, the device must be requested with resets asserted, required firmware loaded and the required resets released in appropriate order for operation of the device.
-    2. TISCI_MSG_GET_DEVICE : Retrieve the hardware block state.
-       This requests information regarding the state of a device including the device’s programmed state, current state, number of resets, and the number of times a device lost context.
-    3. TISCI_MSG_SET_DEVICE_RESETS : Set the state of device reset state.
-       This is used to set or release various resets of the hardware block. This is typically used for hardware blocks which require special handling prior to specific resets being released. Typical example is when starting up a processing entity like ICSS/DSP, the device must be requested with resets asserted, required firmware loaded and the required resets released in appropriate order for operation of the device.
+
+- `Device Manager <https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/devices.html>`_ enable and release a module.
+- This configures both **power and clock** details for the module and keeps track of its usage.
+- Add support driver to allow communication with system controller entity within the SoC using the mailbox client.
+- There are some existing APIs by using this API's we can add basic support for Device Manager using TISCI:    
+    - Device configuration and control APIs
+        +----------------------+-----------------------------+
+        | TISCI Message ID     | Message Name                |
+        +======================+=============================+
+        | 0x0200               | TISCI_MSG_SET_DEVICE        |
+        +----------------------+-----------------------------+
+        | 0x0201               | TISCI_MSG_GET_DEVICE        |
+        +----------------------+-----------------------------+
+        | 0x0202               | TISCI_MSG_SET_DEVICE_RESETS |
+        +----------------------+-----------------------------+
+
+1. TISCI_MSG_SET_DEVICE : Request for a device state to be set.
+    - This is used to set or release various resets of the hardware block. This is typically used for hardware blocks which require special handling prior to specific resets being released. Typical example is when starting up a processing entity like ICSS/DSP, the device must be requested with resets asserted, required firmware loaded and the required resets released in appropriate order for operation of the device.
+2. TISCI_MSG_GET_DEVICE : Retrieve the hardware block state.
+    - This requests information regarding the state of a device including the device’s programmed state, current state, number of resets, and the number of times a device lost context.
+3. TISCI_MSG_SET_DEVICE_RESETS : Set the state of device reset state.
+    - This is used to set or release various resets of the hardware block. This is typically used for hardware blocks which require special handling prior to specific resets being released. Typical example is when starting up a processing entity like ICSS/DSP, the device must be requested with resets asserted, required firmware loaded and the required resets released in appropriate order for operation of the device.