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@@ -25,7 +25,7 @@ This project is currently just a proposal.
Proposal
========
- Created accounts across`OpenBeagle <https://openbeagle.org/SurajS0215>`_,`Discord <https://discord.com/channels/@me>`_ and `Beagle Forum<https://forum.beagleboard.org/u/suraj_sonawane>`_
- Created accounts across`OpenBeagle <https://openbeagle.org/SurajS0215>`_ , `Discord <https://discord.com/channels/@me>`_ and `Beagle Forum<https://forum.beagleboard.org/u/suraj_sonawane>`_.
- `The PR for Cross Compilation task: #192 <https://github.com/jadonk/gsoc-application/pull/192>`_.
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@@ -58,10 +58,6 @@ The goal of the project is to upsteam Zephyr RTOS support to run on Cortex R5 pr
**BeagleBone AI-64**, is built on a proven open source Linux approach, bringing a massive amount of computing power to the hands of developers in an easy to use single board computer. Leveraging the Texas Instruments TDA4VM SOC with dual 64-bit Arm® Cortex®-A72, C7x DSP along with deep learning, vision and multimedia accelerators, developers have access to faster analytics, more data storage options, more high speed interfaces including all the connectors you’ll need on board to build applications such as Autonomous Robotics, Vision and Video Analytics, Hi-End Drones, Media Servers, and Smart Buildings.
In 10-20 sentences, what are you making, for whom, why and with what technologies
(programming languages, etc.)? (We are looking for open source SOFTWARE submissions. By the way, Verilog for programming an FPGA is considered software by us.)
TI-SCI
==============
Texas Instruments’ System Control Interface (TISCI) defines the communication protocol between various processing entities to the System Control Entity on TI SoCs. This is a set of message formats and sequence of operations required to communicate and get system services processed from the System Control Entity in the SoC.
