Gateware device tree overlays generation

Generate an mpfs_dtbo.spi file containing the device tree overlays describing the configurable parts of the gateware design (e.g. the digital logic connected to the cape, M.2, camera, and high speed interfaces). This mpfs_dtbo.spi file will be copied to the SPI flash connected to the PolarFire SoC's System Controller. It will be consumed by u-boot at start-up to extend the device tree passed to Linux.