- Jan 23, 2024
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Nicolas Le Bayon authored
This driver is used for the new version of the BSEC peripheral used on STM32MP25. Change-Id: I38ca0db22d06704769c994c6806ccd80b17dde6e Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by:
Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by:
Yann Gautier <yann.gautier@foss.st.com>
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- Jan 22, 2024
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Girisha Dengi authored
Update nand driver to match GHRD design, fix row address calculation method and other misc updates. Signed-off-by:
Girisha Dengi <girisha.dengi@intel.com> Signed-off-by:
Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I1cb3dda43e767ba243fbe89bfa18818db321c5c2
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- Jan 18, 2024
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Yann Gautier authored
The function stm32mp_is_closed_device() is replaced with stm32mp_check_closed_device(), which return an uint32_t, either STM32MP_CHIP_SEC_OPEN or STM32MP_CHIP_SEC_CLOSED. Signed-off-by:
Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ie0790cdc36c4b6522083bc1f0e7c38e8061e6adf
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Patrick Delaunay authored
In order to ease the introduction of a new BSEC3 driver for STM32MP25, the BSEC2 driver is reworked. Unused functions are removed. The bsec_base global variable is removed in favor of the macro BSEC_BASE. A rework is also done around function checking the state of BSEC. Change-Id: I1ad76cb67333ab9a8fa1d65db34d74a712bf1190 Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by:
Yann Gautier <yann.gautier@st.com>
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- Dec 13, 2023
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Tobias Rist authored
Check if next NS image invades a previous loaded image. Correct non secure image area to avoid loading a NS image to secure Move GZ compressed payload at 32 * compressed payload size offset, so it is loaded in non-secure area and can be decompressed into non-secure area too. It is unlikely that the up to 2 MiB compressed BL33 blob would decompress to payload larger than 64 MiB . Signed-off-by:
Tobias Rist <tobias.rist@joynext.com> Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for compressed BL33 Change-Id: I52fd556aab50687e4791e5dbc45d425f802c8757
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Takuya Sakata authored
Fixed the check of the address range which the program is loaded to. Use the addresses and sizes in the BL31 and BL32 certificates to check that they are within the range of the target address and size defined inside the TF-A. It also uses the addresses and sizes in the BL33x certificates to check that they are outside the protected area defined inside the TF-A. Signed-off-by:
Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com> Signed-off-by:
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Code clean up Change-Id: Iade15431fc86587489fb0ca9106f6baaf7e926e2
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- Dec 03, 2023
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Yoshifumi Hosoya authored
Validate the content of rcar_image_number variable before use. Reviewed-by:
Tomer Fichman <Tomer.Fichman@cymotive.com> Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: Ieeabafa8f709d25eebc4a8e490bf623ef32ccf9f
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Tobias Rist authored
Make sure the length of the payload is not longer than the DRAM size in check_load_area(), and make sure the payload end does not cross protected area start. Signed-off-by:
Tobias Rist <tobias.rist@joynext.com> Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I4d687be577a138352be9f92e5b0b6f596ffffba9
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Yoshifumi Hosoya authored
Check against overflows while calculating the "len" variable. Reviewed-by:
Tomer Fichman <Tomer.Fichman@cymotive.com> Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I0c50152a04365c6f52e0db3096e27e8a800c59ea
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Tobias Rist authored
Add in the cert length calc function an integer overflow check Signed-off-by:
Tobias Rist <tobias.rist@joynext.com> Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I80e93582cd2d6006186e1573406b4945943b9422
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- Nov 13, 2023
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Sandrine Bailleux authored
The usage of this macro hinders the accuracy of code coverage data. Lines of code calling this macro always appear as covered because the test condition within it always gets executed; however, the branch is not necessarily taken. Consequently, we lose branch coverage information on these error code paths. Besides, it is debatable whether such a simple macro really improves code readability or on the contrary obfuscates the code... For these reasons, this patch inlines the macro code everywhere it was called. It also adds some error messages in all these places to help narrowing down authentication failures. These messages only get displayed and compiled into the binaries when building TF-A with 'LOG_VERBOSE' level of verbosity. We use the same message string everywhere in order to limit the memory footprint increase for 'LOG_VERBOSE' builds. Signed-off-by:
Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I461078bb8c6fd6811d2cbefbe3614e17e83796f2
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Govindraj Raja authored
Add a deprecation notice for building TF-A with mbedtls-2.x This was notified earlier in TF-A mailing list: https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.org/message/YDPOPASMGEQBCOI5TKUSD3V3J75NAT7A/ We will be removing support to build TF-A with mbedtls-2.x after TF-A 2.10 release. Change-Id: I669b423ee9af9f5c5255fce370413fffaf38e8eb Signed-off-by:
Govindraj Raja <govindraj.raja@arm.com>
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- Nov 08, 2023
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Sandrine Bailleux authored
CryptoCell-712 and CryptoCell-713 drivers have been deprecated since TF-A v2.9 and their removal was announced for TF-A v2.10 release. See [1]. As the release is approaching, this patch deletes these drivers' code as well as all references to them in the documentation and Arm platforms code (Nuvoton platform is taken care in a subsequent patch). Associated build options (ARM_CRYPTOCELL_INTEG and PLAT_CRYPTOCELL_BASE) have also been removed and thus will have no effect if defined. This is a breaking change for downstream platforms which use these drivers. [1] https://trustedfirmware-a.readthedocs.io/en/v2.9/about/release-information.html#removal-of-deprecated-drivers Note that TF-A v3.0 release later got renumbered into v2.10. Signed-off-by:
Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: Idabbc9115f6732ac1a0e52b273d3380677a39813
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- Oct 27, 2023
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Govindraj Raja authored
Current interface 'partition_init' accepts parameter image_id and returns no value. But the entire partition driver is build only to parse and handle GPT partitions, so add new interface gpt_partition_init which would return failure to platform code if it fails to parse the image. Change-Id: Iaf574d2ad01a15d0723c1475290c31dc4a078835 Signed-off-by:
Govindraj Raja <govindraj.raja@arm.com>
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Govindraj Raja authored
Convert all warn messages to verbose messages. As most warning are needed during debug only and and won't increase the binary size by default. Change-Id: Icc5d5157f13507ccbc34675c20357117cad98255 Signed-off-by:
Govindraj Raja <govindraj.raja@arm.com>
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Govindraj Raja authored
Currently we just use primary GPT header which is located in second entry after MBR header, but if this block is corrupted or CRC mismatch occurs we could try to use the backup GPT header located at LBAn and GPT entries following this from LBA-33. Add suitable warning messages before returning any errors to identify the cause of issue. Change-Id: I0018ae9eafbacb683a18784d2c8bd917c70f50e1 Signed-off-by:
Govindraj Raja <govindraj.raja@arm.com>
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Govindraj Raja authored
GPT header is located in first LBA after MBR entry and mbr header has details of beginning of first entry, so use mbr header entry first_lba data to locate GPT header rather than GPT_HEADER_OFFSET. GPT header size is available in gpt_header, so use that rather than using DEFAULT_GPT_HEADER_SIZE. The location of GPT entries is available once we parse gpt_header and is available as partitiona_lba use that to load gpt_entries rather than GPT_ENTRY_OFFSET. Change-Id: I3c11f8cc9d4b0b1778a37fe342fb845ea4a4eff1 Signed-off-by:
Govindraj Raja <govindraj.raja@arm.com>
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- Oct 26, 2023
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Manish V Badarkhe authored
The ECDSA algorithm signature verification in the PSA differs from the RSA algorithm in its handling of data formats. In the case of RSA, an encoded ASN1.0 buffer is passed to the PSA API, which then decodes the buffer. However, for ECDSA, the PSA API expects a raw format. To accomodate this requirement, introduce several static APIs that allows to retrieve - 1. ECDSA public key data pointer along with its size, and also, the ECC family in PSA format from the public key. 2. R and S pair of the ECDSA signature along with its size Change-Id: Icc7d5659aeb3d5c1ab63c3a12c001e68b11a3a86 Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com>
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- Oct 16, 2023
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Yoshifumi Hosoya authored
Update R-Car H3/M3/M3N DDR setting rev.0.42. Signed-off-by:
Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: Ia66dd2329ab3a3ca39132a737e92b3a4864db02d
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- Oct 14, 2023
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Marek Vasut authored
The Draak board ID is 7, Eagle is 3, update them to match HW documentation. Drop the U suffix from Ebisu board ID. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Idd191614a6f1f8dbbc13b8e0bc1f089090f9d20b
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- Oct 13, 2023
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laurenw-arm authored
Use KEY_SIZE 384 to enable ECDSA P384 key support by setting MBEDTLS_ECP_DP_SECP384R1_ENABLED. Selected by setting KEY_ALG=ecdsa and KEY_SIZE=384. Change-Id: I382f34fc4da98f166a2aada5d16fdf44632b47f5 Signed-off-by:
Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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- Oct 11, 2023
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Sandrine Bailleux authored
The ability to read a character from the console constitutes an attack vector into TF-A, as it gives attackers a means to inject arbitrary data into TF-A. It is dangerous to keep that feature enabled if not strictly necessary, especially in production firmware builds. Thus, we need a way to disable this feature. Moreover, when it is disabled, all related code should be eliminated from the firmware binaries, such that no remnant/dead getc() code remains in memory, which could otherwise be used as a gadget as part of a bigger security attack. This patch disables getc() feature by default. For legitimate getc() use cases [1], it can be explicitly enabled by building TF-A with ENABLE_CONSOLE_GETC=1. The following changes are introduced when getc() is disabled: - The multi-console framework no longer provides the console_getc() function. - If the console driver selected by the platform attempts to register a getc() callback into the multi-console framework ...
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- Oct 05, 2023
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Manish V Badarkhe authored
A PSA crypto API is used for signature verification, namely psa_verify_message, which calculates the signature and verify it for the given signed message. Note, this functionality is as of now tested for RSA based Key algorithm, subsequent patches will provide the signature verification support for all the key algorithms available in TF-A (provided by KEY_ALG build option). Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I16214e3cac6a7af445530a6dbd66cfc6ceedcfc6
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Manish V Badarkhe authored
A PSA crypto API is used for hash verification, namely 'psa_hash_compute', which internally calculates hash of the given data payload. Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ic90e43e68b836ee2add4b868663cfca2340c8108
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Manish V Badarkhe authored
A PSA crypto API is used for hash verification, namely psa_hash_verify, which internally calculates and verifies the hash of the given data payload. Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ib48aa6b74b59aea6036333ff00f6ca566b910e60
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Manish V Badarkhe authored
Initialised Mbedtls PSA cryto during Crypto init using function call 'psa_crypto_init'. MbedTLS currently requires a Random Number Generator (RNG) once PSA Crypto support is enabled. However, TF-A itself doesn't engage in cryptographic operations that demand randomness. Consequently, we simulate the presence of an external TRNG (through the configuration option 'MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) while, in reality, we offer a dummy implementation of mbedtls_psa_external_get_random() that always returns an error. Change-Id: Ife6d03909c0e6081438d2b2519ef500e5dcdb88f Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Manish V Badarkhe authored
An ad-hoc MbedTLS PSA crypto driver is registered by compiling a new driver file, namely mbedtls_psa_crypto.c when PSA_CRYPTO=1. As of now, this file is the same as mbedtls_crypto.c, but subsequent patches will update crypto functions in this file to trigger PSA crypto APIs. Change-Id: I404c347990661d87dcf5d0501d238e36914ec3ee Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com>
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- Oct 04, 2023
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Manish V Badarkhe authored
This is a preparatory patch to provide MbedTLS PSA Crypto API support, with below changes - 1. Added a build macro PSA_CRYPTO to enable the MbedTLS PSA Crypto API support in the subsequent patches. 2. Compile necessary PSA crypto files from MbedTLS source code when PSA_CRYPTO=1. Also, marked PSA_CRYPTO as an experimental feature. Change-Id: I45188f56c5c98b169b2e21e365150b1825c6c450 Signed-off-by:
Manish V Badarkhe <Manish.Badarkhe@arm.com>
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- Sep 28, 2023
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Prasad Kummari authored
Remove the dcc_console_init() function. The initialization function is not being used and serves no purpose. Signed-off-by:
Prasad Kummari <prasad.kummari@amd.com> Change-Id: I056d09e153998d686d3b95ad39c563f797184c18
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- Sep 27, 2023
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Yann Gautier authored
When compiling the driver in aarch64, and with LOG_LEVEL_VERBOSE, there is a compilation error on the message displaying the version of the peripheral. The masks are making the variable unsigned long, whereas we want to display an unsigned int. As the registers are 32-bit, we should use GENMASK_32 instead of GENMASK. Signed-off-by:
Yann Gautier <yann.gautier@foss.st.com> Change-Id: I002dd5ad901f68a9480f758eaaa4428f969813c1
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Prasad Kummari authored
Add unregistration function for the JTAG DCC (Debug Communication Channel) console. The unregistration function flushes DCC buffer before unregistering the dcc console to make sure that no output char is pending. Since console_flush() flushes chars for all registered consoles on the platform, which is not required in this case, dcc_console_flush() is being called instead. Signed-off-by:
Prasad Kummari <prasad.kummari@amd.com> Change-Id: I6f15a07c6ee947dc0e7aa8fb069227618080e611
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Christophe Kerello authored
The reset command should be the first command sent to the SLC NAND. Resetting the SLC NAND should not be done only if NAND_ONFI_DETECT is enabled. Change-Id: If225a1b1a7e04181cc5839e282c435c5c8958bd7 Signed-off-by:
Christophe Kerello <christophe.kerello@foss.st.com>
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Gatien Chevallier authored
Having RNG_SR_DRDY bit in RNG_SR register does not mean that there are 4 RNG words ready to be read. Add a check on RNG_SR_DRDY between each word reading. Signed-off-by:
Gatien Chevallier <gatien.chevallier@foss.st.com> Change-Id: I46af7ca6c0ddbe19540b248365a5016b15b9a707
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Michal Simek authored
The JTAG DCC (Debug Communication Channel) console is primary used for debugging that's why make no sense not to setup it up as crash console too. Change-Id: I16e5d83f8da721657b1a10609494f835b87e5578 Signed-off-by:
Michal Simek <michal.simek@amd.com>
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- Sep 25, 2023
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Madhukar Pappireddy authored
The generic interrupt controller identifies an interrupt based on its type whereas the GIC uses the notion of groups to identify an interrupt. Currently, they are used interchangeably in GICv3 driver. It did not cause any functional issues since the matching type and group had the same value for corresponding macros. This patch makes the necessary fixes. The generic interrupt controller APIs, such as plat_ic_set_interrupt_type map interrupt type to interrupt group supported by the GICv3 IP. Similarly, other generic interrupt controller APIs map interrupt group to interrupt type as needed. This patch also changes the name of the helper functions to use group rather than type for handling interrupts. Change-Id: Ie2d88a3260c71e4ab9c8baacde24cc21e551de3d Signed-off-by:
Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Madhukar Pappireddy authored
The generic interrupt controller identifies an interrupt based on its type whereas the GIC uses the notion of groups to identify an interrupt. This patch changes the name of the helper functions to use group rather than type for handling interrupts. No functional change in this patch. Change-Id: If13ec65cc6c87c2da73a3d54b033f02635ff924a Signed-off-by:
Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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- Sep 18, 2023
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Yann Gautier authored
Express memory size with size_t type in structures. Retrieve value as uint32_t from device tree and then cast it to size_t. Combined with uintptr_t use, it ensures a generic algorithm whatever the platform architecture, notably within systematic tests. Adapt also their prototypes. Move memory size print outside stm32mp_ddr_check_size() to adapt it to related platform. Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: Ic6e1a62d7a5e23cef49909a658098c800e7dae3f
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- Sep 16, 2023
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Anand Saminathan authored
slot ranges from 0 to 31, left shifting 1 by slot is undefined when slot is 31 Change-Id: I0c2e6d278ff593cee07736627cd87692f45e2da9 Signed-off-by:
Anand Saminathan <anans@google.com>
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Anand Saminathan authored
if ops->send_cmd in mmc_send_cmd returns a non-zero value, r_data (resp_data in mmc_device_state) is never populated, so the while condition in mmc_device_state would end up reading the uninitialized resp_data buffer Signed-off-by:
Anand Saminathan <anans@google.com> Change-Id: I72d752867c537d49e111e6d149c3cca122f7dc9f
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- Sep 13, 2023
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Robin van der Gracht authored
crypto_mod_verify_signature() expects a pointer to the full pk. In case of stm32mp1 crypto_verify_signature() will call get_plain_pk_from_asn1() on the converted pk which fails. Fixes: f1e693a7 Signed-off-by:
Robin van der Gracht <robin@protonic.nl> Change-Id: Ia9bdaa10e1b09f9758e5fa608a063b5212c428c3
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