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Commit 10eb851f authored by Mark Dykes's avatar Mark Dykes Committed by TrustedFirmware Code Review
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Merge changes from topic "errata" into integration

* changes:
  fix(cpus): workaround for Cortex-A715 erratum 2331818
  fix(cpus): workaround for Cortex-A715 erratum 2420947
parents 7b02a572 53b3cd25
No related merge requests found
...@@ -881,6 +881,14 @@ For Cortex-A520, the following errata build flags are defined : ...@@ -881,6 +881,14 @@ For Cortex-A520, the following errata build flags are defined :
For Cortex-A715, the following errata build flags are defined : For Cortex-A715, the following errata build flags are defined :
- ``ERRATA_A715_2331818``: This applies errata 2331818 workaround to
Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0.
It is fixed in r1p1.
- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to
Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
It is fixed in r1p1.
- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to - ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to
Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no
workaround for revision r0p0. It is fixed in r1p1. workaround for revision r0p0. It is fixed in r1p1.
......
...@@ -26,6 +26,18 @@ ...@@ -26,6 +26,18 @@
wa_cve_2022_23960_bhb_vector_table CORTEX_A715_BHB_LOOP_COUNT, cortex_a715 wa_cve_2022_23960_bhb_vector_table CORTEX_A715_BHB_LOOP_COUNT, cortex_a715
#endif /* WORKAROUND_CVE_2022_23960 */ #endif /* WORKAROUND_CVE_2022_23960 */
workaround_reset_start cortex_a715, ERRATUM(2331818), ERRATA_A715_2331818
sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(20)
workaround_reset_end cortex_a715, ERRATUM(2331818)
check_erratum_ls cortex_a715, ERRATUM(2331818), CPU_REV(1, 0)
workaround_reset_start cortex_a715, ERRATUM(2420947), ERRATA_A715_2420947
sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(33)
workaround_reset_end cortex_a715, ERRATUM(2420947)
check_erratum_range cortex_a715, ERRATUM(2420947), CPU_REV(1, 0), CPU_REV(1, 0)
workaround_reset_start cortex_a715, ERRATUM(2429384), ERRATA_A715_2429384 workaround_reset_start cortex_a715, ERRATUM(2429384), ERRATA_A715_2429384
sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(27) sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(27)
workaround_reset_end cortex_a715, ERRATUM(2429384) workaround_reset_end cortex_a715, ERRATUM(2429384)
......
...@@ -911,6 +911,14 @@ CPU_FLAG_LIST += ERRATA_V2_2779510 ...@@ -911,6 +911,14 @@ CPU_FLAG_LIST += ERRATA_V2_2779510
# This erratum applies to revisions r0p0, r0p1. Fixed in r0p2. # This erratum applies to revisions r0p0, r0p1. Fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2801372 CPU_FLAG_LIST += ERRATA_V2_2801372
# Flag to apply erratum 2331818 workaround during reset. This erratum applies
# to revisions r0p0 and r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2331818
# Flag to apply erratum 2420947 workaround during reset. This erratum applies
# only to revision r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2420947
# Flag to apply erratum 2429384 workaround during reset. This erratum applies # Flag to apply erratum 2429384 workaround during reset. This erratum applies
# to revision r1p0. There is no workaround for r0p0. It is fixed in r1p1. # to revision r1p0. There is no workaround for r0p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2429384 CPU_FLAG_LIST += ERRATA_A715_2429384
......
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