ti-dm: Update firmware to 09.00.03 for Jacinto devices
Update the ti-dm firmware to 09.00.03 for Jacinto devices.
These were generated using SYSFW v09.00.03
J721E:
support ACSPCIE mux clocking option
Enable Change parent freq flag for PLL8
J7200:
Enable NO_HW_REINIT for MSMC clock
Enable Change parent freq flag for PLL8
J721S2:
Update General purpose interrupt index for Ring
accelerator
J784S4:
open firewall for BOLT on PSC device.
Update General purpose interrupt index for Ring
accelerator
General:
Open firewalls for compare event router
Enable maximum possible PROC_AUTH_BOOT performance for authentication
MD5 Checksum:
e78b737398f143db5030f55cc9050950 ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
89d934656bff38074f1389ea5d4b4abc ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
5cdf3ebb8d36cf304772baa024709c92 ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f
00b1659c28bdf69961e16915fb00570c ti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f
Signed-off-by:
Chandru Dhavamani <chandru@ti.com>
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- WHENCE 1 addition, 1 deletionWHENCE
- ti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f 0 additions, 0 deletionsti-dm/j7200/ipc_echo_testb_mcu1_0_release_strip.xer5f
- ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f 0 additions, 0 deletionsti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f
- ti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f 0 additions, 0 deletionsti-dm/j721s2/ipc_echo_testb_mcu1_0_release_strip.xer5f
- ti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f 0 additions, 0 deletionsti-dm/j784s4/ipc_echo_testb_mcu1_0_release_strip.xer5f
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