loongarch: implement the new page table range API
Add update_mmu_cache_range() and change _PFN_SHIFT to PFN_PTE_SHIFT. It would probably be more efficient to implement __update_tlb() by flushing the entire folio instead of calling __update_tlb() N times, but I'll leave that for someone who understands the architecture better. Link: https://lkml.kernel.org/r/20230802151406.3735276-15-willy@infradead.org Signed-off-by:Matthew Wilcox (Oracle) <willy@infradead.org> Acked-by:
Mike Rapoport (IBM) <rppt@kernel.org> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: WANG Xuerui <kernel@xen0n.name> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org>
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- arch/loongarch/include/asm/cacheflush.h 1 addition, 0 deletionsarch/loongarch/include/asm/cacheflush.h
- arch/loongarch/include/asm/pgtable-bits.h 2 additions, 2 deletionsarch/loongarch/include/asm/pgtable-bits.h
- arch/loongarch/include/asm/pgtable.h 18 additions, 15 deletionsarch/loongarch/include/asm/pgtable.h
- arch/loongarch/mm/pgtable.c 1 addition, 1 deletionarch/loongarch/mm/pgtable.c
- arch/loongarch/mm/tlb.c 1 addition, 1 deletionarch/loongarch/mm/tlb.c
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