arm64: errata: Add workaround for Cortex-A76 erratum #1463225
Revisions of the Cortex-A76 CPU prior to r4p0 are affected by an erratum
that can prevent interrupts from being taken when single-stepping.
This patch implements a software workaround to prevent userspace from
effectively being able to disable interrupts.
Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by:
Will Deacon <will.deacon@arm.com>
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- Documentation/arm64/silicon-errata.txt 1 addition, 0 deletionsDocumentation/arm64/silicon-errata.txt
- arch/arm64/Kconfig 18 additions, 0 deletionsarch/arm64/Kconfig
- arch/arm64/include/asm/cpucaps.h 2 additions, 1 deletionarch/arm64/include/asm/cpucaps.h
- arch/arm64/kernel/cpu_errata.c 24 additions, 0 deletionsarch/arm64/kernel/cpu_errata.c
- arch/arm64/kernel/syscall.c 31 additions, 0 deletionsarch/arm64/kernel/syscall.c
- arch/arm64/mm/fault.c 33 additions, 0 deletionsarch/arm64/mm/fault.c
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