arm64: Workaround for Cortex-A55 erratum 1530923
Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a result of a speculative AT instruction. This may happen in the middle of a guest world switch while the relevant VMSA configuration is in an inconsistent state, leading to erroneous content being allocated into TLBs. The same workaround as is used for Cortex-A76 erratum 1165522 (WORKAROUND_SPECULATIVE_AT_VHE) can be used here. Note that this mandates the use of VHE on affected parts. Acked-by:Marc Zyngier <maz@kernel.org> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Will Deacon <will@kernel.org>
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- Documentation/arm64/silicon-errata.rst 2 additions, 0 deletionsDocumentation/arm64/silicon-errata.rst
- arch/arm64/Kconfig 13 additions, 0 deletionsarch/arm64/Kconfig
- arch/arm64/include/asm/kvm_hyp.h 2 additions, 2 deletionsarch/arm64/include/asm/kvm_hyp.h
- arch/arm64/kernel/cpu_errata.c 5 additions, 1 deletionarch/arm64/kernel/cpu_errata.c
- arch/arm64/kvm/hyp/switch.c 2 additions, 2 deletionsarch/arm64/kvm/hyp/switch.c
- arch/arm64/kvm/hyp/tlb.c 2 additions, 2 deletionsarch/arm64/kvm/hyp/tlb.c
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