arm64: errata: Hide CTR_EL0.DIC on systems affected by Neoverse-N1 #1542419
Cores affected by Neoverse-N1 #1542419 could execute a stale instruction when a branch is updated to point to freshly generated instructions. To workaround this issue we need user-space to issue unnecessary icache maintenance that we can trap. Start by hiding CTR_EL0.DIC. Reviewed-by:Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by:
James Morse <james.morse@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
Showing
- Documentation/arm64/silicon-errata.rst 2 additions, 0 deletionsDocumentation/arm64/silicon-errata.rst
- arch/arm64/Kconfig 16 additions, 0 deletionsarch/arm64/Kconfig
- arch/arm64/include/asm/cpucaps.h 2 additions, 1 deletionarch/arm64/include/asm/cpucaps.h
- arch/arm64/kernel/cpu_errata.c 31 additions, 1 deletionarch/arm64/kernel/cpu_errata.c
- arch/arm64/kernel/traps.c 3 additions, 0 deletionsarch/arm64/kernel/traps.c
Please register or sign in to comment