4.15-rc9-bone2 release

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>

patch.sh

 #!/bin/bash -e
 #
-# Copyright (c) 2009-2017 Robert Nelson <robertcnelson@gmail.com>
+# Copyright (c) 2009-2018 Robert Nelson <robertcnelson@gmail.com>
 #
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -160,12 +160,19 @@ aufs4 () {
 
 		rm -rf ../aufs4-standalone/ || true
 
-		exit 2
-	fi
+		git reset --hard HEAD~5
 
-	#regenerate="enable"
-	if [ "x${regenerate}" = "xenable" ] ; then
 		start_cleanup
+
+		${git} "${DIR}/patches/aufs4/0001-merge-aufs4-kbuild.patch"
+		${git} "${DIR}/patches/aufs4/0002-merge-aufs4-base.patch"
+		${git} "${DIR}/patches/aufs4/0003-merge-aufs4-mmap.patch"
+		${git} "${DIR}/patches/aufs4/0004-merge-aufs4-standalone.patch"
+		${git} "${DIR}/patches/aufs4/0005-merge-aufs4.patch"
+
+		wdir="aufs4"
+		number=5
+		cleanup
 	fi
 
 	${git} "${DIR}/patches/aufs4/0001-merge-aufs4-kbuild.patch"
@@ -173,12 +180,6 @@ aufs4 () {
 	${git} "${DIR}/patches/aufs4/0003-merge-aufs4-mmap.patch"
 	${git} "${DIR}/patches/aufs4/0004-merge-aufs4-standalone.patch"
 	${git} "${DIR}/patches/aufs4/0005-merge-aufs4.patch"
-
-	if [ "x${regenerate}" = "xenable" ] ; then
-		wdir="aufs4"
-		number=5
-		cleanup
-	fi
 }
 
 rt_cleanup () {
@@ -189,6 +190,50 @@ rt_cleanup () {
 rt () {
 	echo "dir: rt"
 	rt_patch="${KERNEL_REL}${kernel_rt}"
+
+	#un-matched kernel
+	#regenerate="enable"
+	if [ "x${regenerate}" = "xenable" ] ; then
+
+		cd ../
+		if [ ! -d ./linux-rt-devel ] ; then
+			${git_bin} clone -b linux-4.14.y-rt-patches https://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git --depth=1
+		else
+			rm -rf ./linux-rt-devel || true
+			${git_bin} clone -b linux-4.14.y-rt-patches https://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git --depth=1
+		fi
+
+		cd ./KERNEL/
+
+		exit 2
+
+		#https://raphaelhertzog.com/2012/08/08/how-to-use-quilt-to-manage-patches-in-debian-packages/
+
+		#export QUILT_PATCHES=`pwd`/linux-rt-devel/patches
+		#export QUILT_REFRESH_ARGS="-p ab --no-timestamps --no-index"
+
+		#quilt push -a
+
+		quilt delete -r localversion.patch
+
+		#fix...
+		#quilt push -f
+		#quilt refresh
+
+		#final...
+		#quilt pop -a
+		#quilt push -a
+		#git add .
+		#git commit -a -m 'merge: CONFIG_PREEMPT_RT Patch Set' -s
+
+		exit 2
+	fi
+
+	if [ -d ../linux-rt-devel ] ; then
+		rm -rf ../linux-rt-devel || true
+	fi
+
+	#matched kernel
 	#regenerate="enable"
 	if [ "x${regenerate}" = "xenable" ] ; then
 		wget -c https://www.kernel.org/pub/linux/kernel/projects/rt/${KERNEL_REL}/patch-${rt_patch}.patch.xz
@@ -205,6 +250,46 @@ rt () {
 	${git} "${DIR}/patches/rt/0001-merge-CONFIG_PREEMPT_RT-Patch-Set.patch"
 }
 
+wireguard_fail () {
+	echo "WireGuard failed"
+	exit 2
+}
+
+wireguard () {
+	echo "dir: WireGuard"
+	#regenerate="enable"
+	if [ "x${regenerate}" = "xenable" ] ; then
+		cd ../
+		if [ ! -d ./WireGuard ] ; then
+			${git_bin} clone https://git.zx2c4.com/WireGuard --depth=1
+		else
+			rm -rf ./WireGuard || true
+			${git_bin} clone https://git.zx2c4.com/WireGuard --depth=1
+		fi
+		cd ./KERNEL/
+
+		../WireGuard/contrib/kernel-tree/create-patch.sh | patch -p1 || wireguard_fail
+
+		${git_bin} add .
+		${git_bin} commit -a -m 'merge: WireGuard' -s
+		${git_bin} format-patch -1 -o ../patches/WireGuard/
+
+		rm -rf ../WireGuard/ || true
+
+		git reset --hard HEAD^
+
+		start_cleanup
+
+		${git} "${DIR}/patches/WireGuard/0001-merge-WireGuard.patch"
+
+		wdir="WireGuard"
+		number=1
+		cleanup
+	fi
+
+	${git} "${DIR}/patches/WireGuard/0001-merge-WireGuard.patch"
+}
+
 local_patch () {
 	echo "dir: dir"
 	${git} "${DIR}/patches/dir/0001-patch.patch"
@@ -213,6 +298,7 @@ local_patch () {
 #external_git
 #aufs4
 #rt
+#wireguard
 #local_patch
 
 pre_backports () {

patches/defconfig

 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.15.0-rc8 Kernel Configuration
+# Linux/arm 4.15.0-rc9 Kernel Configuration
 #
 CONFIG_ARM=y
 CONFIG_ARM_HAS_SG_CHAIN=y

patches/defconfig-bone

 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.15.0-rc8 Kernel Configuration
+# Linux/arm 4.15.0-rc9 Kernel Configuration
 #
 CONFIG_ARM=y
 CONFIG_ARM_HAS_SG_CHAIN=y

patches/ref_omap2plus_defconfig

 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.15.0-rc8 Kernel Configuration
+# Linux/arm 4.15.0-rc9 Kernel Configuration
 #
 CONFIG_ARM=y
 CONFIG_ARM_HAS_SG_CHAIN=y

patches/soc/ti/uboot/0002-am335x-bone-common-config-pin-carve-out-P9.19-P9.20.patch

-From 9e98e1017bddf65cfa90740c7ab7c8c575cd4be0 Mon Sep 17 00:00:00 2001
+From 0196e7080aaa00394103689d7b0d8fa2b92170ad Mon Sep 17 00:00:00 2001
 From: Robert Nelson <robertcnelson@gmail.com>
-Date: Sun, 19 Nov 2017 22:13:20 -0600
+Date: Sun, 21 Jan 2018 20:51:17 -0600
 Subject: [PATCH 2/2] am335x-bone-common: config-pin: carve out P9.19/P9.20
 
 Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
 ---
- arch/arm/boot/dts/am335x-bone-common.dtsi | 112 ++++++++++++++++++++++++++++--
- 1 file changed, 105 insertions(+), 7 deletions(-)
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 118 ++++++++++++++++++++++++++++--
+ 1 file changed, 111 insertions(+), 7 deletions(-)
 
 diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
-index daa2d27242bf..7ee7e7cafcef 100644
+index daa2d27242bf..8a061bedd1b6 100644
 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi
 +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
 @@ -82,12 +82,12 @@
@@ -31,54 +31,58 @@ index daa2d27242bf..7ee7e7cafcef 100644
  
  	uart0_pins: pinmux_uart0_pins {
  		pinctrl-single,pins = <
-@@ -174,6 +174,46 @@
+@@ -174,6 +174,50 @@
  			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
  		>;
  	};
 +
-+	/* P9_19 (ZCZ ball D17) i2c */
++	/* P9_19 (ZCZ ball D17) i2c2_scl */
 +	P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };	/* uart1_rtsn.i2c2_scl */
 +	P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };	/* uart1_rtsn.gpio0_13 */
++		AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* uart1_rtsn.gpio0_13 */
 +	P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* uart1_rtsn.gpio0_13 */
 +	P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* uart1_rtsn.gpio0_13 */
-+	P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };	/* uart1_rtsn.spi1_cs1 */
-+	P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };	/* uart1_rtsn.i2c2_scl */
++	P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; };			/* uart1_rtsn.gpio0_13 */
++	P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; };	/* uart1_rtsn.timer5 */
 +	P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; };		/* uart1_rtsn.dcan0_rx */
++	P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };	/* uart1_rtsn.i2c2_scl */
++	P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };	/* uart1_rtsn.spi1_cs1 */
 +	P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; };	/* uart1_rtsn.pr1_uart0_rts_n */
-+	P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; };	/* uart1_rtsn.timer5 */
 +
-+	/* P9_20 (ZCZ ball D18) i2c */
++	/* P9_20 (ZCZ ball D18) i2c2_sda */
 +	P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };	/* uart1_ctsn.i2c2_sda */
 +	P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };	/* uart1_ctsn.gpio0_12 */
++		AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* uart1_ctsn.gpio0_12 */
 +	P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* uart1_ctsn.gpio0_12 */
 +	P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* uart1_ctsn.gpio0_12 */
-+	P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };	/* uart1_ctsn.spi1_cs0 */
++	P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; };			/* uart1_ctsn.gpio0_12 */
++	P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; };	/* uart1_ctsn.timer6 */
++	P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; };		/* uart1_ctsn.dcan0_tx */
 +	P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };	/* uart1_ctsn.i2c2_sda */
-+	P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0978, PIN_INPUT_PULLUP | MUX_MODE2) >; };		/* uart1_ctsn.dcan0_tx */
++	P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
++		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };	/* uart1_ctsn.spi1_cs0 */
 +	P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; };	/* uart1_ctsn.pr1_uart0_cts_n */
-+	P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; };	/* uart1_ctsn.timer6 */
  };
  
  &uart0 {
-@@ -240,7 +280,8 @@
+@@ -240,7 +284,8 @@
  
  &i2c2 {
  	pinctrl-names = "default";
@@ -88,7 +92,7 @@ index daa2d27242bf..7ee7e7cafcef 100644
  
  	status = "okay";
  	clock-frequency = <100000>;
-@@ -408,3 +449,60 @@
+@@ -408,3 +453,62 @@
  	clock-names = "ext-clk", "int-clk";
  	system-power-controller;
  };
@@ -98,32 +102,34 @@ index daa2d27242bf..7ee7e7cafcef 100644
 +	P9_19_pinmux {
 +		compatible = "bone-pinmux-helper";
 +		status = "okay";
-+		pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi_cs", "can", "i2c", "pru_uart", "timer";
++		pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
 +		pinctrl-0 = <&P9_19_default_pin>;
 +		pinctrl-1 = <&P9_19_gpio_pin>;
 +		pinctrl-2 = <&P9_19_gpio_pu_pin>;
 +		pinctrl-3 = <&P9_19_gpio_pd_pin>;
-+		pinctrl-4 = <&P9_19_spi_cs_pin>;
-+		pinctrl-5 = <&P9_19_can_pin>;
-+		pinctrl-6 = <&P9_19_i2c_pin>;
-+		pinctrl-7 = <&P9_19_pru_uart_pin>;
-+		pinctrl-8 = <&P9_19_timer_pin>;
++		pinctrl-4 = <&P9_19_gpio_input_pin>;
++		pinctrl-5 = <&P9_19_spi_cs_pin>;
++		pinctrl-6 = <&P9_19_can_pin>;
++		pinctrl-7 = <&P9_19_i2c_pin>;
++		pinctrl-8 = <&P9_19_pru_uart_pin>;
++		pinctrl-9 = <&P9_19_timer_pin>;
 +	};
 +
 +	/* P9_20 (ZCZ ball D18) i2c */
 +	P9_20_pinmux {
 +		compatible = "bone-pinmux-helper";
 +		status = "okay";
-+		pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi_cs", "can", "i2c", "pru_uart", "timer";
++		pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
 +		pinctrl-0 = <&P9_20_default_pin>;
 +		pinctrl-1 = <&P9_20_gpio_pin>;
 +		pinctrl-2 = <&P9_20_gpio_pu_pin>;
 +		pinctrl-3 = <&P9_20_gpio_pd_pin>;
-+		pinctrl-4 = <&P9_20_spi_cs_pin>;
-+		pinctrl-5 = <&P9_20_can_pin>;
-+		pinctrl-6 = <&P9_20_i2c_pin>;
-+		pinctrl-7 = <&P9_20_pru_uart_pin>;
-+		pinctrl-8 = <&P9_20_timer_pin>;
++		pinctrl-4 = <&P9_20_gpio_input_pin>;
++		pinctrl-5 = <&P9_20_spi_cs_pin>;
++		pinctrl-6 = <&P9_20_can_pin>;
++		pinctrl-7 = <&P9_20_i2c_pin>;
++		pinctrl-8 = <&P9_20_pru_uart_pin>;
++		pinctrl-9 = <&P9_20_timer_pin>;
 +	};
 +
 +
@@ -150,5 +156,5 @@ index daa2d27242bf..7ee7e7cafcef 100644
 +	};
 +};
 -- 
-2.15.0
+2.15.1
 

version.sh

@@ -30,7 +30,7 @@ toolchain="gcc_linaro_gnueabihf_7"
 
 #Kernel
 KERNEL_REL=4.15
-KERNEL_TAG=${KERNEL_REL}-rc8
+KERNEL_TAG=${KERNEL_REL}-rc9
 kernel_rt=".X-rtY"
 #Kernel Build
 BUILD=${build_prefix}2