diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 7b3d86221f8f1d6288fd1dc8b1b84904b8988288..6b0b495e9fdd0cc4499c1c929ee72e5c58219591 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,9 +1,3 @@
-# You can override the included template(s) by including variable overrides
-# SAST customization: https://docs.gitlab.com/ee/user/application_security/sast/#customizing-the-sast-settings
-# Secret Detection customization: https://docs.gitlab.com/ee/user/application_security/secret_detection/#customizing-settings
-# Dependency Scanning customization: https://docs.gitlab.com/ee/user/application_security/dependency_scanning/#customizing-the-dependency-scanning-settings
-# Note that environment variables can be set in several places
-# See https://docs.gitlab.com/ee/ci/variables/#cicd-variable-precedence
image: beagle/sphinx-build-env:latest
variables:
@@ -15,7 +9,6 @@ cache:
- public
pages:
- stage: deploy
script:
- "./gitlab-build.sh"
artifacts:
diff --git a/_templates/versions.html b/_templates/versions.html
index aeb38d9b0647fb7fd406436a5614cabe677b9030..34ae54c4fdb787a56df9b9e8b98d7002e313337e 100644
--- a/_templates/versions.html
+++ b/_templates/versions.html
@@ -1,4 +1,5 @@
{# Add rst-badge after rst-versions for small badge style. #}
+<div class="injected">
<div class="rst-versions" data-toggle="rst-versions" role="note" aria-label="versions">
<span class="rst-current-version" data-toggle="rst-current-version">
<span class="fa fa-book"> BeagleBoard Project</span>
@@ -24,3 +25,4 @@
</dl>
</div>
</div>
+</div>
diff --git a/boards/beaglebone/ai-64/bbai64-pinmux.ods b/boards/beaglebone/ai-64/bbai64-pinmux.ods
new file mode 100644
index 0000000000000000000000000000000000000000..962e61ed3c0b24300b24787e82ac368489e2e67c
Binary files /dev/null and b/boards/beaglebone/ai-64/bbai64-pinmux.ods differ
diff --git a/boards/beaglebone/ai-64/ch03.rst b/boards/beaglebone/ai-64/ch03.rst
index b35ad5b8cf6de8329265d445482f4df395d0fce9..5071a9bda9a9f55cbb2761335f5d03bc59e7f738 100644
--- a/boards/beaglebone/ai-64/ch03.rst
+++ b/boards/beaglebone/ai-64/ch03.rst
@@ -105,7 +105,7 @@ Connect the Cable to the Board
Fig: USB Connection to the Board
-2. Connect the USB-A end of thecable tp your PC or laptop USB port as shown in the :ref:`usb-a-connect-figure` below.
+2. Connect the USB-A end of the cable to your PC or laptop USB port as shown in the :ref:`usb-a-connect-figure` below.
.. _usb-a-connect-figure,USB Connection to the PC/Laptop figure:
diff --git a/boards/beaglebone/ai-64/ch05.rst b/boards/beaglebone/ai-64/ch05.rst
index 6d2b96414ccbb88bce62df0f53a2f09a4ee7ded2..f08a5441db0c166572a3dcd7c51714991310ae24 100644
--- a/boards/beaglebone/ai-64/ch05.rst
+++ b/boards/beaglebone/ai-64/ch05.rst
@@ -41,7 +41,7 @@ The SoC designed as a low power, high performance and highly integrated device a
* One dual-core 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0 GHz and up to 24K DMIPS (Dhrystone Million Instructions per Second)
* Up to three Microcontroller Units (MCU), based on dual-core Arm Cortex-R5F processor running at up to 1.0 GHz, up to 12K DMIPS
* Up to two TMS320C66x DSP CorePac modules running at up to 1.35 GHz, up to 40 GFLOPS
-* One C71x floating point, vector DSP running at up to up to 1.0 GHz, up to 80 GFLOPS
+* One C71x floating point, vector DSP running at up to 1.0 GHz, up to 80 GFLOPS
* One deep-learning MMA, up to 8 TOPS (8b) at 1.0 GHz
* Up to two gigabit dual-core Programmable Real-Time Unit and Industrial Communication Subsystems (PRU_ICSSG)
* Two Navigator Subsystems (NAVSS) for data movement and control
@@ -173,7 +173,7 @@ Described in the following sections are the three memory devices found on the bo
4GB LPDDR4
************
-A single (1024M x 16bits x 2channels) LPDDR4 4Gb memory device is used. The memory used is is:
+A single (1024M x 16bits x 2channels) LPDDR4 4Gb memory device is used. The memory used is:
* Kingston Q3222PM1WDGTK-U
diff --git a/boards/beaglebone/ai-64/ch07.rst b/boards/beaglebone/ai-64/ch07.rst
new file mode 100644
index 0000000000000000000000000000000000000000..81029ee7dc7091eb7907f1a1257d2916f7839293
--- /dev/null
+++ b/boards/beaglebone/ai-64/ch07.rst
@@ -0,0 +1,1469 @@
+.. _beaglebone-ai-64-connectors:
+
+Connectors
+############
+
+Expansion Connectors
+*********************
+
+The expansion interface on the board is comprised of two headers P8 (46 pin) & P9 (50 pin).
+All signals on the expansion headers are **3.3V** unless otherwise indicated.
+
+.. note::
+ Do not connect 5V logic level signals to these pins or the board will be damaged.
+
+.. note::
+ DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD.
+ IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.
+
+**NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.**
+
+
+Connector P8
+==============
+
+The following tables show the pinout of the **P8** expansion header. The
+SW is responsible for setting the default function of each pin. Refer to
+the processor documentation for more information on these pins and
+detailed descriptions of all of the pins listed. In some cases there may
+not be enough signals to complete a group of signals that may be
+required to implement a total interface.
+
+The column heading is the pin number on the expansion header.
+
+The **GPIO** row is the expected gpio identifier number in the Linux
+kernel.
+
+Each row includes the gpiochipX and pinY in the format of
+`X Y`. You can use these values to direcly control the GPIO pins with the
+commands shown below.
+
+.. code::
+
+ # to set the GPIO pin state to HIGH
+ debian@BeagleBone:~$ gpioset X Y=1
+
+ # to set the GPIO pin state to LOW
+ debian@BeagleBone:~$ gpioset X Y=0
+
+ For Example:
+
+ +---------+----------+
+ | Pin | P8.03 |
+ +=========+==========+
+ | GPIO | 1 20 |
+ +---------+----------+
+
+ Use the commands below for controlling this pin (P8.03) where X = 1 and Y = 20
+
+ # to set the GPIO pin state to HIGH
+ debian@BeagleBone:~$ gpioset 1 20=1
+
+ # to set the GPIO pin state to LOW
+ debian@BeagleBone:~$ gpioset 1 20=0
+
+The **BALL** row is the pin number on the processor.
+
+The **REG** row is the offset of the control register for the processor
+pin.
+
+The **MODE #** rows are the mode setting for each pin. Setting each mode
+to align with the mode column will give that function on that pin.
+
+
+
+**NOTES**:
+
+**DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE
+BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.**
+
+**NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.**
+
+P8.E1-P8.E4
+------------
+
++----------+----------+-----------+-----+
+| E1 | E2 | E3 | E4 |
++==========+==========+===========+=====+
+| USB1 DP | USB1 DN | VSYS_5V0 | GND |
++----------+----------+-----------+-----+
+
+P8.01-P8.02
+------------
+
++--------+--------+
+| P8.01 | P8.02 |
++========+========+
+| GND | GND |
++--------+--------+
+
+P8.03-P8.05
+-------------
+
++------------+--------------------------+-----------------+------------------+
+| Pin | P8.03 | P8.04 | P8.05 |
++============+==========================+=================+==================+
+| GPIO | 1 20 | 1 48 | 1 33 |
++------------+--------------------------+-----------------+------------------+
+| BALL | AH21 | AC29 | AH25 |
++------------+--------------------------+-----------------+------------------+
+| REG | 0x00011C054 | 0x00011C0C4 | 0x00011C088 |
++------------+--------------------------+-----------------+------------------+
+| Page | 46 | 30 | 50 |
++------------+--------------------------+-----------------+------------------+
+| MODE 0 | PRG1_PRU0_GPO19 | PRG0_PRU0_GPO5 | PRG1_PRU1_GPO12 |
++------------+--------------------------+-----------------+------------------+
+| 1 | PRG1_PRU0_GPI19 | PRG0_PRU0_GPI5 | PRG1_PRU1_GPI12 |
++------------+--------------------------+-----------------+------------------+
+| 2 | PRG1_IEP0_EDC_SYNC_OUT0 | ~ | PRG1_RGMII2_TD1 |
++------------+--------------------------+-----------------+------------------+
+| 3 | PRG1_PWM0_TZ_OUT | PRG0_PWM3_B2 | PRG1_PWM1_A0 |
++------------+--------------------------+-----------------+------------------+
+| 4 | ~ | ~ | RGMII2_TD1 |
++------------+--------------------------+-----------------+------------------+
+| 5 | RMII5_TXD0 | RMII3_TXD0 | ~ |
++------------+--------------------------+-----------------+------------------+
+| 6 | MCAN6_TX | ~ | MCAN7_TX |
++------------+--------------------------+-----------------+------------------+
+| 7 | GPIO0_20 | GPIO0_48 | GPIO0_33 |
++------------+--------------------------+-----------------+------------------+
+| 8 | ~ | GPMC0_AD0 | RGMII8_TD1 |
++------------+--------------------------+-----------------+------------------+
+| 9 | ~ | ~ | ~ |
++------------+--------------------------+-----------------+------------------+
+| 10 | VOUT0_EXTPCLKIN | ~ | VOUT0_DATA12 |
++------------+--------------------------+-----------------+------------------+
+| 11 | VPFE0_PCLK | ~ | ~ |
++------------+--------------------------+-----------------+------------------+
+| 12 | MCASP4_AFSX | MCASP0_AXR3 | MCASP9_AFSX |
++------------+--------------------------+-----------------+------------------+
+| 13 | ~ | ~ | ~ |
++------------+--------------------------+-----------------+------------------+
+| 14 | ~ | ~ | ~ |
++------------+--------------------------+-----------------+------------------+
+| Bootstrap | ~ | BOOTMODE2 | ~ |
++------------+--------------------------+-----------------+------------------+
+
+P8.06-P8.09
+-------------
+
++------------+------------------+------------------+------------------+------------------+
+| Pin | P8.06 | P8.07 | P8.08 | P8.09 |
++============+==================+==================+==================+==================+
+| GPIO | 1 34 | 1 15 | 1 14 | 1 17 |
++------------+------------------+------------------+------------------+------------------+
+| BALL | AG25 | AD24 | AG24 | AE24 |
++------------+------------------+------------------+------------------+------------------+
+| REG | 0x00011C08C | 0x00011C03C | 0x00011C038 | 0x00011C044 |
++------------+------------------+------------------+------------------+------------------+
+| Page | 51 | 44 | 44 | 45 |
++------------+------------------+------------------+------------------+------------------+
+| MODE 0 | PRG1_PRU1_GPO13 | PRG1_PRU0_GPO14 | PRG1_PRU0_GPO13 | PRG1_PRU0_GPO16 |
++------------+------------------+------------------+------------------+------------------+
+| 1 | PRG1_PRU1_GPI13 | PRG1_PRU0_GPI14 | PRG1_PRU0_GPI13 | PRG1_PRU0_GPI16 |
++------------+------------------+------------------+------------------+------------------+
+| 2 | PRG1_RGMII2_TD2 | PRG1_RGMII1_TD3 | PRG1_RGMII1_TD2 | PRG1_RGMII1_TXC |
++------------+------------------+------------------+------------------+------------------+
+| 3 | PRG1_PWM1_B0 | PRG1_PWM0_A1 | PRG1_PWM0_B0 | PRG1_PWM0_A2 |
++------------+------------------+------------------+------------------+------------------+
+| 4 | RGMII2_TD2 | RGMII1_TD3 | RGMII1_TD2 | RGMII1_TXC |
++------------+------------------+------------------+------------------+------------------+
+| 5 | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+------------------+------------------+
+| 6 | MCAN7_RX | MCAN5_RX | MCAN5_TX | MCAN6_RX |
++------------+------------------+------------------+------------------+------------------+
+| 7 | GPIO0_34 | GPIO0_15 | GPIO0_14 | GPIO0_17 |
++------------+------------------+------------------+------------------+------------------+
+| 8 | RGMII8_TD2 | ~ | ~ | ~ |
++------------+------------------+------------------+------------------+------------------+
+| 9 | ~ | RGMII7_TD3 | RGMII7_TD2 | RGMII7_TXC |
++------------+------------------+------------------+------------------+------------------+
+| 10 | VOUT0_DATA13 | VOUT0_DATA19 | VOUT0_DATA18 | VOUT0_DATA21 |
++------------+------------------+------------------+------------------+------------------+
+| 11 | VPFE0_DATA8 | VPFE0_DATA3 | VPFE0_DATA2 | VPFE0_DATA5 |
++------------+------------------+------------------+------------------+------------------+
+| 12 | MCASP9_AXR0 | MCASP7_AXR1 | MCASP7_AXR0 | MCASP7_AXR3 |
++------------+------------------+------------------+------------------+------------------+
+| 13 | MCASP4_ACLKR | ~ | ~ | MCASP7_AFSR |
++------------+------------------+------------------+------------------+------------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+------------------+------------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+------------------+------------------+
+
+P8.10-P8.13
+------------
+
++------------+---------------------+--------------------------+------------------+----------------+
+| Pin | P8.10 | P8.11 | P8.12 | P8.13 |
++============+=====================+==========================+==================+================+
+| GPIO | 1 16 | 1 60 | 1 59 | 1 89 |
++------------+---------------------+--------------------------+------------------+----------------+
+| BALL | AC24 | AB24 | AH28 | V27 |
++------------+---------------------+--------------------------+------------------+----------------+
+| REG | 0x00011C040 | 0x00011C0F4 | 0x00011C0F0 | 0x00011C168 |
++------------+---------------------+--------------------------+------------------+----------------+
+| Page | 44 | 33 | 33 | 56 |
++------------+---------------------+--------------------------+------------------+----------------+
+| MODE 0 | PRG1_PRU0_GPO15 | PRG0_PRU0_GPO17 | PRG0_PRU0_GPO16 | RGMII5_TD1 |
++------------+---------------------+--------------------------+------------------+----------------+
+| 1 | PRG1_PRU0_GPI15 | PRG0_PRU0_GPI17 | PRG0_PRU0_GPI16 | RMII7_TXD1 |
++------------+---------------------+--------------------------+------------------+----------------+
+| 2 | PRG1_RGMII1_TX_CTL | PRG0_IEP0_EDC_SYNC_OUT1 | PRG0_RGMII1_TXC | I2C3_SCL |
++------------+---------------------+--------------------------+------------------+----------------+
+| 3 | PRG1_PWM0_B1 | PRG0_PWM0_B2 | PRG0_PWM0_A2 | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+| 4 | RGMII1_TX_CTL | PRG0_ECAP0_SYNC_OUT | RGMII3_TXC | VOUT1_DATA4 |
++------------+---------------------+--------------------------+------------------+----------------+
+| 5 | ~ | ~ | ~ | TRC_DATA2 |
++------------+---------------------+--------------------------+------------------+----------------+
+| 6 | MCAN6_TX | ~ | ~ | EHRPWM0_B |
++------------+---------------------+--------------------------+------------------+----------------+
+| 7 | GPIO0_16 | GPIO0_60 | GPIO0_59 | GPIO0_89 |
++------------+---------------------+--------------------------+------------------+----------------+
+| 8 | ~ | GPMC0_AD5 | ~ | GPMC0_A5 |
++------------+---------------------+--------------------------+------------------+----------------+
+| 9 | RGMII7_TX_CTL | OBSCLK1 | ~ | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+| 10 | VOUT0_DATA20 | ~ | DSS_FSYNC1 | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+| 11 | VPFE0_DATA4 | ~ | ~ | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+| 12 | MCASP7_AXR2 | MCASP0_AXR13 | MCASP0_AXR12 | MCASP11_ACLKX |
++------------+---------------------+--------------------------+------------------+----------------+
+| 13 | MCASP7_ACLKR | ~ | ~ | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+| Bootstrap | ~ | BOOTMODE7 | ~ | ~ |
++------------+---------------------+--------------------------+------------------+----------------+
+
+P8.14-P8.16
+------------
+
++------------+------------------+--------------------------+--------------------------+
+| Pin | P8.14 | P8.15 | P8.16 |
++============+==================+==========================+==========================+
+| GPIO | 1 75 | 1 61 | 1 62 |
++------------+------------------+--------------------------+--------------------------+
+| BALL | AF27 | AB29 | AB28 |
++------------+------------------+--------------------------+--------------------------+
+| REG | 0x00011C130 | 0x00011C0F8 | 0x00011C0FC |
++------------+------------------+--------------------------+--------------------------+
+| Page | 37 | 33 | 34 |
++------------+------------------+--------------------------+--------------------------+
+| MODE 0 | PRG0_PRU1_GPO12 | PRG0_PRU0_GPO18 | PRG0_PRU0_GPO19 |
++------------+------------------+--------------------------+--------------------------+
+| 1 | PRG0_PRU1_GPI12 | PRG0_PRU0_GPI18 | PRG0_PRU0_GPI19 |
++------------+------------------+--------------------------+--------------------------+
+| 2 | PRG0_RGMII2_TD1 | PRG0_IEP0_EDC_LATCH_IN0 | PRG0_IEP0_EDC_SYNC_OUT0 |
++------------+------------------+--------------------------+--------------------------+
+| 3 | PRG0_PWM1_A0 | PRG0_PWM0_TZ_IN | PRG0_PWM0_TZ_OUT |
++------------+------------------+--------------------------+--------------------------+
+| 4 | RGMII4_TD1 | PRG0_ECAP0_IN_APWM_OUT | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 5 | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 6 | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 7 | GPIO0_75 | GPIO0_61 | GPIO0_62 |
++------------+------------------+--------------------------+--------------------------+
+| 8 | ~ | GPMC0_AD6 | GPMC0_AD7 |
++------------+------------------+--------------------------+--------------------------+
+| 9 | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 10 | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 11 | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 12 | MCASP1_AXR8 | MCASP0_AXR14 | MCASP0_AXR15 |
++------------+------------------+--------------------------+--------------------------+
+| 13 | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| 14 | UART8_CTSn | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+------------------+--------------------------+--------------------------+
+
+P8.17-P8.19
+-------------
+
++------------+-----------------+-----------------+---------------+
+| Pin | P8.17 | P8.18 | P8.19 |
++============+=================+=================+===============+
+| GPIO | 1 3 | 1 4 | 1 88 |
++------------+-----------------+-----------------+---------------+
+| BALL | AF22 | AJ23 | V29 |
++------------+-----------------+-----------------+---------------+
+| REG | 0x00011C00C | 0x00011C010 | 0x00011C164 |
++------------+-----------------+-----------------+---------------+
+| Page | 40 | 40 | 57 |
++------------+-----------------+-----------------+---------------+
+| MODE 0 | PRG1_PRU0_GPO2 | PRG1_PRU0_GPO3 | RGMII5_TD2 |
++------------+-----------------+-----------------+---------------+
+| 1 | PRG1_PRU0_GPI2 | PRG1_PRU0_GPI3 | UART3_TXD |
++------------+-----------------+-----------------+---------------+
+| 2 | PRG1_RGMII1_RD2 | PRG1_RGMII1_RD3 | ~ |
++------------+-----------------+-----------------+---------------+
+| 3 | PRG1_PWM2_A0 | PRG1_PWM3_A2 | SYNC3_OUT |
++------------+-----------------+-----------------+---------------+
+| 4 | RGMII1_RD2 | RGMII1_RD3 | VOUT1_DATA3 |
++------------+-----------------+-----------------+---------------+
+| 5 | RMII1_CRS_DV | RMII1_RX_ER | TRC_DATA1 |
++------------+-----------------+-----------------+---------------+
+| 6 | ~ | ~ | EHRPWM0_A |
++------------+-----------------+-----------------+---------------+
+| 7 | GPIO0_3 | GPIO0_4 | GPIO0_88 |
++------------+-----------------+-----------------+---------------+
+| 8 | GPMC0_WAIT1 | GPMC0_DIR | GPMC0_A4 |
++------------+-----------------+-----------------+---------------+
+| 9 | RGMII7_RD2 | RGMII7_RD3 | ~ |
++------------+-----------------+-----------------+---------------+
+| 10 | ~ | ~ | ~ |
++------------+-----------------+-----------------+---------------+
+| 11 | ~ | ~ | ~ |
++------------+-----------------+-----------------+---------------+
+| 12 | MCASP6_AXR0 | MCASP6_AXR1 | MCASP10_AXR1 |
++------------+-----------------+-----------------+---------------+
+| 13 | ~ | ~ | ~ |
++------------+-----------------+-----------------+---------------+
+| 14 | UART1_RXD | UART1_TXD | ~ |
++------------+-----------------+-----------------+---------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+-----------------+-----------------+---------------+
+
+P8.20-P8.22
+------------
+
++------------+------------------+-------------------------------+---------------------+
+| Pin | P8.20 | P8.21 | P8.22 |
++============+==================+===============================+=====================+
+| GPIO | 1 76 | 1 30 | 1 5 |
++------------+------------------+-------------------------------+---------------------+
+| BALL | AF26 | AF21 | AH23 |
++------------+------------------+-------------------------------+---------------------+
+| REG | 0x00011C134 | 0x00011C07C | 0x00011C014 |
++------------+------------------+-------------------------------+---------------------+
+| Page | 37 | 49 | 41 |
++------------+------------------+-------------------------------+---------------------+
+| MODE 0 | PRG0_PRU1_GPO13 | PRG1_PRU1_GPO9 | PRG1_PRU0_GPO4 |
++------------+------------------+-------------------------------+---------------------+
+| 1 | PRG0_PRU1_GPI13 | PRG1_PRU1_GPI9 | PRG1_PRU0_GPI4 |
++------------+------------------+-------------------------------+---------------------+
+| 2 | PRG0_RGMII2_TD2 | PRG1_UART0_RXD | PRG1_RGMII1_RX_CTL |
++------------+------------------+-------------------------------+---------------------+
+| 3 | PRG0_PWM1_B0 | ~ | PRG1_PWM2_B0 |
++------------+------------------+-------------------------------+---------------------+
+| 4 | RGMII4_TD2 | SPI6_CS3 | RGMII1_RX_CTL |
++------------+------------------+-------------------------------+---------------------+
+| 5 | ~ | RMII6_RXD1 | RMII1_TXD0 |
++------------+------------------+-------------------------------+---------------------+
+| 6 | ~ | MCAN8_TX | ~ |
++------------+------------------+-------------------------------+---------------------+
+| 7 | GPIO0_76 | GPIO0_30 | GPIO0_5 |
++------------+------------------+-------------------------------+---------------------+
+| 8 | ~ | GPMC0_CSn0 | GPMC0_CSn2 |
++------------+------------------+-------------------------------+---------------------+
+| 9 | ~ | PRG1_IEP0_EDIO_DATA_IN_OUT30 | RGMII7_RX_CTL |
++------------+------------------+-------------------------------+---------------------+
+| 10 | ~ | VOUT0_DATA9 | ~ |
++------------+------------------+-------------------------------+---------------------+
+| 11 | ~ | ~ | ~ |
++------------+------------------+-------------------------------+---------------------+
+| 12 | MCASP1_AXR9 | MCASP4_AXR3 | MCASP6_AXR2 |
++------------+------------------+-------------------------------+---------------------+
+| 13 | ~ | ~ | MCASP6_ACLKR |
++------------+------------------+-------------------------------+---------------------+
+| 14 | UART8_RTSn | ~ | UART2_RXD |
++------------+------------------+-------------------------------+---------------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+------------------+-------------------------------+---------------------+
+
+P8.23-P8.26
+-------------
+
++------------+-------------------------------+-----------------+------------------+-----------------+
+| Pin | P8.23 | P8.24 | P8.25 | P8.26 |
++============+===============================+=================+==================+=================+
+| GPIO | 1 31 | 1 6 | 1 35 | 1 51 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| BALL | AB23 | AD20 | AH26 | AC27 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| REG | 0x00011C080 | 0x00011C018 | 0x00011C090 | 0x00011C0D0 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| Page | 50 | 41 | 51 | 31 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| MODE 0 | PRG1_PRU1_GPO10 | PRG1_PRU0_GPO5 | PRG1_PRU1_GPO14 | PRG0_PRU0_GPO8 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 1 | PRG1_PRU1_GPI10 | PRG1_PRU0_GPI5 | PRG1_PRU1_GPI14 | PRG0_PRU0_GPI8 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 2 | PRG1_UART0_TXD | ~ | PRG1_RGMII2_TD3 | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 3 | PRG1_PWM2_TZ_IN | PRG1_PWM3_B2 | PRG1_PWM1_A1 | PRG0_PWM2_A1 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 4 | ~ | ~ | RGMII2_TD3 | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 5 | RMII6_CRS_DV | RMII1_TX_EN | ~ | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 6 | MCAN8_RX | ~ | MCAN8_TX | MCAN9_RX |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 7 | GPIO0_31 | GPIO0_6 | GPIO0_35 | GPIO0_51 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 8 | GPMC0_CLKOUT | GPMC0_WEn | RGMII8_TD3 | GPMC0_AD2 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 9 | PRG1_IEP0_EDIO_DATA_IN_OUT31 | ~ | ~ | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 10 | VOUT0_DATA10 | ~ | VOUT0_DATA14 | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 11 | GPMC0_FCLK_MUX | ~ | ~ | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 12 | MCASP5_ACLKX | MCASP3_AXR0 | MCASP9_AXR1 | MCASP0_AXR6 |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 13 | ~ | ~ | MCASP4_AFSR | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| 14 | ~ | ~ | ~ | UART6_RXD |
++------------+-------------------------------+-----------------+------------------+-----------------+
+| Bootstrap | ~ | BOOTMODE0 | ~ | ~ |
++------------+-------------------------------+-----------------+------------------+-----------------+
+
+P8.27-P8.29
+-------------
+
++------------+-------------------+-------------------------------+-------------------------------+
+| Pin | P8.27 | P8.28 | P8.29 |
++============+===================+===============================+===============================+
+| GPIO | 1 71 | 1 72 | 1 73 |
++------------+-------------------+-------------------------------+-------------------------------+
+| BALL | AA28 | Y24 | AA25 |
++------------+-------------------+-------------------------------+-------------------------------+
+| REG | 0x00011C120 | 0x00011C124 | 0x00011C128 |
++------------+-------------------+-------------------------------+-------------------------------+
+| Page | 36 | 36 | 36 |
++------------+-------------------+-------------------------------+-------------------------------+
+| MODE 0 | PRG0_PRU1_GPO8 | PRG0_PRU1_GPO9 | PRG0_PRU1_GPO10 |
++------------+-------------------+-------------------------------+-------------------------------+
+| 1 | PRG0_PRU1_GPI8 | PRG0_PRU1_GPI9 | PRG0_PRU1_GPI10 |
++------------+-------------------+-------------------------------+-------------------------------+
+| 2 | ~ | PRG0_UART0_RXD | PRG0_UART0_TXD |
++------------+-------------------+-------------------------------+-------------------------------+
+| 3 | PRG0_PWM2_TZ_OUT | ~ | PRG0_PWM2_TZ_IN |
++------------+-------------------+-------------------------------+-------------------------------+
+| 4 | ~ | SPI3_CS3 | ~ |
++------------+-------------------+-------------------------------+-------------------------------+
+| 5 | ~ | ~ | ~ |
++------------+-------------------+-------------------------------+-------------------------------+
+| 6 | MCAN11_RX | PRG0_IEP0_EDIO_DATA_IN_OUT30 | PRG0_IEP0_EDIO_DATA_IN_OUT31 |
++------------+-------------------+-------------------------------+-------------------------------+
+| 7 | GPIO0_71 | GPIO0_72 | GPIO0_73 |
++------------+-------------------+-------------------------------+-------------------------------+
+| 8 | GPMC0_AD10 | GPMC0_AD11 | GPMC0_AD12 |
++------------+-------------------+-------------------------------+-------------------------------+
+| 9 | ~ | ~ | CLKOUT |
++------------+-------------------+-------------------------------+-------------------------------+
+| 10 | ~ | DSS_FSYNC3 | ~ |
++------------+-------------------+-------------------------------+-------------------------------+
+| 11 | ~ | ~ | ~ |
++------------+-------------------+-------------------------------+-------------------------------+
+| 12 | MCASP1_AFSX | MCASP1_AXR5 | MCASP1_AXR6 |
++------------+-------------------+-------------------------------+-------------------------------+
+| 13 | ~ | ~ | ~ |
++------------+-------------------+-------------------------------+-------------------------------+
+| 14 | ~ | UART8_RXD | UART8_TXD |
++------------+-------------------+-------------------------------+-------------------------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+-------------------+-------------------------------+-------------------------------+
+
+P8.30-P8.32
+-------------
+
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| Pin | P8.30 | P8.31 | ~ | P8.32 | ~ |
++============+==================+==================+=================+=================+=================+
+| GPIO | 1 74 | 1 32 | 1 63 | 1 26 | 1 64 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| BALL | AG26 | AJ25 | AE29 | AG21 | AD28 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| REG | 0x00011C12C | 0x00011C084 | 0x00011C100 | 0x00011C06C | 0x00011C104 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| Page | 37 | 50 | 34 | 48 | 34 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| MODE 0 | PRG0_PRU1_GPO11 | PRG1_PRU1_GPO11 | PRG0_PRU1_GPO0 | PRG1_PRU1_GPO5 | PRG0_PRU1_GPO1 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 1 | PRG0_PRU1_GPI11 | PRG1_PRU1_GPI11 | PRG0_PRU1_GPI0 | PRG1_PRU1_GPI5 | PRG0_PRU1_GPI1 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 2 | PRG0_RGMII2_TD0 | PRG1_RGMII2_TD0 | PRG0_RGMII2_RD0 | ~ | PRG0_RGMII2_RD1 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 3 | ~ | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 4 | RGMII4_TD0 | RGMII2_TD0 | RGMII4_RD0 | ~ | RGMII4_RD1 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 5 | RMII4_TX_EN | RMII2_TX_EN | RMII4_RXD0 | RMII5_TX_EN | RMII4_RXD1 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 6 | ~ | ~ | ~ | MCAN6_RX | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 7 | GPIO0_74 | GPIO0_32 | GPIO0_63 | GPIO0_26 | GPIO0_64 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 8 | GPMC0_A26 | RGMII8_TD0 | UART4_CTSn | GPMC0_WPn | UART4_RTSn |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 9 | ~ | EQEP1_I | ~ | EQEP1_S | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 10 | ~ | VOUT0_DATA11 | ~ | VOUT0_DATA5 | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 11 | ~ | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 12 | MCASP1_AXR7 | MCASP9_ACLKX | MCASP1_AXR0 | MCASP4_AXR0 | MCASP1_AXR1 |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 13 | ~ | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| 14 | ~ | ~ | UART5_RXD | TIMER_IO4 | UART5_TXD |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+| Bootstrap | ~ | ~ | ~ | ~ | ~ |
++------------+------------------+------------------+-----------------+-----------------+-----------------+
+
+P8.33-P8.35
+-------------
+
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| Pin | P8.33 | ~ | P8.34 | P8.35 | ~ |
++============+=====================+=============+====================+=================+==========================+
+| GPIO | 1 25 | 1 111 | 1 7 | 1 24 | 1 116 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| BALL | AH24 | AA2 | AD22 | AD23 | Y3 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| REG | 0x00011C068 | 0x00011C1C0 | 0x00011C01C | 0x00011C064 | 0x00011C1D4 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| Page | 48 | 67 | 41 | 47 | 67 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| MODE 0 | PRG1_PRU1_GPO4 | SPI0_CS0 | PRG1_PRU0_GPO6 | PRG1_PRU1_GPO3 | SPI1_CS0 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 1 | PRG1_PRU1_GPI4 | UART0_RTSn | PRG1_PRU0_GPI6 | PRG1_PRU1_GPI3 | UART0_CTSn |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 2 | PRG1_RGMII2_RX_CTL | ~ | PRG1_RGMII1_RXC | PRG1_RGMII2_RD3 | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 3 | PRG1_PWM2_B2 | ~ | PRG1_PWM3_A1 | ~ | UART5_RXD |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 4 | RGMII2_RX_CTL | ~ | RGMII1_RXC | RGMII2_RD3 | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 5 | RMII2_TXD0 | ~ | RMII1_TXD1 | RMII2_RX_ER | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 6 | ~ | ~ | AUDIO_EXT_REFCLK0 | ~ | PRG0_IEP0_EDIO_OUTVALID |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 7 | GPIO0_25 | GPIO0_111 | GPIO0_7 | GPIO0_24 | GPIO0_116 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 8 | RGMII8_RX_CTL | ~ | GPMC0_CSn3 | RGMII8_RD3 | PRG0_IEP0_EDC_LATCH_IN0 |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 9 | EQEP1_B | ~ | RGMII7_RXC | EQEP1_A | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 10 | VOUT0_DATA4 | ~ | ~ | VOUT0_DATA3 | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 11 | VPFE0_DATA13 | ~ | ~ | VPFE0_WEN | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 12 | MCASP8_AXR2 | ~ | MCASP6_AXR3 | MCASP8_AXR1 | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 13 | MCASP8_ACLKR | ~ | MCASP6_AFSR | MCASP3_AFSR | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| 14 | TIMER_IO3 | ~ | UART2_TXD | TIMER_IO2 | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+| Bootstrap | ~ | ~ | ~ | ~ | ~ |
++------------+---------------------+-------------+--------------------+-----------------+--------------------------+
+
+P8.36-P8.38
+-------------
+
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| Pin | P8.36 | P8.37 | ~ | P8.38 | ~ |
++============+==========================+===============+===============================+=================+=================+
+| GPIO | 1 8 | 1 106 | 1 11 | 1 105 | 1 9 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| BALL | AE20 | Y27 | AD21 | Y29 | AJ20 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| REG | 0x00011C020 | 0x00011C1AC | 0x00011C02C | 0x00011C1A8 | 0x00011C024 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| Page | 42 | 58 | 43 | 58 | 42 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| MODE 0 | PRG1_PRU0_GPO7 | RGMII6_RD2 | PRG1_PRU0_GPO10 | RGMII6_RD3 | PRG1_PRU0_GPO8 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 1 | PRG1_PRU0_GPI7 | UART4_RTSn | PRG1_PRU0_GPI10 | UART4_CTSn | PRG1_PRU0_GPI8 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 2 | PRG1_IEP0_EDC_LATCH_IN1 | ~ | PRG1_UART0_RTSn | ~ | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 3 | PRG1_PWM3_B1 | UART5_TXD | PRG1_PWM2_B1 | UART5_RXD | PRG1_PWM2_A1 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 4 | ~ | ~ | SPI6_CS2 | CLKOUT | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 5 | AUDIO_EXT_REFCLK1 | TRC_DATA19 | RMII5_CRS_DV | TRC_DATA18 | RMII5_RXD0 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 6 | MCAN4_TX | EHRPWM5_A | ~ | EHRPWM_TZn_IN4 | MCAN4_RX |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 7 | GPIO0_8 | GPIO0_106 | GPIO0_11 | GPIO0_105 | GPIO0_9 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 8 | ~ | GPMC0_A22 | GPMC0_BE0n_CLE | GPMC0_A21 | GPMC0_OEn_REn |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 9 | ~ | ~ | PRG1_IEP0_EDIO_DATA_IN_OUT29 | ~ | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 10 | ~ | ~ | OBSCLK2 | ~ | VOUT0_DATA22 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 11 | ~ | ~ | ~ | ~ | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 12 | MCASP3_AXR1 | MCASP11_AXR5 | MCASP3_AFSX | MCASP11_AXR4 | MCASP3_AXR2 |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 13 | ~ | ~ | ~ | ~ | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| 14 | ~ | ~ | ~ | ~ | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+| Bootstrap | ~ | ~ | ~ | ~ | ~ |
++------------+--------------------------+---------------+-------------------------------+-----------------+-----------------+
+
+P8.39-P8.41
+------------
+
++------------+-----------------+--------------------------+---------------------+
+| Pin | P8.39 | P8.40 | P8.41 |
++============+=================+==========================+=====================+
+| GPIO | 1 69 | 1 70 | 1 67 |
++------------+-----------------+--------------------------+---------------------+
+| BALL | AC26 | AA24 | AD29 |
++------------+-----------------+--------------------------+---------------------+
+| REG | 0x00011C118 | 0x00011C11C | 0x00011C110 |
++------------+-----------------+--------------------------+---------------------+
+| Page | 35 | 36 | 35 |
++------------+-----------------+--------------------------+---------------------+
+| MODE 0 | PRG0_PRU1_GPO6 | PRG0_PRU1_GPO7 | PRG0_PRU1_GPO4 |
++------------+-----------------+--------------------------+---------------------+
+| 1 | PRG0_PRU1_GPI6 | PRG0_PRU1_GPI7 | PRG0_PRU1_GPI4 |
++------------+-----------------+--------------------------+---------------------+
+| 2 | PRG0_RGMII2_RXC | PRG0_IEP1_EDC_LATCH_IN1 | PRG0_RGMII2_RX_CTL |
++------------+-----------------+--------------------------+---------------------+
+| 3 | ~ | ~ | PRG0_PWM2_B2 |
++------------+-----------------+--------------------------+---------------------+
+| 4 | RGMII4_RXC | SPI3_CS0 | RGMII4_RX_CTL |
++------------+-----------------+--------------------------+---------------------+
+| 5 | RMII4_TXD0 | ~ | RMII4_TXD1 |
++------------+-----------------+--------------------------+---------------------+
+| 6 | ~ | MCAN11_TX | ~ |
++------------+-----------------+--------------------------+---------------------+
+| 7 | GPIO0_69 | GPIO0_70 | GPIO0_67 |
++------------+-----------------+--------------------------+---------------------+
+| 8 | GPMC0_A25 | GPMC0_AD9 | GPMC0_A24 |
++------------+-----------------+--------------------------+---------------------+
+| 9 | ~ | ~ | ~ |
++------------+-----------------+--------------------------+---------------------+
+| 10 | ~ | ~ | ~ |
++------------+-----------------+--------------------------+---------------------+
+| 11 | ~ | ~ | ~ |
++------------+-----------------+--------------------------+---------------------+
+| 12 | MCASP1_AXR3 | MCASP1_AXR4 | MCASP1_AXR2 |
++------------+-----------------+--------------------------+---------------------+
+| 13 | ~ | ~ | ~ |
++------------+-----------------+--------------------------+---------------------+
+| 14 | ~ | UART2_TXD | ~ |
++------------+-----------------+--------------------------+---------------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+-----------------+--------------------------+---------------------+
+
+P8.42-P8.44
+------------
+
++------------+-----------------+-----------------+-----------------+
+| Pin | P8.42 | P8.43 | P8.44 |
++============+=================+=================+=================+
+| GPIO | 1 68 | 1 65 | 1 66 |
++------------+-----------------+-----------------+-----------------+
+| BALL | AB27 | AD27 | AC25 |
++------------+-----------------+-----------------+-----------------+
+| REG | 0x00011C114 | 0x00011C108 | 0x00011C10C |
++------------+-----------------+-----------------+-----------------+
+| Page | 35 | 34 | 35 |
++------------+-----------------+-----------------+-----------------+
+| MODE 0 | PRG0_PRU1_GPO5 | PRG0_PRU1_GPO2 | PRG0_PRU1_GPO3 |
++------------+-----------------+-----------------+-----------------+
+| 1 | PRG0_PRU1_GPI5 | PRG0_PRU1_GPI2 | PRG0_PRU1_GPI3 |
++------------+-----------------+-----------------+-----------------+
+| 2 | ~ | PRG0_RGMII2_RD2 | PRG0_RGMII2_RD3 |
++------------+-----------------+-----------------+-----------------+
+| 3 | ~ | PRG0_PWM2_A2 | ~ |
++------------+-----------------+-----------------+-----------------+
+| 4 | ~ | RGMII4_RD2 | RGMII4_RD3 |
++------------+-----------------+-----------------+-----------------+
+| 5 | ~ | RMII4_CRS_DV | RMII4_RX_ER |
++------------+-----------------+-----------------+-----------------+
+| 6 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 7 | GPIO0_68 | GPIO0_65 | GPIO0_66 |
++------------+-----------------+-----------------+-----------------+
+| 8 | GPMC0_AD8 | GPMC0_A23 | ~ |
++------------+-----------------+-----------------+-----------------+
+| 9 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 10 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 11 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 12 | MCASP1_ACLKX | MCASP1_ACLKR | MCASP1_AFSR |
++------------+-----------------+-----------------+-----------------+
+| 13 | ~ | MCASP1_AXR10 | MCASP1_AXR11 |
++------------+-----------------+-----------------+-----------------+
+| 14 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| Bootstrap | BOOTMODE6 | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+
+P8.45-P8.46
+------------
+
++------------+------------------+--------------------------+
+| Pin | P8.45 | P8.46 |
++============+==================+==========================+
+| GPIO | 1 79 | 1 80 |
++------------+------------------+--------------------------+
+| BALL | AG29 | Y25 |
++------------+------------------+--------------------------+
+| REG | 0x00011C140 | 0x00011C144 |
++------------+------------------+--------------------------+
+| Page | 38 | 38 |
++------------+------------------+--------------------------+
+| MODE 0 | PRG0_PRU1_GPO16 | PRG0_PRU1_GPO17 |
++------------+------------------+--------------------------+
+| 1 | PRG0_PRU1_GPI16 | PRG0_PRU1_GPI17 |
++------------+------------------+--------------------------+
+| 2 | PRG0_RGMII2_TXC | PRG0_IEP1_EDC_SYNC_OUT1 |
++------------+------------------+--------------------------+
+| 3 | PRG0_PWM1_A2 | PRG0_PWM1_B2 |
++------------+------------------+--------------------------+
+| 4 | RGMII4_TXC | SPI3_CLK |
++------------+------------------+--------------------------+
+| 5 | ~ | ~ |
++------------+------------------+--------------------------+
+| 6 | ~ | ~ |
++------------+------------------+--------------------------+
+| 7 | GPIO0_79 | GPIO0_80 |
++------------+------------------+--------------------------+
+| 8 | ~ | GPMC0_AD13 |
++------------+------------------+--------------------------+
+| 9 | ~ | ~ |
++------------+------------------+--------------------------+
+| 10 | ~ | ~ |
++------------+------------------+--------------------------+
+| 11 | ~ | ~ |
++------------+------------------+--------------------------+
+| 12 | MCASP2_AXR2 | MCASP2_AXR3 |
++------------+------------------+--------------------------+
+| 13 | ~ | ~ |
++------------+------------------+--------------------------+
+| 14 | ~ | ~ |
++------------+------------------+--------------------------+
+| Bootstrap | ~ | BOOTMODE3 |
++------------+------------------+--------------------------+
+
+
+Connector P9
+==============
+
+The following tables show the pinout of the **P9** expansion header. The
+SW is responsible for setting the default function of each pin. Refer to
+the processor documentation for more information on these pins and
+detailed descriptions of all of the pins listed. In some cases there may
+not be enough signals to complete a group of signals that may be
+required to implement a total interface.
+
+The column heading is the pin number on the expansion header.
+
+The **GPIO** row is the expected gpio identifier number in the Linux
+kernel.
+
+Each row includes the gpiochipX and pinY in the format of
+`X Y`. You can use these values to direcly control the GPIO pins with the
+commands shown below.
+
+.. code::
+
+ # to set the GPIO pin state to HIGH
+ debian@BeagleBone:~$ gpioset X Y=1
+
+ # to set the GPIO pin state to LOW
+ debian@BeagleBone:~$ gpioset X Y=0
+
+ For Example:
+
+ +---------+----------+
+ | Pin | P9.11 |
+ +=========+==========+
+ | GPIO | 1 1 |
+ +---------+----------+
+
+ Use the commands below for controlling this pin (P9.11) where X = 1 and Y = 1
+
+ # to set the GPIO pin state to HIGH
+ debian@BeagleBone:~$ gpioset 1 20=1
+
+ # to set the GPIO pin state to LOW
+ debian@BeagleBone:~$ gpioset 1 20=0
+
+The **BALL** row is the pin number on the processor.
+
+The **REG** row is the offset of the control register for the processor
+pin.
+
+The **MODE #** rows are the mode setting for each pin. Setting each mode
+to align with the mode column will give that function on that pin.
+
+If included, the **2nd BALL** row is the pin number on the processor for
+a second processor pin connected to the same pin on the expansion
+header. Similarly, all row headings starting with **2nd** refer to data
+for this second processor pin.
+
+**NOTES**:
+
+**DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE
+BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.**
+
+**NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.**
+
+
+P9.01-P9.05
+------------
+
++--------+--------+--------+--------+--------+
+| P9.01 | P9.02 | P9.03 | P9.04 | P9.05 |
++========+========+========+========+========+
+| GND | GND |VOUT_3V3|VOUT_3V3| VIN |
++--------+--------+--------+--------+--------+
+
+P9.06-P9.10
+-------------
+
++--------+--------+--------+--------+--------+
+| P9.06 | P9.07 | P9.08 | P9.09 | P9.10 |
++========+========+========+========+========+
+| VIN |VOUT_SYS|VOUT_SYS|RESET# | RESET# |
++--------+--------+--------+--------+--------+
+
+P9.11-P9.13
+-------------
+
++------------+-----------------+-----------------+-----------------+
+| Pin | P9.11 | P9.12 | P9.13 |
++============+=================+=================+=================+
+| GPIO | 1 1 | 1 45 | 1 2 |
++------------+-----------------+-----------------+-----------------+
+| BALL | AC23 | AE27 | AG22 |
++------------+-----------------+-----------------+-----------------+
+| REG | 0x00011C004 | 0x00011C0B8 | 0x00011C008 |
++------------+-----------------+-----------------+-----------------+
+| Page | 39 | 29 | 40 |
++------------+-----------------+-----------------+-----------------+
+| MODE 0 | PRG1_PRU0_GPO0 | PRG0_PRU0_GPO2 | PRG1_PRU0_GPO1 |
++------------+-----------------+-----------------+-----------------+
+| 1 | PRG1_PRU0_GPI0 | PRG0_PRU0_GPI2 | PRG1_PRU0_GPI1 |
++------------+-----------------+-----------------+-----------------+
+| 2 | PRG1_RGMII1_RD0 | PRG0_RGMII1_RD2 | PRG1_RGMII1_RD1 |
++------------+-----------------+-----------------+-----------------+
+| 3 | PRG1_PWM3_A0 | PRG0_PWM2_A0 | PRG1_PWM3_B0 |
++------------+-----------------+-----------------+-----------------+
+| 4 | RGMII1_RD0 | RGMII3_RD2 | RGMII1_RD1 |
++------------+-----------------+-----------------+-----------------+
+| 5 | RMII1_RXD0 | RMII3_CRS_DV | RMII1_RXD1 |
++------------+-----------------+-----------------+-----------------+
+| 6 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 7 | GPIO0_1 | GPIO0_45 | GPIO0_2 |
++------------+-----------------+-----------------+-----------------+
+| 8 | GPMC0_BE1n | UART3_RXD | GPMC0_WAIT0 |
++------------+-----------------+-----------------+-----------------+
+| 9 | RGMII7_RD0 | ~ | RGMII7_RD1 |
++------------+-----------------+-----------------+-----------------+
+| 10 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 11 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 12 | MCASP6_ACLKX | MCASP0_ACLKR | MCASP6_AFSX |
++------------+-----------------+-----------------+-----------------+
+| 13 | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+| 14 | UART0_RXD | ~ | UART0_TXD |
++------------+-----------------+-----------------+-----------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+-----------------+-----------------+-----------------+
+
+P9.14-P9.16
+-------------
+
++------------+---------------+---------------------+---------------+
+| Pin | P9.14 | P9.15 | P9.16 |
++============+===============+=====================+===============+
+| GPIO | 1 93 | 1 47 | 1 94 |
++------------+---------------+---------------------+---------------+
+| BALL | U27 | AD25 | U24 |
++------------+---------------+---------------------+---------------+
+| REG | 0x00011C178 | 0x00011C0C0 | 0x00011C17C |
++------------+---------------+---------------------+---------------+
+| Page | 56 | 30 | 56 |
++------------+---------------+---------------------+---------------+
+| MODE 0 | RGMII5_RD3 | PRG0_PRU0_GPO4 | RGMII5_RD2 |
++------------+---------------+---------------------+---------------+
+| 1 | UART3_CTSn | PRG0_PRU0_GPI4 | UART3_RTSn |
++------------+---------------+---------------------+---------------+
+| 2 | ~ | PRG0_RGMII1_RX_CTL | ~ |
++------------+---------------+---------------------+---------------+
+| 3 | UART6_RXD | PRG0_PWM2_B0 | UART6_TXD |
++------------+---------------+---------------------+---------------+
+| 4 | VOUT1_DATA8 | RGMII3_RX_CTL | VOUT1_DATA9 |
++------------+---------------+---------------------+---------------+
+| 5 | TRC_DATA6 | RMII3_TXD1 | TRC_DATA7 |
++------------+---------------+---------------------+---------------+
+| 6 | EHRPWM2_A | ~ | EHRPWM2_B |
++------------+---------------+---------------------+---------------+
+| 7 | GPIO0_93 | GPIO0_47 | GPIO0_94 |
++------------+---------------+---------------------+---------------+
+| 8 | GPMC0_A9 | ~ | GPMC0_A10 |
++------------+---------------+---------------------+---------------+
+| 9 | ~ | ~ | ~ |
++------------+---------------+---------------------+---------------+
+| 10 | ~ | ~ | ~ |
++------------+---------------+---------------------+---------------+
+| 11 | ~ | ~ | ~ |
++------------+---------------+---------------------+---------------+
+| 12 | MCASP11_AXR0 | MCASP0_AXR2 | MCASP11_AXR1 |
++------------+---------------+---------------------+---------------+
+| 13 | ~ | ~ | ~ |
++------------+---------------+---------------------+---------------+
+| 14 | ~ | ~ | ~ |
++------------+---------------+---------------------+---------------+
+| Bootstrap | ~ | ~ | ~ |
++------------+---------------+---------------------+---------------+
+
+P9.17-P9.18
+-------------
+
++------------+--------------------------+------------+--------------------------+--------------------------+
+| Pin | P9.17 | ~ | P9.18 | ~ |
++============+==========================+============+==========================+==========================+
+| GPIO | 1 28 | 1 115 | 1 40 | 1 120 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| BALL | AC21 | AA3 | AH22 | Y2 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| REG | 0x00011C074 | 0x00011C1D0| 0x00011C0A4 | 0x00011C1E4 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| Page | 49 | 67 | 53 | 68 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| MODE 0 | PRG1_PRU1_GPO7 | SPI0_D1 | PRG1_PRU1_GPO19 | SPI1_D1 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 1 | PRG1_PRU1_GPI7 | ~ | PRG1_PRU1_GPI19 | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 2 | PRG1_IEP1_EDC_LATCH_IN1 | I2C6_SCL | PRG1_IEP1_EDC_SYNC_OUT0 | I2C6_SDA |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 3 | ~ | ~ | PRG1_PWM1_TZ_OUT | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 4 | SPI6_CS0 | ~ | SPI6_D1 | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 5 | RMII6_RX_ER | ~ | RMII6_TXD1 | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 6 | MCAN7_TX | ~ | PRG1_ECAP0_IN_APWM_OUT | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 7 | GPIO0_28 | GPIO0_115 | GPIO0_40 | GPIO0_120 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 8 | ~ | ~ | ~ | PRG0_IEP1_EDC_SYNC_OUT0 |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 9 | ~ | ~ | ~ | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 10 | VOUT0_DATA7 | ~ | VOUT0_PCLK | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 11 | VPFE0_DATA15 | ~ | ~ | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 12 | MCASP4_AXR1 | ~ | MCASP5_AXR1 | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| 14 | UART3_TXD | ~ | ~ | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+--------------------------+------------+--------------------------+--------------------------+
+
+
+P9.19-P9.20
+------------
+
++------------+-----------+---------------------+-----------+------------------+
+| Pin | P9.19 | ~ | P9.20 | ~ |
++============+===========+=====================+===========+==================+
+| GPIO | 2 1 | 1 78 | 2 2 | 1 77 |
++------------+-----------+---------------------+-----------+------------------+
+| BALL | W5 | AF29 | W6 | AE25 |
++------------+-----------+---------------------+-----------+------------------+
+| REG |0x00011C208| 0x00011C13C |0x00011C20C| 0x00011C138 |
++------------+-----------+---------------------+-----------+------------------+
+| Page | 19 | 38 | 19 | 37 |
++------------+-----------+---------------------+-----------+------------------+
+| MODE 0 | MCAN0_RX | PRG0_PRU1_GPO15 | MCAN0_TX | PRG0_PRU1_GPO14 |
++------------+-----------+---------------------+-----------+------------------+
+| 1 | ~ | PRG0_PRU1_GPI15 | ~ | PRG0_PRU1_GPI14 |
++------------+-----------+---------------------+-----------+------------------+
+| 2 | ~ | PRG0_RGMII2_TX_CTL | ~ | PRG0_RGMII2_TD3 |
++------------+-----------+---------------------+-----------+------------------+
+| 3 | ~ | PRG0_PWM1_B1 | ~ | PRG0_PWM1_A1 |
++------------+-----------+---------------------+-----------+------------------+
+| 4 | I2C2_SCL | RGMII4_TX_CTL | I2C2_SDA | RGMII4_TD3 |
++------------+-----------+---------------------+-----------+------------------+
+| 5 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 6 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 7 | GPIO1_1 | GPIO0_78 | GPIO1_2 | GPIO0_77 |
++------------+-----------+---------------------+-----------+------------------+
+| 8 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 9 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 10 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 11 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 12 | ~ | MCASP2_AXR1 | ~ | MCASP2_AXR0 |
++------------+-----------+---------------------+-----------+------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+| 14 | ~ | UART2_RTSn | ~ | UART2_CTSn |
++------------+-----------+---------------------+-----------+------------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+-----------+---------------------+-----------+------------------+
+
+
+P9.21-P9.22
+-------------
+
++------------+--------------------------+---------------+--------------------------+---------------+
+| Pin | P9.21 | ~ | P9.22 | ~ |
++============+==========================+===============+==========================+===============+
+| GPIO | 1 39 | 1 90 | 1 38 | 1 91 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| BALL | AJ22 | U28 | AC22 | U29 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| REG | 0x00011C0A0 | 0x00011C16C | 0x00011C09C | 0x00011C170 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| Page | 52 | 56 | 52 | 54 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| MODE 0 | PRG1_PRU1_GPO18 | RGMII5_TD0 | PRG1_PRU1_GPO17 | RGMII5_TXC |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 1 | PRG1_PRU1_GPI18 | RMII7_TXD0 | PRG1_PRU1_GPI17 | RMII7_TX_EN |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 2 | PRG1_IEP1_EDC_LATCH_IN0 | I2C3_SDA | PRG1_IEP1_EDC_SYNC_OUT1 | I2C6_SCL |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 3 | PRG1_PWM1_TZ_IN | ~ | PRG1_PWM1_B2 | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 4 | SPI6_D0 | VOUT1_DATA5 | SPI6_CLK | VOUT1_DATA6 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 5 | RMII6_TXD0 | TRC_DATA3 | RMII6_TX_EN | TRC_DATA4 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 6 | PRG1_ECAP0_SYNC_IN | EHRPWM1_A | PRG1_ECAP0_SYNC_OUT | EHRPWM1_B |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 7 | GPIO0_39 | GPIO0_90 | GPIO0_38 | GPIO0_91 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 8 | ~ | GPMC0_A6 | ~ | GPMC0_A7 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 9 | VOUT0_VP2_VSYNC | ~ | VOUT0_VP2_DE | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 10 | VOUT0_VSYNC | ~ | VOUT0_DE | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 11 | ~ | ~ | VPFE0_DATA10 | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 12 | MCASP5_AXR0 | MCASP11_AFSX | MCASP5_AFSX | MCASP10_AXR2 |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+| 14 | VOUT0_VP0_VSYNC | ~ | VOUT0_VP0_DE | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+| Bootstrap | ~ | ~ | BOOTMODE1 | ~ |
++------------+--------------------------+---------------+--------------------------+---------------+
+
+P9.23-P9.25
+------------
+
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| Pin | P9.23 | P9.24 | ~ | P9.25 | ~ |
++============+===============================+==========================+==================+=============+====================+
+| GPIO | 1 10 | 1 119 | 1 13 | 1 127 | 1 104 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| BALL | AG20 | Y5 | AJ24 | AC4 | W26 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| REG | 0x00011C028 | 0x00011C1E0 | 0x00011C034 | 0x00011C200 | 0x00011C1A4 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| Page | 42 | 68 | 43 | 69 | 54 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| MODE 0 | PRG1_PRU0_GPO9 | SPI1_D0 | PRG1_PRU0_GPO12 | UART1_CTSn | RGMII6_RXC |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 1 | PRG1_PRU0_GPI9 | UART5_RTSn | PRG1_PRU0_GPI12 | MCAN3_RX | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 2 | PRG1_UART0_CTSn | I2C4_SCL | PRG1_RGMII1_TD1 | ~ | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 3 | PRG1_PWM3_TZ_IN | UART2_TXD | PRG1_PWM0_A0 | ~ | AUDIO_EXT_REFCLK2 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 4 | SPI6_CS1 | ~ | RGMII1_TD1 | SPI2_D0 | VOUT1_DE |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 5 | RMII5_RXD1 | ~ | ~ | EQEP0_S | TRC_DATA17 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 6 | ~ | ~ | MCAN4_RX | ~ | EHRPWM4_B |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 7 | GPIO0_10 | GPIO0_119 | GPIO0_13 | GPIO0_127 | GPIO0_104 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 8 | GPMC0_ADVn_ALE | PRG0_IEP1_EDC_LATCH_IN0 | ~ | ~ | GPMC0_A20 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 9 | PRG1_IEP0_EDIO_DATA_IN_OUT28 | ~ | RGMII7_TD1 | ~ | VOUT1_VP0_DE |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 10 | VOUT0_DATA23 | ~ | VOUT0_DATA17 | ~ | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 11 | ~ | ~ | VPFE0_DATA1 | ~ | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 12 | MCASP3_ACLKX | ~ | MCASP7_AFSX | ~ | MCASP10_AXR7 |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 13 | ~ | ~ | ~ | ~ | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| 14 | ~ | ~ | ~ | ~ | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+| Bootstrap | ~ | ~ | ~ | ~ | ~ |
++------------+-------------------------------+--------------------------+------------------+-------------+--------------------+
+
+P9.26-P9.27
+------------
+
++------------+--------------------------+------------------+-----------------+-------------+
+| Pin | P9.26 | ~ | P9.27 | ~ |
++============+==========================+==================+=================+=============+
+| GPIO | 1 118 | 1 12 | 1 46 | 1 124 |
++------------+--------------------------+------------------+-----------------+-------------+
+| BALL | Y1 | AF24 | AD26 | AB1 |
++------------+--------------------------+------------------+-----------------+-------------+
+| REG | 0x00011C1DC | 0x00011C030 | 0x00011C0BC | 0x00011C1F4 |
++------------+--------------------------+------------------+-----------------+-------------+
+| Page | 67 | 43 | 30 | 69 |
++------------+--------------------------+------------------+-----------------+-------------+
+| MODE 0 | SPI1_CLK | PRG1_PRU0_GPO11 | PRG0_PRU0_GPO3 | UART0_RTSn |
++------------+--------------------------+------------------+-----------------+-------------+
+| 1 | UART5_CTSn | PRG1_PRU0_GPI11 | PRG0_PRU0_GPI3 | TIMER_IO7 |
++------------+--------------------------+------------------+-----------------+-------------+
+| 2 | I2C4_SDA | PRG1_RGMII1_TD0 | PRG0_RGMII1_RD3 | SPI0_CS3 |
++------------+--------------------------+------------------+-----------------+-------------+
+| 3 | UART2_RXD | PRG1_PWM3_TZ_OUT | PRG0_PWM3_A2 | MCAN2_TX |
++------------+--------------------------+------------------+-----------------+-------------+
+| 4 | ~ | RGMII1_TD0 | RGMII3_RD3 | SPI2_CLK |
++------------+--------------------------+------------------+-----------------+-------------+
+| 5 | ~ | ~ | RMII3_RX_ER | EQEP0_B |
++------------+--------------------------+------------------+-----------------+-------------+
+| 6 | ~ | MCAN4_TX | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 7 | GPIO0_118 | GPIO0_12 | GPIO0_46 | GPIO0_124 |
++------------+--------------------------+------------------+-----------------+-------------+
+| 8 | PRG0_IEP0_EDC_SYNC_OUT0 | ~ | UART3_TXD | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 9 | ~ | RGMII7_TD0 | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 10 | ~ | VOUT0_DATA16 | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 11 | ~ | VPFE0_DATA0 | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 12 | ~ | MCASP7_ACLKX | MCASP0_AFSR | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+--------------------------+------------------+-----------------+-------------+
+
+
+P9.28-P9.29
+------------
+
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| Pin | P9.28 | ~ | P9.29 | ~ |
++============+====================+=================+====================+===============================+
+| GPIO | 2 11 | 1 43 | 2 14 | 1 53 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| BALL | U2 | AF28 | V5 | AB25 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| REG | 0x00011C230 | 0x00011C0B0 | 0x00011C23C | 0x00011C0D8 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| Page | 18 | 29 | 68 | 31 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| MODE 0 | ECAP0_IN_APWM_OUT | PRG0_PRU0_GPO0 | TIMER_IO1 | PRG0_PRU0_GPO10 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 1 | SYNC0_OUT | PRG0_PRU0_GPI0 | ECAP2_IN_APWM_OUT | PRG0_PRU0_GPI10 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 2 | CPTS0_RFT_CLK | PRG0_RGMII1_RD0 | OBSCLK0 | PRG0_UART0_RTSn |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 3 | ~ | PRG0_PWM3_A0 | ~ | PRG0_PWM2_B1 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 4 | SPI2_CS3 | RGMII3_RD0 | ~ | SPI3_CS2 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 5 | I3C0_SDAPULLEN | RMII3_RXD1 | ~ | PRG0_IEP0_EDIO_DATA_IN_OUT29 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 6 | SPI7_CS0 | ~ | SPI7_D1 | MCAN10_RX |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 7 | GPIO1_11 | GPIO0_43 | GPIO1_14 | GPIO0_53 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 8 | ~ | ~ | ~ | GPMC0_AD4 |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 9 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 10 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 11 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 12 | ~ | MCASP0_AXR0 | ~ | MCASP0_AFSX |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+| Bootstrap | ~ | ~ | BOOTMODE5 | ~ |
++------------+--------------------+-----------------+--------------------+-------------------------------+
+
+P9.30-P9.31
+------------
+
++------------+--------------------+-----------------+--------------+-------------------------------+
+| Pin | P9.30 | ~ | P9.31 | ~ |
++============+====================+=================+==============+===============================+
+| GPIO | 2 13 | 1 44 | 2 12 | 1 52 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| BALL | V6 | AE28 | U3 | AB26 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| REG | 0x00011C238 | 0x00011C0B4 | 0x00011C234 | 0x00011C0D4 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| Page | 68 | 29 | 18 | 31 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| MODE 0 | TIMER_IO0 | PRG0_PRU0_GPO1 | EXT_REFCLK1 | PRG0_PRU0_GPO9 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 1 | ECAP1_IN_APWM_OUT | PRG0_PRU0_GPI1 | SYNC1_OUT | PRG0_PRU0_GPI9 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 2 | SYSCLKOUT0 | PRG0_RGMII1_RD1 | ~ | PRG0_UART0_CTSn |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 3 | ~ | PRG0_PWM3_B0 | ~ | PRG0_PWM3_TZ_IN |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 4 | ~ | RGMII3_RD1 | ~ | SPI3_CS1 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 5 | ~ | RMII3_RXD0 | ~ | PRG0_IEP0_EDIO_DATA_IN_OUT28 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 6 | SPI7_D0 | ~ | SPI7_CLK | MCAN10_TX |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 7 | GPIO1_13 | GPIO0_44 | GPIO1_12 | GPIO0_52 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 8 | ~ | ~ | ~ | GPMC0_AD3 |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 9 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 10 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 11 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 12 | ~ | MCASP0_AXR1 | ~ | MCASP0_ACLKX |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| 14 | ~ | ~ | ~ | UART6_TXD |
++------------+--------------------+-----------------+--------------+-------------------------------+
+| Bootstrap | BOOTMODE4 | ~ | ~ | ~ |
++------------+--------------------+-----------------+--------------+-------------------------------+
+
+
+P9.32-P9.35
+-------------
+
++----------+--------+
+| P9.32 | P9.34 |
++==========+========+
+| VDD_ADC | GND |
++----------+--------+
+
++------------+----------------+--------------------------+----------------+------------------+
+| Pin | P9.33 | ~ | P9.35 | ~ |
++============+================+==========================+================+==================+
+| GPIO | ~ | 1 50 | ~ | 1 55 |
++------------+----------------+--------------------------+----------------+------------------+
+| BALL | K24 | AC28 | K29 | AH27 |
++------------+----------------+--------------------------+----------------+------------------+
+| REG | 0x00011C140 | 0x00011C0CC | 0x00011C148 | 0x00011C0E0 |
++------------+----------------+--------------------------+----------------+------------------+
+| Page | 20 | 31 | 20 | 32 |
++------------+----------------+--------------------------+----------------+------------------+
+| MODE 0 | MCU_ADC0_AIN4 | PRG0_PRU0_GPO7 | MCU_ADC0_AIN6 | PRG0_PRU0_GPO12 |
++------------+----------------+--------------------------+----------------+------------------+
+| 1 | ~ | PRG0_PRU0_GPI7 | ~ | PRG0_PRU0_GPI12 |
++------------+----------------+--------------------------+----------------+------------------+
+| 2 | ~ | PRG0_IEP0_EDC_LATCH_IN1 | ~ | PRG0_RGMII1_TD1 |
++------------+----------------+--------------------------+----------------+------------------+
+| 3 | ~ | PRG0_PWM3_B1 | ~ | PRG0_PWM0_A0 |
++------------+----------------+--------------------------+----------------+------------------+
+| 4 | ~ | PRG0_ECAP0_SYNC_IN | ~ | RGMII3_TD1 |
++------------+----------------+--------------------------+----------------+------------------+
+| 5 | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| 6 | ~ | MCAN9_TX | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| 7 | ~ | GPIO0_50 | ~ | GPIO0_55 |
++------------+----------------+--------------------------+----------------+------------------+
+| 8 | ~ | GPMC0_AD1 | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| 9 | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| 10 | ~ | ~ | ~ | DSS_FSYNC0 |
++------------+----------------+--------------------------+----------------+------------------+
+| 11 | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| 12 | ~ | MCASP0_AXR5 | ~ | MCASP0_AXR8 |
++------------+----------------+--------------------------+----------------+------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+----------------+------------------+
+
+P9.36-P9.37
+-------------
+
++------------+----------------+------------------+----------------+------------------+
+| Pin | P9.36 | ~ | P9.37 | ~ |
++============+================+==================+================+==================+
+| GPIO | ~ | 1 56 | ~ | 1 57 |
++------------+----------------+------------------+----------------+------------------+
+| BALL | K27 | AH29 | K28 | AG28 |
++------------+----------------+------------------+----------------+------------------+
+| REG | 0x00011C144 | 0x00011C0E4 | 0x00011C138 | 0x00011C0E8 |
++------------+----------------+------------------+----------------+------------------+
+| Page | 20 | 32 | 20 | 32 |
++------------+----------------+------------------+----------------+------------------+
+| MODE 0 | MCU_ADC0_AIN5 | PRG0_PRU0_GPO13 | MCU_ADC0_AIN2 | PRG0_PRU0_GPO14 |
++------------+----------------+------------------+----------------+------------------+
+| 1 | ~ | PRG0_PRU0_GPI13 | ~ | PRG0_PRU0_GPI14 |
++------------+----------------+------------------+----------------+------------------+
+| 2 | ~ | PRG0_RGMII1_TD2 | ~ | PRG0_RGMII1_TD3 |
++------------+----------------+------------------+----------------+------------------+
+| 3 | ~ | PRG0_PWM0_B0 | ~ | PRG0_PWM0_A1 |
++------------+----------------+------------------+----------------+------------------+
+| 4 | ~ | RGMII3_TD2 | ~ | RGMII3_TD3 |
++------------+----------------+------------------+----------------+------------------+
+| 5 | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| 6 | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| 7 | ~ | GPIO0_56 | ~ | GPIO0_57 |
++------------+----------------+------------------+----------------+------------------+
+| 8 | ~ | ~ | ~ | UART4_RXD |
++------------+----------------+------------------+----------------+------------------+
+| 9 | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| 10 | ~ | DSS_FSYNC2 | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| 11 | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| 12 | ~ | MCASP0_AXR9 | ~ | MCASP0_AXR10 |
++------------+----------------+------------------+----------------+------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+----------------+------------------+----------------+------------------+
+
+P9.38-P9.39
+-------------
+
++------------+----------------+---------------------+----------------+------------------+
+| Pin | P9.38 | ~ | P9.39 | ~ |
++============+================+=====================+================+==================+
+| GPIO | ~ | 1 58 | ~ | 1 54 |
++------------+----------------+---------------------+----------------+------------------+
+| BALL | L28 | AG27 | K25 | AJ28 |
++------------+----------------+---------------------+----------------+------------------+
+| REG | 0x00011C13C | 0x00011C0EC | 0x00011C130 | 0x00011C0DC |
++------------+----------------+---------------------+----------------+------------------+
+| Page | ~ | 33 | 20 | 32 |
++------------+----------------+---------------------+----------------+------------------+
+| MODE 0 | MCU_ADC0_AIN3 | PRG0_PRU0_GPO15 | MCU_ADC0_AIN0 | PRG0_PRU0_GPO11 |
++------------+----------------+---------------------+----------------+------------------+
+| 1 | ~ | PRG0_PRU0_GPI15 | ~ | PRG0_PRU0_GPI11 |
++------------+----------------+---------------------+----------------+------------------+
+| 2 | ~ | PRG0_RGMII1_TX_CTL | ~ | PRG0_RGMII1_TD0 |
++------------+----------------+---------------------+----------------+------------------+
+| 3 | ~ | PRG0_PWM0_B1 | ~ | PRG0_PWM3_TZ_OUT |
++------------+----------------+---------------------+----------------+------------------+
+| 4 | ~ | RGMII3_TX_CTL | ~ | RGMII3_TD0 |
++------------+----------------+---------------------+----------------+------------------+
+| 5 | ~ | ~ | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| 6 | ~ | ~ | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| 7 | ~ | GPIO0_58 | ~ | GPIO0_54 |
++------------+----------------+---------------------+----------------+------------------+
+| 8 | ~ | UART4_TXD | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| 9 | ~ | ~ | ~ | CLKOUT |
++------------+----------------+---------------------+----------------+------------------+
+| 10 | ~ | DSS_FSYNC3 | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| 11 | ~ | ~ | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| 12 | ~ | MCASP0_AXR11 | ~ | MCASP0_AXR7 |
++------------+----------------+---------------------+----------------+------------------+
+| 13 | ~ | ~ | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| 14 | ~ | ~ | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+| Bootstrap | ~ | ~ | ~ | ~ |
++------------+----------------+---------------------+----------------+------------------+
+
+P9.40-P9.42
+------------
+
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| Pin | P9.40 | ~ | P9.41 | P9.42 | ~ |
++============+================+==========================+=============+=============+==========================+
+| GPIO | ~ | 1 81 | 2 0 | 1 123 | 1 18 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| BALL | K26 | AA26 | AD5 | AC2 | AJ21 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| REG | 0x00011C134 | 0x00011C148 | 0x00011C204 | 0x00011C1F0 | 0x00011C04C |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| Page | 20 | 38 | 69 | 68 | 45 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| MODE 0 | MCU_ADC0_AIN1 | PRG0_PRU1_GPO18 | UART1_RTSn | UART0_CTSn | PRG1_PRU0_GPO17 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 1 | ~ | PRG0_PRU1_GPI18 | MCAN3_TX | TIMER_IO6 | PRG1_PRU0_GPI17 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 2 | ~ | PRG0_IEP1_EDC_LATCH_IN0 | ~ | SPI0_CS2 | PRG1_IEP0_EDC_SYNC_OUT1 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 3 | ~ | PRG0_PWM1_TZ_IN | ~ | MCAN2_RX | PRG1_PWM0_B2 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 4 | ~ | SPI3_D0 | SPI2_D1 | SPI2_CS0 | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 5 | ~ | ~ | EQEP0_I | EQEP0_A | RMII5_TXD1 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 6 | ~ | MCAN12_TX | ~ | ~ | MCAN5_TX |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 7 | ~ | GPIO0_81 | GPIO1_0 | GPIO0_123 | GPIO0_18 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 8 | ~ | GPMC0_AD14 | ~ | ~ | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 9 | ~ | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 10 | ~ | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 11 | ~ | ~ | ~ | ~ | VPFE0_DATA6 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 12 | ~ | MCASP2_AFSX | ~ | ~ | MCASP3_AXR3 |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 13 | ~ | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| 14 | ~ | UART2_RXD | ~ | ~ | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+| Bootstrap | ~ | ~ | ~ | ~ | ~ |
++------------+----------------+--------------------------+-------------+-------------+--------------------------+
+
+P9.43-P9.46
+-------------
+
++--------+--------+--------+--------+
+| P9.43 | P9.44 | P9.45 | P9.46 |
++========+========+========+========+
+| GND | GND | GND | GND |
++--------+--------+--------+--------+
diff --git a/boards/beaglebone/ai-64/edge_ai_apps/configuration_file.rst b/boards/beaglebone/ai-64/edge_ai_apps/configuration_file.rst
index fa062aea0b3eb7c620b57e58770d86e845e18ea1..0654a3393e95fb49b8f8849035879508167e520a 100644
--- a/boards/beaglebone/ai-64/edge_ai_apps/configuration_file.rst
+++ b/boards/beaglebone/ai-64/edge_ai_apps/configuration_file.rst
@@ -29,7 +29,7 @@ Their properties like shown below.
inputs:
input0: #Camera Input
source: /dev/video2 #Device file entry of the camera
- format: jpeg #Input data format suported by camera
+ format: jpeg #Input data format supported by camera
width: 1280 #Width and Height of the input
height: 720
framerate: 30 #Framerate of the source
@@ -110,7 +110,7 @@ input section of config file.
framerate: 30
input2:
- source: /dev/video2 #IMX219 raw sensor that nees ISP
+ source: /dev/video2 #IMX219 raw sensor that needs ISP
format: rggb #ISP will be added in the pipeline
width: 1920
height: 1080
@@ -118,7 +118,7 @@ input section of config file.
subdev-id: 2 #needed by ISP to control sensor params via ioctls
input3:
- source: /dev/video2 #IMX390 raw sensor that nees ISP
+ source: /dev/video2 #IMX390 raw sensor that needs ISP
width: 1936
height: 1100
format: rggb12 #ISP will be added in the pipeline
@@ -194,7 +194,7 @@ via RTSP server running on a remote PC can be provided as inputs to the demo.
Usually video streams from any IP camera will be encrypted and cannot be
played back directly without a decryption key. We tested RTSP source by
- setting up an RTSP server on a Ubuntu 18.04 PC by refering to this writeup,
+ setting up an RTSP server on a Ubuntu 18.04 PC by referring to this writeup,
`Setting up RTSP server on PC
<https://gist.github.com/Santiago-vdk/80c378a315722a1b813ae5da1661f890>`_
diff --git a/boards/beaglebone/ai-64/edge_ai_apps/datasheet.rst b/boards/beaglebone/ai-64/edge_ai_apps/datasheet.rst
index ea8dfebdcbc57a0853b39bfc4be7fa1373fbc1c3..5bc1fbb263c39160539d3e674d74f1ccb52e9c41 100644
--- a/boards/beaglebone/ai-64/edge_ai_apps/datasheet.rst
+++ b/boards/beaglebone/ai-64/edge_ai_apps/datasheet.rst
@@ -13,7 +13,7 @@ command on target:
debian@beaglebone:/opt/edge_ai_apps/tests# ./gen_data_sheet.sh
-The performence measurements includes the following
+The performance measurements includes the following
#. **FPS** : Effective framerate at which the application runs
#. **Total time** : Average time taken to process each frame, which includes
diff --git a/boards/beaglebone/ai-64/edge_ai_apps/docker_environment.rst b/boards/beaglebone/ai-64/edge_ai_apps/docker_environment.rst
index ed82a3a3575d42905c24cbcf306de9771aa33fb8..50894991b97359f01f5d7c3a98f49d76d6dbc4a0 100644
--- a/boards/beaglebone/ai-64/edge_ai_apps/docker_environment.rst
+++ b/boards/beaglebone/ai-64/edge_ai_apps/docker_environment.rst
@@ -186,7 +186,7 @@ The following steps outline the process for Docker root directory relocation
assuming that the current Docker root is not at the desired location. If the
current location is the desired location then exit this procedure.
-1. Run 'Docker info' command and inspect the output. Locate the line with
+1. Run 'Docker info' command inspect the output. Locate the line with
content **Docker Root Dir**. It will list the current location.
2. To preserve any existing images, export them to .tar files for importing
diff --git a/boards/beaglebone/ai-64/edge_ai_apps/getting_started.rst b/boards/beaglebone/ai-64/edge_ai_apps/getting_started.rst
index 9da457399b15bf33d06d9c31b13ceac5d2f441cc..11f016b82b4adf468c752bd4d55347f226c4cd58 100644
--- a/boards/beaglebone/ai-64/edge_ai_apps/getting_started.rst
+++ b/boards/beaglebone/ai-64/edge_ai_apps/getting_started.rst
@@ -10,7 +10,7 @@ Hardware setup
BeagleBone® AI-64 has TI's TDA4VM SoC which houses dual core A72, high performance vision
accelerators, video codec accelerators, latest C71x and C66x DSP, high bandwidth
-realtime IPs for capture and display, GPU, dedicated safety island and security
+realtime IPs for capture and display, GPU, dedicated safety island security
accelerators. The SoC is power optimized to provide best in class performance
for perception, sensor fusion, localization and path planning tasks in robotics,
industrial and automotive applications.
@@ -92,7 +92,7 @@ Note that the headers have to be lifted up to connect the cameras
Reboot the board after editing and saving the file.
-Two RPi cameras can be connected to 2 headers for multi camera usecases
+Two RPi cameras can be connected to 2 headers for multi camera use-cases
Please refer :ref:`pub_edgeai_camera_sources` to know how to list all the cameras
connected and select which one to use for the demo.
diff --git a/boards/beaglebone/ai-64/edge_ai_apps/inference_models.rst b/boards/beaglebone/ai-64/edge_ai_apps/inference_models.rst
index 91fbc396034d6688cec98b31f4cf8c87c214cfde..7075640c4a2433f43d727f253ee0fbed3720397d 100644
--- a/boards/beaglebone/ai-64/edge_ai_apps/inference_models.rst
+++ b/boards/beaglebone/ai-64/edge_ai_apps/inference_models.rst
@@ -79,7 +79,7 @@ Each DNN must have the following 3 components:
Param file format
-----------------
-Each DNN has it’s own pre-process, inference and post-process
+Each DNN has its own pre-process, inference and post-process
parameters to get the correct output. This information is typically available in
the training software that was used to train the model. In order to convey this
information to the SDK in a standardized fashion, we have defined a set of
diff --git a/boards/beaglebone/ai-64/edge_ai_apps/sdk_components.rst b/boards/beaglebone/ai-64/edge_ai_apps/sdk_components.rst
index 36b1431cec980a2a69a43ea34f41656e27f019c4..59272e3d72331dcf6a83356e8e2d8b35bab6493c 100644
--- a/boards/beaglebone/ai-64/edge_ai_apps/sdk_components.rst
+++ b/boards/beaglebone/ai-64/edge_ai_apps/sdk_components.rst
@@ -52,7 +52,7 @@ for various computer vision tasks. A few example models are packaged as part of
the SDK to run out-of-box demos. More can be downloaded using a download script
made available in the edge_ai_apps repo.
-For more details on the the pre-imported models and related documentation please visit:
+For more details on the pre-imported models and related documentation please visit:
https://github.com/TexasInstruments/edgeai-modelzoo
diff --git a/boards/beaglebone/ai-64/index.rst b/boards/beaglebone/ai-64/index.rst
index d53e800579ecbf28cc33439b5f8fd4063c33c4a7..3e234b2ba64db224aa00df463d0cdd86a139b297 100644
--- a/boards/beaglebone/ai-64/index.rst
+++ b/boards/beaglebone/ai-64/index.rst
@@ -30,6 +30,7 @@ hardware examples and dozens of readily available embedded expansion options ava
/boards/beaglebone/ai-64/ch03.rst
/boards/beaglebone/ai-64/ch04.rst
/boards/beaglebone/ai-64/ch05.rst
+ /boards/beaglebone/ai-64/ch07.rst
/boards/beaglebone/ai-64/ch09.rst
/boards/beaglebone/ai-64/ch10.rst
/boards/beaglebone/ai-64/ch11.rst
diff --git a/boards/beaglebone/ai/System-Reference-Manual.asciidoc b/boards/beaglebone/ai/System-Reference-Manual.asciidoc
index dc94cf18b124cec001171f47296f69165fab5a09..a931d87613780ce5a8761d2ebcc3c50d28f8e2dc 100644
--- a/boards/beaglebone/ai/System-Reference-Manual.asciidoc
+++ b/boards/beaglebone/ai/System-Reference-Manual.asciidoc
@@ -100,7 +100,7 @@ Proposed changes.
* https://github.com/beagleboard/beaglebone-ai/issues/24[Add footprint for pull-down resistor on serial debug header RX line].
* https://github.com/beagleboard/beaglebone-ai/issues/25[Move microSD card cage closer to microHDMI to fit cases better].
-* https://github.com/beagleboard/beaglebone-ai/issues/22[Connect AM5729 ball AB10 to to P9.13 to provide a GPIO].
+* https://github.com/beagleboard/beaglebone-ai/issues/22[Connect AM5729 ball AB10 to P9.13 to provide a GPIO].
* https://github.com/beagleboard/beaglebone-ai/issues/19[HDMI hot-plug detection fixes].
* https://github.com/beagleboard/beaglebone-ai/issues/20[Add additional CAN port to the expansion headers].
* https://github.com/beagleboard/beaglebone-ai/issues/21[Fix JTAG connector to not require wire mods].
@@ -134,7 +134,7 @@ You will need to purchase:
* Serial cable[https://github.com/beagleboard/beaglebone-ai/wiki/Frequently-Asked-Questions#serial-cable] (optional)
More information or to purchase a replacement heat sink or antenna,
-please go to these web sites:
+please go to these websites:
* https://bit.ly/2kmXAzF[Antenna]
* https://bit.ly/2klxxJa[Heat Sink]
@@ -533,7 +533,7 @@ TODO: This text needs to go somewhere.
|0x47 |U13 |HD3SS3220 USB Type-C DRP port controller
|0x50 |U9 |24LC32 board ID EEPROM
|0x58 |U3 |TPS6590379 PMIC power registers
-|0x5a |U3 |TPS6590379 PMIC interfaces and auxilaries
+|0x5a |U3 |TPS6590379 PMIC interfaces and auxiliaries
|0x5c |U3 |TPS6590379 PMIC trimming and test
|0x5e |U3 |TPS6590379 PMIC OTP
|===
@@ -607,7 +607,7 @@ interface placement]
*Figure 23* below shows how the USB-C power input is connected to the
*TPS6590379*.
-TODO: (Schematic screenshoot)
+TODO: (Schematic screenshot)
[[power-button]]
==== 6.1.3 Power Button
@@ -736,7 +736,7 @@ CPU's:
* PRU-ICSS2 PRU1
The programmable nature of the PRUs, along with their access to pins,
-events and all SoC resources, provides flexibility in implmenting fast
+events and all SoC resources, provides flexibility in implementing fast
real-time responses, specialized data handling operations, peripheral
interfaces and in off-loading tasks from the other processor cores of
the SoC.
@@ -788,7 +788,7 @@ Resources
https://beagleboard.org/pru
* The PRU Cookbook provides examples and getting started information
https://github.com/MarkAYoder/PRUCookbook
-* Detailed specification is availble at
+* Detailed specification is available at
http://processors.wiki.ti.com/index.php/PRU-ICSS
[[faq]]
@@ -2631,7 +2631,7 @@ l’autorité de l'utilisateur pour actionner l'équipement.
The design materials referred to in this document are _*NOT SUPPORTED*_
and *DO NOT* constitute a reference design. Support of the open source
-developer community is provided through the the resources defined at
+developer community is provided through the resources defined at
https://beagleboard.org/support.
THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENT PERMITTED
diff --git a/boards/beaglebone/ai/ch02.rst b/boards/beaglebone/ai/ch02.rst
index 277998b3d94fb44f41161e77a0e88fd0e53bef42..a96c869faae2e693c10be2d633a0ec8a37ca6fea 100644
--- a/boards/beaglebone/ai/ch02.rst
+++ b/boards/beaglebone/ai/ch02.rst
@@ -55,7 +55,7 @@ Proposed changes.
- `Move microSD card cage closer to microHDMI to fit cases
better <https://github.com/beagleboard/beaglebone-ai/issues/25>`__.
-- `Connect AM5729 ball AB10 to to P9.13 to provide a
+- `Connect AM5729 ball AB10 to P9.13 to provide a
GPIO <https://github.com/beagleboard/beaglebone-ai/issues/22>`__.
- `HDMI hot-plug detection
diff --git a/boards/beaglebone/ai/ch03.rst b/boards/beaglebone/ai/ch03.rst
index ae8e9e2eaf12dbc2f04b0828299bd3dba8e9c042..5d80936f9235dc49d89f4bdc656525fb9e9139da 100644
--- a/boards/beaglebone/ai/ch03.rst
+++ b/boards/beaglebone/ai/ch03.rst
@@ -28,7 +28,7 @@ You will need to purchase:
- MicroSD Card (optional)
- `Serial cable <https://github.com/beagleboard/beaglebone-ai/wiki/Frequently-Asked-Questions#serial-cable>`_ (optional)
-More information or to purchase a replacement heat sink or antenna, please go to these web sites:
+More information or to purchase a replacement heat sink or antenna, please go to these websites:
- `Antenna <https://bit.ly/2kmXAzF>`_
- `Heat Sink <https://bit.ly/2klxxJa>`_
diff --git a/boards/beaglebone/ai/ch05.rst b/boards/beaglebone/ai/ch05.rst
index b4ddaa5633c93b4953b6577e2d72906b34dfa878..0cfb3910d1919eaa61d868f4a3b23487bda1083e 100644
--- a/boards/beaglebone/ai/ch05.rst
+++ b/boards/beaglebone/ai/ch05.rst
@@ -269,37 +269,38 @@ functions that are not accessible which are: (TBD)
TODO: This text needs to go somewhere.
On-board I2C Devices
-***********************
-
-+--------+--------+-----------------+
-| A | Iden | Description |
-| ddress | tifier | |
-+========+========+=================+
-| 0x12 | U3 | TPS6590379 PMIC |
-| | | DVS |
-+--------+--------+-----------------+
-| 0x41 | U78 | STMPE811Q ADC |
-| | | and GPIO |
-| | | expander |
-+--------+--------+-----------------+
-| 0x47 | U13 | HD3SS3220 USB |
-| | | Type-C DRP port |
-| | | controller |
-+--------+--------+-----------------+
-| 0x50 | U9 | 24LC32 board ID |
-| | | EEPROM |
-+--------+--------+-----------------+
-| 0x58 | U3 | TPS6590379 PMIC |
-| | | power registers |
-+--------+--------+-----------------+
-| 0x5a | U3 | TPS6590379 PMIC |
-| | | interfaces and |
-| | | auxilaries |
-+--------+--------+-----------------+
-| 0x5c | U3 | TPS6590379 PMIC |
-| | | trimming and |
-| | | test |
-+--------+--------+-----------------+
-| 0x5e | U3 | TPS6590379 PMIC |
-| | | OTP |
-+--------+--------+-----------------+
+**********************
+
+.. table::
+
+ +---------+--------------+-----------------+
+ | Address | Identifier | Description |
+ +=========+==============+=================+
+ | 0x12 | U3 | TPS6590379 PMIC |
+ | | | DVS |
+ +---------+--------------+-----------------+
+ | 0x41 | U78 | STMPE811Q ADC |
+ | | | and GPIO |
+ | | | expander |
+ +---------+--------------+-----------------+
+ | 0x47 | U13 | HD3SS3220 USB |
+ | | | Type-C DRP port |
+ | | | controller |
+ +---------+--------------+-----------------+
+ | 0x50 | U9 | 24LC32 board ID |
+ | | | EEPROM |
+ +---------+--------------+-----------------+
+ | 0x58 | U3 | TPS6590379 PMIC |
+ | | | power registers |
+ +---------+--------------+-----------------+
+ | 0x5a | U3 | TPS6590379 PMIC |
+ | | | interfaces and |
+ | | | auxiliaries |
+ +---------+--------------+-----------------+
+ | 0x5c | U3 | TPS6590379 PMIC |
+ | | | trimming and |
+ | | | test |
+ +---------+--------------+-----------------+
+ | 0x5e | U3 | TPS6590379 PMIC |
+ | | | OTP |
+ +---------+--------------+-----------------+
diff --git a/boards/beaglebone/ai/ch06.rst b/boards/beaglebone/ai/ch06.rst
index 12adf16f2f16af7f87c384cb000cb95678333a31..601a57c125c7f78b37da6d42f339514aae642294 100644
--- a/boards/beaglebone/ai/ch06.rst
+++ b/boards/beaglebone/ai/ch06.rst
@@ -69,7 +69,7 @@ analog-to-digital converter (GPADC) with three external input channels.
**Figure 23** below shows how the USB-C power input is connected to the
**TPS6590379**.
-TODO: (Schematic screenshoot)
+TODO: (Schematic screenshot)
Power Button
==============
@@ -224,7 +224,7 @@ CPU’s:
- PRU-ICSS2 PRU1
The programmable nature of the PRUs, along with their access to pins,
-events and all SoC resources, provides flexibility in implmenting fast
+events and all SoC resources, provides flexibility in implementing fast
real-time responses, specialized data handling operations, peripheral
interfaces and in off-loading tasks from the other processor cores of
the SoC.
@@ -262,7 +262,7 @@ Resources
- Great resources for PRU and BeagleBone® has been compiled here https://beagleboard.org/pru
- The PRU Cookbook provides examples and getting started information https://github.com/MarkAYoder/PRUCookbook
-- Detailed specification is availble at http://processors.wiki.ti.com/index.php/PRU-ICSS
+- Detailed specification is available at http://processors.wiki.ti.com/index.php/PRU-ICSS
FAQ
diff --git a/boards/beaglebone/ai/ch12.rst b/boards/beaglebone/ai/ch12.rst
index fefd7e1afcb59158fb10db1974a36ebc129f244f..a5700477854f832e1db2de3b50ab787da4c3eaf8 100644
--- a/boards/beaglebone/ai/ch12.rst
+++ b/boards/beaglebone/ai/ch12.rst
@@ -40,7 +40,7 @@ WARRANTY AND DISCLAIMERS
The design materials referred to in this document are *\*NOT
SUPPORTED\** and **DO NOT** constitute a reference design. Support of
-the open source developer community is provided through the the
+the open source developer community is provided through the
resources defined at https://beagleboard.org/support.
THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENT PERMITTED
diff --git a/boards/beaglebone/black/System-Reference-Manual.asciidoc b/boards/beaglebone/black/System-Reference-Manual.asciidoc
index 3fcc160178a764cff17f2ee66fc9bc3fa0900230..c46cf6cb13b627600f4299e8b530afd799a92748 100644
--- a/boards/beaglebone/black/System-Reference-Manual.asciidoc
+++ b/boards/beaglebone/black/System-Reference-Manual.asciidoc
@@ -940,7 +940,7 @@ on the board.
==== 5.3.1 512MB DDR3L
A single 256Mb x16 DDR3L 4Gb (512MB) memory device is used. The memory
-used is is one of two devices:
+used is one of two devices:
* MT41K256M16HA-125 from Micron
* D2516EC4BXGGB from Kingston
@@ -1537,7 +1537,7 @@ devices can support this voltage setting of 1.35V.
The power up process is consists of several stages and events. <<figure-26>>
describes the events that make up the power up process for the
-processer from the PMIC. This diagram is used elsewhere to convey
+processor from the PMIC. This diagram is used elsewhere to convey
additional information. I saw no need to bust it up into smaller
diagrams. It is from the processor datasheet supplied by Texas
Instruments.
@@ -2464,7 +2464,7 @@ image:media/image67.png[media/image67.png,title="media/image67.png",width=427,he
==== 6.12.3 PRU-ICSS Pin Access
Both PRU 0 and PRU1 are accessible from the expansion headers. Some may
-not be useable without first disabling functions on the board like LCD
+not be usable without first disabling functions on the board like LCD
for example. Listed below is what ports can be accessed on each PRU.
PRU0
@@ -5816,7 +5816,7 @@ for the display to catch up and show the image.
[[audio]]
==== 11.4.6 AUDIO
-Audio will only work on TV resolutions. This is due to the the way the
+Audio will only work on TV resolutions. This is due to the way the
specification was written. Some displays have built in speakers and
others require external. Make sure you have a TV resolution and speakers
are connected if they are not built in. The SW should default to a TV
diff --git a/boards/beaglebone/black/ch03.rst b/boards/beaglebone/black/ch03.rst
index 32370ed41994c1ecbe24bb3608c1226ebb792314..c4e6eb7ea6fcc8b2db933a106feb499d0d85eb1a 100644
--- a/boards/beaglebone/black/ch03.rst
+++ b/boards/beaglebone/black/ch03.rst
@@ -58,7 +58,7 @@ Each of these configurations is discussed in general terms in the
following sections.
For an up-to-date list of confirmed working accessories please go to
-`BeagleBone_Black_Accessories <http://elinux.org/BeagleBone_Black_Accessories_>`_
+`BeagleBone_Black_Accessories <https://elinux.org/Beagleboard:BeagleBone_Black_Accessories>`_
@@ -166,7 +166,7 @@ following accessories:
* 1 x USB wireless keyboard and mouse combo.
* 1 x USB HUB (OPTIONAL). The board has only one USB host port, so you may need to use a USB Hub if your keyboard and mouse requires two ports.
-For an up-to-date list of confirmed working accessories please go to `BeagleBone_Black_Accessories <http://elinux.org/BeagleBone_Black_Accessories_>`_
+For an up-to-date list of confirmed working accessories please go to `BeagleBone_Black_Accessories <https://elinux.org/Beagleboard:BeagleBone_Black_Accessories>`_
Connecting Up the Board
*****************************
diff --git a/boards/beaglebone/black/ch05.rst b/boards/beaglebone/black/ch05.rst
index 9ea7ffa22a55946ff52051efb7bc3eb50ee24b5f..cd5ab7c3d8f96a6c66a8e8066b4776e4dd2de165 100644
--- a/boards/beaglebone/black/ch05.rst
+++ b/boards/beaglebone/black/ch05.rst
@@ -33,7 +33,7 @@ on the board.
*****************
A single 256Mb x16 DDR3L 4Gb (512MB) memory device is used. The memory
-used is is one of two devices:
+used is one of two devices:
* MT41K256M16HA-125 from Micron
* D2516EC4BXGGB from Kingston
diff --git a/boards/beaglebone/black/ch06.rst b/boards/beaglebone/black/ch06.rst
index 9917ca9d01f8fa87416bb169f0d3b394d0e34e64..34afa1125e41ea51aa9ad812519ab533edf28e11 100644
--- a/boards/beaglebone/black/ch06.rst
+++ b/boards/beaglebone/black/ch06.rst
@@ -365,7 +365,7 @@ devices can support this voltage setting of 1.35V.
The power up process is consists of several stages and events. *figure-26*
describes the events that make up the power up process for the
-processer from the PMIC. This diagram is used elsewhere to convey
+processor from the PMIC. This diagram is used elsewhere to convey
additional information. I saw no need to bust it up into smaller
diagrams. It is from the processor datasheet supplied by Texas
Instruments.
@@ -1429,7 +1429,7 @@ PRU-ICSS Pin Access
**************************
Both PRU 0 and PRU1 are accessible from the expansion headers. Some may
-not be useable without first disabling functions on the board like LCD
+not be usable without first disabling functions on the board like LCD
for example. Listed below is what ports can be accessed on each PRU.
* 8 outputs or 9 inputs
diff --git a/boards/beaglebone/black/ch11.rst b/boards/beaglebone/black/ch11.rst
index 289c40100d5ab5cc94c212b8d87b8ac6c4d8de80..0937c8c27950aea8023e6a2245f3a820b8b1139a 100644
--- a/boards/beaglebone/black/ch11.rst
+++ b/boards/beaglebone/black/ch11.rst
@@ -159,7 +159,7 @@ for the display to catch up and show the image.
AUDIO
************
-Audio will only work on TV resolutions. This is due to the the way the
+Audio will only work on TV resolutions. This is due to the way the
specification was written. Some displays have built in speakers and
others require external. Make sure you have a TV resolution and speakers
are connected if they are not built in. The SW should default to a TV
diff --git a/boards/beaglebone/blue/ssh.rst b/boards/beaglebone/blue/ssh.rst
index 42e5ea7dab589e042ead904cebc89b115180368d..3b8a39dae5888db455e16711967378404d59e052 100644
--- a/boards/beaglebone/blue/ssh.rst
+++ b/boards/beaglebone/blue/ssh.rst
@@ -7,7 +7,7 @@ If you don’t have ssh installed, install it. (google is your friend)
Then `ssh debian@192.168.7.2` The board will tell you what the password
is, on my it was `temppwd`.
-To change your password use the command passwd it will ask you what your
+To change your password use the command password it will ask you what your
current password is, then ask for the replacement. Then it will say it
was too simple and you have to do it again. Normal stuff.
@@ -18,10 +18,10 @@ If you want to insist on using your simple password, try this.
sudo -s
(become superuser/root)
enter your password
- passwd debian
+ password debian
(put your simple password in)
exit
(exit from superuser/root)
-When you are running as root, passwd is more compliant and will accept
+When you are running as root, password is more compliant and will accept
simple password
diff --git a/boards/beagleconnect/freedom/index.rst b/boards/beagleconnect/freedom/index.rst
index 3d1180027569f8b1fbba6fb2470d2dffc20e850b..f5d6eb42b5ccfc29197c8babeb237dbd0f48c8b1 100644
--- a/boards/beagleconnect/freedom/index.rst
+++ b/boards/beagleconnect/freedom/index.rst
@@ -99,7 +99,7 @@ they want. Maintenance of the code is centralized in a small reusable set of
microcontroller firmware and the Linux kernel, which is highly peer reviewed
under a `highly-regarded governance model <https://wiki.p2pfoundation.net/Linux_-_Governance>`_.
-On-going maintenance
+ongoing maintenance
====================
Because there isn't code specific to any given network-of-devices configuration
diff --git a/boards/beagleconnect/freedom/usage.rst b/boards/beagleconnect/freedom/usage.rst
index 862e89741edf6889ba77c2e9f3a30194f14665ce..c98d213f99f565a10966776173baec8224e94a74 100644
--- a/boards/beagleconnect/freedom/usage.rst
+++ b/boards/beagleconnect/freedom/usage.rst
@@ -20,7 +20,7 @@ Enable a Linux host with BeagleConnect
Log into a host system running Linux that is BeagleConnectâ„¢ enabled. Enable a
Linux host with BeagleConnectâ„¢ by plugging a **BeagleConnectâ„¢ gateway device**
-into it’s USB port. You’ll also want to have a **BeagleConnect™ node device**
+into its USB port. You’ll also want to have a **BeagleConnect™ node device**
with a sensor, actuator or indicator device connected.
.. note::
diff --git a/boards/beagleconnect/technology/index.rst b/boards/beagleconnect/technology/index.rst
index 06196ee5de47d7ac2ca3931c5483f821c1bd70dd..d7e2668f4851749c5dfeadd53f5196871b26ac38 100644
--- a/boards/beagleconnect/technology/index.rst
+++ b/boards/beagleconnect/technology/index.rst
@@ -326,7 +326,7 @@ Flashing via a Linux Host
If flashing the Freedom board via the BeagleBone fails here's a trick you can try to flash from a Linux host.
Use :code:`sshfs` to mount the Bone's files on the Linux host. This assumes the
-Bone is plugged in the the USB and appears at :code:`192.168.7.2`:
+Bone is plugged in the USB and appears at :code:`192.168.7.2`:
.. code-block:: bash
@@ -454,7 +454,7 @@ are 2 critical pieces of information:
#. **The RF Channel**: As you may have guessed, IEEE 802.15.4 devices are only
able to communicate with each other if they are using the same frequency to
- transmit and recieve data. This information is part of the Physical Layer.
+ transmit and receive data. This information is part of the Physical Layer.
#. The `PAN identifier <https://www.silabs.com/community/wireless/proprietary/knowledge-base.entry.html/2019/10/04/connect_tutorial6-ieee802154addressing-rapc>`_:
IEEE 802.15.4 devices are only be able to communicate with one another if
@@ -580,9 +580,9 @@ Cloning the repository
^^^^^^^^^^^^^^^^^^^^^^
This repository utilizes `git submodules <https://git-scm.com/book/en/v2/Git-Tools-Submodules>`_
-to keep track of all of the projects required to reproduce the on-going work.
+to keep track of all of the projects required to reproduce the ongoing work.
The instructions here only cover checking out the :code:`demo` branch which
-should stay in a tested state. On-going development will be on the
+should stay in a tested state. ongoing development will be on the
:code:`master` branch.
Note: The parent directory :code:`~` is simply used as a placeholder for testing.
diff --git a/boards/pocketbeagle/original/System-Reference-Manual.wiki b/boards/pocketbeagle/original/System-Reference-Manual.wiki
index 15521e70682d79f8e202184753158c41a6b50714..ab05fa7adc983113e6ad4977a6561ab9a7de2fbf 100644
--- a/boards/pocketbeagle/original/System-Reference-Manual.wiki
+++ b/boards/pocketbeagle/original/System-Reference-Manual.wiki
@@ -347,9 +347,9 @@ This section covers the specifications and features of the board in a chart and
|-
| UART||3 UARTs accessible with 2 enabled by default
|-
-| I2C||2 I2C busses enabled by default
+| I2C||2 I2C buses enabled by default
|-
-| SPI||2 SPI busses with single chip selects enabled by default
+| SPI||2 SPI buses with single chip selects enabled by default
|-
| PWM||4 Pulse Width Modulation outputs accessible with 2 enabled by default
|-
@@ -586,7 +586,7 @@ The tables below show the power related pins available on PocketBeagle's Expansi
| GND
|}
-'''Note''': A comprehensive tutorial for Power Inputs and Outputs for the OSD335x System in Package is available in the [https://octavosystems.com/app_notes/osd335x-design-tutorial/bare-minimum-boot/power-input-ouput/ 'Tutorial Series'] on the Octavo Systems website.
+'''Note''': A comprehensive tutorial for Power Inputs and Outputs for the OSD335x System in Package is available in the [https://octavosystems.com/app_notes/osd335x-design-tutorial/bare-minimum-boot/power-input-output/ 'Tutorial Series'] on the Octavo Systems website.
=== 5.5 JTAG Pads ===
diff --git a/boards/pocketbeagle/original/ch04.rst b/boards/pocketbeagle/original/ch04.rst
index 71faaa153770259f4dd38b2335226ed0d80eb2ea..2e3c7f0c074231784e3d5d30a318ced424bb2c3e 100644
--- a/boards/pocketbeagle/original/ch04.rst
+++ b/boards/pocketbeagle/original/ch04.rst
@@ -91,9 +91,9 @@ interfaces that make up the board.
| UART | 3 UARTs accessible with 2 enabled by |
| | default |
+-----------------------+---------------------------------------------+
- | I2C | 2 I2C busses enabled by default |
+ | I2C | 2 I2C buses enabled by default |
+-----------------------+---------------------------------------------+
- | SPI | 2 SPI busses with single chip selects |
+ | SPI | 2 SPI buses with single chip selects |
| | enabled by default |
+-----------------------+---------------------------------------------+
| PWM | 4 Pulse Width Modulation outputs accessible |
diff --git a/boards/pocketbeagle/original/ch05.rst b/boards/pocketbeagle/original/ch05.rst
index cd6e1fd274ff2f2b040b95963ca451209a2f7432..6900a91dbd5920ee16883d3e4c7ae076f82827ba 100644
--- a/boards/pocketbeagle/original/ch05.rst
+++ b/boards/pocketbeagle/original/ch05.rst
@@ -222,7 +222,7 @@ Expansion Headers.
| P2.21 | GND | | | GND |
+-------------+-------------+-------------+-------------+-------------+
-.. Note:: A comprehensive tutorial for Power Inputs and Outputs for the OSD335x System in Package is available in the `'Tutorial Series' <https://octavosystems.com/app_notes/osd335x-design-tutorial/bare-minimum-boot/power-input-ouput/>`__ on the Octavo Systems website.
+.. Note:: A comprehensive tutorial for Power Inputs and Outputs for the OSD335x System in Package is available in the `'Tutorial Series' <https://octavosystems.com/app_notes/osd335x-design-tutorial/bare-minimum-boot/power-input-output/>`__ on the Octavo Systems website.
.. _jtag_pads:
diff --git a/boards/terms-and-conditions.rst b/boards/terms-and-conditions.rst
index 76efd39bae9ea3d98927a8a4d19f520e4edb621f..b8c32e1141a3c5eabd7e86e6ed0656045de83c84 100644
--- a/boards/terms-and-conditions.rst
+++ b/boards/terms-and-conditions.rst
@@ -7,7 +7,7 @@ DESIGN
*******
These design materials referred to in this document are NOT SUPPORTED and DO NOT constitute a reference design.
-Only “community†support is allowed via resources at BeagleBoard.org forum.
+Only “community†support is allowed via resources at forum.beagleboard.org.
THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE
@@ -23,9 +23,12 @@ mind. As such, the design materials that are provided which include schematic, B
be suitable for any other purposes. If used, the design material becomes your responsibility as to whether or not
it meets your specific needs or your specific applications and may require changes to meet your requirements.
+See the LICENSE file regarding the copyright of these materials.
-See the LICENSE file regarding the copyright of these materials.
-This LICENSE does not apply to BeagleBoard.org Foundation trademarks.
+This LICENSE does not apply to BeagleBoard.org Foundation trademarks. Express written permission is required
+for use of BeagleBoard.org Foundation trademarks, including, but not limited to BeagleBoard.org, BeagleBone,
+BeagleBoard, PocketBeagle, BeagleBoard Compatible, BeagleBoard Embedded, and BeagleBoard Approved. Please visit
+https://www.beagleboard.org/brand-use and https://www.beagleboard.org/partner-programs for additional details.
ADDITIONAL TERMS
@@ -211,4 +214,4 @@ beagleboard.org/support/rma
Please DO NOT return the board without approval from the RMA team
-first.
\ No newline at end of file
+first.
diff --git a/books/beaglebone-cookbook/01basics/basics.rst b/books/beaglebone-cookbook/01basics/basics.rst
index 892733833516e138e21689c3c4f956cb3082e710..95744e6564802b20fe7ff4c4079a9b8d9f65f347 100644
--- a/books/beaglebone-cookbook/01basics/basics.rst
+++ b/books/beaglebone-cookbook/01basics/basics.rst
@@ -175,7 +175,7 @@ Connect your Bone to the Internet and log into it. From the command line run:
bone$ ls
You can look around from the command line, or explore from Visual Sudio Code.
-If you ar using VSC, go to the *File* menu and select *Open Folder ...* and
+If you are using VSC, go to the *File* menu and select *Open Folder ...* and
select beaglebone-cookbook-code. Then explore.
.. _basics_wire_breadboard:
diff --git a/books/beaglebone-cookbook/02sensors/sensors.rst b/books/beaglebone-cookbook/02sensors/sensors.rst
index d5e6400db18980febaa6fb0b9149e99b1ebd56aa..79a3bf0e519f35da02ab7c93e50eb4a30d03f51d 100644
--- a/books/beaglebone-cookbook/02sensors/sensors.rst
+++ b/books/beaglebone-cookbook/02sensors/sensors.rst
@@ -725,7 +725,7 @@ Assuming the TMP101 is on bus 2 (the last digit is the bus number)
bone$ cd /sys/class/i2c-adapter/
bone$ ls
- i2c-0 i2c-1 i2c-2 # Three i2c busses (bus 0 is internal)
+ i2c-0 i2c-1 i2c-2 # Three i2c buses (bus 0 is internal)
bone$ cd i2c-2 # Pick bus 2
bone$ ls -ls
0 --w--w---- 1 root gpio 4096 Jul 1 09:24 delete_device
diff --git a/books/beaglebone-cookbook/03displays/displays.rst b/books/beaglebone-cookbook/03displays/displays.rst
index dcd7c689e60c1af0f47748dd2a4e88f3aeda78bf..b6d254b836adf69ca0a871a61d4584160bfde6bd 100644
--- a/books/beaglebone-cookbook/03displays/displays.rst
+++ b/books/beaglebone-cookbook/03displays/displays.rst
@@ -367,7 +367,7 @@ LED matrix display (matrixLEDi2c.py)
5. Now, we are ready to display the various patterns. After each pattern is displayed, we sleep a certain amount of time so that the pattern can be seen.
-6. Finally, send commands to the LED matrix to set the brightness. This makes the disply fade out and back in again.
+6. Finally, send commands to the LED matrix to set the brightness. This makes the display fade out and back in again.
.. _displays_drive5V:
diff --git a/books/beaglebone-cookbook/05tips/tips.rst b/books/beaglebone-cookbook/05tips/tips.rst
index 24d03aaee03bcba50be4473d92be2cca6977c05b..573cdfe8e1ec479addac24fb7a58bcbfec022697 100644
--- a/books/beaglebone-cookbook/05tips/tips.rst
+++ b/books/beaglebone-cookbook/05tips/tips.rst
@@ -126,7 +126,7 @@ through `Windows Subsystem for Linux <https://docs.microsoft.com/en-us/windows/w
machine such as `VirtualBox <https://www.virtualbox.org/>`_, or in the cloud (`Microsoft Azure <https://portal.azure.com/>`_
or `Amazon Elastic Compute Cloud <http://aws.amazon.com/ec2/>`_, EC2, for example).
-Recently I've been prefering `Windows Subsystem for Linux <https://docs.microsoft.com/en-us/windows/wsl/>`_.
+Recently I've been preferring `Windows Subsystem for Linux <https://docs.microsoft.com/en-us/windows/wsl/>`_.
.. _tips_shell:
@@ -160,12 +160,12 @@ connect by using the following command to log in as user *debian*, (note the *$*
.. code-block:: bash
- bone$ passwd
+ bone$ password
Changing password for debian.
(current) UNIX password:
Enter new UNIX password:
Retype new UNIX password:
- passwd: password updated successfully
+ password: password updated successfully
.. _tips_serial:
@@ -363,7 +363,7 @@ Run the installed Virtual Network Computing (VNC) server:
New 'X' desktop is beaglebone:1
- reating default startup script /home/debian/.vnc/xstartup
+ Creating default startup script /home/debian/.vnc/xstartup
Starting applications specified in /home/debian/.vnc/xstartup
Log file is /home/debian/.vnc/beagleboard:1.log
@@ -606,9 +606,9 @@ To find the IP address, open a terminal window and run the *ip* command:
valid_lft forever preferred_lft forever
inet6 fe80::747e:49ff:fe46:1b78/64 scope link
valid_lft forever preferred_lft forever
- 5: can0: <NOARP,ECHO> mtu 16 qdisc noop state DOWN group default qlen 10
+ 5: can0: <NOARP,ECHO> mtu 16 qdisc no-op state DOWN group default qlen 10
link/can
- 6: can1: <NOARP,ECHO> mtu 16 qdisc noop state DOWN group default qlen 10
+ 6: can1: <NOARP,ECHO> mtu 16 qdisc no-op state DOWN group default qlen 10
link/can
@@ -653,7 +653,7 @@ I'm running Debian 11.x (Bullseye), the middle one.
:align: center
:alt: Latest Image Page
- Latested Beagle Images
+ Latest Beagle Images
Scroll to the top of the page and you'll see instructions on setting up Wifi. The instructions here are based on using +networkctl+
@@ -764,7 +764,7 @@ In the file you'll see:
}
-Change the *ssid* and *psk* enteries for your network. Save your file, then run:
+Change the *ssid* and *psk* entries for your network. Save your file, then run:
.. code-block:: bash
@@ -970,7 +970,7 @@ Just to be sure, you can install *nmap* on your host computer to see what ports
Nmap done: 1 IP address (1 host up) scanned in 0.19 seconds
-Currently there are three ports visible: 22, 80 and 3000 (visual studio code) Now turn on the firewal and see what happends.
+Currently there are three ports visible: 22, 80 and 3000 (visual studio code) Now turn on the firewall and see what happens.
.. code-block:: bash
@@ -990,7 +990,7 @@ Currently there are three ports visible: 22, 80 and 3000 (visual studio code) N
Nmap done: 1 IP address (1 host up) scanned in 0.19 seconds
-Only port 22 (ssh) is accessable now.
+Only port 22 (ssh) is accessible now.
The firewall will remain on, even after a reboot. Disable it now if you don't want it on.
@@ -1164,7 +1164,7 @@ Problem
You are starting to run out of room on your microSD card (or onboard flash) and
have removed several packages you had previously installed (:ref:`tips_apt_remove`),
-ut you still need to free up more space.
+but you still need to free up more space.
Solution
--------
@@ -1326,7 +1326,7 @@ and is much faster. The approach is the same, write to the */sys/class/gpio* fi
:download:`blinkLED.c <../code/05tips/blinkLED.c>`
-Here, as with JavaScript and Python, the gpio pins are refered to by the Linux gpio number.
+Here, as with JavaScript and Python, the gpio pins are referred to by the Linux gpio number.
:ref:`tips_cape_headers_digital` shows how the P8 and P9 Headers numbers map to the gpio number.
For this example P9_14 is used, which the table shows in gpio 50.
diff --git a/books/beaglebone-cookbook/06iot/iot.rst b/books/beaglebone-cookbook/06iot/iot.rst
index 427682621c0b3be720e4615cfa46ff0f258bf4fc..343e8b85210ee0c30e59698c21cfb2b8cb4a81e6 100644
--- a/books/beaglebone-cookbook/06iot/iot.rst
+++ b/books/beaglebone-cookbook/06iot/iot.rst
@@ -599,7 +599,7 @@ Solution
---------
This example came from https://realpython.com/python-send-email/.
-First, you need to `set up a Gmail account <https://mail.google.co>`_, if you don't already have one.
+First, you need to `set up a Gmail account <https://mail.google.com>`_, if you don't already have one.
Then add the code in :ref:`networking_nodemailer_code` to a file named ``emailTest.py``. Substitute your own Gmail username. For the password:
* Go to: https://myaccount.google.com/security
@@ -696,7 +696,7 @@ Because your Bone is on the network, it's not hard to access the current weather
bash$ export APPID="Your key"
* Then add the code in :ref:`networking_weather_code` to a file named ``weather.js``.
-* Run the pyhon script.
+* Run the python script.
.. _networking_weather_code:
@@ -743,8 +743,8 @@ of sample code for interacting with Twitter. Here I'll show how to create a twe
Creating a Project and App
===========================
-* Follow the `directions here <https://developer.twitter.com/en/docs/apps/overview>`_ to create a project and and app.
-* Be sure to giv eyour app Read and Write permission.
+* Follow the `directions here <https://developer.twitter.com/en/docs/apps/overview>`_ to create a project and app.
+* Be sure to give your app Read and Write permission.
* Then go to the `developer portal <https://developer.twitter.com/en/portal/projects-and-apps>`_ and select you app by clicking on the gear icon to the right of the app name.
* Click on the *Keys and tokens* tab. Here you can get to all your keys and tokens.
@@ -828,7 +828,7 @@ The code in :ref:`networking_pushbutton_code` snds a tweet whenever a button is
:download:`twitterPushbutton.js <../code/06iot/twitterPushbutton.js>`
-To see many other examples, go to `iStrategyLabs node-twitter GitHub page <http://bit.ly/18AvST>`_.
+To see many other examples, go to `Twitter for Node.js on NPMJS.com <https://www.npmjs.com/package/twitter>`_.
This opens up many new possibilities. You can read a temperature sensor and tweet its
value whenever it changes, or you can turn on an LED whenever a certain hashtag
@@ -1019,7 +1019,7 @@ You would like your Bone to talk to an Arduino or LaunchPad.
Solution
---------
-The common serial port (also know as a UART) is the simplest way to
+The common serial port (also known as a UART) is the simplest way to
talk between the two. Wire it up as shown in :ref:`networking_launchPad_fig`.
.. warning::
@@ -1101,4 +1101,4 @@ Discussion
When you run the script in :ref:`js_launchPadBeagle_code`, the Bone opens up the
serial port and every second sends a new command, either *r* or *g*.
-The LaunchPad waits for the command and, when it arrives, responds by toggling the corresponding LED.
+The LaunchPad waits for the command, when it arrives, responds by toggling the corresponding LED.
diff --git a/books/beaglebone-cookbook/07kernel/kernel.rst b/books/beaglebone-cookbook/07kernel/kernel.rst
index b57809bb6eccaa7189be53a671394add104b8d8d..2e3d18ed6896fdde2bc9fe811f0939aeb7cd5a55 100644
--- a/books/beaglebone-cookbook/07kernel/kernel.rst
+++ b/books/beaglebone-cookbook/07kernel/kernel.rst
@@ -26,7 +26,7 @@ Updating the Kernel
Problem
--------
-You have an out-of-date kernel and want to want to make it current.
+You have an out-of-date kernel and want to make it current.
Solution
---------
@@ -363,7 +363,7 @@ This is easier than it sounds, thanks to some very powerful scripts.
.. warning::
Be sure to run this recipe on your host computer. The Bone has enough computational
- power to compile a module or two, but compiling the entire kernel takes lots of time and resourses.
+ power to compile a module or two, but compiling the entire kernel takes lots of time and resources.
Downloading and Compiling the Kernel
@@ -380,7 +380,7 @@ To download and compile the kernel, follow these steps:
host$ ./build_kernel.sh # <4>
1. The first command clones a repository with the tools to build the kernel for the Bone.
-2. This command lists all the different versions of the kernel that you can build. You'll need to pick one of these. How do you know which one to pick? A good first step is to choose the one you are currently running. *uname -a* will reveal which one that is. When you are able to reproduce the current kernel, go to `Linux Kernel Newbies <http://kernelnewbies.org/>`_ to see what features are available in other kernels. `LinuxChanges <http://bit.ly/1AjiL00>`_ shows the features in the newest kernel and `LinuxVersions <http://bit.ly/1MrIHx3>`_ links to features of pervious kernels.
+2. This command lists all the different versions of the kernel that you can build. You'll need to pick one of these. How do you know which one to pick? A good first step is to choose the one you are currently running. *uname -a* will reveal which one that is. When you are able to reproduce the current kernel, go to `Linux Kernel Newbies <http://kernelnewbies.org/>`_ to see what features are available in other kernels. `LinuxChanges <http://bit.ly/1AjiL00>`_ shows the features in the newest kernel and `LinuxVersions <http://bit.ly/1MrIHx3>`_ links to features of previous kernels.
3. When you know which kernel to try, use *git checkout* to check it out. This command checks out at tag *3.8.13-bone60* and creates a new branch, *v3.8.13-bone60*.
4. *build_kernel* is the master builder. If needed, it will download the cross compilers needed to compile the kernel (`linaro <http://www.linaro.org/>`_ is the current cross compiler). If there is a kernel at ``~/linux-dev``, it will use it; otherwise, it will download a copy to ``bb-kernel/ignore/linux-src``. It will then patch the kernel so that it will run on the Bone.
diff --git a/books/beaglebone-cookbook/08realtime/realtime.rst b/books/beaglebone-cookbook/08realtime/realtime.rst
index c306a7b460749635c4dee5f837afbbfe3491177f..cba4820d7c752f563b1f1ece414893b4a124e8bf 100644
--- a/books/beaglebone-cookbook/08realtime/realtime.rst
+++ b/books/beaglebone-cookbook/08realtime/realtime.rst
@@ -466,7 +466,7 @@ Congratulations you are running the RT kernel.
If the Beagle appears to be running (the LEDs are flashing) but you are having trouble connecting
via *ssh 192.168.7.2*, you can try connecting using the approach shown in :ref:`tips_FTDI`.
-Now run the scipt again (note it's being saved in *rt.hist* this time.)
+Now run the script again (note it's being saved in *rt.hist* this time.)
.. code-block:: bash
@@ -493,7 +493,7 @@ This will generate the file *cyclictest.png* which contains your plot. It shoul
Histogram of Non-RT and RT kernels running cyclictest
Notice the NON-RT data have much longer latenices. They may not happen often (fewer than 10 times in each bin),
-but they are occuring and may be enough to miss a real-time deadline.
+but they are occurring and may be enough to miss a real-time deadline.
The PREEMPT-RT times are all under a 150s.
diff --git a/books/beaglebone-cookbook/09capes/capes.rst b/books/beaglebone-cookbook/09capes/capes.rst
index eef75fffdddd722c9083b40eec6e150b8dc87864..8374b0a92043e6f9fa88579527f6a114ea929eb3 100644
--- a/books/beaglebone-cookbook/09capes/capes.rst
+++ b/books/beaglebone-cookbook/09capes/capes.rst
@@ -18,119 +18,123 @@ Bone. Capes can range in size from Bone-sized (:ref:`capes_miniDisplay`) to much
This chapter shows how to attach a couple of capes, move your design to a protoboard, then to a PCB,
and finally on to mass production.
-.. _capes_7inLCD:
+..
+ #TODO# LCD7 is no longer available. Example needs to be redone with a board that is available. Removing due to broken links
+ .. _capes_7inLCD:
-Using a Seven-Inch LCD Cape
-============================
+ Using a Seven-Inch LCD Cape
+ ============================
-Problem
---------
+ Problem
+ --------
-You want to display the Bone's desktop on a portable LCD.
+ You want to display the Bone's desktop on a portable LCD.
-Solution
---------
+ Solution
+ --------
-.. note:: #TODO# The 4D Systems LCD capes would make a better example. CircuitCo is out of business.
+ .. note:: #TODO# The 4D Systems LCD capes would make a better example. CircuitCo is out of business.
-A number of `LCD capes <http://bit.ly/1AjlXJ9>`_ are built for the Bone, ranging in size from three
-to seven inches. This recipe attaches a seven-inch `BeagleBone LCD7 <http://bit.ly/1NK8Hra>`_
-from `CircuitCo <http://circuitco.com/>`_ (shown in :ref:`capes_7inLCD_fig`) to the Bone.
+ A number of `LCD capes <http://bit.ly/1AjlXJ9>`_ are built for the Bone, ranging in size from three
+ to seven inches. This recipe attaches a seven-inch `BeagleBone LCD7 <http://bit.ly/1NK8Hra>`_
+ from `CircuitCo <http://circuitco.com/>`_ (shown in :ref:`capes_7inLCD_fig`) to the Bone.
-.. _capes_7inLCD_fig:
+ .. _capes_7inLCD_fig:
-7" LCD
-========
+ 7" LCD
+ ========
-.. note::
- Seven-inch LCD from CircuitCo, :ref:`capes_7inLCD_fig` was originally posted by CircuitCo
- at http://elinux.org/File:BeagleBone-LCD7-Front.jpg under a
- `Creative Commons Attribution-ShareAlike 3.0 Unported License <http://creativecommons.org/licenses/by-sa/3.0/>`_.
+ .. note::
+ Seven-inch LCD from CircuitCo, :ref:`capes_7inLCD_fig` was originally posted by CircuitCo
+ at http://elinux.org/File:BeagleBone-LCD7-Front.jpg under a
+ `Creative Commons Attribution-ShareAlike 3.0 Unported License <http://creativecommons.org/licenses/by-sa/3.0/>`_.
-.. figure:: figures/LCD.png
- :align: center
- :alt: 7 inch LCD
+ .. figure:: figures/LCD.png
+ :align: center
+ :alt: 7 inch LCD
-To make this recipe, you will need:
+ To make this recipe, you will need:
-* Seven-inch LCD cape
-* A 5 V power supply
+ * Seven-inch LCD cape
+ * A 5 V power supply
-Just attach the Bone to the back of the LCD, making sure pin 1 of *P9* lines up with
-pin 1 of +P9+ on the LCD. Apply a 5 V power supply, and the desktop will appear on
-your LCD, as shown in :ref:`capes_LCD7Desktop`.
+ Just attach the Bone to the back of the LCD, making sure pin 1 of *P9* lines up with
+ pin 1 of +P9+ on the LCD. Apply a 5 V power supply, and the desktop will appear on
+ your LCD, as shown in :ref:`capes_LCD7Desktop`.
-.. _capes_LCD7Desktop:
+ .. _capes_LCD7Desktop:
-.. figure:: figures/LCD7Desktop.png
- :align: center
- :alt: 7 inch LCD desktop
+ .. figure:: figures/LCD7Desktop.png
+ :align: center
+ :alt: 7 inch LCD desktop
- Seven-inch LCD desktop
+ Seven-inch LCD desktop
-Attach a USB keyboard and mouse, and you have a portable Bone.
-`Wireless keyboard and mouse combinations <https://www.adafruit.com/products/922>`_
-make a nice solution to avoid the need to add a USB hub.
+ Attach a USB keyboard and mouse, and you have a portable Bone.
+ `Wireless keyboard and mouse combinations <https://www.adafruit.com/products/922>`_
+ make a nice solution to avoid the need to add a USB hub.
-.. _capes_miniDisplay:
+ #TODO# miniDisplay Cape is no longer available. Example needs to be redone with a board that is available. Removing due to broken links
-Using a 128 x 128-Pixel LCD Cape
-=================================
+ .. _capes_miniDisplay:
-Problem
---------
+ Using a 128 x 128-Pixel LCD Cape
+ =================================
-You want to use a small LCD to display things other than the desktop.
+ Problem
+ --------
-Solution
----------
+ You want to use a small LCD to display things other than the desktop.
-The `MiniDisplay <http://bit.ly/1xd0r8p>`_ is a 128 x 128 full-color LCD cape that just fits on the
-Bone, as shown in :ref:`capes_miniDisplay_fig`.
+ Solution
+ ---------
-.. _capes_miniDisplay_fig:
+ The `MiniDisplay <http://bit.ly/1xd0r8p>`_ is a 128 x 128 full-color LCD cape that just fits on the
+ Bone, as shown in :ref:`capes_miniDisplay_fig`.
-.. figure:: figures/MiniDisplay-A1.jpg
- :align: center
- :alt: miniDisplay LCD
+ .. _capes_miniDisplay_fig:
- MiniDisplay 128 x 128-pixel LCD from CircuitCo
+ .. figure:: figures/MiniDisplay-A1.jpg
+ :align: center
+ :alt: miniDisplay LCD
-To make this recipe, you will need:
+ MiniDisplay 128 x 128-pixel LCD from CircuitCo
-* MiniDisplay LCD cape
+ To make this recipe, you will need:
-Attach to the Bone and apply power. Then run the following commands:
+ * MiniDisplay LCD cape
-.. code-block:: bash
+ Attach to the Bone and apply power. Then run the following commands:
- # From http://elinux.org/CircuitCo:MiniDisplay_Cape
- # Datasheet:
- # https://www.crystalfontz.com/products/document/3277/ST7735_V2.1_20100505.pdf
- bone$ wget http://elinux.org/images/e/e4/Minidisplay-example.tar.gz
- bone$ tar zmxvf Minidisplay-example.tar.gz
- bone$ cd minidisplay-example
- bone$ make
- bone$ ./minidisplay-test
- Unable to initialize SPI: No such file or directory
- Aborted
+ .. code-block:: bash
+ # From http://elinux.org/CircuitCo:MiniDisplay_Cape
+ # Datasheet:
+ # https://www.crystalfontz.com/products/document/3277/ST7735_V2.1_20100505.pdf
+ bone$ wget http://elinux.org/images/e/e4/Minidisplay-example.tar.gz
+ bone$ tar zmxvf Minidisplay-example.tar.gz
+ bone$ cd minidisplay-example
+ bone$ make
+ bone$ ./minidisplay-test
+ Unable to initialize SPI: No such file or directory
+ Aborted
-.. warning::
- You might get a compiler warning, but the code should run fine.
-The MiniDisplay uses the Serial Peripheral Interface (SPI) interface, and it's not initialized.
-The `manufacturer's website <http://bit.ly/1xd0r8p>`_ suggests enabling SPI0 by using the following commands:
+ .. warning::
+ You might get a compiler warning, but the code should run fine.
-.. code-block:: shell-session
+ The MiniDisplay uses the Serial Peripheral Interface (SPI) interface, and it's not initialized.
+ The `manufacturer's website <http://bit.ly/1xd0r8p>`_ suggests enabling SPI0 by using the following commands:
- bone$ export SLOTS=/sys/devices/bone_capemgr.*/slots
- bone$ echo BB-SPIDEV0 > $SLOTS
+ .. code-block:: shell-session
+ bone$ export SLOTS=/sys/devices/bone_capemgr.*/slots
+ bone$ echo BB-SPIDEV0 > $SLOTS
-Hmmm, something isn't working here. Here's how to see what happened:
-.. callout::
+ Hmmm, something isn't working here. Here's how to see what happened:
+
+ .. callout::
.. code-block:: shell-session
@@ -156,10 +160,10 @@ Hmmm, something isn't working here. Here's how to see what happened:
<1> Shows there is a conflict for pin `P9_21`: it's already configured for pulse width modulation (PWM).
-Here's how to see what's already configured:
+ Here's how to see what's already configured:
-.. callout::
+ .. callout::
.. code-block:: shell-session
@@ -179,51 +183,51 @@ Here's how to see what's already configured:
<1> You can see the eMMC, HDMI, and three PWMs are already using some of the pins. Slot 10 shows `P9_21` is in use by a PWM.
-You can unconfigure it by using the following commands:
+ You can unconfigure it by using the following commands:
-.. code-block:: bash
+ .. code-block:: bash
- bone$ echo -10 > $SLOTS
- bone$ cat $SLOTS
- 0: 54:PF---
- 1: 55:PF---
- 2: 56:PF---
- 3: 57:PF---
- 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
- 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
- 7: ff:P-O-L Override Board Name,00A0,Override Manuf,bspm_P9_42_27
- 8: ff:P-O-L Override Board Name,00A0,Override Manuf,bspm_P9_41_27
- 9: ff:P-O-L Override Board Name,00A0,Override Manuf,am33xx_pwm
+ bone$ echo -10 > $SLOTS
+ bone$ cat $SLOTS
+ 0: 54:PF---
+ 1: 55:PF---
+ 2: 56:PF---
+ 3: 57:PF---
+ 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
+ 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
+ 7: ff:P-O-L Override Board Name,00A0,Override Manuf,bspm_P9_42_27
+ 8: ff:P-O-L Override Board Name,00A0,Override Manuf,bspm_P9_41_27
+ 9: ff:P-O-L Override Board Name,00A0,Override Manuf,am33xx_pwm
-Now *P9_21* is free for the MiniDisplay to use.
+ Now *P9_21* is free for the MiniDisplay to use.
-.. note::
- In future Bone images, all of the pins will already be allocated as part of the main device
- tree using runtime pinmux helpers and configured at runtime using the `config-pin utility <http://bit.ly/1EXLeP2>`_.
- This would eliminate the need for device tree overlays in most cases.
+ .. note::
+ In future Bone images, all of the pins will already be allocated as part of the main device
+ tree using runtime pinmux helpers and configured at runtime using the `config-pin utility <http://bit.ly/1EXLeP2>`_.
+ This would eliminate the need for device tree overlays in most cases.
-Now, configure it for the MiniDisplay and run a test:
+ Now, configure it for the MiniDisplay and run a test:
-.. code-block:: bash
+ .. code-block:: bash
- bone$ echo BB-SPIDEV0 > $SLOTS
- bone$ ./minidisplay-test
+ bone$ echo BB-SPIDEV0 > $SLOTS
+ bone$ ./minidisplay-test
-You then see Boris, as shown in :ref:`capes_miniDisplayBoris`.
+ You then see Boris, as shown in :ref:`capes_miniDisplayBoris`.
-.. _capes_miniDisplayBoris:
+ .. _capes_miniDisplayBoris:
-Mini display Boris
-==================
+ Mini display Boris
+ ==================
-.. note::
- MiniDisplay showing Boris, :ref:`capes_miniDisplayBoris` was originally posted by David Anders at http://elinux.org/File:Minidisplay-boris.jpg
- under a `Creative Commons Attribution-ShareAlike 3.0 Unported License <http://creativecommons.org/licenses/by-sa/3.0/>`_.
+ .. note::
+ MiniDisplay showing Boris, :ref:`capes_miniDisplayBoris` was originally posted by David Anders at http://elinux.org/File:Minidisplay-boris.jpg
+ under a `Creative Commons Attribution-ShareAlike 3.0 Unported License <http://creativecommons.org/licenses/by-sa/3.0/>`_.
-.. figure:: figures/miniDisplay_Boris.png
- :align: center
- :alt: miniDisplay LCD showing Boris
+ .. figure:: figures/miniDisplay_Boris.png
+ :align: center
+ :alt: miniDisplay LCD showing Boris
Connecting Multiple Capes
==========================
@@ -323,13 +327,13 @@ To make this recipe, you will need:
* Your other components
Many places make premade circuit boards that are laid out like the breadboard we have been using.
-:ref:`capes_beaglebread_fig` shows the `BeagleBone Breadboard <http://bit.ly/1HCwtB4>`_,
-which is just one protoboard option.
+The `Adafruit Proto Cape Kit <https://www.adafruit.com/product/572>`_
+is one protoboard option.
.. _capes_beaglebread_fig:
-Beaglebread
-============
+BeagleBone Breadboard
+~~~~~~~~~~~~~~~~~~~~~
.. note::
This was originally posted by William
@@ -647,9 +651,9 @@ One challenge that slipped my first pass review was the board outline. The part
:ref:`tips_fritzing` is meant to represent BeagleBone Black, not a cape, so the outline doesn't have
the notch cut out of it for the Ethernet connector.
-The `Fritzing custom PCB outline page <http://bit.ly/1xd1aGV>`_ describes how to create and use a custom
+The `Fritzing custom PCB outline page <https://fritzing.org/pcb-custom-shape/>`_ describes how to create and use a custom
board outline. Although it is possible to use a drawing tool like `Inkscape <https://inkscape.org/en/>`_,
-I chose to use `the SVG path command <http://bit.ly/1b2aZmn>`_ directly to create :ref:`capes_boardoutline_code`.
+I chose to use `the SVG path command <https://www.w3schools.com/graphics/svg_path.asp>`_ directly to create :ref:`capes_boardoutline_code`.
.. callout::
@@ -770,9 +774,9 @@ or is there a way to create another heading level?
*EAGLE*
-`Eagle PCB <http://www.cadsoftusa.com/>`_ and `DesignSpark PCB <http://bit.ly/19cbwS0>`_ are two popular
+`Eagle PCB <https://en.wikipedia.org/wiki/EAGLE_(program)>`_ and `DesignSpark PCB <https://en.wikipedia.org/wiki/DesignSpark_PCB>`_ are two popular
design programs. Many capes (and other PCBs) are designed with Eagle PCB, and the files are available.
-For example, the MiniDisplay cape (:ref:`capes_miniDisplay`) has the schematic shown in :ref:`capes_miniDisplay_schem`
+For example, the MiniDisplay cape has the schematic shown in :ref:`capes_miniDisplay_schem`
and PCB shown in :ref:`capes_miniDisplay_pcb`.
.. _capes_miniDisplay_schem:
@@ -791,11 +795,14 @@ and PCB shown in :ref:`capes_miniDisplay_pcb`.
PCB for MiniDisplay cape
+.. note::
+ #TODO#: The MiniDisplay cape is not currently available, so this example should be udpated.
+
A good starting point is to take the PCB layout for the MiniDisplay and edit it for your project.
The connectors for +P8+ and +P9+ are already in place and ready to go.
Eagle PCB is a powerful system with many good tutorials online. The free version runs on
-Windows, Mac, and Linux, but it has three `limitations <http://bit.ly/1E5Kh3l>`_:
+Windows, Mac, and Linux, but it has three `limitations <https://en.wikipedia.org/wiki/EAGLE_(program)#License_model>`_:
* The usable board area is limited to 100 x 80 mm (4 x 3.2 inches).
* You can use only two signal layers (Top and Bottom).
@@ -912,7 +919,7 @@ How can you move the schematic to another tool?
Solution
---------
-Use the `Upverter schematic-file-converter <http://bit.ly/1wXUkdM>`_ Python script. For example, suppose that you want
+Use the `Upverter schematic-file-converter <https://github.com/ljmljz/schematic-file-converter>`_ Python script. For example, suppose that you want
to convert the Fritzing file for the diagram shown in :ref:`capes_quickRobo_fig`. First, install Upverter.
I found it necessary to install +libfreetype6+ and +freetype-py+ onto my system, but you might not need this first step:
@@ -987,7 +994,7 @@ Now, install the ``schematic-file-converter`` tool:
-v, --version print version information and quit
--formats print supported formats and quit
-At the time of this writing, Upverter suppports the following file types:
+At the time of this writing, Upverter supports the following file types:
.. table::
@@ -1029,9 +1036,9 @@ After Upverter is installed, run the file (``quickBot.fzz``) that generated :ref
DEBUG:main:parsing quickBot.fzz in format fritzing
host$ ls -l
total 188
- -rw-rw-r-- 1 ubuntu ubuntu 63914 Nov 25 19:47 quickBot-eaglexml.sch
- -rw-r--r-- 1 ubuntu ubuntu 122193 Nov 25 19:43 quickBot.fzz
- drwxrwxr-x 9 ubuntu ubuntu 4096 Nov 25 19:42 schematic-file-converter
+ -rw-rw-r-- 1 ubuntu 63914 Nov 25 19:47 quickBot-eaglexml.sch
+ -rw-r--r-- 1 ubuntu 122193 Nov 25 19:43 quickBot.fzz
+ drwxrwxr-x 9 ubuntu 4096 Nov 25 19:42 schematic-file-converter
:ref:`caps_eagle` shows the output of the conversion.
@@ -1095,12 +1102,12 @@ The `WikiHow article on creating Zip files <http://bit.ly/1B4GqRU>`_ might be he
Choosing "Extended Gerber" in Fritzing
Things on the `OSH Park website <http://oshpark.com>`_ are reasonably self-explanatory. You'll need to create an account and
-upload the Zip file containing the `Gerber files <http://bit.ly/1B4GzEZ>`_ you created. If you are a cautious person,
-you might choose to examine the Gerber files with a Gerber file viewer first. The `Fritzing fabrication FAQ <http://bit.ly/18bUgeA>`_
+upload the Zip file containing the `Gerber files <https://en.wikipedia.org/wiki/Gerber_format>`_ you created. If you are a cautious person,
+you might choose to examine the Gerber files with a Gerber file viewer first. The `Fritzing fabrication FAQ <https://aisler.net/partners/fritzing>`_
offers several suggestions, including `gerbv <http://gerbv.sourceforge.net/>`_ for Windows and Linux users.
When your upload is complete, you'll be given a quote, shown images for review, and presented with options for accepting
-and ordering. After you have accepted the design, your `list of accepted designs <https://oshpark.com/users/current>`_
+and ordering. After you have accepted the design, your `list of accepted designs <https://oshpark.com/project_history>`_
will also include the option of enabling sharing of your designs so that others can order a PCB, as well. If you are
looking to make some money on your design, you'll want to go another route, like the one described in :ref:`capes_production`.
:ref:`capes_quickbot_pcb` shows the resulting PCB that arrives in the mail.
@@ -1165,7 +1172,7 @@ Solution
---------
`CircuitHub <https://circuithub.com/>`_ offers a great tool to get a quick quote on assembled PCBs.
-To make things simple, I downloaded the `CircuitCo MiniDisplay Cape Eagle design materials <http://bit.ly/1C5uvJc>`_
+To make things simple, I downloaded the `CircuitCo MiniDisplay Cape Eagle design materials <https://elinux.org/Special:Badtitle/NS500:MiniDisplay_Cape>`_
and uploaded them to CircuitHub.
After the design is uploaded, you'll need to review the parts to verify that CircuitHub has or
@@ -1228,7 +1235,7 @@ you can find the prices for the LCDs as well, as shown in :ref:`capes_lcd_pricin
+-----------+---------+--------+----------+------------+-------------+
To enable more cape developers to launch their designs to the market, CircuitHub has
-launched a http://campaign.circuithub.com[group buy campaign site]. You, as a cape developer,
+launched a `group buy campaign site <https://hackaday.com/2014/11/13/circuithub-launches-group-buy-crowdsourcing-campaigns/>`_. You, as a cape developer,
can choose how much markup you need to be paid for your work and launch the campaign to the public.
Money is only collected if and when the desired target quantity is reached, so there's no risk that
the boards will cost too much to be affordable. This is a great way to cost-effectively launch your boards to market!
diff --git a/books/beaglebone-cookbook/09capes/figures/quickBot-eaglexml.sch b/books/beaglebone-cookbook/09capes/figures/quickBot-eaglexml.sch
index 240eb3ed3cd2a143af469473ed096d03ebd93d79..b30431fd3790abb56091b35f38eccc809f98fa70 100644
--- a/books/beaglebone-cookbook/09capes/figures/quickBot-eaglexml.sch
+++ b/books/beaglebone-cookbook/09capes/figures/quickBot-eaglexml.sch
@@ -4,7 +4,7 @@
<drawing>
<layers>
<layer name="Nets" color="2" number="91" visible="yes" active="yes" fill="1"/>
- <layer name="Busses" color="1" number="92" visible="yes" active="yes" fill="1"/>
+ <layer name="buses" color="1" number="92" visible="yes" active="yes" fill="1"/>
<layer name="Pins" color="2" number="93" visible="no" active="yes" fill="1"/>
<layer name="Symbols" color="4" number="94" visible="yes" active="yes" fill="1"/>
<layer name="Names" color="7" number="95" visible="yes" active="yes" fill="1"/>
diff --git a/books/pru-cookbook/01case/case.rst b/books/pru-cookbook/01case/case.rst
index 27b035e7b26567643cd455398c632543aefb8d3a..a07cfd58bc8680fe869532cf85231cade6a39a95 100644
--- a/books/pru-cookbook/01case/case.rst
+++ b/books/pru-cookbook/01case/case.rst
@@ -80,7 +80,7 @@ in :ref:`case_blue`.
The `Robotics Control Library <https://beagleboard.org/librobotcontrol>`_ is a
package that is already installed on the Beagle
that contains a C library and example/testing programs. It uses the PRU to extend the
-real-time hardware of the Bone by adding eight addional servo channels and one
+real-time hardware of the Bone by adding eight additional servo channels and one
addition real-time encoder input.
The following examples show how easy it is to use the PRU for robotics.
@@ -103,7 +103,7 @@ via the PRU that can be used out of the box.
.. note::
The I/O pins on the Beagles have a mutliplexer that lets you select what I/O
- appears on a given pin. The Blue has the mux already configured to to run these
+ appears on a given pin. The Blue has the mux already configured to run these
examples. Follow the instructions in
:ref:`details_configure_servos`
to configure the pins for the Black and the Pocket.
@@ -141,7 +141,7 @@ The ``-f 10`` says to use a frequency of 10 Hz and the ``-p 1.5`` says to set th
Discussion
------------
-The BeagleBone Blue sends these eight outputs to it's servo channels. The others use the pins shown in the
+The BeagleBone Blue sends these eight outputs to its servo channels. The others use the pins shown in the
:ref:`case__register_to_pin_table`.
.. _case__register_to_pin_table:
@@ -268,7 +268,7 @@ eQEP to pin mapping
.. note::
The I/O pins on the Beagles have a mutliplexer that lets you select what I/O
- appears on a given pin. The Blue has the mux already configured to to run these
+ appears on a given pin. The Blue has the mux already configured to run these
examples. Follow the instructions in
:ref:`details_configure_encoders`
to configure the pins for the Black and the Pocket.
@@ -429,164 +429,167 @@ BeagleLogic uses the two PRUs to sample at 100Msps. Getting a PRU running at 20
explaining how the PRUs get this type of performance.
-NeoPixels -- 5050 RGB LEDs with Integrated Drivers (Falcon Christmas)
-***********************************************************************
+..
+ TODO This is currently broken with the latest version of Falcon Christmas (no F8-B-20.json file)
-Problem
---------
+ NeoPixels -- 5050 RGB LEDs with Integrated Drivers (Falcon Christmas)
+ ***********************************************************************
-You have an `Adafruit NeoPixel LED string <http://www.adafruit.com/products/1138>`_,
-`Adafruit NeoPixel LED matrix <http://www.adafruit.com/products/1487>`_ or
-any other type of
-`WS2812 LED <https://cdn-shop.adafruit.com/datasheets/WS2812.pdf>`_
-and want to light it up.
+ Problem
+ --------
-.. TODO Show how to drive ws2812's with FPP.
+ You have an `Adafruit NeoPixel LED string <http://www.adafruit.com/products/1138>`_,
+ `Adafruit NeoPixel LED matrix <http://www.adafruit.com/products/1487>`_ or
+ any other type of
+ `WS2812 LED <https://cdn-shop.adafruit.com/datasheets/WS2812.pdf>`_
+ and want to light it up.
-Solution
----------
+ .. TODO Show how to drive ws2812's with FPP.
-If you are driving just one string you can write your own code
-(See :ref:`blocks_ws2812`)
-If you plan to drive multiple strings, then consider
-Falcon Christmas (`FPP <https://falconchristmas.com/>`_).
-FPP can be used to drive both LEDs with an integrated
-driver (neopixels) or without an integrated driver. Here we'll show you how to
-set up for the integrated drive and in the next section the no driver LEDs will be
-show.
+ Solution
+ ---------
-Hardware
-----------
+ If you are driving just one string you can write your own code
+ (See :ref:`blocks_ws2812`)
+ If you plan to drive multiple strings, then consider
+ Falcon Christmas (`FPP <https://falconchristmas.com/>`_).
+ FPP can be used to drive both LEDs with an integrated
+ driver (neopixels) or without an integrated driver. Here we'll show you how to
+ set up for the integrated drive and in the next section the no driver LEDs will be
+ show.
-For this setup we'll wire a single string of NeoPixels to the Beagle.
-I've attached the black wire on the string to ground on the Beagle
-and the red wire to a 3.3V pin on the Beagle.
-The yellow data in line is attached to P1.31 (I'm using a PocketBeagle.).
+ Hardware
+ ----------
-How did I know to attach to P1.31? The FalconChristmas git repo
-(https://github.com/FalconChristmas/fpp) has files that tell which pins
-attach to which port. https://github.com/FalconChristmas/fpp/blob/master/capes/pb/strings/F8-B-20.json
-has a list of 20 ports and where they are connected. Pin P1.31 appears on
-line 27. It's the 20th entry in the list. You could pick any of the others
-if you'd rather.
+ For this setup we'll wire a single string of NeoPixels to the Beagle.
+ I've attached the black wire on the string to ground on the Beagle
+ and the red wire to a 3.3V pin on the Beagle.
+ The yellow data in line is attached to P1.31 (I'm using a PocketBeagle.).
-Software Setup
----------------
+ How did I know to attach to P1.31? The FalconChristmas git repo
+ (https://github.com/FalconChristmas/fpp) has files that tell which pins
+ attach to which port. https://github.com/FalconChristmas/fpp/blob/master/capes/pb/strings/F8-B-20.json
+ has a list of 20 ports and where they are connected. Pin P1.31 appears on
+ line 27. It's the 20th entry in the list. You could pick any of the others
+ if you'd rather.
-Assuming the PocketBeagle is attached via the USB cable,
-on your host computer browse to <http://192.168.7.2/> and you will see
-:ref:`case_fpp_program_control2`.
+ Software Setup
+ ---------------
-.. _case_fpp_program_control2:
+ Assuming the PocketBeagle is attached via the USB cable,
+ on your host computer browse to <http://192.168.7.2/> and you will see
+ :ref:`case_fpp_program_control2`.
-.. figure:: figures/fpp_program_control.png
- :align: center
- :alt: Falcon Play Program Control
+ .. _case_fpp_program_control2:
- Falcon Play Program Control
+ .. figure:: figures/fpp_program_control.png
+ :align: center
+ :alt: Falcon Play Program Control
-You can test the display by first setting up the Channel Outputs and then
-going to *Display Testing*. :ref:`case_channel_outputs_menu2` shows where to
-select Channel Outputs and :ref:`case_channel_outputs2` shows which settings to use.
+ Falcon Play Program Control
-.. _case_channel_outputs_menu2:
+ You can test the display by first setting up the Channel Outputs and then
+ going to *Display Testing*. :ref:`case_channel_outputs_menu2` shows where to
+ select Channel Outputs and :ref:`case_channel_outputs2` shows which settings to use.
-.. figure:: figures/fpp_channel_outputs_menu.png
- :align: center
- :alt: Selecting Channel Outputs
+ .. _case_channel_outputs_menu2:
- Selecting Channel Outputs
+ .. figure:: figures/fpp_channel_outputs_menu.png
+ :align: center
+ :alt: Selecting Channel Outputs
-.. _case_channel_outputs2:
+ Selecting Channel Outputs
-.. figure:: figures/fpp_channel_outputs_strings.png
- :align: center
- :alt: Channel Outputs Settings
+ .. _case_channel_outputs2:
- Channel Outputs Settings
+ .. figure:: figures/fpp_channel_outputs_strings.png
+ :align: center
+ :alt: Channel Outputs Settings
-Click on the *Pixel Strings* tab. Earlier we noted that *P1.31* is attached
-to port 20. Note that at the bottom of the screen, port 20 has a PIXEL COUNT
-of 24. We're telling FPP our string has 24 NeoPixels and they are attached
-to port 2 which in *P1.31*.
+ Channel Outputs Settings
-Be sure to check the *Enable String Cape*.
+ Click on the *Pixel Strings* tab. Earlier we noted that *P1.31* is attached
+ to port 20. Note that at the bottom of the screen, port 20 has a PIXEL COUNT
+ of 24. We're telling FPP our string has 24 NeoPixels and they are attached
+ to port 2 which in *P1.31*.
-Next we need to test the display. Select **Display Testing** shown in
-:ref:`case_display_testing_menu2`.
+ Be sure to check the *Enable String Cape*.
-.. _case_display_testing_menu2:
+ Next we need to test the display. Select **Display Testing** shown in
+ :ref:`case_display_testing_menu2`.
-.. figure:: figures/fpp_display_testing_menu2.png
- :align: center
- :alt: Selecting Display Testing
+ .. _case_display_testing_menu2:
- Selecting Display Testing
+ .. figure:: figures/fpp_display_testing_menu2.png
+ :align: center
+ :alt: Selecting Display Testing
-Set the *End Channel* to *72*. (72 is 3*24)
-Click *Enable Test Mode* and your matrix should light up. Try the different
-testing patterns shown in :ref:`case_display_testing2`.
+ Selecting Display Testing
-.. note::
+ Set the *End Channel* to *72*. (72 is 3*24)
+ Click *Enable Test Mode* and your matrix should light up. Try the different
+ testing patterns shown in :ref:`case_display_testing2`.
- Clicking on the *-3* will subtract three from the End Channel, which should
- then display three fewer LEDs which is one NeoPixel. The last of your NeoPixels
- should go black. This is an easy way to make sure you have the correct pixel
- count.
+ .. note::
-.. _case_display_testing2:
+ Clicking on the *-3* will subtract three from the End Channel, which should
+ then display three fewer LEDs which is one NeoPixel. The last of your NeoPixels
+ should go black. This is an easy way to make sure you have the correct pixel
+ count.
-.. figure:: figures/fpp_display_testing2.png
- :align: center
- :alt: Display Testing Options
+ .. _case_display_testing2:
- Display Testing Options
+ .. figure:: figures/fpp_display_testing2.png
+ :align: center
+ :alt: Display Testing Options
-You can control the LED string using the E1.31 protocol.
-(https://www.doityourselfchristmas.com/wiki/index.php?title=E1.31_(Streaming-ACN)_Protocol)
-First configure the input channels by going to Channel Inputs as shown in
-:ref:`case_channel_inputs`.
+ Display Testing Options
-.. _case_channel_inputs:
+ You can control the LED string using the E1.31 protocol.
+ (https://www.doityourselfchristmas.com/wiki/index.php?title=E1.31_(Streaming-ACN)_Protocol)
+ First configure the input channels by going to Channel Inputs as shown in
+ :ref:`case_channel_inputs`.
-.. figure:: figures/fpp_channel_inputs.png
- :align: center
- :alt: Going to Channel Inputs
+ .. _case_channel_inputs:
- Going to Channel Inputs
+ .. figure:: figures/fpp_channel_inputs.png
+ :align: center
+ :alt: Going to Channel Inputs
-Tell it you have 72 LEDs and enable the input as shown in :ref:`case_set_inputs`.
+ Going to Channel Inputs
-.. _case_set_inputs:
+ Tell it you have 72 LEDs and enable the input as shown in :ref:`case_set_inputs`.
-.. figure:: figures/fpp_inputs_setup2.png
- :align: center
- :alt: Setting Channel Inputs
+ .. _case_set_inputs:
- Setting Channel Inputs
+ .. figure:: figures/fpp_inputs_setup2.png
+ :align: center
+ :alt: Setting Channel Inputs
-Finally go to the Status Page as shown in :ref:`case_status`.
+ Setting Channel Inputs
-.. _case_status:
+ Finally go to the Status Page as shown in :ref:`case_status`.
-.. figure:: figures/fpp_status.png
- :align: center
- :alt: Watching Status
+ .. _case_status:
- Watching the status
+ .. figure:: figures/fpp_status.png
+ :align: center
+ :alt: Watching Status
-Now run a program on another computer that generated E1.31 packets.
-:ref:`case_e1.31_example` is an example python program.
+ Watching the status
-.. _case_e1.31_example:
+ Now run a program on another computer that generated E1.31 packets.
+ :ref:`case_e1.31_example` is an example python program.
-.. literalinclude:: code/e1.31-test.py
- :caption: e1.31-test.py -Example of generating packets to control the NeoPixels
- :linenos:
+ .. _case_e1.31_example:
+
+ .. literalinclude:: code/e1.31-test.py
+ :caption: e1.31-test.py -Example of generating packets to control the NeoPixels
+ :linenos:
-:download:`e1.31-test.py <code/e1.31-test.py>`
+ :download:`e1.31-test.py <code/e1.31-test.py>`
-.. TODO document the code
+ .. TODO document the code
.. _case_rgb_matrix:
@@ -930,7 +933,7 @@ the *Content Setup* menu and select *File Manager*. Click the black
FPP file manager
-Once your sequence is uploaded, got to **Content Steup** and select **Playlists**.
+Once your sequence is uploaded, got to **Content Setup** and select **Playlists**.
Enter you playlist name (I used **fire**) and click **Add**. Then click
**Add a Sequence/Entry** and select **Sequence Only**
(:ref:`case_playlist`), then click **Add**.
@@ -964,7 +967,7 @@ simpPRU -- A python-like language for programming the PRUs
===========================================================
`simpPRU <https://github.com/VedantParanjape/simpPRU>`_ is a simple, python-like
-programming languge designed to make programming the PRUs easy.
+programming language designed to make programming the PRUs easy.
It has detailed `documentation <https://simppru.readthedocs.io/en/latest/>`_ and
many `examples <https://simppru.readthedocs.io/en/latest/examples/digital_read/>`_.
@@ -972,7 +975,7 @@ many `examples <https://simppru.readthedocs.io/en/latest/examples/digital_read/>
simpPRU is a procedural programming language that is statically typed.
Variables and functions must be assigned data types during compilation.
- It is typesafe, and data types of variables are decided during compilation.
+ It is type-safe, and data types of variables are decided during compilation.
simPRU codes have a +.sim+ extension.
simpPRU provides a console app to use Remoteproc functionality.
diff --git a/books/pru-cookbook/01case/code/main_pru1.c b/books/pru-cookbook/01case/code/main_pru1.c
index 8d751b3e65e06a8dd4e47c9ef6f28f370d60ca24..2216a9ed79efeba68e5400519ff246e08734a246 100644
--- a/books/pru-cookbook/01case/code/main_pru1.c
+++ b/books/pru-cookbook/01case/code/main_pru1.c
@@ -39,8 +39,8 @@
#include "resource_table_pru1.h"
// The function is defined in pru1_asm_blinky.asm in same dir
-// We just need to add a declaration here, the defination can be
-// seperately linked
+// We just need to add a declaration here, the definition can be
+// separately linked
extern void start(void);
void main(void)
diff --git a/books/pru-cookbook/02start/code/hello.pru0.c b/books/pru-cookbook/02start/code/hello.pru0.c
index ab61e79eaafed3a7198532358d9ae3415559048f..239a7ad04f17611a30d75d87d735a0ac6cc3ef23 100644
--- a/books/pru-cookbook/02start/code/hello.pru0.c
+++ b/books/pru-cookbook/02start/code/hello.pru0.c
@@ -15,7 +15,7 @@ void main(void) {
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
for(i=0; i<10; i++) {
- gpio1[GPIO_SETDATAOUT] = USR3; // The the USR3 LED on
+ gpio1[GPIO_SETDATAOUT] = USR3; // the USR3 LED on
__delay_cycles(500000000/5); // Wait 1/2 second
diff --git a/books/pru-cookbook/02start/code/hello.pru1_1.c b/books/pru-cookbook/02start/code/hello.pru1_1.c
index 8cb8146f74c88ee890a5a251108c19642cdb0c75..51a1b351f45c3128a4e81b8dbaec39ec11b54259 100644
--- a/books/pru-cookbook/02start/code/hello.pru1_1.c
+++ b/books/pru-cookbook/02start/code/hello.pru1_1.c
@@ -15,7 +15,7 @@ void main(void) {
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
for(i=0; i<10; i++) {
- gpio3[GPIO_SETDATAOUT] = USR3; // The the USR3 LED on
+ gpio3[GPIO_SETDATAOUT] = USR3; // the USR3 LED on
__delay_cycles(500000000/5); // Wait 1/2 second
diff --git a/books/pru-cookbook/02start/code/hello2.pru0.c b/books/pru-cookbook/02start/code/hello2.pru0.c
index d268d33b637cb9d51a9928589a69ce158101a4e2..a9be0143cf80b8a933197d8ceabd95e4353a76fa 100644
--- a/books/pru-cookbook/02start/code/hello2.pru0.c
+++ b/books/pru-cookbook/02start/code/hello2.pru0.c
@@ -15,7 +15,7 @@ void main(void) {
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
for(i=0; i<10; i++) {
- gpio1[GPIO_SETDATAOUT] = USR1; // The the USR3 LED on
+ gpio1[GPIO_SETDATAOUT] = USR1; // the USR3 LED on
gpio1[GPIO_CLEARDATAOUT] = USR2;
// __R30 |= gpio; // Set the GPIO pin to 1
diff --git a/books/pru-cookbook/02start/code/hello2.pru1.c b/books/pru-cookbook/02start/code/hello2.pru1.c
index 15df54495ecf681b3707a42dfaa6dfae65990559..c34558708b22da2109f5520bab9d631550f89f0b 100644
--- a/books/pru-cookbook/02start/code/hello2.pru1.c
+++ b/books/pru-cookbook/02start/code/hello2.pru1.c
@@ -15,7 +15,7 @@ void main(void) {
CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
for(i=0; i<10; i++) {
- gpio1[GPIO_SETDATAOUT] = USR1; // The the USR3 LED on
+ gpio1[GPIO_SETDATAOUT] = USR1; // the USR3 LED on
gpio1[GPIO_CLEARDATAOUT] = USR2;
// __R30 |= gpio; // Set the GPIO pin to 1
diff --git a/books/pru-cookbook/02start/start.rst b/books/pru-cookbook/02start/start.rst
index 80ee433d0fb94fda96f35a8d6101e3efacc6306e..e7a40243ee96eba82267cd303db4d6ef9c25da5f 100644
--- a/books/pru-cookbook/02start/start.rst
+++ b/books/pru-cookbook/02start/start.rst
@@ -163,7 +163,7 @@ Installing the Latest OS on Your Bone
Problem
---------
-You want to find the lastest version of Debian that is available for your Bone.
+You want to find the latest version of Debian that is available for your Bone.
Solution
---------
@@ -199,7 +199,7 @@ I've downloaded the image and need to flash my micro SD card.
Solution
---------
-Get a micro SD card that has at least 4GB and preferibly 8GB.
+Get a micro SD card that has at least 4GB and preferably 8GB.
There are many ways to flash the card, but the best seems to be Etcher by
https://www.balena.io/. Go to https://www.balena.io/etcher/ and download the version for your host
@@ -229,7 +229,7 @@ Solution
------------
The image you downloaded includes `Cloud9 <https://aws.amazon.com/cloud9/>`_,
-a web-based intergrated development environment (IDE) as shown in
+a web-based integrated development environment (IDE) as shown in
:ref:`start_c9`.
.. _start_c9:
@@ -240,7 +240,7 @@ a web-based intergrated development environment (IDE) as shown in
Cloud9 IDE
-Just point the browswer on your host computer to http://192.168.7.2
+Just point the browser on your host computer to http://192.168.7.2
and start exploring. If you want the files in your home directory to appear
in the tree structure click the settings gear and select *Show Home in Favorites*
as shown in :ref:`start_c9_show_home`.
diff --git a/books/pru-cookbook/03details/details.rst b/books/pru-cookbook/03details/details.rst
index 55f8761fda6acee8c5100a2fbbc7e2f10da22c7c..8052ff0097c648f53ccafde79a4a4d571cf08aa7 100644
--- a/books/pru-cookbook/03details/details.rst
+++ b/books/pru-cookbook/03details/details.rst
@@ -5,13 +5,13 @@ Running a Program; Configuring Pins
There are a lot of details in compiling and running PRU code.
Fortunately those details are captured in a common `Makefile` that is
-used througout this book. This chapter shows how to use the `Makefile` to
+used throughout this book. This chapter shows how to use the `Makefile` to
compile code and also start and stop the PRUs.
.. note::
The following are resources used in this chapter:
- * `PRU Code Generation Tools - Compiler <http://software-dl.ti.com/codegen/esd/cgt_ai_64_lic_sw/PRU/2.1.5/ti_cgt_pru_2.1.5_armlinuxa8hf_busybox_installer.sh>`_
+ * `PRU Code Generation Tools - Compiler <https://www.ti.com/tool/PRU-CGT>`_
* `PRU Software Support Package <http://git.ti.com/pru-software-support-package>`_
* `PRU Optimizing C/C++ Compiler <http://www.ti.com/lit/ug/spruhv7b/spruhv7b.pdf>`_
* `PRU Assembly Language Tools <http://www.ti.com/lit/ug/spruhv6b/spruhv6b.pdf>`_
@@ -212,7 +212,7 @@ You can also specify them when running ``make``.
bone$ make TARGET=gpio.pru1
The setup file also contains instructions to figure out which Beagle you are running
-and then configure the pins acordingly.
+and then configure the pins accordingly.
.. literalinclude:: code/gpio_setup.sh
@@ -454,7 +454,7 @@ Configuring Pins for Controlling Servos
Problem
---------
-You want to **configure** the pins so the PRU outputs are accessable.
+You want to **configure** the pins so the PRU outputs are accessible.
Solution
---------
@@ -485,7 +485,7 @@ Configuring Pins for Controlling Encoders
Problem
---------
-You want to **configure** the pins so the PRU inputs are accessable.
+You want to **configure** the pins so the PRU inputs are accessible.
Solution
---------
diff --git a/books/pru-cookbook/04debug/debug.rst b/books/pru-cookbook/04debug/debug.rst
index 42a54d4a220c75e8db8ac7b1a98a480fd1dcda0c..38e34cb9cc6fbfa1c4b456993c598c1482c427ab 100644
--- a/books/pru-cookbook/04debug/debug.rst
+++ b/books/pru-cookbook/04debug/debug.rst
@@ -61,7 +61,7 @@ Solution
---------
The command ``dmesg`` outputs useful information when dealing with the kernel.
-Simplying running ``dmesg -Hw`` can tell you a lot. The ``-H`` flag puts the
+Simply running ``dmesg -Hw`` can tell you a lot. The ``-H`` flag puts the
dates in the human readable form, the ``-w`` tells it to wait for more information.
Often I'll have a window open running ``dmesg -Hw``.
@@ -253,7 +253,7 @@ Here we see some values on the heap.
[0x0220] 0x0a4fe833 0xb222ebda 0xe5575236 0xc50cbefd
[0x0230] 0xb037c0d7 0xf48bbe23 0x88c460f0 0x011550d4
-Data written explicity to ``0x0200`` of the DRAM.
+Data written explicitly to ``0x0200`` of the DRAM.
.. code-block:: bash
@@ -270,7 +270,7 @@ Here's the shared memory.
You can also use ``prudebug`` to set breakpoints and single step,
but I haven't used that feature much.
-:ref:`memory_allocation` gives examples of how you can control where your vaiables are stored in memory.
+:ref:`memory_allocation` gives examples of how you can control where your variables are stored in memory.
UART
******
diff --git a/books/pru-cookbook/05blocks/blocks.rst b/books/pru-cookbook/05blocks/blocks.rst
index f675235cf1ead5bf16c306fb0cd0d1c87e19acc6..21fa40967ca178fb6cc55c43294152ebd746b4a6 100644
--- a/books/pru-cookbook/05blocks/blocks.rst
+++ b/books/pru-cookbook/05blocks/blocks.rst
@@ -44,7 +44,7 @@ shared memory (Shared RAM) as shown in :ref:`blocks_PRU_block_diagram`.
PRU Block Diagram
-Each PRU accesses it's own DRAM starting at location 0x0000_0000. Each PRU
+Each PRU accesses its own DRAM starting at location 0x0000_0000. Each PRU
can also access the other PRU's DRAM starting at 0x0000_2000. Both PRUs
access the shared RAM at 0x0001_0000. The compiler can control where each
of these memories variables are stored.
@@ -565,7 +565,7 @@ that is bit 0, we'll be toggling ``P9_31``.
| | Thus we are setting the bit we selected. Finally the new |
| | value is written back to ``__R30``. |
+-----+-----------------------------------------------------------------------+
- |18 | ``__delay_cycles`` is an ((instrinsic function)) that delays |
+ |18 | ``__delay_cycles`` is an ((intrinsic function)) that delays |
| | with number of cycles passed to it. Each cycle is 5ns, |
| | and we are delaying 100,000,000 cycles which is |
| | 500,000,000ns, or 0.5 seconds. |
@@ -579,7 +579,7 @@ that is bit 0, we'll be toggling ``P9_31``.
.. tip::
- You can read more about instrinsics in section 5.11 of the
+ You can read more about intrinsics in section 5.11 of the
(`PRU Optimizing C/C++ Compiler, v2.2, User's Guide <http://www.ti.com/lit/ug/spruhv7b/spruhv7b.pdf>`_.)
@@ -685,7 +685,7 @@ to write the `on` and `off` times to the DRAM. Then inside the `while` loop we
onCount[ch] = pru0_dram[2*ch]; // Read from DRAM0
offCount[ch]= pru0_dram[2*ch+1];
-to read from the DRAM when reseting the counters. Now, while the PRU is running,
+to read from the DRAM when resetting the counters. Now, while the PRU is running,
the ARM can write values into the DRAM and change the PWM on and off times.
:ref:`blocks_pwm4` is the whole code.
@@ -774,7 +774,7 @@ the speedup compared to the ``pwm4.pru0.c`` case to drop from 6x to only 1.7x.
We also have our ``for`` loop inside the ``while`` loop that can be unrolled.
Unfortunately ``UNROLL()`` doesn't work on it, therefore we have to do it by
hand. We could take the loop and just copy it three times, but that would
-make it harder to maintain the code. Instead I convered the loop into a
+make it harder to maintain the code. Instead I converted the loop into a
``#define`` (lines 14-24) and invoked ``update()`` as needed (lines 48-51).
This is not a function call. Whenever the preprocessor sees the ``update()``
it copies the code an then it's compiled.
@@ -941,7 +941,7 @@ are blurred. To see what's happening, let's stop the oscilloscope.
The stopped display shows that the four channels are doing what we wanted, except
The PRU 0 channels have a period of 370ns while the PRU 1 channels at 330ns.
-It appears the compiler has optimied the two PRUs slightly differenty.
+It appears the compiler has optimied the two PRUs slightly differently.
Synchronizing Two PRUs
@@ -986,11 +986,11 @@ Discussion
The figure below shows the two PRUs are synchronized, though there is some extra
overhead in the process so the period is longer.
-.. figure:: figures/pwm8_prus_sycned.png
+.. figure:: figures/pwm8_prus_synced.png
:align: center
- :alt: pwm8.pru0 PRUs sycned
+ :alt: pwm8.pru0 PRUs synced
- pwm8.pru0 PRUs sycned
+ pwm8.pru0 PRUs synced
This isn't much different from the previous examples.
@@ -999,7 +999,7 @@ This isn't much different from the previous examples.
+-----+-------+---------------------------------------------------------------------------------------+
|PRU |Line |Change |
+=====+=======+=======================================================================================+
- |0 |37-45 |For PRU 0 these define ``configInitc()`` which initializes the interupts. |
+ |0 |37-45 |For PRU 0 these define ``configInitc()`` which initializes the interrupts. |
| | |See page 226 of the |
| | |`AM335x TRM <https://www.ti.com/lit/ug/spruh73p/spruh73p.pdf>`_ |
| | |for a diagram explaining events, channels, hosts, etc. |
@@ -1010,8 +1010,8 @@ This isn't much different from the previous examples.
| | |to the Host-1 channel which ``configInitc()`` set up. We also clear event 16 so |
| | |PRU 0 can set it again. |
+-----+-------+---------------------------------------------------------------------------------------+
- |0 |74-75 |On PRU 0 this generates the interupt to send to PRU 1. I found PRU 1 was |
- | | |slow to respond to the interupt, so I put this code at the end of the loop to |
+ |0 |74-75 |On PRU 0 this generates the interrupt to send to PRU 1. I found PRU 1 was |
+ | | |slow to respond to the interrupt, so I put this code at the end of the loop to |
| | |give time for the signal to get to PRU 1. |
+-----+-------+---------------------------------------------------------------------------------------+
@@ -1155,7 +1155,7 @@ There's a lot going on here; let's take it line by line.
|15-16 | ``onCount`` counts how many cycles the PWM should be 1 and ``offCount`` counts |
| | how many it should be off. |
+-------+---------------------------------------------------------------------------------+
- |18 | ``waveform[]`` stores the analog waveform being ouput. |
+ |18 | ``waveform[]`` stores the analog waveform being output. |
+-------+---------------------------------------------------------------------------------+
|21-24 | ``SAWTOOTH`` is the simplest of the waveforms. Each sample is the duty cycle |
| | at that time and must therefore be between 0 and 100. |
@@ -1244,7 +1244,7 @@ resistor. You'll see something like :ref:`blocks_lowercutoff`.
Reconstructed Sawtooth Waveform with Lower Cutoff Frequency
-The high freqencies have been reduced, but the corner of the waveform has
+The high frequencies have been reduced, but the corner of the waveform has
been rounded. You can also adjust the cutoff to a higher frequency and you'll
get a sharper corner, but you'll also get more high frequencies. See
:ref:`blocks_highercutoff`
@@ -1681,7 +1681,7 @@ adjustments for the 64x32 matrix we are using.
.. admonition:: information
- There's zero documention out there on how these matrices work, and no public
+ There's zero documentation out there on how these matrices work, and no public
datasheets or spec sheets so we are going to try to document how they work.
First thing to notice is that there are 2048 RGB LEDs in a 64x32 matrix.
@@ -1864,7 +1864,7 @@ The sequence is:
* Put data on the R1, G1, B1, R2, G2 and B2 lines
* Toggle the clock.
-* Repeat the first two steps as one row of data is transfered. There are 384 LEDs (2 rows of 32 RGB LEDs times 3 LED per RGB), but we are clocking in six bits (R1, G1, etc.) at a time, so 384/6=64 values need to be clocked in.
+* Repeat the first two steps as one row of data is transferred. There are 384 LEDs (2 rows of 32 RGB LEDs times 3 LED per RGB), but we are clocking in six bits (R1, G1, etc.) at a time, so 384/6=64 values need to be clocked in.
* Once all the values are in, disable the display (OE goes high)
* Then toggle the latch (LAT) to latch the new data.
* Turn the display back on.
@@ -1876,7 +1876,7 @@ Using the PRU we are able to run the clock a about 2.9 MKHz.
at some 6.3 MHz. So the compiler is doing a pretty good job, but you can run
some two times faster if you want to use assembly code. In fairness to FPP,
it's having to pull it's data out of RAM to display it, so isn't not a good
-comparision.
+comparison.
.. _blocks_rgb_fpp:
diff --git a/books/pru-cookbook/05blocks/code/pwm8.pru0.c b/books/pru-cookbook/05blocks/code/pwm8.pru0.c
index c566573f6f681f7642e61d5c159c8558d3895d33..25499c3cd679d7df3c9ba20db331948700157862 100644
--- a/books/pru-cookbook/05blocks/code/pwm8.pru0.c
+++ b/books/pru-cookbook/05blocks/code/pwm8.pru0.c
@@ -31,7 +31,7 @@ volatile unsigned int *pru0_dram = (unsigned int *) (PRU0_DRAM + 0x200);
volatile register uint32_t __R30;
volatile register uint32_t __R31;
-// Initialize interupts so the PRUs can be syncronized.
+// Initialize interrupts so the PRUs can be synchronized.
// PRU1 is started first and then waits for PRU0
// PRU0 is then started and tells PRU1 when to start going
void configIntc(void) {
diff --git a/books/pru-cookbook/05blocks/code/pwm8.pru1.c b/books/pru-cookbook/05blocks/code/pwm8.pru1.c
index cf5c241c99addc0d8b958724554e078f9a53412c..7d4da138d6595ae4380655c3fffb3b8cdfb854ca 100644
--- a/books/pru-cookbook/05blocks/code/pwm8.pru1.c
+++ b/books/pru-cookbook/05blocks/code/pwm8.pru1.c
@@ -31,7 +31,7 @@ volatile unsigned int *pru0_dram = (unsigned int *) (PRU0_DRAM + 0x200);
volatile register uint32_t __R30;
volatile register uint32_t __R31;
-// Initialize interupts so the PRUs can be syncronized.
+// Initialize interrupts so the PRUs can be synchronized.
// PRU1 is started first and then waits for PRU0
// PRU0 is then started and tells PRU1 when to start going
diff --git a/books/pru-cookbook/06io/io.rst b/books/pru-cookbook/06io/io.rst
index 80f20a5398e1a92a1e3877d5bc5489136bb06b62..ad4fdd59f5c96d2b6298f1d9e84e44f9aa63ba20 100644
--- a/books/pru-cookbook/06io/io.rst
+++ b/books/pru-cookbook/06io/io.rst
@@ -39,7 +39,7 @@ On the images for the BeagleBone Black, the HDMI display driver is enabled by de
and uses many of the ``P8`` pins. If you are not using HDMI video (or the HDI audio,
or even the eMMC) you can disable it by editing ``/boot/uEnv.txt``
-Open ``/boot/uEnv.txt`` and scroll down aways until you see:
+Open ``/boot/uEnv.txt`` and scroll down always until you see:
.. code-block:: bash
:caption: /boot/uEnv.txt
@@ -104,7 +104,7 @@ This code will toggle ``P9_11`` on and off. Here's the setup file.
:download:`setup.sh <code/setup.sh>`
Notice in the code ``config-pin`` set ``P9_11`` to ``gpio``, not ``pruout``. This is because
-are are using the OCP interface to the pin, not the usual PRU interface.
+are using the OCP interface to the pin, not the usual PRU interface.
Set your exports and make.
diff --git a/books/pru-cookbook/07more/code/cycle.pru0.c b/books/pru-cookbook/07more/code/cycle.pru0.c
index 73055d9f0662483f6e9cc03ef266b670f571e1f0..3217c2eb33c1f881da1fdba6e158b6caac974772 100644
--- a/books/pru-cookbook/07more/code/cycle.pru0.c
+++ b/books/pru-cookbook/07more/code/cycle.pru0.c
@@ -12,7 +12,7 @@ void main(void)
{
uint32_t gpio = P9_31; // Select which pin to toggle.;
- // These will be kept in registers and never witten to DRAM
+ // These will be kept in registers and never written to DRAM
uint32_t cycle, stall;
// Clear SYSCFG[STANDBY_INIT] to enable OCP master port
diff --git a/books/pru-cookbook/07more/code/cycle.pru0.lst b/books/pru-cookbook/07more/code/cycle.pru0.lst
index f2e131765eaf0e5bd13c719287eeb04b82b8d2cd..d10187efb7c80bfef7e2a56a92f066133bf606ad 100644
--- a/books/pru-cookbook/07more/code/cycle.pru0.lst
+++ b/books/pru-cookbook/07more/code/cycle.pru0.lst
@@ -79,7 +79,7 @@ Tools Copyright (c) 2012-2017 Texas Instruments Incorporated
69;----------------------------------------------------------------------
70; 13 | void main(void)
71; 15 | uint32_t gpio = P9_31; // Select which pin to toggle.;
- 72; 17 | // These will be kept in registers and never witten to DRAM
+ 72; 17 | // These will be kept in registers and never written to DRAM
73; 18 | uint32_t cycle, stall;
74; 20 | // Clear SYSCFG[STANDBY_INIT] to enable OCP master port
75;----------------------------------------------------------------------
diff --git a/books/pru-cookbook/07more/code/delay-test.pru0.c b/books/pru-cookbook/07more/code/delay-test.pru0.c
index 337ecbb23cb0920a687b30b3e50dcdbf5ae86f86..9061e2562e2620260e90062a4494009a96a405f4 100644
--- a/books/pru-cookbook/07more/code/delay-test.pru0.c
+++ b/books/pru-cookbook/07more/code/delay-test.pru0.c
@@ -5,8 +5,8 @@
#include "prugpio.h"
// The function is defined in delay.asm in same dir
-// We just need to add a declaration here, the defination can be
-// seperately linked
+// We just need to add a declaration here, the definition can be
+// separately linked
extern void my_delay_cycles(uint32_t);
volatile register uint32_t __R30;
diff --git a/books/pru-cookbook/07more/code/delay-test2.pru0.c b/books/pru-cookbook/07more/code/delay-test2.pru0.c
index 763b3a7d7b0452139cb817b0d56bf5e13688e0f6..7830ab9a06ec8d18d1dea25ddecea7eec4e198fb 100644
--- a/books/pru-cookbook/07more/code/delay-test2.pru0.c
+++ b/books/pru-cookbook/07more/code/delay-test2.pru0.c
@@ -7,8 +7,8 @@
#define TEST 100
// The function is defined in delay.asm in same dir
-// We just need to add a declaration here, the defination can be
-// seperately linked
+// We just need to add a declaration here, the definition can be
+// separately linked
extern uint32_t my_delay_cycles(uint32_t);
uint32_t ret;
diff --git a/books/pru-cookbook/07more/code/delay2.pru0.asm b/books/pru-cookbook/07more/code/delay2.pru0.asm
index e1f1da03d37ece54ca7c577b4244bd8abbbc921f..a66aa74de8e479f839736b0420b1bfeed1957597 100644
--- a/books/pru-cookbook/07more/code/delay2.pru0.asm
+++ b/books/pru-cookbook/07more/code/delay2.pru0.asm
@@ -1,4 +1,4 @@
-; This is an example of how to call an assembly routine from C with a retun value.
+; This is an example of how to call an assembly routine from C with a return value.
; Mark A. Yoder, 9-July-2018
.cdecls "delay-test2.pru0.c"
diff --git a/books/pru-cookbook/07more/more.rst b/books/pru-cookbook/07more/more.rst
index f70501a89114ba2cc339e882ae638fa806035618..5965b10ddae227012653438913f6ec413e7d0c30 100644
--- a/books/pru-cookbook/07more/more.rst
+++ b/books/pru-cookbook/07more/more.rst
@@ -4,7 +4,7 @@ More Performance
##################
So far in all our examples we've been able to meet our timing goals by writing
-our code in the C programming language. The C compiler does a suprisingly
+our code in the C programming language. The C compiler does a surprisingly
good job at generating code, most the time. However there are times
when very precise timing is needed and the compiler isn't doing it.
@@ -70,7 +70,7 @@ and :ref:`more_delay`. If you look in the local ``Makefile`` you'll see:
:download:`Makefile <code/Makefile>`
-This Makefle includes a common Makfile at ``/var/lib/cloud9/common/Makefile``, this the Makefile
+This Makefle includes a common Makefile at ``/var/lib/cloud9/common/Makefile``, this the Makefile
you need to edit. Edit ``/var/lib/cloud9/common/Makefile`` and go to line 195.
.. code-block:: bash
@@ -147,7 +147,7 @@ There is much to explain here. Let's start with :ref:`more_delay`.
With 5ns/cycle this gives 7 cycles on and 6 off. These times make sense
because each instruction takes a cycle and you have, set ``R30``, jump to
``my_delay_cycles``, ``sub``, ``qbne``, ``jmp``. Plus the instruction (not seen) that
-initilizes `r14` to the passed value. That's a total of six instructions.
+initializes `r14` to the passed value. That's a total of six instructions.
The extra instruction is the branch at the bottom of the ``while`` loop.
@@ -234,7 +234,7 @@ we can read using prudebug. :ref:`more_cycle_lines` is the Line-by-line.
|21 | Enables `CYCLE`. |
+-------+---------------------------------------------------------------------------------------+
|26 | Reset `CYCLE`. It ignores the value assigned to it and always sets it |
- | | to 0. `cycle` is on the right hand side to make the compiler give it it's own |
+ | | to 0. `cycle` is on the right hand side to make the compiler give it its own |
| | register. |
+-------+---------------------------------------------------------------------------------------+
|28, 29 | Reads the `CYCLE` and `STALL` values into registers. |
@@ -303,7 +303,7 @@ So ``cycle`` is 3 and ``stall`` is 5. It must be one cycle to clear the GPIO and
If you switch the order of lines 30 and 31 you'll see ``cycle`` is 7 and ``stall`` is 2. ``cycle`` now includes the
time needed to read ``stall`` and ``stall`` no longer includes the time to read ``cycle``.
-Xout and Xin - Transfering Between PRUs
+Xout and Xin - Transferring Between PRUs
*****************************************
Problem
@@ -325,8 +325,8 @@ The ``pass:[__]xout()`` and ``pass:[__]xin()`` intrinsics are able to transfer u
:download:`xout.pru0.c <code/xout.pru0.c>`
-PRU 1 waits at line 41 until PRU 0 signals it. :ref:`more_xin` sends sends an
-interupt to PRU 0 and waits for it to send the data.
+PRU 1 waits at line 41 until PRU 0 signals it. :ref:`more_xin` sends an
+interrupt to PRU 0 and waits for it to send the data.
.. _more_xin:
@@ -336,7 +336,7 @@ interupt to PRU 0 and waits for it to send the data.
:download:`xin.pru1.c <code/xin.pru1.c>`
-Use ``prudebug`` to see registers R5-R10 are transfered from PRU 0 to PRU 1.
+Use ``prudebug`` to see registers R5-R10 are transferred from PRU 0 to PRU 1.
.. code-block:: bash
@@ -394,10 +394,10 @@ Discussion
+=======+=========================================================================================================+
|4 | A different resource so PRU 0 can receive a signal from PRU 1. |
+-------+---------------------------------------------------------------------------------------------------------+
- |9-16 | ``dmemBuf`` holds the data to be sent to PRU 1. Each will be transfered |
+ |9-16 | ``dmemBuf`` holds the data to be sent to PRU 1. Each will be transferred |
| | to its corresponding register by ``xout()``. |
+-------+---------------------------------------------------------------------------------------------------------+
- |21-22 | Define the interupts we're using. |
+ |21-22 | Define the interrupts we're using. |
+-------+---------------------------------------------------------------------------------------------------------+
|27-28 | Clear the interrupts. |
+-------+---------------------------------------------------------------------------------------------------------+
@@ -408,13 +408,13 @@ Discussion
|45 | ``pass:[__]xout()`` does a direct transfer to PRU 1. Page 92 of |
| | `PRU Optimizing C/C++ Compiler, v2.2, User's Guide <http://www.ti.com/lit/ug/spruhv7b/spruhv7b.pdf>`_ |
| | shows how to use `xout()`. The first argument, 14, says to do a direct transfer to PRU 1. If the |
- | | first argument is 10, 11 or 12, the data is transfered to one of three scratchpad memories that |
- | | PRU 1 can access later. The second argument, 5, says to start transfering with register ``r5`` |
- | | and use as many regsiters as needed to transfer all of ``dmemBuf``. The third argument, 0, |
+ | | first argument is 10, 11 or 12, the data is transferred to one of three scratchpad memories that |
+ | | PRU 1 can access later. The second argument, 5, says to start transferring with register ``r5`` |
+ | | and use as many registers as needed to transfer all of ``dmemBuf``. The third argument, 0, |
| | says to not use remapping. (See the User's Guide for details.) |
- | | The final argument is the data to be transfered. |
+ | | The final argument is the data to be transferred. |
+-------+---------------------------------------------------------------------------------------------------------+
- |48 | Clear the interupt so it can go again. |
+ |48 | Clear the interrupt so it can go again. |
+-------+---------------------------------------------------------------------------------------------------------+
:ref:`more_xin_lines` shows the line-by-line for ``xin.pru1.c``.
diff --git a/conf.py b/conf.py
index ccb08fdf2601122d6365332176079e6607433fed..7a1c10cb32d0b5a742849f3d014ca0a8474da102 100644
--- a/conf.py
+++ b/conf.py
@@ -57,7 +57,7 @@ html_last_updated_fmt = "%b %d, %Y"
html_domain_indices = False
html_split_index = True
html_show_sourcelink = False
-html_baseurl = 'docs.beagleboard.io'
+html_baseurl = "docs.beagleboard.io"
# parse version from 'VERSION' file
with open(BBDOCS_BASE / "VERSION") as f:
@@ -79,6 +79,7 @@ with open(BBDOCS_BASE / "VERSION") as f:
else:
major, minor, patch, extra = m.groups(1)
version = ".".join((major, minor, patch))
+ release_version = ".".join((major, minor))
if extra:
version += "-" + extra
diff --git a/index.rst b/index.rst
index 2ee59f8257fc064e266aa5dd84b694cc1df7eb09..6c81fc71f3d344fc5e835ec3647ceac913959002 100644
--- a/index.rst
+++ b/index.rst
@@ -38,7 +38,7 @@ Get started engaging the BeagleBoard.org developer community by reading our :ref
Boards
******
-This is is where you will find the System Reference Manuals (SRMs) for all of the boards.
+This is where you will find the System Reference Manuals (SRMs) for all of the boards.
All Beagles are `open-hardware <https://www.oshwa.org/definition/>`__ with documentation on the
design, including the
diff --git a/intro/contribution/git-usage.rst b/intro/contribution/git-usage.rst
index cf6f936c6dbba95fa5e2a25a68ef1f1c5270a33e..0607ed22f5e2cbfc9c2ff3ee51938dea4124bfe2 100644
--- a/intro/contribution/git-usage.rst
+++ b/intro/contribution/git-usage.rst
@@ -585,6 +585,6 @@ There are a lot of different nice guides to using Git on the web:
- https://docs.scipy.org/doc/numpy-1.15.1/dev/gitwash/development_workflow.html Numpy is also
evaluating git
- https://github.github.com/training-kit/downloads/github-git-cheat-sheet
-- https://lab.github.com/courses
+- https://skills.github.com/
- `Pro Git <https://git-scm.com/book/en/v2>`_
diff --git a/intro/contribution/linux-upstream.rst b/intro/contribution/linux-upstream.rst
index 267f4698dacfca7e3ebc9c4cf186aea372d56fd5..da9a740aeec567ad1812d7817e44563501e29e94 100644
--- a/intro/contribution/linux-upstream.rst
+++ b/intro/contribution/linux-upstream.rst
@@ -23,7 +23,7 @@ The following are the skills that are needed before you actually start to contri
- :ref:`linux-upstream-more-git`
- :ref:`linux-upstream-c-programming`
- :ref:`linux-upstream-cross-arch`
- - :ref:`linux-upstream-embedded-busses`
+ - :ref:`linux-upstream-embedded-buses`
- :ref:`linux-upstream-drivers`
- :ref:`linux-upstream-device-trees`
@@ -36,7 +36,7 @@ More Git!
It is highly recommended that you go through :ref:`beagleboard-git-usage` before starting
to read and follow these guidelines. You will need to have a proper git setup on your
-computer inorder to effectively follow these steps.
+computer in order to effectively follow these steps.
Creating your first patch
=========================
@@ -82,9 +82,9 @@ a patch file using the following command:
0001-contribute.rst-Add-git-section.patch
This will generate one file that is generally referred to as the patch file.
-This is what you will now be sending upstream inorder to get your patch merged.
+This is what you will now be sending upstream in order to get your patch merged.
But wait, there are a few more things we need to setup for sending a patch via e-mail.
-That is, ofcourse your email!
+That is, of course your email!
For configuring your email ID for sending patches refer to this excellent stackoverflow thread,
`configure git-send-email
@@ -96,7 +96,7 @@ Finally, after you have configured you email properly, you can send out a patch
git send-email 0001-contribute.rst-Add-git-section.patch
-replacing ofcourse the above patchfile name with whatever was your own patch.
+replacing of course the above patchfile name with whatever was your own patch.
This command will then ask you ``To whom should the emails be sent (if anyone)?``
Here, you have to write the email address of the list you want to send out the patch to.
@@ -111,7 +111,7 @@ C-Programming
It is highly recommended that you have proficiency in C-Programming, because well the kernel is mostly
written in C! For starters, you can go through Dennis Ritchie's C Programming book to understand
-the language and also solve the excercises given there for getting hands on.
+the language and also solve the exercises given there for getting hands on.
.. _linux-upstream-cross-arch:
@@ -126,16 +126,16 @@ What you'd do instead is pick a much powerful machine like a Desktop PC or lapto
then use cross arch compilers like the arm-gcc for instance to compile the kernel for your
target device.
-.. _linux-upstream-embedded-busses:
+.. _linux-upstream-embedded-buses:
-Basics of embedded busses (I2C, UART, SPI, etc.)
+Basics of embedded buses (I2C, UART, SPI, etc.)
************************************************
In the world of embedded, you often need to communicate with peripherals over very low level protocols.
To name a few, I2C, UART, SPI, etc. are all serial protocols used to communicate with a variety of devices and
peripherals.
-It's recommended to understand atleast the basics of each of the protocol so you know what's actually going
+It's recommended to understand at least the basics of each of the protocol so you know what's actually going
on when you write for instance an I2C or SPI driver to communicate with let's say a sensor.
.. _linux-upstream-drivers:
diff --git a/intro/contribution/rst-cheat-sheet.rst b/intro/contribution/rst-cheat-sheet.rst
index db3626dac75aebc243d43e7f1353d7f388951037..1adb70a9cb5c089fd4989922b916ac59acab1a38 100644
--- a/intro/contribution/rst-cheat-sheet.rst
+++ b/intro/contribution/rst-cheat-sheet.rst
@@ -3,7 +3,7 @@
ReStructuredText Cheat Sheet
############################
-BeagleBoard docs is mostly writted with ReStructuredText (r)
+BeagleBoard docs is mostly written with ReStructuredText (r)
Headings
*********
@@ -20,8 +20,8 @@ matching overline and underline to indicate a heading.
.. note::
You can include only one (H1) ``#`` in a single documentation page.
-Make sure the length of your heading symbol is atleast (or
-more) the lenth of the heading text, for example:
+Make sure the length of your heading symbol is at least (or
+more) the at least of the heading text, for example:
.. callout::
diff --git a/intro/contribution/style.rst b/intro/contribution/style.rst
index e80d76156dd036feb4018da19c98276b49e53a05..6e5592df4e10ebefd18736bc1d86557dc28df32a 100644
--- a/intro/contribution/style.rst
+++ b/intro/contribution/style.rst
@@ -5,7 +5,7 @@ Documentation Style Guide
.. note::
This is currently a work-in-progress placeholder for some notes
- on how to style the BeagleBoard Documenation Project.
+ on how to style the BeagleBoard Documentation Project.
See the `Zephyr Project Documentation Guidelines <https://docs.zephyrproject.org/latest/contribute/documentation/guidelines.html>`__ as a starting point.
diff --git a/intro/index.rst b/intro/index.rst
index 8001002d4a5959de10a5989b680e70d44a462bd2..5dad0f9ab3505beaa0509bb622dfd9133eb08066 100644
--- a/intro/index.rst
+++ b/intro/index.rst
@@ -16,7 +16,7 @@ and engage the developer community.
Don't forget that this is an open-source project! Your contributions are welcome. Learn about how
to contribute to the BeagleBoard documentation project and any of the many open-source Beagle
-projects on-going on our :ref:`contribution` page.
+projects ongoing on our :ref:`contribution` page.
.. toctree::
:maxdepth: 2
diff --git a/intro/support/getting-started.rst b/intro/support/getting-started.rst
index a1890993c5349fb0df613057025c32a6efb436dd..7428e3dc2e740cce76c47e2df9ebfcfcb574a88f 100644
--- a/intro/support/getting-started.rst
+++ b/intro/support/getting-started.rst
@@ -15,13 +15,13 @@ but executing this step, the longest step, will ensure the rest will go as smoot
Download the latest software image
============================================
-Download the lastest Debian image from `beagleboard.org/latest-images <https://beagleboard.org/latest-images>`_.
+Download the latest Debian image from `beagleboard.org/latest-images <https://beagleboard.org/latest-images>`_.
The "IoT" images provide more free disk space if you don't need to use a graphical user interface (GUI).
.. NOTE::
Due to sizing necessities, this download may take 30 minutes or more.
-The Debian distribution is provied for the boards. The file you download will have an .img.xz extension.
+The Debian distribution is provided for the boards. The file you download will have an .img.xz extension.
This is a compressed sector-by-sector image of the SD card.
|image0|
@@ -190,7 +190,7 @@ an older operating system or need additional drivers for serial access to older
For Windows (64-bit):
1. Windows Driver Certification warning may pop up two or three times. Click "Ignore", "Install" or "Run".
- 2. To check if you're running 32 or 64-bit Windows see this: `support.microsoft.com/kb/827218 <https://support.microsoft.com/kb/827218>`_.
+ 2. To check if you're running 32 or 64-bit Windows see `this <https://support.microsoft.com/en-us/topic/determine-whether-your-computer-is-running-a-32-bit-version-or-64-bit-version-of-the-windows-operating-system-1b03ca69-ac5e-4b04-827b-c0c47145944b>`_.
3. On systems without the latest service release, you may get an error (0xc000007b). In that case, please install the following and retry: https://www.microsoft.com/en-us/download/confirmation.aspx?id=13523
4. You may need to reboot Windows.
5. These drivers have been tested to work up to Windows 10
@@ -198,7 +198,7 @@ an older operating system or need additional drivers for serial access to older
Additional FTDI USB to serial/JTAG information and drivers are available from https://www.ftdichip.com/Drivers/VCP.htm
- Additional USB to virtual Ethernet information and drivers are available from https://www.linux-usb.org/gadget/ and https://joshuawise.com/horndis
+ Additional USB to virtual Ethernet information and drivers are available from http://www.linux-usb.org/gadget/ and https://joshuawise.com/horndis
Visit https://beagleboard.org/support for additional debugging tips.
diff --git a/projects/bb-config/features.rst b/projects/bb-config/features.rst
index 4786467aa6a215eccceadab4465c741170ed8d22..855f194863e53710c2fa27195de566c1dfd16488 100644
--- a/projects/bb-config/features.rst
+++ b/projects/bb-config/features.rst
@@ -157,7 +157,7 @@ Hardware Display
:alt: pinmux hardware
-Pin Table Refernce
+Pin Table References
--------------------
.. image:: images/pinmux2.png
:align: center
diff --git a/projects/simppru/basics.rst b/projects/simppru/basics.rst
index 3939f88d0d4b12b24061ebf081fee4a5c849d132..f2719d5dc670496e4e09563b3ca758d5095fbf8c 100644
--- a/projects/simppru/basics.rst
+++ b/projects/simppru/basics.rst
@@ -35,7 +35,7 @@ What is simpPRU
- simpPRU is a procedural programming language.
- It is a statically typed language. Variables and functions must be
assigned data types during compilation.
-- It is typesafe, and data types of variables are decided during
+- It is type-safe, and data types of variables are decided during
compilation.
- simpPRU codes have a ``.sim`` extension.
- simpPRU provides a console app to use Remoteproc functionality.
\ No newline at end of file
diff --git a/projects/simppru/examples/button_click_rpmsg.rst b/projects/simppru/examples/button_click_rpmsg.rst
index ac10f3f399e52bad8faa98c256338961bbe08b5d..35b89f25effeef05231b72dbbf48a895e3a7f05f 100644
--- a/projects/simppru/examples/button_click_rpmsg.rst
+++ b/projects/simppru/examples/button_click_rpmsg.rst
@@ -27,7 +27,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
``init_message_channel`` is needed to setup communication channel
diff --git a/projects/simppru/examples/delay.rst b/projects/simppru/examples/delay.rst
index 2f04b3bb8e1c55423179e7e04fca4d66ec2f1a96..6e5f61d9f933f353c65320b2d3bb68589e9cbb44 100644
--- a/projects/simppru/examples/delay.rst
+++ b/projects/simppru/examples/delay.rst
@@ -22,7 +22,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code snippet writes HIGH to header pin P1_31, then waits for 2000ms
diff --git a/projects/simppru/examples/digital_read.rst b/projects/simppru/examples/digital_read.rst
index 9563db3a849fab8cb2a217fe1284c7e2b290753d..85c81127176858c43cfba9145ca4d01dd26cec78 100644
--- a/projects/simppru/examples/digital_read.rst
+++ b/projects/simppru/examples/digital_read.rst
@@ -24,7 +24,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs a never ending loop, since it is ``while : true``. Inside
diff --git a/projects/simppru/examples/digital_write.rst b/projects/simppru/examples/digital_write.rst
index 154ad1b1d5ea474ee2ea7a2f8b2f178f4da69384..a5fca9c85cf8e7ba542b015344a75b0a05c92a6d 100644
--- a/projects/simppru/examples/digital_write.rst
+++ b/projects/simppru/examples/digital_write.rst
@@ -19,7 +19,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs a never ending loop, since it is ``while : true``. Inside
diff --git a/projects/simppru/examples/hcsr04_example_rpmsg.rst b/projects/simppru/examples/hcsr04_example_rpmsg.rst
index 4f54acc201afa93194cc98d000e6b68aaa0b877a..d7b4aebd02650c21cb0c2c702731d128f663f9ef 100644
--- a/projects/simppru/examples/hcsr04_example_rpmsg.rst
+++ b/projects/simppru/examples/hcsr04_example_rpmsg.rst
@@ -64,7 +64,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
.. |image0| image:: images/hcsr04_pocket_beagle.png
diff --git a/projects/simppru/examples/hcsr04_sensor.rst b/projects/simppru/examples/hcsr04_sensor.rst
index f2005a9c024a1de79f0296144f29039197acddff..3edf2419243cbfb8c1f586f1b7e1aa87ca018861 100644
--- a/projects/simppru/examples/hcsr04_sensor.rst
+++ b/projects/simppru/examples/hcsr04_sensor.rst
@@ -68,7 +68,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
.. |image0| image:: images/hcsr04_pocket_beagle.png
diff --git a/projects/simppru/examples/led_blink.rst b/projects/simppru/examples/led_blink.rst
index 28f49776d6436afad17d1efdd76cc9c1c4858228..d79d581d49462b57d6cac840f8810922c81994e6 100644
--- a/projects/simppru/examples/led_blink.rst
+++ b/projects/simppru/examples/led_blink.rst
@@ -22,7 +22,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs a never ending loop, since it is ``while : true``. Inside
diff --git a/projects/simppru/examples/led_blink_button.rst b/projects/simppru/examples/led_blink_button.rst
index 915a813eb03f41b3fea488329b619a03467df827..0c88c935b0447b5d6df589d64278982368bdcfba 100644
--- a/projects/simppru/examples/led_blink_button.rst
+++ b/projects/simppru/examples/led_blink_button.rst
@@ -24,7 +24,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs a never ending loop, since it is ``while : true``. Inside
diff --git a/projects/simppru/examples/led_blink_counter.rst b/projects/simppru/examples/led_blink_counter.rst
index 3719694e21a3531b0b195ccd3dd52e8eec5e3e83..886e04175956fea80eee94d23a9f5e042c0c6861 100644
--- a/projects/simppru/examples/led_blink_counter.rst
+++ b/projects/simppru/examples/led_blink_counter.rst
@@ -29,7 +29,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs a never ending while loop, since it is ``while : true``.
diff --git a/projects/simppru/examples/led_blink_for.rst b/projects/simppru/examples/led_blink_for.rst
index 18a774cb76f922fd886223f3ca71d5779a38aef4..b1b7ee748b0396e04402e082fdd7e07a58b9d359 100644
--- a/projects/simppru/examples/led_blink_for.rst
+++ b/projects/simppru/examples/led_blink_for.rst
@@ -22,7 +22,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs for loop with 10 iterations, Inside ``for`` it sets
diff --git a/projects/simppru/examples/led_blink_while.rst b/projects/simppru/examples/led_blink_while.rst
index 4576780055edc94901dc69ac3fa1e34059643199..55059afb8748c22c9d285ab0c6fb8e4cf5cefdeb 100644
--- a/projects/simppru/examples/led_blink_while.rst
+++ b/projects/simppru/examples/led_blink_while.rst
@@ -22,7 +22,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
This code runs a never ending while loop, since it is ``while : true``.
diff --git a/projects/simppru/examples/read_counter.rst b/projects/simppru/examples/read_counter.rst
index a9e2c1932648a655a8cefc1b829d8cc1180f6a67..94411118b5b9866a682a66e447d1a3f597ab4564 100644
--- a/projects/simppru/examples/read_counter.rst
+++ b/projects/simppru/examples/read_counter.rst
@@ -15,7 +15,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
Since, PRU's hardware counter works at 200 MHz, it counts upto 2 x 108
diff --git a/projects/simppru/examples/rpmsg_example.rst b/projects/simppru/examples/rpmsg_example.rst
index 951f0fa2eec82265145b8c6cf99e9c137c31ad6b..2ff85ec8c47980424fc4d2562b6b7f8547d6eb71 100644
--- a/projects/simppru/examples/rpmsg_example.rst
+++ b/projects/simppru/examples/rpmsg_example.rst
@@ -19,7 +19,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
PRU has a functionality to communicate with the ARM core, it is called
diff --git a/projects/simppru/examples/rpmsg_pru_calculator.rst b/projects/simppru/examples/rpmsg_pru_calculator.rst
index 5449f1de3c864051b85b263f33d8a65c0f6d36ae..0f78d5b514d57c8b6ceeab4af1d84ca74bde86dd 100644
--- a/projects/simppru/examples/rpmsg_pru_calculator.rst
+++ b/projects/simppru/examples/rpmsg_pru_calculator.rst
@@ -39,7 +39,7 @@ Code
- Following code works on PocketBeagle, to use on other boards, please
change the pins accordingly.
-Explaination
+Explanation
------------
``init_message_channel();`` starts the message channel for communication
diff --git a/projects/simppru/io.rst b/projects/simppru/io.rst
index fe2e84102b1ea9c1e043b0fdb5e52e7163db3a2d..421fc76b7fe54dcfdc44c413549a31de8ecdbc6f 100644
--- a/projects/simppru/io.rst
+++ b/projects/simppru/io.rst
@@ -5,7 +5,7 @@ IO Functions
its value equal to respective R30/R31 register bit
- Example: ``P1_20`` is an constant integer variable with value
- ``16``, similary ``P1_02`` is an constant integer variable with
+ ``16``, similarly ``P1_02`` is an constant integer variable with
value ``9``
Digital Write
@@ -159,7 +159,7 @@ Syntax
``start_counter()``
-Paramters
+Parameters
^^^^^^^^^
- n/a
@@ -194,7 +194,7 @@ Syntax
.. _paramters-1:
-Paramters
+Parameters
^^^^^^^^^
- n/a
@@ -342,9 +342,9 @@ Example
init_message_channel();
- int emp := receive_message();
+ int temp := receive_message();
- if : emp >= 0 {
+ if : temp >= 0 {
digital_write(P1_29, true);
}
else {
diff --git a/projects/simppru/language.rst b/projects/simppru/language.rst
index 0dc4895b786aa35e918d0ef952a7f11f0f5dcda8..815a88196a1e15524f50690610fbb0e86f4a98ad 100644
--- a/projects/simppru/language.rst
+++ b/projects/simppru/language.rst
@@ -4,7 +4,7 @@ Language Syntax
- simpPRU is a procedural programming language.
- It is a statically typed language. Variables and functions must be
assigned data types during compilation.
-- It is typesafe, and data types of variables are decided during
+- It is type-safe, and data types of variables are decided during
compilation.
- simPRU codes have a ``.sim`` extension.
@@ -551,7 +551,7 @@ statements.
}
}
-- **Correct** : ``return`` is not inside compound statments, It should be placed only at the end of function definition
+- **Correct** : ``return`` is not inside compound statements, It should be placed only at the end of function definition
.. code:: python