From b77a5e0aece091bb3bfa87a49d624211d3f0791a Mon Sep 17 00:00:00 2001
From: vauban353 <vauban353@gmail.com>
Date: Sun, 6 Mar 2022 10:02:36 +0000
Subject: [PATCH] Clean-up: Remove unused TCL scripts.
---
script_support/B_V_F_recursive.tcl | 9 -
script_support/components/COREI2C.tcl | 20 -
script_support/components/COREPWM_C0.tcl | 144 --
script_support/components/CoreUARTapb_C0.tcl | 16 -
script_support/components/DMA_CONTROLLER.tcl | 88 --
script_support/components/DMA_INITIATOR.tcl | 1461 ------------------
script_support/components/GPIO.tcl | 138 --
script_support/components/MSS_LSRAM.tcl | 27 -
script_support/components/PCIE_LSRAM.tcl | 27 -
script_support/components/PF_CCC_C0.tcl | 248 ---
10 files changed, 2178 deletions(-)
delete mode 100644 script_support/components/COREI2C.tcl
delete mode 100644 script_support/components/COREPWM_C0.tcl
delete mode 100644 script_support/components/CoreUARTapb_C0.tcl
delete mode 100644 script_support/components/DMA_CONTROLLER.tcl
delete mode 100644 script_support/components/DMA_INITIATOR.tcl
delete mode 100644 script_support/components/GPIO.tcl
delete mode 100644 script_support/components/MSS_LSRAM.tcl
delete mode 100644 script_support/components/PCIE_LSRAM.tcl
delete mode 100644 script_support/components/PF_CCC_C0.tcl
diff --git a/script_support/B_V_F_recursive.tcl b/script_support/B_V_F_recursive.tcl
index 3735011..73cc55f 100644
--- a/script_support/B_V_F_recursive.tcl
+++ b/script_support/B_V_F_recursive.tcl
@@ -12,22 +12,13 @@ source script_support/components/INIT_MONITOR.tcl
source script_support/components/PCIE_INITIATOR.tcl
source script_support/components/FIC0_INITIATOR.tcl
source script_support/components/CLK_DIV.tcl
-source script_support/components/PF_CCC_C0.tcl
source script_support/components/RECONFIGURATION_INTERFACE.tcl
source script_support/components/GLITCHLESS_MUX.tcl
source script_support/components/PF_PCIE_C0.tcl
source script_support/components/TRANSMIT_PLL.tcl
source script_support/components/PCIE_REF_CLK.tcl
-source script_support/components/PCIE_LSRAM.tcl
-source script_support/components/MSS_LSRAM.tcl
-source script_support/components/DMA_CONTROLLER.tcl
-source script_support/components/DMA_INITIATOR.tcl
-source script_support/components/GPIO.tcl
source script_support/components/FIC3_INITIATOR.tcl
source script_support/components/OSCILLATOR_160MHz.tcl
-source script_support/components/COREPWM_C0.tcl
-source script_support/components/COREI2C.tcl
-source script_support/components/CoreUARTapb_C0.tcl
source script_support/components/ADC_MCLK_CCC.tcl
source script_support/components/CLOCKS_AND_RESETS.tcl
source script_support/components/IHC_APB.tcl
diff --git a/script_support/components/COREI2C.tcl b/script_support/components/COREI2C.tcl
deleted file mode 100644
index be19a17..0000000
--- a/script_support/components/COREI2C.tcl
+++ /dev/null
@@ -1,20 +0,0 @@
-# Exporting Component Description of COREI2C_C0 to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component COREI2C_C0
-create_and_configure_core -core_vlnv {Actel:DirectCore:COREI2C:7.2.101} -component_name {COREI2C_C0} -params {\
-"ADD_SLAVE1_ADDRESS_EN:false" \
-"BAUD_RATE_FIXED:false" \
-"BAUD_RATE_VALUE:0" \
-"BCLK_ENABLED:false" \
-"FIXED_SLAVE0_ADDR_EN:false" \
-"FIXED_SLAVE0_ADDR_VALUE:0x0" \
-"FIXED_SLAVE1_ADDR_EN:false" \
-"FIXED_SLAVE1_ADDR_VALUE:0x0" \
-"FREQUENCY:30" \
-"GLITCHREG_NUM:3" \
-"I2C_NUM:1" \
-"IPMI_EN:false" \
-"OPERATING_MODE:0" \
-"SMB_EN:false" }
-# Exporting Component Description of COREI2C_C0 to TCL done
diff --git a/script_support/components/COREPWM_C0.tcl b/script_support/components/COREPWM_C0.tcl
deleted file mode 100644
index 179c132..0000000
--- a/script_support/components/COREPWM_C0.tcl
+++ /dev/null
@@ -1,144 +0,0 @@
-# Exporting Component Description of corepwm_C0 to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component corepwm_C0
-create_and_configure_core -core_vlnv {Actel:DirectCore:corepwm:4.5.100} -component_name {corepwm_C0} -params {\
-"APB_DWIDTH:32" \
-"CONFIG_MODE:0" \
-"DAC_MODE1:false" \
-"DAC_MODE2:false" \
-"DAC_MODE3:false" \
-"DAC_MODE4:false" \
-"DAC_MODE5:false" \
-"DAC_MODE6:false" \
-"DAC_MODE7:false" \
-"DAC_MODE8:false" \
-"DAC_MODE9:false" \
-"DAC_MODE10:false" \
-"DAC_MODE11:false" \
-"DAC_MODE12:false" \
-"DAC_MODE13:false" \
-"DAC_MODE14:false" \
-"DAC_MODE15:false" \
-"DAC_MODE16:false" \
-"FIXED_PERIOD:1" \
-"FIXED_PERIOD_EN:false" \
-"FIXED_PRESCALE:0" \
-"FIXED_PRESCALE_EN:false" \
-"FIXED_PWM_NEG_EN1:false" \
-"FIXED_PWM_NEG_EN2:false" \
-"FIXED_PWM_NEG_EN3:false" \
-"FIXED_PWM_NEG_EN4:false" \
-"FIXED_PWM_NEG_EN5:false" \
-"FIXED_PWM_NEG_EN6:false" \
-"FIXED_PWM_NEG_EN7:false" \
-"FIXED_PWM_NEG_EN8:false" \
-"FIXED_PWM_NEG_EN9:false" \
-"FIXED_PWM_NEG_EN10:false" \
-"FIXED_PWM_NEG_EN11:false" \
-"FIXED_PWM_NEG_EN12:false" \
-"FIXED_PWM_NEG_EN13:false" \
-"FIXED_PWM_NEG_EN14:false" \
-"FIXED_PWM_NEG_EN15:false" \
-"FIXED_PWM_NEG_EN16:false" \
-"FIXED_PWM_NEGEDGE1:0" \
-"FIXED_PWM_NEGEDGE2:0" \
-"FIXED_PWM_NEGEDGE3:0" \
-"FIXED_PWM_NEGEDGE4:0" \
-"FIXED_PWM_NEGEDGE5:0" \
-"FIXED_PWM_NEGEDGE6:0" \
-"FIXED_PWM_NEGEDGE7:0" \
-"FIXED_PWM_NEGEDGE8:0" \
-"FIXED_PWM_NEGEDGE9:0" \
-"FIXED_PWM_NEGEDGE10:0" \
-"FIXED_PWM_NEGEDGE11:0" \
-"FIXED_PWM_NEGEDGE12:0" \
-"FIXED_PWM_NEGEDGE13:0" \
-"FIXED_PWM_NEGEDGE14:0" \
-"FIXED_PWM_NEGEDGE15:0" \
-"FIXED_PWM_NEGEDGE16:0" \
-"FIXED_PWM_POS_EN1:false" \
-"FIXED_PWM_POS_EN2:true" \
-"FIXED_PWM_POS_EN3:true" \
-"FIXED_PWM_POS_EN4:true" \
-"FIXED_PWM_POS_EN5:true" \
-"FIXED_PWM_POS_EN6:true" \
-"FIXED_PWM_POS_EN7:true" \
-"FIXED_PWM_POS_EN8:true" \
-"FIXED_PWM_POS_EN9:true" \
-"FIXED_PWM_POS_EN10:true" \
-"FIXED_PWM_POS_EN11:true" \
-"FIXED_PWM_POS_EN12:true" \
-"FIXED_PWM_POS_EN13:true" \
-"FIXED_PWM_POS_EN14:true" \
-"FIXED_PWM_POS_EN15:true" \
-"FIXED_PWM_POS_EN16:true" \
-"FIXED_PWM_POSEDGE1:0" \
-"FIXED_PWM_POSEDGE2:0" \
-"FIXED_PWM_POSEDGE3:0" \
-"FIXED_PWM_POSEDGE4:0" \
-"FIXED_PWM_POSEDGE5:0" \
-"FIXED_PWM_POSEDGE6:0" \
-"FIXED_PWM_POSEDGE7:0" \
-"FIXED_PWM_POSEDGE8:0" \
-"FIXED_PWM_POSEDGE9:0" \
-"FIXED_PWM_POSEDGE10:0" \
-"FIXED_PWM_POSEDGE11:0" \
-"FIXED_PWM_POSEDGE12:0" \
-"FIXED_PWM_POSEDGE13:0" \
-"FIXED_PWM_POSEDGE14:0" \
-"FIXED_PWM_POSEDGE15:0" \
-"FIXED_PWM_POSEDGE16:0" \
-"PWM_NUM:1" \
-"PWM_STRETCH_VALUE1:false" \
-"PWM_STRETCH_VALUE2:false" \
-"PWM_STRETCH_VALUE3:false" \
-"PWM_STRETCH_VALUE4:false" \
-"PWM_STRETCH_VALUE5:false" \
-"PWM_STRETCH_VALUE6:false" \
-"PWM_STRETCH_VALUE7:false" \
-"PWM_STRETCH_VALUE8:false" \
-"PWM_STRETCH_VALUE9:false" \
-"PWM_STRETCH_VALUE10:false" \
-"PWM_STRETCH_VALUE11:false" \
-"PWM_STRETCH_VALUE12:false" \
-"PWM_STRETCH_VALUE13:false" \
-"PWM_STRETCH_VALUE14:false" \
-"PWM_STRETCH_VALUE15:false" \
-"PWM_STRETCH_VALUE16:false" \
-"SEPARATE_PWM_CLK:false" \
-"SHADOW_REG_EN1:false" \
-"SHADOW_REG_EN2:false" \
-"SHADOW_REG_EN3:false" \
-"SHADOW_REG_EN4:false" \
-"SHADOW_REG_EN5:false" \
-"SHADOW_REG_EN6:false" \
-"SHADOW_REG_EN7:false" \
-"SHADOW_REG_EN8:false" \
-"SHADOW_REG_EN9:false" \
-"SHADOW_REG_EN10:false" \
-"SHADOW_REG_EN11:false" \
-"SHADOW_REG_EN12:false" \
-"SHADOW_REG_EN13:false" \
-"SHADOW_REG_EN14:false" \
-"SHADOW_REG_EN15:false" \
-"SHADOW_REG_EN16:false" \
-"TACH_EDGE1:false" \
-"TACH_EDGE2:false" \
-"TACH_EDGE3:false" \
-"TACH_EDGE4:false" \
-"TACH_EDGE5:false" \
-"TACH_EDGE6:false" \
-"TACH_EDGE7:false" \
-"TACH_EDGE8:false" \
-"TACH_EDGE9:false" \
-"TACH_EDGE10:false" \
-"TACH_EDGE11:false" \
-"TACH_EDGE12:false" \
-"TACH_EDGE13:false" \
-"TACH_EDGE14:false" \
-"TACH_EDGE15:false" \
-"TACH_EDGE16:false" \
-"TACH_NUM:1" \
-"TACHINT_ACT_LEVEL:false" }
-# Exporting Component Description of corepwm_C0 to TCL done
diff --git a/script_support/components/CoreUARTapb_C0.tcl b/script_support/components/CoreUARTapb_C0.tcl
deleted file mode 100644
index 7d98286..0000000
--- a/script_support/components/CoreUARTapb_C0.tcl
+++ /dev/null
@@ -1,16 +0,0 @@
-# Exporting Component Description of CoreUARTapb_C0 to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component CoreUARTapb_C0
-create_and_configure_core -core_vlnv {Actel:DirectCore:CoreUARTapb:5.7.100} -component_name {CoreUARTapb_C0} -params {\
-"BAUD_VAL_FRCTN:0" \
-"BAUD_VAL_FRCTN_EN:false" \
-"BAUD_VALUE:1" \
-"FIXEDMODE:0" \
-"PRG_BIT8:0" \
-"PRG_PARITY:0" \
-"RX_FIFO:0" \
-"RX_LEGACY_MODE:0" \
-"TX_FIFO:0" \
-"USE_SOFT_FIFO:0" }
-# Exporting Component Description of CoreUARTapb_C0 to TCL done
diff --git a/script_support/components/DMA_CONTROLLER.tcl b/script_support/components/DMA_CONTROLLER.tcl
deleted file mode 100644
index 0667797..0000000
--- a/script_support/components/DMA_CONTROLLER.tcl
+++ /dev/null
@@ -1,88 +0,0 @@
-# Exporting Component Description of DMA_CONTROLLER to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component DMA_CONTROLLER
-create_and_configure_core -core_vlnv {Actel:DirectCore:COREAXI4DMACONTROLLER:2.0.100} -component_name {DMA_CONTROLLER} -params {\
-"AXI4_STREAM_IF:false" \
-"AXI_DMA_DWIDTH:32" \
-"DSCRPTR_0_INT_ASSOC:0" \
-"DSCRPTR_0_PRI_LVL:0" \
-"DSCRPTR_1_INT_ASSOC:0" \
-"DSCRPTR_1_PRI_LVL:0" \
-"DSCRPTR_2_INT_ASSOC:0" \
-"DSCRPTR_2_PRI_LVL:0" \
-"DSCRPTR_3_INT_ASSOC:0" \
-"DSCRPTR_3_PRI_LVL:0" \
-"DSCRPTR_4_INT_ASSOC:0" \
-"DSCRPTR_4_PRI_LVL:0" \
-"DSCRPTR_5_INT_ASSOC:0" \
-"DSCRPTR_5_PRI_LVL:0" \
-"DSCRPTR_6_INT_ASSOC:0" \
-"DSCRPTR_6_PRI_LVL:0" \
-"DSCRPTR_7_INT_ASSOC:0" \
-"DSCRPTR_7_PRI_LVL:0" \
-"DSCRPTR_8_INT_ASSOC:0" \
-"DSCRPTR_8_PRI_LVL:0" \
-"DSCRPTR_9_INT_ASSOC:0" \
-"DSCRPTR_9_PRI_LVL:0" \
-"DSCRPTR_10_INT_ASSOC:0" \
-"DSCRPTR_10_PRI_LVL:0" \
-"DSCRPTR_11_INT_ASSOC:0" \
-"DSCRPTR_11_PRI_LVL:0" \
-"DSCRPTR_12_INT_ASSOC:0" \
-"DSCRPTR_12_PRI_LVL:0" \
-"DSCRPTR_13_INT_ASSOC:0" \
-"DSCRPTR_13_PRI_LVL:0" \
-"DSCRPTR_14_INT_ASSOC:0" \
-"DSCRPTR_14_PRI_LVL:0" \
-"DSCRPTR_15_INT_ASSOC:0" \
-"DSCRPTR_15_PRI_LVL:0" \
-"DSCRPTR_16_INT_ASSOC:0" \
-"DSCRPTR_16_PRI_LVL:0" \
-"DSCRPTR_17_INT_ASSOC:0" \
-"DSCRPTR_17_PRI_LVL:0" \
-"DSCRPTR_18_INT_ASSOC:0" \
-"DSCRPTR_18_PRI_LVL:0" \
-"DSCRPTR_19_INT_ASSOC:0" \
-"DSCRPTR_19_PRI_LVL:0" \
-"DSCRPTR_20_INT_ASSOC:0" \
-"DSCRPTR_20_PRI_LVL:0" \
-"DSCRPTR_21_INT_ASSOC:0" \
-"DSCRPTR_21_PRI_LVL:0" \
-"DSCRPTR_22_INT_ASSOC:0" \
-"DSCRPTR_22_PRI_LVL:0" \
-"DSCRPTR_23_INT_ASSOC:0" \
-"DSCRPTR_23_PRI_LVL:0" \
-"DSCRPTR_24_INT_ASSOC:0" \
-"DSCRPTR_24_PRI_LVL:0" \
-"DSCRPTR_25_INT_ASSOC:0" \
-"DSCRPTR_25_PRI_LVL:0" \
-"DSCRPTR_26_INT_ASSOC:0" \
-"DSCRPTR_26_PRI_LVL:0" \
-"DSCRPTR_27_INT_ASSOC:0" \
-"DSCRPTR_27_PRI_LVL:0" \
-"DSCRPTR_28_INT_ASSOC:0" \
-"DSCRPTR_28_PRI_LVL:0" \
-"DSCRPTR_29_INT_ASSOC:0" \
-"DSCRPTR_29_PRI_LVL:0" \
-"DSCRPTR_30_INT_ASSOC:0" \
-"DSCRPTR_30_PRI_LVL:0" \
-"DSCRPTR_31_INT_ASSOC:0" \
-"DSCRPTR_31_PRI_LVL:0" \
-"ID_WIDTH:8" \
-"INT_0_QUEUE_DEPTH:1" \
-"INT_1_QUEUE_DEPTH:1" \
-"INT_2_QUEUE_DEPTH:1" \
-"INT_3_QUEUE_DEPTH:1" \
-"NUM_INT_BDS:4" \
-"NUM_OF_INTS:1" \
-"NUM_PRI_LVLS:1" \
-"PRI_0_NUM_OF_BEATS:256" \
-"PRI_1_NUM_OF_BEATS:128" \
-"PRI_2_NUM_OF_BEATS:64" \
-"PRI_3_NUM_OF_BEATS:32" \
-"PRI_4_NUM_OF_BEATS:16" \
-"PRI_5_NUM_OF_BEATS:8" \
-"PRI_6_NUM_OF_BEATS:4" \
-"PRI_7_NUM_OF_BEATS:1" }
-# Exporting Component Description of DMACONTROLLER to TCL done
diff --git a/script_support/components/DMA_INITIATOR.tcl b/script_support/components/DMA_INITIATOR.tcl
deleted file mode 100644
index 188305d..0000000
--- a/script_support/components/DMA_INITIATOR.tcl
+++ /dev/null
@@ -1,1461 +0,0 @@
-# Exporting Component Description of DMA_INITIATOR to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component DMA_INITIATOR
-create_and_configure_core -core_vlnv {Actel:DirectCore:COREAXI4INTERCONNECT:2.8.103} -component_name {DMA_INITIATOR} -params {\
-"ADDR_WIDTH:32" \
-"CROSSBAR_MODE:0" \
-"DATA_WIDTH:64" \
-"DWC_ADDR_FIFO_DEPTH_CEILING:64" \
-"ID_WIDTH:8" \
-"MASTER0_CHAN_RS:true" \
-"MASTER0_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER0_DATA_WIDTH:32" \
-"MASTER0_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER0_READ_INTERLEAVE:false" \
-"MASTER0_READ_SLAVE0:true" \
-"MASTER0_READ_SLAVE1:true" \
-"MASTER0_READ_SLAVE2:true" \
-"MASTER0_READ_SLAVE3:true" \
-"MASTER0_READ_SLAVE4:true" \
-"MASTER0_READ_SLAVE5:true" \
-"MASTER0_READ_SLAVE6:true" \
-"MASTER0_READ_SLAVE7:true" \
-"MASTER0_READ_SLAVE8:true" \
-"MASTER0_READ_SLAVE9:true" \
-"MASTER0_READ_SLAVE10:true" \
-"MASTER0_READ_SLAVE11:true" \
-"MASTER0_READ_SLAVE12:true" \
-"MASTER0_READ_SLAVE13:true" \
-"MASTER0_READ_SLAVE14:true" \
-"MASTER0_READ_SLAVE15:true" \
-"MASTER0_READ_SLAVE16:true" \
-"MASTER0_READ_SLAVE17:true" \
-"MASTER0_READ_SLAVE18:true" \
-"MASTER0_READ_SLAVE19:true" \
-"MASTER0_READ_SLAVE20:true" \
-"MASTER0_READ_SLAVE21:true" \
-"MASTER0_READ_SLAVE22:true" \
-"MASTER0_READ_SLAVE23:true" \
-"MASTER0_READ_SLAVE24:true" \
-"MASTER0_READ_SLAVE25:true" \
-"MASTER0_READ_SLAVE26:true" \
-"MASTER0_READ_SLAVE27:true" \
-"MASTER0_READ_SLAVE28:true" \
-"MASTER0_READ_SLAVE29:true" \
-"MASTER0_READ_SLAVE30:true" \
-"MASTER0_READ_SLAVE31:true" \
-"MASTER0_TYPE:0" \
-"MASTER0_WRITE_SLAVE0:true" \
-"MASTER0_WRITE_SLAVE1:true" \
-"MASTER0_WRITE_SLAVE2:true" \
-"MASTER0_WRITE_SLAVE3:true" \
-"MASTER0_WRITE_SLAVE4:true" \
-"MASTER0_WRITE_SLAVE5:true" \
-"MASTER0_WRITE_SLAVE6:true" \
-"MASTER0_WRITE_SLAVE7:true" \
-"MASTER0_WRITE_SLAVE8:true" \
-"MASTER0_WRITE_SLAVE9:true" \
-"MASTER0_WRITE_SLAVE10:true" \
-"MASTER0_WRITE_SLAVE11:true" \
-"MASTER0_WRITE_SLAVE12:true" \
-"MASTER0_WRITE_SLAVE13:true" \
-"MASTER0_WRITE_SLAVE14:true" \
-"MASTER0_WRITE_SLAVE15:true" \
-"MASTER0_WRITE_SLAVE16:true" \
-"MASTER0_WRITE_SLAVE17:true" \
-"MASTER0_WRITE_SLAVE18:true" \
-"MASTER0_WRITE_SLAVE19:true" \
-"MASTER0_WRITE_SLAVE20:true" \
-"MASTER0_WRITE_SLAVE21:true" \
-"MASTER0_WRITE_SLAVE22:true" \
-"MASTER0_WRITE_SLAVE23:true" \
-"MASTER0_WRITE_SLAVE24:true" \
-"MASTER0_WRITE_SLAVE25:true" \
-"MASTER0_WRITE_SLAVE26:true" \
-"MASTER0_WRITE_SLAVE27:true" \
-"MASTER0_WRITE_SLAVE28:true" \
-"MASTER0_WRITE_SLAVE29:true" \
-"MASTER0_WRITE_SLAVE30:true" \
-"MASTER0_WRITE_SLAVE31:true" \
-"MASTER1_CHAN_RS:true" \
-"MASTER1_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER1_DATA_WIDTH:64" \
-"MASTER1_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER1_READ_INTERLEAVE:false" \
-"MASTER1_READ_SLAVE0:true" \
-"MASTER1_READ_SLAVE1:true" \
-"MASTER1_READ_SLAVE2:true" \
-"MASTER1_READ_SLAVE3:true" \
-"MASTER1_READ_SLAVE4:true" \
-"MASTER1_READ_SLAVE5:true" \
-"MASTER1_READ_SLAVE6:true" \
-"MASTER1_READ_SLAVE7:true" \
-"MASTER1_READ_SLAVE8:true" \
-"MASTER1_READ_SLAVE9:true" \
-"MASTER1_READ_SLAVE10:true" \
-"MASTER1_READ_SLAVE11:true" \
-"MASTER1_READ_SLAVE12:true" \
-"MASTER1_READ_SLAVE13:true" \
-"MASTER1_READ_SLAVE14:true" \
-"MASTER1_READ_SLAVE15:true" \
-"MASTER1_READ_SLAVE16:true" \
-"MASTER1_READ_SLAVE17:true" \
-"MASTER1_READ_SLAVE18:true" \
-"MASTER1_READ_SLAVE19:true" \
-"MASTER1_READ_SLAVE20:true" \
-"MASTER1_READ_SLAVE21:true" \
-"MASTER1_READ_SLAVE22:true" \
-"MASTER1_READ_SLAVE23:true" \
-"MASTER1_READ_SLAVE24:true" \
-"MASTER1_READ_SLAVE25:true" \
-"MASTER1_READ_SLAVE26:true" \
-"MASTER1_READ_SLAVE27:true" \
-"MASTER1_READ_SLAVE28:true" \
-"MASTER1_READ_SLAVE29:true" \
-"MASTER1_READ_SLAVE30:true" \
-"MASTER1_READ_SLAVE31:true" \
-"MASTER1_TYPE:0" \
-"MASTER1_WRITE_SLAVE0:true" \
-"MASTER1_WRITE_SLAVE1:true" \
-"MASTER1_WRITE_SLAVE2:true" \
-"MASTER1_WRITE_SLAVE3:true" \
-"MASTER1_WRITE_SLAVE4:true" \
-"MASTER1_WRITE_SLAVE5:true" \
-"MASTER1_WRITE_SLAVE6:true" \
-"MASTER1_WRITE_SLAVE7:true" \
-"MASTER1_WRITE_SLAVE8:true" \
-"MASTER1_WRITE_SLAVE9:true" \
-"MASTER1_WRITE_SLAVE10:true" \
-"MASTER1_WRITE_SLAVE11:true" \
-"MASTER1_WRITE_SLAVE12:true" \
-"MASTER1_WRITE_SLAVE13:true" \
-"MASTER1_WRITE_SLAVE14:true" \
-"MASTER1_WRITE_SLAVE15:true" \
-"MASTER1_WRITE_SLAVE16:true" \
-"MASTER1_WRITE_SLAVE17:true" \
-"MASTER1_WRITE_SLAVE18:true" \
-"MASTER1_WRITE_SLAVE19:true" \
-"MASTER1_WRITE_SLAVE20:true" \
-"MASTER1_WRITE_SLAVE21:true" \
-"MASTER1_WRITE_SLAVE22:true" \
-"MASTER1_WRITE_SLAVE23:true" \
-"MASTER1_WRITE_SLAVE24:true" \
-"MASTER1_WRITE_SLAVE25:true" \
-"MASTER1_WRITE_SLAVE26:true" \
-"MASTER1_WRITE_SLAVE27:true" \
-"MASTER1_WRITE_SLAVE28:true" \
-"MASTER1_WRITE_SLAVE29:true" \
-"MASTER1_WRITE_SLAVE30:true" \
-"MASTER1_WRITE_SLAVE31:true" \
-"MASTER2_CHAN_RS:true" \
-"MASTER2_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER2_DATA_WIDTH:64" \
-"MASTER2_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER2_READ_INTERLEAVE:false" \
-"MASTER2_READ_SLAVE0:true" \
-"MASTER2_READ_SLAVE1:true" \
-"MASTER2_READ_SLAVE2:true" \
-"MASTER2_READ_SLAVE3:true" \
-"MASTER2_READ_SLAVE4:true" \
-"MASTER2_READ_SLAVE5:true" \
-"MASTER2_READ_SLAVE6:true" \
-"MASTER2_READ_SLAVE7:true" \
-"MASTER2_READ_SLAVE8:true" \
-"MASTER2_READ_SLAVE9:true" \
-"MASTER2_READ_SLAVE10:true" \
-"MASTER2_READ_SLAVE11:true" \
-"MASTER2_READ_SLAVE12:true" \
-"MASTER2_READ_SLAVE13:true" \
-"MASTER2_READ_SLAVE14:true" \
-"MASTER2_READ_SLAVE15:true" \
-"MASTER2_READ_SLAVE16:true" \
-"MASTER2_READ_SLAVE17:true" \
-"MASTER2_READ_SLAVE18:true" \
-"MASTER2_READ_SLAVE19:true" \
-"MASTER2_READ_SLAVE20:true" \
-"MASTER2_READ_SLAVE21:true" \
-"MASTER2_READ_SLAVE22:true" \
-"MASTER2_READ_SLAVE23:true" \
-"MASTER2_READ_SLAVE24:true" \
-"MASTER2_READ_SLAVE25:true" \
-"MASTER2_READ_SLAVE26:true" \
-"MASTER2_READ_SLAVE27:true" \
-"MASTER2_READ_SLAVE28:true" \
-"MASTER2_READ_SLAVE29:true" \
-"MASTER2_READ_SLAVE30:true" \
-"MASTER2_READ_SLAVE31:true" \
-"MASTER2_TYPE:0" \
-"MASTER2_WRITE_SLAVE0:true" \
-"MASTER2_WRITE_SLAVE1:true" \
-"MASTER2_WRITE_SLAVE2:true" \
-"MASTER2_WRITE_SLAVE3:true" \
-"MASTER2_WRITE_SLAVE4:true" \
-"MASTER2_WRITE_SLAVE5:true" \
-"MASTER2_WRITE_SLAVE6:true" \
-"MASTER2_WRITE_SLAVE7:true" \
-"MASTER2_WRITE_SLAVE8:true" \
-"MASTER2_WRITE_SLAVE9:true" \
-"MASTER2_WRITE_SLAVE10:true" \
-"MASTER2_WRITE_SLAVE11:true" \
-"MASTER2_WRITE_SLAVE12:true" \
-"MASTER2_WRITE_SLAVE13:true" \
-"MASTER2_WRITE_SLAVE14:true" \
-"MASTER2_WRITE_SLAVE15:true" \
-"MASTER2_WRITE_SLAVE16:true" \
-"MASTER2_WRITE_SLAVE17:true" \
-"MASTER2_WRITE_SLAVE18:true" \
-"MASTER2_WRITE_SLAVE19:true" \
-"MASTER2_WRITE_SLAVE20:true" \
-"MASTER2_WRITE_SLAVE21:true" \
-"MASTER2_WRITE_SLAVE22:true" \
-"MASTER2_WRITE_SLAVE23:true" \
-"MASTER2_WRITE_SLAVE24:true" \
-"MASTER2_WRITE_SLAVE25:true" \
-"MASTER2_WRITE_SLAVE26:true" \
-"MASTER2_WRITE_SLAVE27:true" \
-"MASTER2_WRITE_SLAVE28:true" \
-"MASTER2_WRITE_SLAVE29:true" \
-"MASTER2_WRITE_SLAVE30:true" \
-"MASTER2_WRITE_SLAVE31:true" \
-"MASTER3_CHAN_RS:true" \
-"MASTER3_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER3_DATA_WIDTH:64" \
-"MASTER3_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER3_READ_INTERLEAVE:false" \
-"MASTER3_READ_SLAVE0:true" \
-"MASTER3_READ_SLAVE1:true" \
-"MASTER3_READ_SLAVE2:true" \
-"MASTER3_READ_SLAVE3:true" \
-"MASTER3_READ_SLAVE4:true" \
-"MASTER3_READ_SLAVE5:true" \
-"MASTER3_READ_SLAVE6:true" \
-"MASTER3_READ_SLAVE7:true" \
-"MASTER3_READ_SLAVE8:true" \
-"MASTER3_READ_SLAVE9:true" \
-"MASTER3_READ_SLAVE10:true" \
-"MASTER3_READ_SLAVE11:true" \
-"MASTER3_READ_SLAVE12:true" \
-"MASTER3_READ_SLAVE13:true" \
-"MASTER3_READ_SLAVE14:true" \
-"MASTER3_READ_SLAVE15:true" \
-"MASTER3_READ_SLAVE16:true" \
-"MASTER3_READ_SLAVE17:true" \
-"MASTER3_READ_SLAVE18:true" \
-"MASTER3_READ_SLAVE19:true" \
-"MASTER3_READ_SLAVE20:true" \
-"MASTER3_READ_SLAVE21:true" \
-"MASTER3_READ_SLAVE22:true" \
-"MASTER3_READ_SLAVE23:true" \
-"MASTER3_READ_SLAVE24:true" \
-"MASTER3_READ_SLAVE25:true" \
-"MASTER3_READ_SLAVE26:true" \
-"MASTER3_READ_SLAVE27:true" \
-"MASTER3_READ_SLAVE28:true" \
-"MASTER3_READ_SLAVE29:true" \
-"MASTER3_READ_SLAVE30:true" \
-"MASTER3_READ_SLAVE31:true" \
-"MASTER3_TYPE:0" \
-"MASTER3_WRITE_SLAVE0:true" \
-"MASTER3_WRITE_SLAVE1:true" \
-"MASTER3_WRITE_SLAVE2:true" \
-"MASTER3_WRITE_SLAVE3:true" \
-"MASTER3_WRITE_SLAVE4:true" \
-"MASTER3_WRITE_SLAVE5:true" \
-"MASTER3_WRITE_SLAVE6:true" \
-"MASTER3_WRITE_SLAVE7:true" \
-"MASTER3_WRITE_SLAVE8:true" \
-"MASTER3_WRITE_SLAVE9:true" \
-"MASTER3_WRITE_SLAVE10:true" \
-"MASTER3_WRITE_SLAVE11:true" \
-"MASTER3_WRITE_SLAVE12:true" \
-"MASTER3_WRITE_SLAVE13:true" \
-"MASTER3_WRITE_SLAVE14:true" \
-"MASTER3_WRITE_SLAVE15:true" \
-"MASTER3_WRITE_SLAVE16:true" \
-"MASTER3_WRITE_SLAVE17:true" \
-"MASTER3_WRITE_SLAVE18:true" \
-"MASTER3_WRITE_SLAVE19:true" \
-"MASTER3_WRITE_SLAVE20:true" \
-"MASTER3_WRITE_SLAVE21:true" \
-"MASTER3_WRITE_SLAVE22:true" \
-"MASTER3_WRITE_SLAVE23:true" \
-"MASTER3_WRITE_SLAVE24:true" \
-"MASTER3_WRITE_SLAVE25:true" \
-"MASTER3_WRITE_SLAVE26:true" \
-"MASTER3_WRITE_SLAVE27:true" \
-"MASTER3_WRITE_SLAVE28:true" \
-"MASTER3_WRITE_SLAVE29:true" \
-"MASTER3_WRITE_SLAVE30:true" \
-"MASTER3_WRITE_SLAVE31:true" \
-"MASTER4_CHAN_RS:true" \
-"MASTER4_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER4_DATA_WIDTH:64" \
-"MASTER4_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER4_READ_INTERLEAVE:false" \
-"MASTER4_READ_SLAVE0:true" \
-"MASTER4_READ_SLAVE1:true" \
-"MASTER4_READ_SLAVE2:true" \
-"MASTER4_READ_SLAVE3:true" \
-"MASTER4_READ_SLAVE4:true" \
-"MASTER4_READ_SLAVE5:true" \
-"MASTER4_READ_SLAVE6:true" \
-"MASTER4_READ_SLAVE7:true" \
-"MASTER4_READ_SLAVE8:true" \
-"MASTER4_READ_SLAVE9:true" \
-"MASTER4_READ_SLAVE10:true" \
-"MASTER4_READ_SLAVE11:true" \
-"MASTER4_READ_SLAVE12:true" \
-"MASTER4_READ_SLAVE13:true" \
-"MASTER4_READ_SLAVE14:true" \
-"MASTER4_READ_SLAVE15:true" \
-"MASTER4_READ_SLAVE16:true" \
-"MASTER4_READ_SLAVE17:true" \
-"MASTER4_READ_SLAVE18:true" \
-"MASTER4_READ_SLAVE19:true" \
-"MASTER4_READ_SLAVE20:true" \
-"MASTER4_READ_SLAVE21:true" \
-"MASTER4_READ_SLAVE22:true" \
-"MASTER4_READ_SLAVE23:true" \
-"MASTER4_READ_SLAVE24:true" \
-"MASTER4_READ_SLAVE25:true" \
-"MASTER4_READ_SLAVE26:true" \
-"MASTER4_READ_SLAVE27:true" \
-"MASTER4_READ_SLAVE28:true" \
-"MASTER4_READ_SLAVE29:true" \
-"MASTER4_READ_SLAVE30:true" \
-"MASTER4_READ_SLAVE31:true" \
-"MASTER4_TYPE:0" \
-"MASTER4_WRITE_SLAVE0:true" \
-"MASTER4_WRITE_SLAVE1:true" \
-"MASTER4_WRITE_SLAVE2:true" \
-"MASTER4_WRITE_SLAVE3:true" \
-"MASTER4_WRITE_SLAVE4:true" \
-"MASTER4_WRITE_SLAVE5:true" \
-"MASTER4_WRITE_SLAVE6:true" \
-"MASTER4_WRITE_SLAVE7:true" \
-"MASTER4_WRITE_SLAVE8:true" \
-"MASTER4_WRITE_SLAVE9:true" \
-"MASTER4_WRITE_SLAVE10:true" \
-"MASTER4_WRITE_SLAVE11:true" \
-"MASTER4_WRITE_SLAVE12:true" \
-"MASTER4_WRITE_SLAVE13:true" \
-"MASTER4_WRITE_SLAVE14:true" \
-"MASTER4_WRITE_SLAVE15:true" \
-"MASTER4_WRITE_SLAVE16:true" \
-"MASTER4_WRITE_SLAVE17:true" \
-"MASTER4_WRITE_SLAVE18:true" \
-"MASTER4_WRITE_SLAVE19:true" \
-"MASTER4_WRITE_SLAVE20:true" \
-"MASTER4_WRITE_SLAVE21:true" \
-"MASTER4_WRITE_SLAVE22:true" \
-"MASTER4_WRITE_SLAVE23:true" \
-"MASTER4_WRITE_SLAVE24:true" \
-"MASTER4_WRITE_SLAVE25:true" \
-"MASTER4_WRITE_SLAVE26:true" \
-"MASTER4_WRITE_SLAVE27:true" \
-"MASTER4_WRITE_SLAVE28:true" \
-"MASTER4_WRITE_SLAVE29:true" \
-"MASTER4_WRITE_SLAVE30:true" \
-"MASTER4_WRITE_SLAVE31:true" \
-"MASTER5_CHAN_RS:true" \
-"MASTER5_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER5_DATA_WIDTH:64" \
-"MASTER5_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER5_READ_INTERLEAVE:false" \
-"MASTER5_READ_SLAVE0:true" \
-"MASTER5_READ_SLAVE1:true" \
-"MASTER5_READ_SLAVE2:true" \
-"MASTER5_READ_SLAVE3:true" \
-"MASTER5_READ_SLAVE4:true" \
-"MASTER5_READ_SLAVE5:true" \
-"MASTER5_READ_SLAVE6:true" \
-"MASTER5_READ_SLAVE7:true" \
-"MASTER5_READ_SLAVE8:true" \
-"MASTER5_READ_SLAVE9:true" \
-"MASTER5_READ_SLAVE10:true" \
-"MASTER5_READ_SLAVE11:true" \
-"MASTER5_READ_SLAVE12:true" \
-"MASTER5_READ_SLAVE13:true" \
-"MASTER5_READ_SLAVE14:true" \
-"MASTER5_READ_SLAVE15:true" \
-"MASTER5_READ_SLAVE16:true" \
-"MASTER5_READ_SLAVE17:true" \
-"MASTER5_READ_SLAVE18:true" \
-"MASTER5_READ_SLAVE19:true" \
-"MASTER5_READ_SLAVE20:true" \
-"MASTER5_READ_SLAVE21:true" \
-"MASTER5_READ_SLAVE22:true" \
-"MASTER5_READ_SLAVE23:true" \
-"MASTER5_READ_SLAVE24:true" \
-"MASTER5_READ_SLAVE25:true" \
-"MASTER5_READ_SLAVE26:true" \
-"MASTER5_READ_SLAVE27:true" \
-"MASTER5_READ_SLAVE28:true" \
-"MASTER5_READ_SLAVE29:true" \
-"MASTER5_READ_SLAVE30:true" \
-"MASTER5_READ_SLAVE31:true" \
-"MASTER5_TYPE:0" \
-"MASTER5_WRITE_SLAVE0:true" \
-"MASTER5_WRITE_SLAVE1:true" \
-"MASTER5_WRITE_SLAVE2:true" \
-"MASTER5_WRITE_SLAVE3:true" \
-"MASTER5_WRITE_SLAVE4:true" \
-"MASTER5_WRITE_SLAVE5:true" \
-"MASTER5_WRITE_SLAVE6:true" \
-"MASTER5_WRITE_SLAVE7:true" \
-"MASTER5_WRITE_SLAVE8:true" \
-"MASTER5_WRITE_SLAVE9:true" \
-"MASTER5_WRITE_SLAVE10:true" \
-"MASTER5_WRITE_SLAVE11:true" \
-"MASTER5_WRITE_SLAVE12:true" \
-"MASTER5_WRITE_SLAVE13:true" \
-"MASTER5_WRITE_SLAVE14:true" \
-"MASTER5_WRITE_SLAVE15:true" \
-"MASTER5_WRITE_SLAVE16:true" \
-"MASTER5_WRITE_SLAVE17:true" \
-"MASTER5_WRITE_SLAVE18:true" \
-"MASTER5_WRITE_SLAVE19:true" \
-"MASTER5_WRITE_SLAVE20:true" \
-"MASTER5_WRITE_SLAVE21:true" \
-"MASTER5_WRITE_SLAVE22:true" \
-"MASTER5_WRITE_SLAVE23:true" \
-"MASTER5_WRITE_SLAVE24:true" \
-"MASTER5_WRITE_SLAVE25:true" \
-"MASTER5_WRITE_SLAVE26:true" \
-"MASTER5_WRITE_SLAVE27:true" \
-"MASTER5_WRITE_SLAVE28:true" \
-"MASTER5_WRITE_SLAVE29:true" \
-"MASTER5_WRITE_SLAVE30:true" \
-"MASTER5_WRITE_SLAVE31:true" \
-"MASTER6_CHAN_RS:true" \
-"MASTER6_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER6_DATA_WIDTH:64" \
-"MASTER6_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER6_READ_INTERLEAVE:false" \
-"MASTER6_READ_SLAVE0:true" \
-"MASTER6_READ_SLAVE1:true" \
-"MASTER6_READ_SLAVE2:true" \
-"MASTER6_READ_SLAVE3:true" \
-"MASTER6_READ_SLAVE4:true" \
-"MASTER6_READ_SLAVE5:true" \
-"MASTER6_READ_SLAVE6:true" \
-"MASTER6_READ_SLAVE7:true" \
-"MASTER6_READ_SLAVE8:true" \
-"MASTER6_READ_SLAVE9:true" \
-"MASTER6_READ_SLAVE10:true" \
-"MASTER6_READ_SLAVE11:true" \
-"MASTER6_READ_SLAVE12:true" \
-"MASTER6_READ_SLAVE13:true" \
-"MASTER6_READ_SLAVE14:true" \
-"MASTER6_READ_SLAVE15:true" \
-"MASTER6_READ_SLAVE16:true" \
-"MASTER6_READ_SLAVE17:true" \
-"MASTER6_READ_SLAVE18:true" \
-"MASTER6_READ_SLAVE19:true" \
-"MASTER6_READ_SLAVE20:true" \
-"MASTER6_READ_SLAVE21:true" \
-"MASTER6_READ_SLAVE22:true" \
-"MASTER6_READ_SLAVE23:true" \
-"MASTER6_READ_SLAVE24:true" \
-"MASTER6_READ_SLAVE25:true" \
-"MASTER6_READ_SLAVE26:true" \
-"MASTER6_READ_SLAVE27:true" \
-"MASTER6_READ_SLAVE28:true" \
-"MASTER6_READ_SLAVE29:true" \
-"MASTER6_READ_SLAVE30:true" \
-"MASTER6_READ_SLAVE31:true" \
-"MASTER6_TYPE:0" \
-"MASTER6_WRITE_SLAVE0:true" \
-"MASTER6_WRITE_SLAVE1:true" \
-"MASTER6_WRITE_SLAVE2:true" \
-"MASTER6_WRITE_SLAVE3:true" \
-"MASTER6_WRITE_SLAVE4:true" \
-"MASTER6_WRITE_SLAVE5:true" \
-"MASTER6_WRITE_SLAVE6:true" \
-"MASTER6_WRITE_SLAVE7:true" \
-"MASTER6_WRITE_SLAVE8:true" \
-"MASTER6_WRITE_SLAVE9:true" \
-"MASTER6_WRITE_SLAVE10:true" \
-"MASTER6_WRITE_SLAVE11:true" \
-"MASTER6_WRITE_SLAVE12:true" \
-"MASTER6_WRITE_SLAVE13:true" \
-"MASTER6_WRITE_SLAVE14:true" \
-"MASTER6_WRITE_SLAVE15:true" \
-"MASTER6_WRITE_SLAVE16:true" \
-"MASTER6_WRITE_SLAVE17:true" \
-"MASTER6_WRITE_SLAVE18:true" \
-"MASTER6_WRITE_SLAVE19:true" \
-"MASTER6_WRITE_SLAVE20:true" \
-"MASTER6_WRITE_SLAVE21:true" \
-"MASTER6_WRITE_SLAVE22:true" \
-"MASTER6_WRITE_SLAVE23:true" \
-"MASTER6_WRITE_SLAVE24:true" \
-"MASTER6_WRITE_SLAVE25:true" \
-"MASTER6_WRITE_SLAVE26:true" \
-"MASTER6_WRITE_SLAVE27:true" \
-"MASTER6_WRITE_SLAVE28:true" \
-"MASTER6_WRITE_SLAVE29:true" \
-"MASTER6_WRITE_SLAVE30:true" \
-"MASTER6_WRITE_SLAVE31:true" \
-"MASTER7_CHAN_RS:true" \
-"MASTER7_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER7_DATA_WIDTH:64" \
-"MASTER7_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER7_READ_INTERLEAVE:false" \
-"MASTER7_READ_SLAVE0:true" \
-"MASTER7_READ_SLAVE1:true" \
-"MASTER7_READ_SLAVE2:true" \
-"MASTER7_READ_SLAVE3:true" \
-"MASTER7_READ_SLAVE4:true" \
-"MASTER7_READ_SLAVE5:true" \
-"MASTER7_READ_SLAVE6:true" \
-"MASTER7_READ_SLAVE7:true" \
-"MASTER7_READ_SLAVE8:true" \
-"MASTER7_READ_SLAVE9:true" \
-"MASTER7_READ_SLAVE10:true" \
-"MASTER7_READ_SLAVE11:true" \
-"MASTER7_READ_SLAVE12:true" \
-"MASTER7_READ_SLAVE13:true" \
-"MASTER7_READ_SLAVE14:true" \
-"MASTER7_READ_SLAVE15:true" \
-"MASTER7_READ_SLAVE16:true" \
-"MASTER7_READ_SLAVE17:true" \
-"MASTER7_READ_SLAVE18:true" \
-"MASTER7_READ_SLAVE19:true" \
-"MASTER7_READ_SLAVE20:true" \
-"MASTER7_READ_SLAVE21:true" \
-"MASTER7_READ_SLAVE22:true" \
-"MASTER7_READ_SLAVE23:true" \
-"MASTER7_READ_SLAVE24:true" \
-"MASTER7_READ_SLAVE25:true" \
-"MASTER7_READ_SLAVE26:true" \
-"MASTER7_READ_SLAVE27:true" \
-"MASTER7_READ_SLAVE28:true" \
-"MASTER7_READ_SLAVE29:true" \
-"MASTER7_READ_SLAVE30:true" \
-"MASTER7_READ_SLAVE31:true" \
-"MASTER7_TYPE:0" \
-"MASTER7_WRITE_SLAVE0:true" \
-"MASTER7_WRITE_SLAVE1:true" \
-"MASTER7_WRITE_SLAVE2:true" \
-"MASTER7_WRITE_SLAVE3:true" \
-"MASTER7_WRITE_SLAVE4:true" \
-"MASTER7_WRITE_SLAVE5:true" \
-"MASTER7_WRITE_SLAVE6:true" \
-"MASTER7_WRITE_SLAVE7:true" \
-"MASTER7_WRITE_SLAVE8:true" \
-"MASTER7_WRITE_SLAVE9:true" \
-"MASTER7_WRITE_SLAVE10:true" \
-"MASTER7_WRITE_SLAVE11:true" \
-"MASTER7_WRITE_SLAVE12:true" \
-"MASTER7_WRITE_SLAVE13:true" \
-"MASTER7_WRITE_SLAVE14:true" \
-"MASTER7_WRITE_SLAVE15:true" \
-"MASTER7_WRITE_SLAVE16:true" \
-"MASTER7_WRITE_SLAVE17:true" \
-"MASTER7_WRITE_SLAVE18:true" \
-"MASTER7_WRITE_SLAVE19:true" \
-"MASTER7_WRITE_SLAVE20:true" \
-"MASTER7_WRITE_SLAVE21:true" \
-"MASTER7_WRITE_SLAVE22:true" \
-"MASTER7_WRITE_SLAVE23:true" \
-"MASTER7_WRITE_SLAVE24:true" \
-"MASTER7_WRITE_SLAVE25:true" \
-"MASTER7_WRITE_SLAVE26:true" \
-"MASTER7_WRITE_SLAVE27:true" \
-"MASTER7_WRITE_SLAVE28:true" \
-"MASTER7_WRITE_SLAVE29:true" \
-"MASTER7_WRITE_SLAVE30:true" \
-"MASTER7_WRITE_SLAVE31:true" \
-"MASTER8_CHAN_RS:true" \
-"MASTER8_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER8_DATA_WIDTH:64" \
-"MASTER8_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER8_READ_INTERLEAVE:false" \
-"MASTER8_READ_SLAVE0:true" \
-"MASTER8_READ_SLAVE1:true" \
-"MASTER8_READ_SLAVE2:true" \
-"MASTER8_READ_SLAVE3:true" \
-"MASTER8_READ_SLAVE4:true" \
-"MASTER8_READ_SLAVE5:true" \
-"MASTER8_READ_SLAVE6:true" \
-"MASTER8_READ_SLAVE7:true" \
-"MASTER8_READ_SLAVE8:true" \
-"MASTER8_READ_SLAVE9:true" \
-"MASTER8_READ_SLAVE10:true" \
-"MASTER8_READ_SLAVE11:true" \
-"MASTER8_READ_SLAVE12:true" \
-"MASTER8_READ_SLAVE13:true" \
-"MASTER8_READ_SLAVE14:true" \
-"MASTER8_READ_SLAVE15:true" \
-"MASTER8_READ_SLAVE16:true" \
-"MASTER8_READ_SLAVE17:true" \
-"MASTER8_READ_SLAVE18:true" \
-"MASTER8_READ_SLAVE19:true" \
-"MASTER8_READ_SLAVE20:true" \
-"MASTER8_READ_SLAVE21:true" \
-"MASTER8_READ_SLAVE22:true" \
-"MASTER8_READ_SLAVE23:true" \
-"MASTER8_READ_SLAVE24:true" \
-"MASTER8_READ_SLAVE25:true" \
-"MASTER8_READ_SLAVE26:true" \
-"MASTER8_READ_SLAVE27:true" \
-"MASTER8_READ_SLAVE28:true" \
-"MASTER8_READ_SLAVE29:true" \
-"MASTER8_READ_SLAVE30:true" \
-"MASTER8_READ_SLAVE31:true" \
-"MASTER8_TYPE:0" \
-"MASTER8_WRITE_SLAVE0:true" \
-"MASTER8_WRITE_SLAVE1:true" \
-"MASTER8_WRITE_SLAVE2:true" \
-"MASTER8_WRITE_SLAVE3:true" \
-"MASTER8_WRITE_SLAVE4:true" \
-"MASTER8_WRITE_SLAVE5:true" \
-"MASTER8_WRITE_SLAVE6:true" \
-"MASTER8_WRITE_SLAVE7:true" \
-"MASTER8_WRITE_SLAVE8:true" \
-"MASTER8_WRITE_SLAVE9:true" \
-"MASTER8_WRITE_SLAVE10:true" \
-"MASTER8_WRITE_SLAVE11:true" \
-"MASTER8_WRITE_SLAVE12:true" \
-"MASTER8_WRITE_SLAVE13:true" \
-"MASTER8_WRITE_SLAVE14:true" \
-"MASTER8_WRITE_SLAVE15:true" \
-"MASTER8_WRITE_SLAVE16:true" \
-"MASTER8_WRITE_SLAVE17:true" \
-"MASTER8_WRITE_SLAVE18:true" \
-"MASTER8_WRITE_SLAVE19:true" \
-"MASTER8_WRITE_SLAVE20:true" \
-"MASTER8_WRITE_SLAVE21:true" \
-"MASTER8_WRITE_SLAVE22:true" \
-"MASTER8_WRITE_SLAVE23:true" \
-"MASTER8_WRITE_SLAVE24:true" \
-"MASTER8_WRITE_SLAVE25:true" \
-"MASTER8_WRITE_SLAVE26:true" \
-"MASTER8_WRITE_SLAVE27:true" \
-"MASTER8_WRITE_SLAVE28:true" \
-"MASTER8_WRITE_SLAVE29:true" \
-"MASTER8_WRITE_SLAVE30:true" \
-"MASTER8_WRITE_SLAVE31:true" \
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-"MASTER9_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER9_DATA_WIDTH:64" \
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-"MASTER9_READ_INTERLEAVE:false" \
-"MASTER9_READ_SLAVE0:true" \
-"MASTER9_READ_SLAVE1:true" \
-"MASTER9_READ_SLAVE2:true" \
-"MASTER9_READ_SLAVE3:true" \
-"MASTER9_READ_SLAVE4:true" \
-"MASTER9_READ_SLAVE5:true" \
-"MASTER9_READ_SLAVE6:true" \
-"MASTER9_READ_SLAVE7:true" \
-"MASTER9_READ_SLAVE8:true" \
-"MASTER9_READ_SLAVE9:true" \
-"MASTER9_READ_SLAVE10:true" \
-"MASTER9_READ_SLAVE11:true" \
-"MASTER9_READ_SLAVE12:true" \
-"MASTER9_READ_SLAVE13:true" \
-"MASTER9_READ_SLAVE14:true" \
-"MASTER9_READ_SLAVE15:true" \
-"MASTER9_READ_SLAVE16:true" \
-"MASTER9_READ_SLAVE17:true" \
-"MASTER9_READ_SLAVE18:true" \
-"MASTER9_READ_SLAVE19:true" \
-"MASTER9_READ_SLAVE20:true" \
-"MASTER9_READ_SLAVE21:true" \
-"MASTER9_READ_SLAVE22:true" \
-"MASTER9_READ_SLAVE23:true" \
-"MASTER9_READ_SLAVE24:true" \
-"MASTER9_READ_SLAVE25:true" \
-"MASTER9_READ_SLAVE26:true" \
-"MASTER9_READ_SLAVE27:true" \
-"MASTER9_READ_SLAVE28:true" \
-"MASTER9_READ_SLAVE29:true" \
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-"MASTER9_READ_SLAVE31:true" \
-"MASTER9_TYPE:0" \
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-"MASTER9_WRITE_SLAVE1:true" \
-"MASTER9_WRITE_SLAVE2:true" \
-"MASTER9_WRITE_SLAVE3:true" \
-"MASTER9_WRITE_SLAVE4:true" \
-"MASTER9_WRITE_SLAVE5:true" \
-"MASTER9_WRITE_SLAVE6:true" \
-"MASTER9_WRITE_SLAVE7:true" \
-"MASTER9_WRITE_SLAVE8:true" \
-"MASTER9_WRITE_SLAVE9:true" \
-"MASTER9_WRITE_SLAVE10:true" \
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-"MASTER9_WRITE_SLAVE12:true" \
-"MASTER9_WRITE_SLAVE13:true" \
-"MASTER9_WRITE_SLAVE14:true" \
-"MASTER9_WRITE_SLAVE15:true" \
-"MASTER9_WRITE_SLAVE16:true" \
-"MASTER9_WRITE_SLAVE17:true" \
-"MASTER9_WRITE_SLAVE18:true" \
-"MASTER9_WRITE_SLAVE19:true" \
-"MASTER9_WRITE_SLAVE20:true" \
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-"MASTER9_WRITE_SLAVE23:true" \
-"MASTER9_WRITE_SLAVE24:true" \
-"MASTER9_WRITE_SLAVE25:true" \
-"MASTER9_WRITE_SLAVE26:true" \
-"MASTER9_WRITE_SLAVE27:true" \
-"MASTER9_WRITE_SLAVE28:true" \
-"MASTER9_WRITE_SLAVE29:true" \
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-"MASTER10_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER10_DATA_WIDTH:64" \
-"MASTER10_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER10_READ_INTERLEAVE:false" \
-"MASTER10_READ_SLAVE0:true" \
-"MASTER10_READ_SLAVE1:true" \
-"MASTER10_READ_SLAVE2:true" \
-"MASTER10_READ_SLAVE3:true" \
-"MASTER10_READ_SLAVE4:true" \
-"MASTER10_READ_SLAVE5:true" \
-"MASTER10_READ_SLAVE6:true" \
-"MASTER10_READ_SLAVE7:true" \
-"MASTER10_READ_SLAVE8:true" \
-"MASTER10_READ_SLAVE9:true" \
-"MASTER10_READ_SLAVE10:true" \
-"MASTER10_READ_SLAVE11:true" \
-"MASTER10_READ_SLAVE12:true" \
-"MASTER10_READ_SLAVE13:true" \
-"MASTER10_READ_SLAVE14:true" \
-"MASTER10_READ_SLAVE15:true" \
-"MASTER10_READ_SLAVE16:true" \
-"MASTER10_READ_SLAVE17:true" \
-"MASTER10_READ_SLAVE18:true" \
-"MASTER10_READ_SLAVE19:true" \
-"MASTER10_READ_SLAVE20:true" \
-"MASTER10_READ_SLAVE21:true" \
-"MASTER10_READ_SLAVE22:true" \
-"MASTER10_READ_SLAVE23:true" \
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-"MASTER10_READ_SLAVE25:true" \
-"MASTER10_READ_SLAVE26:true" \
-"MASTER10_READ_SLAVE27:true" \
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-"MASTER10_TYPE:0" \
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-"MASTER10_WRITE_SLAVE1:true" \
-"MASTER10_WRITE_SLAVE2:true" \
-"MASTER10_WRITE_SLAVE3:true" \
-"MASTER10_WRITE_SLAVE4:true" \
-"MASTER10_WRITE_SLAVE5:true" \
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-"MASTER10_WRITE_SLAVE7:true" \
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-"MASTER10_WRITE_SLAVE17:true" \
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-"MASTER10_WRITE_SLAVE27:true" \
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-"MASTER10_WRITE_SLAVE29:true" \
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-"MASTER11_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER11_DATA_WIDTH:64" \
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-"MASTER11_READ_SLAVE2:true" \
-"MASTER11_READ_SLAVE3:true" \
-"MASTER11_READ_SLAVE4:true" \
-"MASTER11_READ_SLAVE5:true" \
-"MASTER11_READ_SLAVE6:true" \
-"MASTER11_READ_SLAVE7:true" \
-"MASTER11_READ_SLAVE8:true" \
-"MASTER11_READ_SLAVE9:true" \
-"MASTER11_READ_SLAVE10:true" \
-"MASTER11_READ_SLAVE11:true" \
-"MASTER11_READ_SLAVE12:true" \
-"MASTER11_READ_SLAVE13:true" \
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-"MASTER11_READ_SLAVE17:true" \
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-"MASTER11_READ_SLAVE20:true" \
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-"MASTER11_WRITE_SLAVE1:true" \
-"MASTER11_WRITE_SLAVE2:true" \
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-"MASTER12_CLOCK_DOMAIN_CROSSING:false" \
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-"MASTER12_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER12_READ_INTERLEAVE:false" \
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-"MASTER12_READ_SLAVE3:true" \
-"MASTER12_READ_SLAVE4:true" \
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-"MASTER13_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER13_DATA_WIDTH:64" \
-"MASTER13_DWC_DATA_FIFO_DEPTH:16" \
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-"MASTER13_READ_SLAVE0:true" \
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-"MASTER13_WRITE_SLAVE1:true" \
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-"MASTER13_WRITE_SLAVE3:true" \
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-"MASTER13_WRITE_SLAVE30:true" \
-"MASTER13_WRITE_SLAVE31:true" \
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-"MASTER14_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER14_DATA_WIDTH:64" \
-"MASTER14_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER14_READ_INTERLEAVE:false" \
-"MASTER14_READ_SLAVE0:true" \
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-"MASTER15_CLOCK_DOMAIN_CROSSING:false" \
-"MASTER15_DATA_WIDTH:64" \
-"MASTER15_DWC_DATA_FIFO_DEPTH:16" \
-"MASTER15_READ_INTERLEAVE:false" \
-"MASTER15_READ_SLAVE0:true" \
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-"MASTER15_READ_SLAVE30:true" \
-"MASTER15_READ_SLAVE31:true" \
-"MASTER15_TYPE:0" \
-"MASTER15_WRITE_SLAVE0:true" \
-"MASTER15_WRITE_SLAVE1:true" \
-"MASTER15_WRITE_SLAVE2:true" \
-"MASTER15_WRITE_SLAVE3:true" \
-"MASTER15_WRITE_SLAVE4:true" \
-"MASTER15_WRITE_SLAVE5:true" \
-"MASTER15_WRITE_SLAVE6:true" \
-"MASTER15_WRITE_SLAVE7:true" \
-"MASTER15_WRITE_SLAVE8:true" \
-"MASTER15_WRITE_SLAVE9:true" \
-"MASTER15_WRITE_SLAVE10:true" \
-"MASTER15_WRITE_SLAVE11:true" \
-"MASTER15_WRITE_SLAVE12:true" \
-"MASTER15_WRITE_SLAVE13:true" \
-"MASTER15_WRITE_SLAVE14:true" \
-"MASTER15_WRITE_SLAVE15:true" \
-"MASTER15_WRITE_SLAVE16:true" \
-"MASTER15_WRITE_SLAVE17:true" \
-"MASTER15_WRITE_SLAVE18:true" \
-"MASTER15_WRITE_SLAVE19:true" \
-"MASTER15_WRITE_SLAVE20:true" \
-"MASTER15_WRITE_SLAVE21:true" \
-"MASTER15_WRITE_SLAVE22:true" \
-"MASTER15_WRITE_SLAVE23:true" \
-"MASTER15_WRITE_SLAVE24:true" \
-"MASTER15_WRITE_SLAVE25:true" \
-"MASTER15_WRITE_SLAVE26:true" \
-"MASTER15_WRITE_SLAVE27:true" \
-"MASTER15_WRITE_SLAVE28:true" \
-"MASTER15_WRITE_SLAVE29:true" \
-"MASTER15_WRITE_SLAVE30:true" \
-"MASTER15_WRITE_SLAVE31:true" \
-"NUM_MASTERS:1" \
-"NUM_MASTERS_WIDTH:1" \
-"NUM_SLAVES:1" \
-"NUM_THREADS:1" \
-"OPEN_TRANS_MAX:2" \
-"OPTIMIZATION:3" \
-"RD_ARB_EN:true" \
-"SLAVE0_CHAN_RS:true" \
-"SLAVE0_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE0_DATA_WIDTH:64" \
-"SLAVE0_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE0_END_ADDR:0xcfffffff" \
-"SLAVE0_END_ADDR_UPPER:0x0" \
-"SLAVE0_READ_INTERLEAVE:false" \
-"SLAVE0_START_ADDR:0xc0000000" \
-"SLAVE0_START_ADDR_UPPER:0x0" \
-"SLAVE0_TYPE:0" \
-"SLAVE1_CHAN_RS:true" \
-"SLAVE1_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE1_DATA_WIDTH:64" \
-"SLAVE1_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE1_END_ADDR:0x6fffffff" \
-"SLAVE1_END_ADDR_UPPER:0x0" \
-"SLAVE1_READ_INTERLEAVE:false" \
-"SLAVE1_START_ADDR:0x61000000" \
-"SLAVE1_START_ADDR_UPPER:0x0" \
-"SLAVE1_TYPE:0" \
-"SLAVE2_CHAN_RS:true" \
-"SLAVE2_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE2_DATA_WIDTH:32" \
-"SLAVE2_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE2_END_ADDR:0x6002ffff" \
-"SLAVE2_END_ADDR_UPPER:0x0" \
-"SLAVE2_READ_INTERLEAVE:false" \
-"SLAVE2_START_ADDR:0x60020000" \
-"SLAVE2_START_ADDR_UPPER:0x0" \
-"SLAVE2_TYPE:1" \
-"SLAVE3_CHAN_RS:true" \
-"SLAVE3_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE3_DATA_WIDTH:64" \
-"SLAVE3_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE3_END_ADDR:0x1fffffff" \
-"SLAVE3_END_ADDR_UPPER:0x0" \
-"SLAVE3_READ_INTERLEAVE:false" \
-"SLAVE3_START_ADDR:0x18000000" \
-"SLAVE3_START_ADDR_UPPER:0x0" \
-"SLAVE3_TYPE:0" \
-"SLAVE4_CHAN_RS:true" \
-"SLAVE4_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE4_DATA_WIDTH:64" \
-"SLAVE4_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE4_END_ADDR:0x27ffffff" \
-"SLAVE4_END_ADDR_UPPER:0x0" \
-"SLAVE4_READ_INTERLEAVE:false" \
-"SLAVE4_START_ADDR:0x20000000" \
-"SLAVE4_START_ADDR_UPPER:0x0" \
-"SLAVE4_TYPE:0" \
-"SLAVE5_CHAN_RS:true" \
-"SLAVE5_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE5_DATA_WIDTH:64" \
-"SLAVE5_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE5_END_ADDR:0x2fffffff" \
-"SLAVE5_END_ADDR_UPPER:0x0" \
-"SLAVE5_READ_INTERLEAVE:false" \
-"SLAVE5_START_ADDR:0x28000000" \
-"SLAVE5_START_ADDR_UPPER:0x0" \
-"SLAVE5_TYPE:0" \
-"SLAVE6_CHAN_RS:true" \
-"SLAVE6_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE6_DATA_WIDTH:64" \
-"SLAVE6_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE6_END_ADDR:0x37ffffff" \
-"SLAVE6_END_ADDR_UPPER:0x0" \
-"SLAVE6_READ_INTERLEAVE:false" \
-"SLAVE6_START_ADDR:0x30000000" \
-"SLAVE6_START_ADDR_UPPER:0x0" \
-"SLAVE6_TYPE:0" \
-"SLAVE7_CHAN_RS:true" \
-"SLAVE7_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE7_DATA_WIDTH:64" \
-"SLAVE7_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE7_END_ADDR:0x3fffffff" \
-"SLAVE7_END_ADDR_UPPER:0x0" \
-"SLAVE7_READ_INTERLEAVE:false" \
-"SLAVE7_START_ADDR:0x38000000" \
-"SLAVE7_START_ADDR_UPPER:0x0" \
-"SLAVE7_TYPE:0" \
-"SLAVE8_CHAN_RS:true" \
-"SLAVE8_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE8_DATA_WIDTH:64" \
-"SLAVE8_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE8_END_ADDR:0x47ffffff" \
-"SLAVE8_END_ADDR_UPPER:0x0" \
-"SLAVE8_READ_INTERLEAVE:false" \
-"SLAVE8_START_ADDR:0x40000000" \
-"SLAVE8_START_ADDR_UPPER:0x0" \
-"SLAVE8_TYPE:0" \
-"SLAVE9_CHAN_RS:true" \
-"SLAVE9_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE9_DATA_WIDTH:64" \
-"SLAVE9_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE9_END_ADDR:0x4fffffff" \
-"SLAVE9_END_ADDR_UPPER:0x0" \
-"SLAVE9_READ_INTERLEAVE:false" \
-"SLAVE9_START_ADDR:0x48000000" \
-"SLAVE9_START_ADDR_UPPER:0x0" \
-"SLAVE9_TYPE:0" \
-"SLAVE10_CHAN_RS:true" \
-"SLAVE10_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE10_DATA_WIDTH:64" \
-"SLAVE10_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE10_END_ADDR:0x57ffffff" \
-"SLAVE10_END_ADDR_UPPER:0x0" \
-"SLAVE10_READ_INTERLEAVE:false" \
-"SLAVE10_START_ADDR:0x50000000" \
-"SLAVE10_START_ADDR_UPPER:0x0" \
-"SLAVE10_TYPE:0" \
-"SLAVE11_CHAN_RS:true" \
-"SLAVE11_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE11_DATA_WIDTH:64" \
-"SLAVE11_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE11_END_ADDR:0x5fffffff" \
-"SLAVE11_END_ADDR_UPPER:0x0" \
-"SLAVE11_READ_INTERLEAVE:false" \
-"SLAVE11_START_ADDR:0x58000000" \
-"SLAVE11_START_ADDR_UPPER:0x0" \
-"SLAVE11_TYPE:0" \
-"SLAVE12_CHAN_RS:true" \
-"SLAVE12_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE12_DATA_WIDTH:64" \
-"SLAVE12_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE12_END_ADDR:0x902fffff" \
-"SLAVE12_END_ADDR_UPPER:0x0" \
-"SLAVE12_READ_INTERLEAVE:false" \
-"SLAVE12_START_ADDR:0x90000000" \
-"SLAVE12_START_ADDR_UPPER:0x0" \
-"SLAVE12_TYPE:0" \
-"SLAVE13_CHAN_RS:true" \
-"SLAVE13_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE13_DATA_WIDTH:64" \
-"SLAVE13_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE13_END_ADDR:0x905fffff" \
-"SLAVE13_END_ADDR_UPPER:0x0" \
-"SLAVE13_READ_INTERLEAVE:false" \
-"SLAVE13_START_ADDR:0x90300000" \
-"SLAVE13_START_ADDR_UPPER:0x0" \
-"SLAVE13_TYPE:0" \
-"SLAVE14_CHAN_RS:true" \
-"SLAVE14_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE14_DATA_WIDTH:64" \
-"SLAVE14_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE14_END_ADDR:0x908fffff" \
-"SLAVE14_END_ADDR_UPPER:0x0" \
-"SLAVE14_READ_INTERLEAVE:false" \
-"SLAVE14_START_ADDR:0x90600000" \
-"SLAVE14_START_ADDR_UPPER:0x0" \
-"SLAVE14_TYPE:0" \
-"SLAVE15_CHAN_RS:true" \
-"SLAVE15_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE15_DATA_WIDTH:64" \
-"SLAVE15_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE15_END_ADDR:0x90bfffff" \
-"SLAVE15_END_ADDR_UPPER:0x0" \
-"SLAVE15_READ_INTERLEAVE:false" \
-"SLAVE15_START_ADDR:0x90900000" \
-"SLAVE15_START_ADDR_UPPER:0x0" \
-"SLAVE15_TYPE:0" \
-"SLAVE16_CHAN_RS:true" \
-"SLAVE16_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE16_DATA_WIDTH:64" \
-"SLAVE16_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE16_END_ADDR:0x90efffff" \
-"SLAVE16_END_ADDR_UPPER:0x0" \
-"SLAVE16_READ_INTERLEAVE:false" \
-"SLAVE16_START_ADDR:0x90c00000" \
-"SLAVE16_START_ADDR_UPPER:0x0" \
-"SLAVE16_TYPE:0" \
-"SLAVE17_CHAN_RS:true" \
-"SLAVE17_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE17_DATA_WIDTH:64" \
-"SLAVE17_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE17_END_ADDR:0x911fffff" \
-"SLAVE17_END_ADDR_UPPER:0x0" \
-"SLAVE17_READ_INTERLEAVE:false" \
-"SLAVE17_START_ADDR:0x90f00000" \
-"SLAVE17_START_ADDR_UPPER:0x0" \
-"SLAVE17_TYPE:0" \
-"SLAVE18_CHAN_RS:true" \
-"SLAVE18_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE18_DATA_WIDTH:64" \
-"SLAVE18_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE18_END_ADDR:0x914fffff" \
-"SLAVE18_END_ADDR_UPPER:0x0" \
-"SLAVE18_READ_INTERLEAVE:false" \
-"SLAVE18_START_ADDR:0x91200000" \
-"SLAVE18_START_ADDR_UPPER:0x0" \
-"SLAVE18_TYPE:0" \
-"SLAVE19_CHAN_RS:true" \
-"SLAVE19_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE19_DATA_WIDTH:64" \
-"SLAVE19_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE19_END_ADDR:0x917fffff" \
-"SLAVE19_END_ADDR_UPPER:0x0" \
-"SLAVE19_READ_INTERLEAVE:false" \
-"SLAVE19_START_ADDR:0x91500000" \
-"SLAVE19_START_ADDR_UPPER:0x0" \
-"SLAVE19_TYPE:0" \
-"SLAVE20_CHAN_RS:true" \
-"SLAVE20_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE20_DATA_WIDTH:64" \
-"SLAVE20_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE20_END_ADDR:0x91afffff" \
-"SLAVE20_END_ADDR_UPPER:0x0" \
-"SLAVE20_READ_INTERLEAVE:false" \
-"SLAVE20_START_ADDR:0x91800000" \
-"SLAVE20_START_ADDR_UPPER:0x0" \
-"SLAVE20_TYPE:0" \
-"SLAVE21_CHAN_RS:true" \
-"SLAVE21_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE21_DATA_WIDTH:64" \
-"SLAVE21_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE21_END_ADDR:0x91dfffff" \
-"SLAVE21_END_ADDR_UPPER:0x0" \
-"SLAVE21_READ_INTERLEAVE:false" \
-"SLAVE21_START_ADDR:0x91b00000" \
-"SLAVE21_START_ADDR_UPPER:0x0" \
-"SLAVE21_TYPE:0" \
-"SLAVE22_CHAN_RS:true" \
-"SLAVE22_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE22_DATA_WIDTH:64" \
-"SLAVE22_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE22_END_ADDR:0x920fffff" \
-"SLAVE22_END_ADDR_UPPER:0x0" \
-"SLAVE22_READ_INTERLEAVE:false" \
-"SLAVE22_START_ADDR:0x91e00000" \
-"SLAVE22_START_ADDR_UPPER:0x0" \
-"SLAVE22_TYPE:0" \
-"SLAVE23_CHAN_RS:true" \
-"SLAVE23_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE23_DATA_WIDTH:64" \
-"SLAVE23_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE23_END_ADDR:0x923fffff" \
-"SLAVE23_END_ADDR_UPPER:0x0" \
-"SLAVE23_READ_INTERLEAVE:false" \
-"SLAVE23_START_ADDR:0x92100000" \
-"SLAVE23_START_ADDR_UPPER:0x0" \
-"SLAVE23_TYPE:0" \
-"SLAVE24_CHAN_RS:true" \
-"SLAVE24_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE24_DATA_WIDTH:64" \
-"SLAVE24_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE24_END_ADDR:0x926fffff" \
-"SLAVE24_END_ADDR_UPPER:0x0" \
-"SLAVE24_READ_INTERLEAVE:false" \
-"SLAVE24_START_ADDR:0x92400000" \
-"SLAVE24_START_ADDR_UPPER:0x0" \
-"SLAVE24_TYPE:0" \
-"SLAVE25_CHAN_RS:true" \
-"SLAVE25_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE25_DATA_WIDTH:64" \
-"SLAVE25_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE25_END_ADDR:0x929fffff" \
-"SLAVE25_END_ADDR_UPPER:0x0" \
-"SLAVE25_READ_INTERLEAVE:false" \
-"SLAVE25_START_ADDR:0x92700000" \
-"SLAVE25_START_ADDR_UPPER:0x0" \
-"SLAVE25_TYPE:0" \
-"SLAVE26_CHAN_RS:true" \
-"SLAVE26_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE26_DATA_WIDTH:64" \
-"SLAVE26_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE26_END_ADDR:0x92cfffff" \
-"SLAVE26_END_ADDR_UPPER:0x0" \
-"SLAVE26_READ_INTERLEAVE:false" \
-"SLAVE26_START_ADDR:0x92a00000" \
-"SLAVE26_START_ADDR_UPPER:0x0" \
-"SLAVE26_TYPE:0" \
-"SLAVE27_CHAN_RS:true" \
-"SLAVE27_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE27_DATA_WIDTH:64" \
-"SLAVE27_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE27_END_ADDR:0x92ffffff" \
-"SLAVE27_END_ADDR_UPPER:0x0" \
-"SLAVE27_READ_INTERLEAVE:false" \
-"SLAVE27_START_ADDR:0x92d00000" \
-"SLAVE27_START_ADDR_UPPER:0x0" \
-"SLAVE27_TYPE:0" \
-"SLAVE28_CHAN_RS:true" \
-"SLAVE28_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE28_DATA_WIDTH:64" \
-"SLAVE28_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE28_END_ADDR:0x932fffff" \
-"SLAVE28_END_ADDR_UPPER:0x0" \
-"SLAVE28_READ_INTERLEAVE:false" \
-"SLAVE28_START_ADDR:0x93000000" \
-"SLAVE28_START_ADDR_UPPER:0x0" \
-"SLAVE28_TYPE:0" \
-"SLAVE29_CHAN_RS:true" \
-"SLAVE29_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE29_DATA_WIDTH:64" \
-"SLAVE29_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE29_END_ADDR:0x935fffff" \
-"SLAVE29_END_ADDR_UPPER:0x0" \
-"SLAVE29_READ_INTERLEAVE:false" \
-"SLAVE29_START_ADDR:0x93300000" \
-"SLAVE29_START_ADDR_UPPER:0x0" \
-"SLAVE29_TYPE:0" \
-"SLAVE30_CHAN_RS:true" \
-"SLAVE30_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE30_DATA_WIDTH:64" \
-"SLAVE30_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE30_END_ADDR:0x938fffff" \
-"SLAVE30_END_ADDR_UPPER:0x0" \
-"SLAVE30_READ_INTERLEAVE:false" \
-"SLAVE30_START_ADDR:0x93600000" \
-"SLAVE30_START_ADDR_UPPER:0x0" \
-"SLAVE30_TYPE:0" \
-"SLAVE31_CHAN_RS:true" \
-"SLAVE31_CLOCK_DOMAIN_CROSSING:false" \
-"SLAVE31_DATA_WIDTH:64" \
-"SLAVE31_DWC_DATA_FIFO_DEPTH:16" \
-"SLAVE31_END_ADDR:0x93bfffff" \
-"SLAVE31_END_ADDR_UPPER:0x0" \
-"SLAVE31_READ_INTERLEAVE:false" \
-"SLAVE31_START_ADDR:0x93900000" \
-"SLAVE31_START_ADDR_UPPER:0x0" \
-"SLAVE31_TYPE:0" \
-"SLV_AXI4PRT_ADDRDEPTH:8" \
-"SLV_AXI4PRT_DATADEPTH:9" \
-"USER_WIDTH:1" }
-# Exporting Component Description of AXI4INTERCONNECT to TCL done
diff --git a/script_support/components/GPIO.tcl b/script_support/components/GPIO.tcl
deleted file mode 100644
index 0be8d17..0000000
--- a/script_support/components/GPIO.tcl
+++ /dev/null
@@ -1,138 +0,0 @@
-# Exporting Component Description of GPIO to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component GPIO
-create_and_configure_core -core_vlnv {Actel:DirectCore:CoreGPIO:3.2.102} -component_name {GPIO} -params {\
-"APB_WIDTH:32" \
-"FIXED_CONFIG_0:true" \
-"FIXED_CONFIG_1:true" \
-"FIXED_CONFIG_2:true" \
-"FIXED_CONFIG_3:true" \
-"FIXED_CONFIG_4:false" \
-"FIXED_CONFIG_5:false" \
-"FIXED_CONFIG_6:false" \
-"FIXED_CONFIG_7:false" \
-"FIXED_CONFIG_8:false" \
-"FIXED_CONFIG_9:false" \
-"FIXED_CONFIG_10:false" \
-"FIXED_CONFIG_11:false" \
-"FIXED_CONFIG_12:false" \
-"FIXED_CONFIG_13:false" \
-"FIXED_CONFIG_14:false" \
-"FIXED_CONFIG_15:false" \
-"FIXED_CONFIG_16:false" \
-"FIXED_CONFIG_17:false" \
-"FIXED_CONFIG_18:false" \
-"FIXED_CONFIG_19:false" \
-"FIXED_CONFIG_20:false" \
-"FIXED_CONFIG_21:false" \
-"FIXED_CONFIG_22:false" \
-"FIXED_CONFIG_23:false" \
-"FIXED_CONFIG_24:false" \
-"FIXED_CONFIG_25:false" \
-"FIXED_CONFIG_26:false" \
-"FIXED_CONFIG_27:false" \
-"FIXED_CONFIG_28:false" \
-"FIXED_CONFIG_29:false" \
-"FIXED_CONFIG_30:false" \
-"FIXED_CONFIG_31:false" \
-"INT_BUS:0" \
-"IO_INT_TYPE_0:7" \
-"IO_INT_TYPE_1:7" \
-"IO_INT_TYPE_2:7" \
-"IO_INT_TYPE_3:7" \
-"IO_INT_TYPE_4:7" \
-"IO_INT_TYPE_5:7" \
-"IO_INT_TYPE_6:7" \
-"IO_INT_TYPE_7:7" \
-"IO_INT_TYPE_8:7" \
-"IO_INT_TYPE_9:7" \
-"IO_INT_TYPE_10:7" \
-"IO_INT_TYPE_11:7" \
-"IO_INT_TYPE_12:7" \
-"IO_INT_TYPE_13:7" \
-"IO_INT_TYPE_14:7" \
-"IO_INT_TYPE_15:7" \
-"IO_INT_TYPE_16:7" \
-"IO_INT_TYPE_17:7" \
-"IO_INT_TYPE_18:7" \
-"IO_INT_TYPE_19:7" \
-"IO_INT_TYPE_20:7" \
-"IO_INT_TYPE_21:7" \
-"IO_INT_TYPE_22:7" \
-"IO_INT_TYPE_23:7" \
-"IO_INT_TYPE_24:7" \
-"IO_INT_TYPE_25:7" \
-"IO_INT_TYPE_26:7" \
-"IO_INT_TYPE_27:7" \
-"IO_INT_TYPE_28:7" \
-"IO_INT_TYPE_29:7" \
-"IO_INT_TYPE_30:7" \
-"IO_INT_TYPE_31:7" \
-"IO_NUM:4" \
-"IO_TYPE_0:1" \
-"IO_TYPE_1:1" \
-"IO_TYPE_2:1" \
-"IO_TYPE_3:1" \
-"IO_TYPE_4:0" \
-"IO_TYPE_5:0" \
-"IO_TYPE_6:0" \
-"IO_TYPE_7:0" \
-"IO_TYPE_8:0" \
-"IO_TYPE_9:0" \
-"IO_TYPE_10:0" \
-"IO_TYPE_11:0" \
-"IO_TYPE_12:0" \
-"IO_TYPE_13:0" \
-"IO_TYPE_14:0" \
-"IO_TYPE_15:0" \
-"IO_TYPE_16:0" \
-"IO_TYPE_17:0" \
-"IO_TYPE_18:0" \
-"IO_TYPE_19:0" \
-"IO_TYPE_20:0" \
-"IO_TYPE_21:0" \
-"IO_TYPE_22:0" \
-"IO_TYPE_23:0" \
-"IO_TYPE_24:0" \
-"IO_TYPE_25:0" \
-"IO_TYPE_26:0" \
-"IO_TYPE_27:0" \
-"IO_TYPE_28:0" \
-"IO_TYPE_29:0" \
-"IO_TYPE_30:0" \
-"IO_TYPE_31:0" \
-"IO_VAL_0:0" \
-"IO_VAL_1:0" \
-"IO_VAL_2:0" \
-"IO_VAL_3:0" \
-"IO_VAL_4:0" \
-"IO_VAL_5:0" \
-"IO_VAL_6:0" \
-"IO_VAL_7:0" \
-"IO_VAL_8:0" \
-"IO_VAL_9:0" \
-"IO_VAL_10:0" \
-"IO_VAL_11:0" \
-"IO_VAL_12:0" \
-"IO_VAL_13:0" \
-"IO_VAL_14:0" \
-"IO_VAL_15:0" \
-"IO_VAL_16:0" \
-"IO_VAL_17:0" \
-"IO_VAL_18:0" \
-"IO_VAL_19:0" \
-"IO_VAL_20:0" \
-"IO_VAL_21:0" \
-"IO_VAL_22:0" \
-"IO_VAL_23:0" \
-"IO_VAL_24:0" \
-"IO_VAL_25:0" \
-"IO_VAL_26:0" \
-"IO_VAL_27:0" \
-"IO_VAL_28:0" \
-"IO_VAL_29:0" \
-"IO_VAL_30:0" \
-"IO_VAL_31:0" \
-"OE_TYPE:1" }
-# Exporting Component Description of GPIO to TCL done
diff --git a/script_support/components/MSS_LSRAM.tcl b/script_support/components/MSS_LSRAM.tcl
deleted file mode 100644
index 9df7be6..0000000
--- a/script_support/components/MSS_LSRAM.tcl
+++ /dev/null
@@ -1,27 +0,0 @@
-# Exporting Component Description of LSRAM to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component LSRAM
-create_and_configure_core -core_vlnv {Actel:SystemBuilder:PF_SRAM_AHBL_AXI:1.2.108} -component_name {MSS_LSRAM} -params {\
-"AXI4_AWIDTH:32" \
-"AXI4_DWIDTH:64" \
-"AXI4_IDWIDTH:8" \
-"AXI4_IFTYPE_RD:T" \
-"AXI4_IFTYPE_WR:T" \
-"AXI4_WRAP_SUPPORT:F" \
-"BYTEENABLES:1" \
-"BYTE_ENABLE_WIDTH:8" \
-"B_REN_POLARITY:2" \
-"CASCADE:1" \
-"ECC_OPTIONS:0" \
-"FABRIC_INTERFACE_TYPE:1" \
-"IMPORT_FILE:" \
-"INIT_RAM:F" \
-"LPM_HINT:0" \
-"PIPELINE_OPTIONS:1" \
-"RDEPTH:2048" \
-"RWIDTH:80" \
-"USE_NATIVE_INTERFACE:F" \
-"WDEPTH:2048" \
-"WWIDTH:80" }
-# Exporting Component Description of LSRAM to TCL done
diff --git a/script_support/components/PCIE_LSRAM.tcl b/script_support/components/PCIE_LSRAM.tcl
deleted file mode 100644
index c5cf31a..0000000
--- a/script_support/components/PCIE_LSRAM.tcl
+++ /dev/null
@@ -1,27 +0,0 @@
-# Exporting Component Description of LSRAM to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component LSRAM
-create_and_configure_core -core_vlnv {Actel:SystemBuilder:PF_SRAM_AHBL_AXI:1.2.108} -component_name {PCIE_LSRAM} -params {\
-"AXI4_AWIDTH:32" \
-"AXI4_DWIDTH:64" \
-"AXI4_IDWIDTH:8" \
-"AXI4_IFTYPE_RD:T" \
-"AXI4_IFTYPE_WR:T" \
-"AXI4_WRAP_SUPPORT:F" \
-"BYTEENABLES:1" \
-"BYTE_ENABLE_WIDTH:8" \
-"B_REN_POLARITY:2" \
-"CASCADE:1" \
-"ECC_OPTIONS:0" \
-"FABRIC_INTERFACE_TYPE:1" \
-"IMPORT_FILE:" \
-"INIT_RAM:F" \
-"LPM_HINT:0" \
-"PIPELINE_OPTIONS:1" \
-"RDEPTH:8192" \
-"RWIDTH:80" \
-"USE_NATIVE_INTERFACE:F" \
-"WDEPTH:8192" \
-"WWIDTH:80" }
-# Exporting Component Description of LSRAM to TCL done
diff --git a/script_support/components/PF_CCC_C0.tcl b/script_support/components/PF_CCC_C0.tcl
deleted file mode 100644
index 15bc33e..0000000
--- a/script_support/components/PF_CCC_C0.tcl
+++ /dev/null
@@ -1,248 +0,0 @@
-# Exporting Component Description of PF_CCC_C0 to TCL
-# Family: PolarFireSoC
-# Part Number: MPFS250T_ES-FCVG484E
-# Create and Configure the core component PF_CCC_C0
-create_and_configure_core -core_vlnv {Actel:SgCore:PF_CCC:2.2.100} -component_name {PF_CCC_C0} -params {\
-"DLL_CLK_0_BANKCLK_EN:false" \
-"DLL_CLK_0_DEDICATED_EN:false" \
-"DLL_CLK_0_FABCLK_EN:false" \
-"DLL_CLK_1_BANKCLK_EN:false" \
-"DLL_CLK_1_DEDICATED_EN:false" \
-"DLL_CLK_1_FABCLK_EN:false" \
-"DLL_CLK_P_EN:false" \
-"DLL_CLK_P_OPTIONS_EN:false" \
-"DLL_CLK_REF_OPTION:DIVIDE_BY_1" \
-"DLL_CLK_REF_OPTIONS_EN:false" \
-"DLL_CLK_S_EN:false" \
-"DLL_CLK_S_OPTION:DIVIDE_BY_1" \
-"DLL_CLK_S_OPTIONS_EN:false" \
-"DLL_DELAY4:0" \
-"DLL_DYNAMIC_CODE_EN:false" \
-"DLL_DYNAMIC_RECONFIG_INTERFACE_EN:false" \
-"DLL_EXPORT_PWRDWN:false" \
-"DLL_FB_CLK:Primary" \
-"DLL_FB_EN:false" \
-"DLL_FINE_PHASE_CODE:0" \
-"DLL_IN:133" \
-"DLL_JITTER:0" \
-"DLL_MODE:PHASE_REF_MODE" \
-"DLL_ONLY_EN:false" \
-"DLL_OUT_0:1" \
-"DLL_OUT_1:1" \
-"DLL_PRIM_PHASE:90" \
-"DLL_PRIM_PHASE_CODE:0" \
-"DLL_SEC_PHASE:90" \
-"DLL_SEC_PHASE_CODE:0" \
-"DLL_SELECTED_IN:Output2" \
-"FF_REQUIRES_LOCK_EN_0:0" \
-"GL0_0_BANKCLK_USED:false" \
-"GL0_0_BYPASS:0" \
-"GL0_0_BYPASS_EN:false" \
-"GL0_0_DEDICATED_USED:false" \
-"GL0_0_DIV:20" \
-"GL0_0_DIVSTART:0" \
-"GL0_0_DYNAMIC_PH:false" \
-"GL0_0_EXPOSE_EN:false" \
-"GL0_0_FABCLK_GATED_USED:false" \
-"GL0_0_FABCLK_USED:true" \
-"GL0_0_FREQ_SEL:false" \
-"GL0_0_IS_USED:true" \
-"GL0_0_OUT_FREQ:100" \
-"GL0_0_PHASE_INDEX:0" \
-"GL0_0_PHASE_SEL:false" \
-"GL0_0_PLL_PHASE:0" \
-"GL0_1_BANKCLK_USED:false" \
-"GL0_1_BYPASS:0" \
-"GL0_1_BYPASS_EN:false" \
-"GL0_1_DEDICATED_USED:false" \
-"GL0_1_DIV:1" \
-"GL0_1_DIVSTART:0" \
-"GL0_1_DYNAMIC_PH:false" \
-"GL0_1_EXPOSE_EN:false" \
-"GL0_1_FABCLK_USED:false" \
-"GL0_1_FREQ_SEL:false" \
-"GL0_1_IS_USED:true" \
-"GL0_1_OUT_FREQ:100" \
-"GL0_1_PHASE_INDEX:0" \
-"GL0_1_PHASE_SEL:false" \
-"GL0_1_PLL_PHASE:0" \
-"GL1_0_BANKCLK_USED:false" \
-"GL1_0_BYPASS:0" \
-"GL1_0_BYPASS_EN:false" \
-"GL1_0_DEDICATED_USED:false" \
-"GL1_0_DIV:1" \
-"GL1_0_DIVSTART:0" \
-"GL1_0_DYNAMIC_PH:false" \
-"GL1_0_EXPOSE_EN:false" \
-"GL1_0_FABCLK_GATED_USED:false" \
-"GL1_0_FABCLK_USED:true" \
-"GL1_0_FREQ_SEL:false" \
-"GL1_0_IS_USED:true" \
-"GL1_0_OUT_FREQ:75" \
-"GL1_0_PHASE_INDEX:0" \
-"GL1_0_PHASE_SEL:false" \
-"GL1_0_PLL_PHASE:0" \
-"GL1_1_BANKCLK_USED:false" \
-"GL1_1_BYPASS:0" \
-"GL1_1_BYPASS_EN:false" \
-"GL1_1_DEDICATED_USED:false" \
-"GL1_1_DIV:1" \
-"GL1_1_DIVSTART:0" \
-"GL1_1_DYNAMIC_PH:false" \
-"GL1_1_EXPOSE_EN:false" \
-"GL1_1_FABCLK_USED:false" \
-"GL1_1_FREQ_SEL:false" \
-"GL1_1_IS_USED:false" \
-"GL1_1_OUT_FREQ:0" \
-"GL1_1_PHASE_INDEX:0" \
-"GL1_1_PHASE_SEL:false" \
-"GL1_1_PLL_PHASE:0" \
-"GL2_0_BANKCLK_USED:false" \
-"GL2_0_BYPASS:0" \
-"GL2_0_BYPASS_EN:false" \
-"GL2_0_DEDICATED_USED:false" \
-"GL2_0_DIV:1" \
-"GL2_0_DIVSTART:0" \
-"GL2_0_DYNAMIC_PH:false" \
-"GL2_0_EXPOSE_EN:false" \
-"GL2_0_FABCLK_GATED_USED:false" \
-"GL2_0_FABCLK_USED:true" \
-"GL2_0_FREQ_SEL:false" \
-"GL2_0_IS_USED:true" \
-"GL2_0_OUT_FREQ:50" \
-"GL2_0_PHASE_INDEX:0" \
-"GL2_0_PHASE_SEL:false" \
-"GL2_0_PLL_PHASE:0" \
-"GL2_1_BANKCLK_USED:false" \
-"GL2_1_BYPASS:0" \
-"GL2_1_BYPASS_EN:false" \
-"GL2_1_DEDICATED_USED:false" \
-"GL2_1_DIV:1" \
-"GL2_1_DIVSTART:0" \
-"GL2_1_DYNAMIC_PH:false" \
-"GL2_1_EXPOSE_EN:false" \
-"GL2_1_FABCLK_USED:false" \
-"GL2_1_FREQ_SEL:false" \
-"GL2_1_IS_USED:false" \
-"GL2_1_OUT_FREQ:0" \
-"GL2_1_PHASE_INDEX:0" \
-"GL2_1_PHASE_SEL:false" \
-"GL2_1_PLL_PHASE:0" \
-"GL3_0_BANKCLK_USED:false" \
-"GL3_0_BYPASS:0" \
-"GL3_0_BYPASS_EN:false" \
-"GL3_0_DEDICATED_USED:false" \
-"GL3_0_DIV:1" \
-"GL3_0_DIVSTART:0" \
-"GL3_0_DYNAMIC_PH:false" \
-"GL3_0_EXPOSE_EN:false" \
-"GL3_0_FABCLK_GATED_USED:false" \
-"GL3_0_FABCLK_USED:true" \
-"GL3_0_FREQ_SEL:false" \
-"GL3_0_IS_USED:true" \
-"GL3_0_OUT_FREQ:25" \
-"GL3_0_PHASE_INDEX:0" \
-"GL3_0_PHASE_SEL:false" \
-"GL3_0_PLL_PHASE:0" \
-"GL3_1_BANKCLK_USED:false" \
-"GL3_1_BYPASS:0" \
-"GL3_1_BYPASS_EN:false" \
-"GL3_1_DEDICATED_USED:false" \
-"GL3_1_DIV:1" \
-"GL3_1_DIVSTART:0" \
-"GL3_1_DYNAMIC_PH:false" \
-"GL3_1_EXPOSE_EN:false" \
-"GL3_1_FABCLK_USED:false" \
-"GL3_1_FREQ_SEL:false" \
-"GL3_1_IS_USED:false" \
-"GL3_1_OUT_FREQ:0" \
-"GL3_1_PHASE_INDEX:0" \
-"GL3_1_PHASE_SEL:false" \
-"GL3_1_PLL_PHASE:0" \
-"PLL_ALLOW_CCC_EXT_FB:false" \
-"PLL_BANDWIDTH_0:2" \
-"PLL_BANDWIDTH_1:1" \
-"PLL_BYPASS_GO_B_0:false" \
-"PLL_BYPASS_GO_B_1:false" \
-"PLL_BYPASS_POST_0:0" \
-"PLL_BYPASS_POST_0_0:false" \
-"PLL_BYPASS_POST_0_1:false" \
-"PLL_BYPASS_POST_0_2:false" \
-"PLL_BYPASS_POST_0_3:false" \
-"PLL_BYPASS_POST_1:0" \
-"PLL_BYPASS_POST_1_0:false" \
-"PLL_BYPASS_POST_1_1:false" \
-"PLL_BYPASS_POST_1_2:false" \
-"PLL_BYPASS_POST_1_3:false" \
-"PLL_BYPASS_PRE_0:0" \
-"PLL_BYPASS_PRE_0_0:false" \
-"PLL_BYPASS_PRE_0_1:false" \
-"PLL_BYPASS_PRE_0_2:false" \
-"PLL_BYPASS_PRE_0_3:false" \
-"PLL_BYPASS_PRE_1:0" \
-"PLL_BYPASS_PRE_1_0:false" \
-"PLL_BYPASS_PRE_1_1:false" \
-"PLL_BYPASS_PRE_1_2:false" \
-"PLL_BYPASS_PRE_1_3:false" \
-"PLL_BYPASS_SEL_0:0" \
-"PLL_BYPASS_SEL_0_0:false" \
-"PLL_BYPASS_SEL_0_1:false" \
-"PLL_BYPASS_SEL_0_2:false" \
-"PLL_BYPASS_SEL_0_3:false" \
-"PLL_BYPASS_SEL_1:0" \
-"PLL_BYPASS_SEL_1_0:false" \
-"PLL_BYPASS_SEL_1_1:false" \
-"PLL_BYPASS_SEL_1_2:false" \
-"PLL_BYPASS_SEL_1_3:false" \
-"PLL_DELAY_LINE_REF_FB_0:false" \
-"PLL_DELAY_LINE_REF_FB_1:false" \
-"PLL_DELAY_LINE_USED_0:false" \
-"PLL_DELAY_LINE_USED_1:false" \
-"PLL_DELAY_STEPS_0:1" \
-"PLL_DELAY_STEPS_1:1" \
-"PLL_DLL_CASCADED_EN:false" \
-"PLL_DYNAMIC_CONTROL_EN_0:true" \
-"PLL_DYNAMIC_CONTROL_EN_1:false" \
-"PLL_DYNAMIC_RECONFIG_INTERFACE_EN_0:true" \
-"PLL_DYNAMIC_RECONFIG_INTERFACE_EN_1:false" \
-"PLL_EXPORT_PWRDWN:true" \
-"PLL_EXT_MAX_ADDR_0:128" \
-"PLL_EXT_MAX_ADDR_1:128" \
-"PLL_EXT_WAVE_SEL_0:0" \
-"PLL_EXT_WAVE_SEL_1:0" \
-"PLL_FB_CLK_0:GL0_0" \
-"PLL_FB_CLK_1:GL0_1" \
-"PLL_FEEDBACK_MODE_0:Post-VCO" \
-"PLL_FEEDBACK_MODE_1:Post-VCO" \
-"PLL_IN_FREQ_0:160" \
-"PLL_IN_FREQ_1:100" \
-"PLL_INT_MODE_EN_0:false" \
-"PLL_INT_MODE_EN_1:false" \
-"PLL_LOCK_COUNT_0:0" \
-"PLL_LOCK_COUNT_1:0" \
-"PLL_LP_REQUIRES_LOCK_EN_0:false" \
-"PLL_LP_REQUIRES_LOCK_EN_1:false" \
-"PLL_PLL_CASCADED_EN:false" \
-"PLL_PLL_CASCADED_SELECTED_CLK:Output2" \
-"PLL_POSTDIVIDERADDSOFTLOGIC_0:true" \
-"PLL_REF_CLK_SEL_0:false" \
-"PLL_REF_CLK_SEL_1:false" \
-"PLL_REFDIV_0:4" \
-"PLL_REFDIV_1:1" \
-"PLL_SPREAD_MODE_0:false" \
-"PLL_SPREAD_MODE_1:false" \
-"PLL_SSM_DEPTH_0:5" \
-"PLL_SSM_DEPTH_1:5" \
-"PLL_SSM_DIVVAL_0:1" \
-"PLL_SSM_DIVVAL_1:1" \
-"PLL_SSM_FREQ_0:32" \
-"PLL_SSM_FREQ_1:32" \
-"PLL_SSM_RAND_PATTERN_0:2" \
-"PLL_SSM_RAND_PATTERN_1:2" \
-"PLL_SSMD_EN_0:false" \
-"PLL_SSMD_EN_1:false" \
-"PLL_SYNC_CORNER_PLL:false" \
-"PLL_SYNC_EN:false" \
-"PLL_VCO_MODE_0:MIN_JITTER" \
-"PLL_VCO_MODE_1:MIN_JITTER" }
-# Exporting Component Description of PF_CCC_C0 to TCL done
--
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