From 93692dfe0b587d29b1ce6a7dc13c9d16e28b2f28 Mon Sep 17 00:00:00 2001
From: vauban353 <vauban353@gmail.com>
Date: Sat, 22 Oct 2022 21:52:21 +0100
Subject: [PATCH] PCIe: Correct clocking of the PCIe AXI interfaces.
---
.../components/M2/DEFAULT/ADD_M2_INTERFACE.tcl | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/script_support/components/M2/DEFAULT/ADD_M2_INTERFACE.tcl b/script_support/components/M2/DEFAULT/ADD_M2_INTERFACE.tcl
index 8a96bf6..5056b94 100644
--- a/script_support/components/M2/DEFAULT/ADD_M2_INTERFACE.tcl
+++ b/script_support/components/M2/DEFAULT/ADD_M2_INTERFACE.tcl
@@ -48,19 +48,15 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"FIC1_INITIATOR:AXI4mmaster0" "B
#-------------------------------------------------------------------------------
-sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_0_ACLK" "FIC1_INITIATOR:ACLK"}
-sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_0_FABRIC_RESET_N" "FIC1_INITIATOR:ARESETN"}
-
-
+sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_1_ACLK" "M2_INTERFACE_0:ACLK" "FIC1_INITIATOR:ACLK"}
+sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_1_FABRIC_RESET_N" "FIC1_INITIATOR:ARESETN"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"BVF_RISCV_SUBSYSTEM:FIC_1_AXI4_TARGET" "M2_INTERFACE_0:AXI4_INITIATOR"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"BVF_RISCV_SUBSYSTEM:M2_APB_MTARGET" "M2_INTERFACE_0:APB_TARGET"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"FIC1_INITIATOR:AXI4mslave0" "M2_INTERFACE_0:AXI_TARGET"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:CLKS_TO_XCVR" "M2_INTERFACE_0:CLKS_FROM_TXPLL_TO_PCIE_0"}
-
-sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_0_ACLK" "M2_INTERFACE_0:ACLK"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_3_PCLK" "M2_INTERFACE_0:PCLK"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_3_FABRIC_RESET_N" "M2_INTERFACE_0:PRESETN"}
-sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_0_FABRIC_RESET_N" "M2_INTERFACE_0:ARESETN"}
+sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:FIC_1_FABRIC_RESET_N" "M2_INTERFACE_0:ARESETN"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:PCIe_REFERENCE_CLK" "M2_INTERFACE_0:PCIE_REF_CLK"}
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLOCKS_AND_RESETS:PCIe_CLK_125MHz" "M2_INTERFACE_0:PCIE_0_TL_CLK_125MHz"}
--
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