diff --git a/proposals/suraj-sonawane.rst b/proposals/suraj-sonawane.rst new file mode 100644 index 0000000000000000000000000000000000000000..3b19fb297cfb5849f4f095c703a9358d391d4edf --- /dev/null +++ b/proposals/suraj-sonawane.rst @@ -0,0 +1,380 @@ +.. _gsoc-proposal-template: + +Proposal template +################# + +Introduction +************* + +The goal of the project is to upsteam Zephyr RTOS support to run on Cortex R5 processor cores loaded from A72 core running Linux through remoteproc. Some work has already been done by a previous year Gsoc contributor (VIM, GPIO), but not all the PR's have been merged. Therefore, I will be adding peripheral support for those PR's that were not merged (J721E, Board support, DIM Timer support) and also adding peripheral support for ADC, I2C, SPI, mailbox, TI-SCI on TDA4VM SoC. The Cortex R5 processor cores are designed to provide deeply embedded real-time and safety-critical systems, so adding Zephyr RTOS support for R5 core in TDA4VM will be very helpful for users. + +Summary links +============= + +- **Contributor:** `Suraj Sonawane <https://forum.beagleboard.org/u/suraj_sonawane>`_ +- **Mentors:** `Nishanth Menon <https://forum.beagleboard.org/u/Nishanth_Menon>`_, `Dhruva Gole <https://forum.beagleboard.org/u/dhruvag2000>`_ +- **Code:** TBD +- **Documentation:** TBD +- **GSoC:** TBD + +Status +======= + +This project is currently just a proposal. + +Proposal +======== + +- Created accounts across`OpenBeagle <https://openbeagle.org/SurajS0215>`_,`Discord <https://discord.com/channels/@me>`_ and `Beagle Forum<https://forum.beagleboard.org/u/suraj_sonawane>`_ + +- `The PR for Cross Compilation task: #192 <https://github.com/jadonk/gsoc-application/pull/192>`_. + +About +===== + +- **Forum:** :fab:`discourse` `u/suraj_sonawane (Suraj Sonawane) <https://forum.beagleboard.org/u/suraj_sonawane>`_ +- **OpenBeagle:** :fab:`gitlab` `SurajS0215 (Suraj Sonawane) <https://openbeagle.org/SurajS0215>`_ +- **Github:** :fab:`github` `SurajSonawane2415 <https://github.com/SurajSonawane2415>`_ +- **School:** :fas:`school` `Veermata Jijabai Technological Institute, Mumbai <https://vjti.ac.in/>`_ +- **Country:** :fas:`flag` India +- **Primary language:** :fas:`language` English, Hindi, Marathi +- **Typical work hours:** :fas:`clock` 10AM-7PM Indian Standard Time +- **Previous GSoC participation:** :fab:`google` This is my first time participating in GSoC. + +Project +******** + +**Project name:** Upstream Zephyr Support on BeagleBone AI-64 R5. + +Description +============ + +Overview +============== + +**Zephyr** is a small, yet scalable, full-featured OS with an architecture that allows developers to focus on applications requiring a real-time OS. + +The goal of the project is to upsteam Zephyr RTOS support to run on Cortex R5 processor cores loaded from A72 core running Linux through remoteproc. Some work has already been done by a previous year Gsoc contributor (VIM, GPIO), but not all the PR's have been merged. Therefore, I will be adding peripheral support for those PR's that were not merged (J721E, Board support, DIM Timer support) and also adding peripheral support for ADC, I2C, SPI, mailbox, TI-SCI on TDA4VM SoC. The Cortex R5 processor cores are designed to provide deeply embedded real-time and safety-critical systems, so adding Zephyr RTOS support for R5 core in TDA4VM will be very helpful for users. + +**BeagleBone AI-64**, is built on a proven open source Linux approach, bringing a massive amount of computing power to the hands of developers in an easy to use single board computer. Leveraging the Texas Instruments TDA4VM SOC with dual 64-bit Arm® Cortex®-A72, C7x DSP along with deep learning, vision and multimedia accelerators, developers have access to faster analytics, more data storage options, more high speed interfaces including all the connectors you’ll need on board to build applications such as Autonomous Robotics, Vision and Video Analytics, Hi-End Drones, Media Servers, and Smart Buildings. + + +In 10-20 sentences, what are you making, for whom, why and with what technologies +(programming languages, etc.)? (We are looking for open source SOFTWARE submissions. By the way, Verilog for programming an FPGA is considered software by us.) + +TI-SCI +============== +Texas Instruments’ System Control Interface (TISCI) defines the communication protocol between various processing entities to the System Control Entity on TI SoCs. This is a set of message formats and sequence of operations required to communicate and get system services processed from the System Control Entity in the SoC. + +DM Timer Controller +================== +In TDA4VM, there are thirty timer modules in the device. MCU_TIMER0 to MCU_TIMER9 are in MCU domain and TIMER0 to TIMER19 in MAIN domain. All timers include specific functions to generate accurate tick interrupts to the operating system. + +**Timers Features** + + • Interrupts generated on overflow, compare, and capture. + + • Programmable divider clock source (2n, where n = [0-8]) + + • Dedicated input trigger for capture mode and dedicated output trigger/PWM signal + + • Generates a 1-ms tick clock when functional clock is 32.768 kHz + +For each timer implemented in the device, there are two possible clock sources: +• 32-kHz clock +• System clock + +Each timer supports three functional modes: +• Timer mode +• Capture mode +• Compare mode +The capture and compare modes are disabled by default after core reset. + +ADC +================== +Analog-to-Digital Converter (MCU_ADC) module contains a single 12-bit ADC which can be multiplexed to any +1 of 8 analog inputs (channels). Integrated in the MCU domain are two instances, each with the following main +features: + + • 4 MSPS rate with a 60 MHz sample clock + + • Single-ended or differential input options + + • Each ADC module can be configured and transformed into digital test inputs + + • Programmable 16 steps Finite State Machine (FSM) sequencer + + +I2C +================== +Device MAIN domain contains seven multi-master Inter-Integrated Circuit (I2C) interfaces, each with the +following main features: + • Compliancy to the Philips I2C-bus specification version 2.1 + • Support of standard mode (up to 100 Kbps) and fast mode (up to 400 Kbps) + • Support of 7-bit and 10-bit device addressing modes + • Support of multi-master transmitter/slave receiver and receiver/slave transmitter modes + • Built-in FIFOs with programmable size of 8 to 64 bytes for buffered read or write + • 8-bit-wide data access + • Support of Auto Idle, Idle Request/Idle Acknowledge handshake, and Asynchronous Wakeup mechanisms + • Low power consumption + +SPI +================== +Integrated in MAIN domain eight Multi-channel Serial Peripheral Interface (MCSPI) modules have the following +main features: + • Serial clock with programmable frequency, polarity, and phase for each channel + • Wide selection of MCSPI word lengths, ranging from 4 to 32 bits + • Up to four master channels, or single channel in slave mode + • Support of different master multichannel modes + • Single interrupt line for multiple interrupt source events + • Support of start-bit write command + • Support of start-bit pause and break sequence + +Software +========= + +C, RTOS + +Hardware +======== + +`BeagleBone AI-64 <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/>`_ + +Timeline +******** + + +Timeline summary +================= + +.. table:: + + +------------------------+----------------------------------------------------------------------------------------------------+ + | Date | Activity | + +========================+====================================================================================================+ + | February 26 | Connect with possible mentors and request review on first draft | + +------------------------+----------------------------------------------------------------------------------------------------+ + | March 4 | Complete prerequisites, verify value to community and request review on second draft | + +------------------------+----------------------------------------------------------------------------------------------------+ + | March 11 | Finalized timeline and request review on final draft | + +------------------------+----------------------------------------------------------------------------------------------------+ + | March 21 | Submit application | + +------------------------+----------------------------------------------------------------------------------------------------+ + | May 1 | Start bonding | + +------------------------+----------------------------------------------------------------------------------------------------+ + | May 27 | Start coding and introductory video | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 3 | Release introductory video and complete milestone #1 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 10 | Complete milestone #2 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 17 | Complete milestone #3 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 24 | Complete milestone #4 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 1 | Complete milestone #5 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 8 | Submit midterm evaluations | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 15 | Complete milestone #6 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 22 | Complete milestone #7 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 29 | Complete milestone #8 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | August 5 | Complete milestone #9 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | August 12 | Complete milestone #10 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | August 19 | Submit final project video, submit final work to GSoC site and complete final mentor evaluation | + +------------------------+----------------------------------------------------------------------------------------------------+ + + +.. table:: + + +------------------------+----------------------------------------------------------------------------------------------------+ + | Date | Activity | + +========================+====================================================================================================+ + | February 26 - March 28 | Connect with possible mentors, review past year's work(PR's), overview the Zephyr codebase, read | + | | documentation on adding board support, and create a proposal. | + +------------------------+----------------------------------------------------------------------------------------------------+ + | March 28 - April 2 | Proposal review and Submission. | + +------------------------+----------------------------------------------------------------------------------------------------+ + | April 3 - April 30 | Getting familiar with hardware and looking deeper in Zephyr code base. | + | | and looking in depth in board porting in zephyr codebase. | + +------------------------+----------------------------------------------------------------------------------------------------+ + | May 1 - May 10 | Start bonding | + +------------------------+----------------------------------------------------------------------------------------------------+ + | May 11 - May 31 | Focus on College Exams | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 1 - June 2 | Start coding and introductory video | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 3 | Release introductory video and complete milestone #1 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 10 | Complete milestone #2 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 17 | Complete milestone #3 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | June 24 | Complete milestone #4 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 1 | Complete milestone #5 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 8 | Submit midterm evaluations | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 15 | Complete milestone #6 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 22 | Complete milestone #7 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | July 29 | Complete milestone #8 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | August 5 | Complete milestone #9 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | August 12 | Complete milestone #10 | + +------------------------+----------------------------------------------------------------------------------------------------+ + | August 19 | Submit final project video, submit final work to GSoC site and complete final mentor evaluation | + +------------------------+----------------------------------------------------------------------------------------------------+ + + +Timeline detailed +================= + +Community Bonding Period (May 1st - May 15th) +============================================== + +- Discuss implementation idea and scope with mentors. +- Get the board and other required hardware ready. +- Understanding multiprocessor environment and IPC. +- Understanding remoteproc on how to load firmware from linux to other processor cores. +- Setting up the Zephyr build environment. + +Coding begins (June 1st) +========================= +- Start making an introductory Video. +- Flash Linux image on A72 core. +- Boot minimal Cortex R5 firmware from Linux running on A72 core through remoteproc. + +Milestone #1, Introductory YouTube video (June 3rd) +=================================================== +- Introductory Video. +- Add UART support for debug prints in the minimal firmware. +- Work on the unmerged pull request from a previous year's Google Summer of Code contributor titled `"Add TI J721e R5 and BeagleBone AI64 R5 initial support #59191" <https://github.com/zephyrproject-rtos/zephyr/pull/59191>`_ in order to merge it. + +Milestone #2 (June 10th) +========================== +- Add west flash support. +- Work on the unmerged pull request from a previous year's Google Summer of Code contributor titled `"Add TI J721e DM TIMER support #61020" <https://github.com/zephyrproject-rtos/zephyr/pull/61020>`_ in order to merge it. + +Milestone #3 (June 17th) +========================= +- Understanding ADC module IN TDA4VM. +- Add ADC Support in Zephyr. + +Milestone #4 (June 24th) +========================== +- Understanding I2C module IN TDA4VM. +- Add I2C Support in Zephyr. + +Milestone #5 (July 1st) +======================== +- Understanding SPI module IN TDA4VM. +- Add SPI Support in Zephyr. + +Submit midterm evaluations (July 8th) +===================================== + +.. important:: + + **July 12 - 18:00 UTC:** Midterm evaluation deadline (standard coding period) + +- Submit work and documentation for the features developed. + +Milestone #6 (July 15th) +========================= + +- Understanding TI-SCI (Texas Instruments System Controller Interface ). +- Add TI-SCI Support. + +Milestone #7 (July 22nd) +========================= +- Understanding mailbox module in TDA4VM. +- Add mailbox Support in Zephyr. + +Milestone #8 (July 29th) +========================= +- Understanding Inter-process communication (IPC). +- Add IPC Support. To run basic IPC examples with the Linux cores. + +Milestone #9 (Aug 5th) +======================= + +- Add support for the R5 cores to communicate with the Device Manager to control clock. + +Milestone #10 (Aug 12th) +======================== +- Work on optimizing the performance of the support that has been added until now. + +Final YouTube video (Aug 19th) +=============================== + +- Submit final project video, submit final work to GSoC site and complete final mentor evaluation + + +Final Submission (Aug 24nd) +============================ + +.. important:: + + **August 19 - 26 - 18:00 UTC:** Final week: GSoC contributors submit their final work + product and their final mentor evaluation (standard coding period) + + **August 26 - September 2 - 18:00 UTC:** Mentors submit final GSoC contributor + evaluations (standard coding period) + +Initial results (September 3) +============================= + +.. important:: + + **September 3 - November 4:** GSoC contributors with extended timelines continue coding + + **November 4 - 18:00 UTC:** Final date for all GSoC contributors to submit their final work product and final evaluation + + **November 11 - 18:00 UTC:** Final date for mentors to submit evaluations for GSoC contributor projects with extended deadline + + +Experience and approch +*********************** + +- Worked on `Multi Firmware ESP <https://github.com/SurajSonawane2415/multi-firmware-esp>`_ project, developing bootloader for ESP32. As a result, I have a good understanding of low-level codes in the C language. + +- Implemented Dijkstra algorithm in C for `Maze-Solving bot <https://github.com/SurajSonawane2415/MazeBlaze>`_ project, gaining knowledge of data structures in c and RTOS. + +- Contributed to `Autonomous Vehicle <https://github.com/SurajSonawane2415/Autonomous-Vehicle>`_ project, utilizing embedded system, C++, and understanding sensor interfaces with I2C, SPI, ADC, UART protocols. + +- I have been exploring Zephyr Driver Development and have gained sufficient knowledge to start the implementation. + +- In all of the above projects, I designed many things from scratch and rapidly learned many things in embedded systems. Even though I faced many errors, I stayed committed and figured them out. I have relevant experience (C, RTOS) for this project, and as a passionate Open Source enthusiast, I will wholeheartedly work towards completing the project idea within the allotted time. + + +Contingency +=========== + +I believe that if I get stuck on my project and my mentor isn’t around, I will use the resources that are available to me. Some of those information portals are listed below. + +- `Zephyr Project Documentation <https://docs.zephyrproject.org/latest/index.html>`_ +- `J721E /TDA4VM Technical Reference Manual <http://www.ti.com/lit/pdf/spruil1>`_ +- `remoteproc <https://www.kernel.org/doc/html/latest/staging/remoteproc.html>`_ +- `Tutorial: Mastering Zephyr Driver Development <https://www.youtube.com/watch?v=o-f2qCd2AXo>`_ + +- I will ask on the Beagleboard and Zephyr forums or Discord. + +Benefit +======== +- With Zephyr support, developers gain access to a rich ecosystem of Zephyr-compatible libraries, drivers, and tools, opening up new possibilities for creating innovative projects and applications on the BeagleBone AI-64 R5 platform. + +- Zephyr's lightweight and real-time capabilities potentially improve the BeagleBone AI-64 R5's performance in many future projects and applications. + +Misc +==== + +`The PR for Cross Compilation task: #192 <https://github.com/jadonk/gsoc-application/pull/192>`_.