diff --git a/proposals/suraj-sonawane.rst b/proposals/suraj-sonawane.rst
index 467e3029ce1a4c9d09cf9c60602f7826392d3110..b71fe756668e477dd93fcdcb397af4403b0b315e 100644
--- a/proposals/suraj-sonawane.rst
+++ b/proposals/suraj-sonawane.rst
@@ -1,15 +1,15 @@
.. _gsoc-proposal-template:
Upstream Zephyr Support on BeagleBone AI-64 R5
-#################
+################################################
Introduction
*************
-The goal of the project is to upsteam Zephyr RTOS support to run on Cortex R5 processor cores loaded from A72 core running Linux through remoteproc. Some work has already been done by a previous year Gsoc contributor (VIM, GPIO), but not all the PR's have been merged. Therefore, I will be adding peripheral support for those PR's that were not merged (J721E, Board support, DIM Timer support) and also adding peripheral support for ADC, I2C, SPI, mailbox, TI-SCI on TDA4VM SoC. The Cortex R5 processor cores are designed to provide deeply embedded real-time and safety-critical systems, so adding Zephyr RTOS support for R5 core in TDA4VM will be very helpful for users.
+The goal of the project is to upsteam Zephyr RTOS support to run on Cortex R5 processor cores loaded from A72 core running Linux through remoteproc. Some work has already been done by a previous year Gsoc contributor ( `VIM <https://github.com/zephyrproject-rtos/zephyr/pull/60856>`_ , `GPIO <https://github.com/zephyrproject-rtos/zephyr/pull/61316>`_ ), but not all the PR's have been merged. Therefore, I will be adding peripheral support for those PR's that were not merged ( `J721E, Board support <https://github.com/zephyrproject-rtos/zephyr/pull/59191>`_, `DIM Timer support <https://github.com/zephyrproject-rtos/zephyr/pull/61020>`_ ) and also adding peripheral support for ADC, I2C, SPI, mailbox, TI-SCI on TDA4VM SoC. The Cortex R5 processor cores are designed to provide deeply embedded real-time and safety-critical systems, so adding Zephyr RTOS support for R5 core in TDA4VM will be very helpful for users.
Summary links
-=============
+===============
- **Contributor:** `Suraj Sonawane <https://forum.beagleboard.org/u/suraj_sonawane>`_
- **Mentors:** `Nishanth Menon <https://forum.beagleboard.org/u/Nishanth_Menon>`_, `Dhruva Gole <https://forum.beagleboard.org/u/dhruvag2000>`_
@@ -18,19 +18,19 @@ Summary links
- **GSoC:** TBD
Status
-=======
+========
This project is currently just a proposal.
Proposal
-========
+==========
- Created accounts across `OpenBeagle <https://openbeagle.org/SurajS0215>`_ , `Discord <https://discord.com/channels/@me>`_ and `Beagle Forum <https://forum.beagleboard.org/u/suraj_sonawane>`_.
- `The PR for Cross Compilation task: #192 <https://github.com/jadonk/gsoc-application/pull/192>`_.
About
-=====
+=======
- **Forum:** :fab:`discourse` `u/suraj_sonawane (Suraj Sonawane) <https://forum.beagleboard.org/u/suraj_sonawane>`_
- **OpenBeagle:** :fab:`gitlab` `SurajS0215 (Suraj Sonawane) <https://openbeagle.org/SurajS0215>`_
@@ -42,28 +42,28 @@ About
- **Previous GSoC participation:** :fab:`google` This is my first time participating in GSoC.
Project
-********
+*********
**Project name:** Upstream Zephyr Support on BeagleBone AI-64 R5.
Description
-============
+=============
Overview
-==============
-
-**Zephyr** is a small, yet scalable, full-featured OS with an architecture that allows developers to focus on applications requiring a real-time OS.
+==========
-The goal of the project is to upsteam Zephyr RTOS support to run on Cortex R5 processor cores loaded from A72 core running Linux through remoteproc. Some work has already been done by a previous year Gsoc contributor (VIM, GPIO), but not all the PR's have been merged. Therefore, I will be adding peripheral support for those PR's that were not merged (J721E, Board support, DIM Timer support) and also adding peripheral support for ADC, I2C, SPI, mailbox, TI-SCI on TDA4VM SoC. The Cortex R5 processor cores are designed to provide deeply embedded real-time and safety-critical systems, so adding Zephyr RTOS support for R5 core in TDA4VM will be very helpful for users.
+`Zephyr <https://docs.zephyrproject.org/latest/index.html>`_ is a small, yet scalable, full-featured OS with an architecture that allows developers to focus on applications requiring a real-time OS.
-**BeagleBone AI-64**, is built on a proven open source Linux approach, bringing a massive amount of computing power to the hands of developers in an easy to use single board computer. Leveraging the Texas Instruments TDA4VM SOC with dual 64-bit Arm® Cortex®-A72, C7x DSP along with deep learning, vision and multimedia accelerators, developers have access to faster analytics, more data storage options, more high speed interfaces including all the connectors you’ll need on board to build applications such as Autonomous Robotics, Vision and Video Analytics, Hi-End Drones, Media Servers, and Smart Buildings.
+`BeagleBone AI-64 <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/>`_, is built on a proven open source Linux approach, bringing a massive amount of computing power to the hands of developers in an easy to use single board computer. Leveraging the Texas Instruments TDA4VM SOC with dual 64-bit Arm® Cortex®-A72, C7x DSP along with deep learning, vision and multimedia accelerators, developers have access to faster analytics, more data storage options, more high speed interfaces including all the connectors you’ll need on board to build applications such as Autonomous Robotics, Vision and Video Analytics, Hi-End Drones, Media Servers, and Smart Buildings.
TI-SCI
-==============
+--------
+
Texas Instruments’ System Control Interface (TISCI) defines the communication protocol between various processing entities to the System Control Entity on TI SoCs. This is a set of message formats and sequence of operations required to communicate and get system services processed from the System Control Entity in the SoC.
-DM Timer Controller
-==================
+`DM Timer Controller <http://www.ti.com/lit/pdf/spruil1>`_
+---------------------
+
In TDA4VM, there are thirty timer modules in the device. MCU_TIMER0 to MCU_TIMER9 are in MCU domain and TIMER0 to TIMER19 in MAIN domain. All timers include specific functions to generate accurate tick interrupts to the operating system.
**Timers Features**
@@ -86,8 +86,8 @@ Each timer supports three functional modes:
• Compare mode
The capture and compare modes are disabled by default after core reset.
-ADC
-==================
+`ADC <http://www.ti.com/lit/pdf/spruil1>`_
+-----
Analog-to-Digital Converter (MCU_ADC) module contains a single 12-bit ADC which can be multiplexed to any
1 of 8 analog inputs (channels). Integrated in the MCU domain are two instances, each with the following main
features:
@@ -101,8 +101,8 @@ features:
• Programmable 16 steps Finite State Machine (FSM) sequencer
-I2C
-==================
+`I2C <http://www.ti.com/lit/pdf/spruil1>`_
+-----
Device MAIN domain contains seven multi-master Inter-Integrated Circuit (I2C) interfaces, each with the
following main features:
• Compliancy to the Philips I2C-bus specification version 2.1
@@ -114,8 +114,8 @@ following main features:
• Support of Auto Idle, Idle Request/Idle Acknowledge handshake, and Asynchronous Wakeup mechanisms
• Low power consumption
-SPI
-==================
+`SPI <http://www.ti.com/lit/pdf/spruil1>`_
+-----
Integrated in MAIN domain eight Multi-channel Serial Peripheral Interface (MCSPI) modules have the following
main features:
• Serial clock with programmable frequency, polarity, and phase for each channel
@@ -126,97 +126,19 @@ main features:
• Support of start-bit write command
• Support of start-bit pause and break sequence
-Implementation Details
-============
+Implementation Details
+========================
PART-1. Initial configuration:
-================
-
-**1. Write board YAML:**
-The board YAML file describes the board at a high level. This includes the SoC, board variants, and board revisions.
-Detailed configurations, such as hardware description and configuration are done in devicetree and Kconfig.
-
-The skeleton of the board YAML file is:
-
-.. code-block:: yaml
-
- board:
- name: <board-name>
- vendor: <board-vendor>
- revision:
- format: <major.minor.patch|letter|number|custom>
- default: <default-revision-value>
- exact: <true|false>
- revisions:
- - name: <revA>
- - name: <revB>
- ...
- socs:
- - name: <soc-1>
- variants:
- - name: <variant-1>
-
-
-
-**2. Write device tree:**
-The devicetree file describes your board hardware in the Devicetree Source (DTS) format.
-In general, board-name.dts should look like this:
-
-.. code-block:: dts
-
- /dts-v1/;
- #include <your_soc_vendor/your_soc.dtsi>
-
- / {
- model = "A human readable name";
- compatible = "yourcompany,plank";
-
- chosen {
- zephyr,console = &your_uart_console;
- zephyr,sram = &your_memory_node;
- /* other chosen settings for your hardware */
- };
-
- /*
- * Your board-specific hardware: buttons, LEDs, sensors, etc.
- */
-
- leds {
- compatible = "gpio-leds";
- led0: led_0 {
- gpios = < /* GPIO your LED is hooked up to */ >;
- label = "LED 0";
- };
- /* ... other LEDs ... */
- };
-
- buttons {
- compatible = "gpio-keys";
- /* ... your button definitions ... */
- };
-
- /* These aliases are provided for compatibility with samples */
- aliases {
- led0 = &led0; /* now you support the blinky sample! */
- /* other aliases go here */
- };
- };
-
- &some_peripheral_you_want_to_enable { /* like a GPIO or SPI controller */
- status = "okay";
- };
-
- &another_peripheral_you_want {
- status = "okay";
- };
-
-
-**3. Write Kconfig files:**
-Zephyr uses the Kconfig language to configure software features. Your board needs to provide some Kconfig settings before you can compile a Zephyr application for it.
-
-**4. Add Flash and debug support:**
-Zephyr supports Building, Flashing and Debugging via west extension commands.
+-------------------------------
+
+**1. Write Kconfig and device tree filels (Already done by previous year gsoc contributor)**
+- Write Kconfig and device tree filels: Already done by previous year gsoc contributor in `this PR <https://github.com/zephyrproject-rtos/zephyr/pull/59191>`_:
+
+
+**2. Add Flash and debug support:**
+Zephyr supports Building, Flashing and Debugging via `west extension <https://docs.zephyrproject.org/latest/develop/west/extensions.html#west-extensions>`_ commands.
To add west flash and west debug support, we need to create a board.cmake file in board directory. This file’s job is to configure a “runner†for your board. (There’s nothing special you need to do to get west build support for board.)
West is “pluggableâ€: you can add your own commands to west without editing its source code. These are called west extension commands, or just “extensions†for short.
@@ -228,7 +150,7 @@ West is “pluggableâ€: you can add your own commands to west without editing i
PART-2. Driver developement:
-==================
+-----------------------------
**1. Board Files:**
Board files are the primary descriptor of the hardware in Zephyr.
@@ -238,16 +160,16 @@ DeviceTree Overlays can be used by the Zephyr application to specify new hardwar
**3. Devicetree bindings:**
A devicetree binding declares requirements on the contents of nodes, and provides semantic information about the contents of valid nodes. Zephyr devicetree bindings are YAML files in a custom format (Zephyr does not use the dt-schema tools used by the Linux kernel).
-**4. API Definations:**
+**4. API Definitions:**
Available under "include/drivers/". Provides a general way of unteracting with driver instances.
Software
-=========
+==========
-C, RTOS
+`C <https://en.wikipedia.org/wiki/C_(programming_language)>`_, `RTOS <https://docs.zephyrproject.org/latest/index.html>`_
Hardware
-========
+==========
`BeagleBone AI-64 <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/>`_
@@ -255,7 +177,7 @@ Timeline
********
Timeline summary
-=================
+==================
.. table::
@@ -422,6 +344,8 @@ Experience and approch
- In all of the above projects, I designed many things from scratch and rapidly learned many things in embedded systems. Even though I faced many errors, I stayed committed and figured them out. I have relevant experience (C, RTOS) for this project, and as a passionate Open Source enthusiast, I will wholeheartedly work towards completing the project idea within the allotted time.
+- Contributions in `openbeagle.org/gsoc <https://openbeagle.org/gsoc/gsoc.beagleboard.io>`_
+ - Improved Documentation - `#40 <https://openbeagle.org/gsoc/gsoc.beagleboard.io/-/merge_requests/40>`_ (merged)
Contingency
===========