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Using the Beagleboard.org repo. for further advancement in FPGA, Linux, and VHDL...

https://gsoc.beagleboard.org/proposals/RISC-V_CPU_core_in_FPGA_fabric.html

Walking through the gateware demo tutorial.

This project aims to add gateware for LPDDR4 access from the FPGA fabric to the BeagleV-Fire

This project showcases an example using LSRAM onboard the BVF Fabric.

1st MISC (minimal instruction set computer) into polarfire-SoC FPGA

SERV RISC-V on BeagleV-Fire PolarFire SoC Gateware

Experimental CAN bus enabling of BeagleV-Fire and maybe some more FPGA programming..

my lovely gateware attempt 3

Support for comms cape

This repository contains a simple LSRAM access demonstration for the BVF.