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This repository contains a simple LSRAM access demonstration for the BVF.

This project showcases an example using LSRAM onboard the BVF Fabric.

Walking through the gateware demo tutorial.

This project showcases an example using LSRAM onboard the BVF Fabric.

This project adds an option to instantiate a RISC-V Core Mi-V RISC-V CPU to the gateware

This project aims to add gateware for LPDDR4 access from the FPGA fabric to the BeagleV-Fire

Support for comms cape

https://gsoc.beagleboard.org/proposals/RISC-V_CPU_core_in_FPGA_fabric.html