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Support for comms cape

Experimental CAN bus enabling of BeagleV-Fire and maybe some more FPGA programming..

Aven's personal fork of the Gateware repository

test build

https://gsoc.beagleboard.org/proposals/RISC-V_CPU_core_in_FPGA_fabric.html

This project adds an option to instantiate a RISC-V Core Mi-V RISC-V CPU to the gateware