diff --git a/boards/beagleplay/03-design.rst b/boards/beagleplay/03-design.rst
index 384d46618f31d6c1edde8af4f06e991cc5132155..75bf2404e8cb35983132a63f5b5a1bc6b221b89e 100644
--- a/boards/beagleplay/03-design.rst
+++ b/boards/beagleplay/03-design.rst
@@ -47,7 +47,7 @@ are interested to know more about the AM62x SoC you may take a look at
`AM62x Sitaraâ„¢ Processors datasheet <https://www.ti.com/lit/ds/symlink/am625.pdf>`_.
.. figure:: images/am625.svg
- :width: 1247
+ :width: 940
:align: center
:alt: AM6254 SoC block diagram
@@ -69,14 +69,21 @@ and Power Management Integrated Circuit (PMIC) that interface with SoC to genera
TLV75801 - LDO
===============
+An adjustable 500-mA low-dropout (LDO) regulator. Consumes very low quiescent current and provides fast line and load transient
+performance. The TLV758P features an ultra-low dropout of 130 mV at 500 mA that can help improve the power efficiency of the system.
+The TLV758P is stable with small ceramic output capacitors, allowing for a small overall solution size. A precision band-gap and error
+amplifier provides high accuracy of 0.7% (max) at 25°C and 1% (max) over temperature (85°C). This device includes integrated thermal
+shutdown, current limit, and undervoltage lockout (UVLO) features. The TLV758P has an internal foldback current limit that helps reduce the
+thermal dissipation during short-circuit events.
+
.. figure:: images/hardware-design/TLV75801PDBVR.svg
- :width: 1247
+ :width: 940
:align: center
:alt: TLV75801PDBVR LDO schematic for 1V0 output
TLV75801PDBVR LDO schematic for 1V0 output
-This provides 1.0V required by the single-pair Ethernet PHY (U13 - DP83TD510ERHBR). It was decided this was less
+TLV75801 provides 1.0V required by the single-pair Ethernet PHY (U13 - DP83TD510ERHBR). It was decided this was less
likely to be needed than the other rails coming off of the primary PMIC and therefore was given its own regulator
when running low on power rails.
@@ -90,8 +97,14 @@ when running low on power rails.
TLV62595 - DC/DC regulator
==========================
+A high-frequency synchronous step-down converter optimized for compact solution size
+and high efficiency. The device integrates switches capable of delivering an output current up to 4 A.
+At medium to heavy loads, the converter operates in pulse width modulation (PWM) mode with typical
+2.2-MHz switching frequency. At light load, the device automatically enters Power Save Mode (PSM) to
+maintain high efficiency over the entire load current range with a quiescent current as low as 10 μA.
+
.. figure:: images/hardware-design/TLV62595DMQR.svg
- :width: 1247
+ :width: 1024
:align: center
:alt: TLV62595DMQR DC/DC regulator schematic for 3V3 output
@@ -101,12 +114,22 @@ This provides 3.3V for the vast majority of 3.3V I/Os on the board, off-board 3.
QWIIC and Grove connectors, as well as to the PMIC LDO to provide power for the 1.8V on-board I/Os, DDR4, and
gigabit Ethernet PHY. Due to the relatively high current rating (3A), a highly efficient (up to 97%) was chosen.
-The primary TPS65219 PMIC firmware uses GPO2 to provide the enable signal (VDD_3V3_EN). The power-good signal
-(VDD_3V3_PG) is available at TP19 and is unused on the rest of the board.
+.. note::
+ The primary TPS65219 PMIC firmware uses GPO2 to provide the enable signal (VDD_3V3_EN). The power-good signal
+ (VDD_3V3_PG) is available at TP19 and is unused on the rest of the board.
TPS65219 - PMIC
================
+The TPS65219 is a Power Management IC (PMIC) designed to supply a wide range of SoCs in both
+portable and stationary applications. The DC-DC converters are capable of 1x 3.5 A and 2x
+2 A. The converters require a small 470 nH inductor, 4.7 μF input capacitance, and a minimum 10 μF
+output capacitance per rail. Two of the LDOs support output currents of 400
+mA at an output voltage range of 0.6 V to 3.4 V. These LDOs support bypass mode, acting as a load-
+switch, and allow voltage-changes during operation. The other two LDOs support output currents of 300
+mA at an output voltage range of 1.2 V to 3.3 V. The LDOs also support load-switch mode.
+The I2C-interface, IOs, GPIOs and multi-function-pins (MFP) allow a seamless interface to a wide range of SoCs.
+
.. figure:: images/hardware-design/TPS65219.svg
:width: 1247
:align: center
@@ -141,6 +164,8 @@ use the pre-installed VisualStudio Code editor by putting the address ``192.168.
USB A & USB C
==============
+Below is the schematic of full size USB A for pripheral connection and USB C for device power & tethering.
+
.. figure:: images/hardware-design/usb.svg
:width: 1247
:align: center
@@ -151,6 +176,19 @@ USB A & USB C
ADC102S051 - 2ch 10bit ADC
===========================
+The ADC102S051 is a low-power, two-channel CMOS 10-bit analog-to-digital converter with a high-
+speed serial interface. Unlike the conventional practice of specifying performance at a single sample
+rate only, the ADC102S051 is fully specified over a sample rate range of 200 ksps to 500 ksps. The
+converter is based on a successive-approximation register architecture with an internal track-and-hold
+circuit. It can be configured to accept one or two input signals at inputs IN1 and IN2.
+The output serial data is straight binary, and is compatible with several standards, such as SPI,
+QSPI, MICROWIRE, and many common DSP serial interfaces. We ar using it over SPI.
+The ADC102S051 operates with a single supply that can range from +2.7V to +5.25V. Normal power
+consumption using a +3V or +5V supply is 2.7 mW and 8.6 mW, respectively. The power-down feature
+reduces the power consumption to just 0.12 μW using a +3V supply, or 0.47 μW using a +5V supply.
+
+
+
.. figure:: images/hardware-design/ADC102S051.svg
:width: 1247
:align: center
@@ -161,6 +199,9 @@ ADC102S051 - 2ch 10bit ADC
mikroBUS
=========
+mikroBUS is a standard specification by MikroElektronika that can be freely used by anyone following the guidelines.
+It includes SPI, I2C, UART, PWM, ADC, reset, interrupt, and power (3.3V and 5V) connections to common embedded peripherals.
+
.. figure:: images/hardware-design/mikroBUS.svg
:width: 1247
:align: center
@@ -171,6 +212,10 @@ mikroBUS
Grove
======
+Seeed Studio Grove System is a modular, standardized connector prototyping ecosystem. The Grove System
+takes a building block approach to assembling electronics. Compared to the jumper or solder based system,
+it is easier to connect devices to an application, simplifying the learning system
+
.. figure:: images/hardware-design/grove.svg
:width: 1247
:align: center
@@ -181,6 +226,8 @@ Grove
QWIIC
=====
+Qwiic, or STEMMA QT are 4pin JST SH 1.00 connectors for easy I2C connection.
+
.. figure:: images/hardware-design/qwiic.svg
:width: 1247
:align: center
@@ -199,6 +246,8 @@ Single Pair ethernet port. Schematic diagrams below show how these buttons and L
Buttons
========
+Power, Reset and User buttons for turning board ON/OFF, resetting board, and boot selection or user assigned control.
+
.. table:: BeaglePlay buttons
+-------------------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------+
@@ -212,8 +261,10 @@ Buttons
LEDs
=====
+Power and user LEDs for status and general purpose usage.
+
.. figure:: images/hardware-design/leds.svg
- :width: 1247
+ :width: 924
:align: center
:alt: BeaglePlay LEDs
@@ -222,21 +273,41 @@ LEDs
Wired and wireless connectivity
********************************
-Gigabit ethernet
-=================
+For internet connection or general connectivity between BeaglePlay and other devices.
-.. figure:: images/hardware-design/WL1807MODGIMOC.svg
- :width: 1247
+RTL8211F Gigabit ethernet
+==========================
+
+The Realtek RTL8211F-CG is a highly integrated Ethernet transceiver that is compatible with 10Base-T,
+100Base-TX, and 1000Base-T IEEE 802.3 standards. It provides all the necessary physical layer functions
+to transmit and receive Ethernet packets over CAT.5 UTP cable. The RTL8211F(I)-CG uses state-of-the-art
+DSP technology and an Analog Front End (AFE) to enable high-speed data transmission and reception over
+UTP cable. Functions such as Crossover Detection & Auto-Correction, polarity correction, adaptive
+equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are
+implemented in the RTL8211F(I)-CG to provide robust transmission and reception capabilities at
+10Mbps, 100Mbps, or 1000Mbps.
+
+.. figure:: images/hardware-design/gigabit-ethernet.svg
+ :width: 1024
:align: center
:alt: Gigabit ethernet
Gigabit ethernet
-Single pair ethernet
-=====================
+DP83TD510E Single pair ethernet
+================================
+
+The DP83TD510E is an ultra-low power Ethernet physical layer transceiver compliant with the IEEE
+802.3cg 10Base-T1L specification. The PHY has very low noise coupled receiver architecture enabling
+long cable reach and very low power dissipation. The DP83TD510E has external MDI termination to
+support intrinsic safety requirements. It interfaces with MAC layer through MII, Reduced MII (RMII) , RGMII,
+and RMII low power 5-MHz master mode. It also supports RMII back-to-back mode for applications that
+require cable reach extension beyond 2000 meters. It supports a 25MHz reference clock output to clock
+other modules on the system. The DP83TD510E offers integrated cable diagnostic tools; built-in self-
+test, and loopback capabilities for ease of design or debug
.. figure:: images/hardware-design/single-pair-ethernet.svg
- :width: 1247
+ :width: 1024
:align: center
:alt: Single pair ethernet
@@ -245,8 +316,13 @@ Single pair ethernet
WL1807MOD - WiFi 2.4G/5G
=========================
+The WL18x7MOD is a Wi-Fi, dual-band, 2.4- and 5-GHz module solution with two antennas supporting industrial temperature grade.
+The device is FCC, IC, ETSI/CE, and TELEC certified for AP (with DFS support) and client. TI offers drivers for high-level
+operating systems, such as Linux® and Android™. Additional drivers, such as WinCE and RTOS, which includes
+QNX, Nucleus, ThreadX, and FreeRTOS, are supported through third parties.
+
.. figure:: images/hardware-design/WL1807MODGIMOC.svg
- :width: 1247
+ :width: 1024
:align: center
:alt: WL1807MOD dual-band (2.4G/5G) WiFi
@@ -255,6 +331,21 @@ WL1807MOD - WiFi 2.4G/5G
CC1352P7 - BLE & SubGHz
========================
+The SimpleLinkâ„¢ CC1352P7 device is a multiprotocol and multi-band Sub-1 GHz and 2.4-GHz wireless
+microcontroller (MCU) supporting Thread, Zigbee®, Bluetooth® 5.2 Low Energy, IEEE 802.15.4g, IPv6-enabled
+smart objects (6LoWPAN), mioty®, Wi-SUN®, proprietary systems, including the TI 15.4-Stack (Sub-1 GHz and
+2.4 GHz), and concurrent multiprotocol through a Dynamic Multiprotocol Manager (DMM) driver. The CC1352P7
+is based on an Arm® Cortex® M4F main processor and optimized for low-power wireless communication and
+advanced sensing in grid infrastructure, building automation, retail automation, personal electronics and medical
+applications.
+
+.. figure:: images/hardware-design/cc1352-block-diagram.*
+ :width: 420
+ :align: center
+ :alt: CC1352P7 block diagram
+
+ CC1352P7 block diagram
+
.. figure:: images/hardware-design/cc1352.svg
:width: 1247
:align: center
@@ -262,7 +353,6 @@ CC1352P7 - BLE & SubGHz
CC1352P7 Bluetooth Low Energy (BLW) and SubGHz connectivity
-
Memory, Media and Data storage
********************************
@@ -270,7 +360,7 @@ DDR4
====
.. figure:: images/hardware-design/ddr4.svg
- :width: 1247
+ :width: 940
:align: center
:alt: DDR4 Memory
@@ -300,7 +390,7 @@ Board EEPROM
=============
.. figure:: images/hardware-design/board-id.svg
- :width: 1247
+ :width: 940
:align: center
:alt: Board EEPROM ID
@@ -347,7 +437,7 @@ RTC
====
.. figure:: images/hardware-design/rtc.svg
- :width: 1247
+ :width: 940
:align: center
:alt: Real Time Clock (RTC)
@@ -357,7 +447,7 @@ UART Debug Port
================
.. figure:: images/hardware-design/debug.svg
- :width: 1247
+ :width: 940
:align: center
:alt: UART debug port