From 0916a980f1985582deb1ced60cec823aa100d3c9 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <lorforlinux@beagleboard.org>
Date: Fri, 1 Dec 2023 20:01:41 +0530
Subject: [PATCH] Fix table build error

---
 boards/beaglebone/ai-64/01-introduction.rst | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/boards/beaglebone/ai-64/01-introduction.rst b/boards/beaglebone/ai-64/01-introduction.rst
index a7a24761..bcda7f95 100644
--- a/boards/beaglebone/ai-64/01-introduction.rst
+++ b/boards/beaglebone/ai-64/01-introduction.rst
@@ -92,9 +92,10 @@ description of the major components and interfaces that make up the board.
     +-------------------------+-----------------------------------------------------------------------------------------------------------------------------------------+
     | **PMIC**                | TPS65941213 and TPS65941111 PMICs regulator and one additional LDO.                                                                     |
     +-------------------------+-----------------------------------------------------------------------------------------------------------------------------------------+
-    | **Debug Support**       | 2x 3 pin 3.3V TTL header                                                                                                                |
-    |                         |     1. WKUP_UART0: Wake-up domain serial port                                                                                           |
-    |                         |     2. UART0: Main domain serial port                                                                                                   |
+    | **Debug Support**       | 2x 3 pin 3.3V TTL header:                                                                                                               |
+    |                         |    1. WKUP_UART0: Wake-up domain serial port                                                                                            |
+    |                         |    2. UART0: Main domain serial port                                                                                                    |
+    +                         +-----------------------------------------------------------------------------------------------------------------------------------------+
     |                         | 10-pin JTAG TAG-CONNECT footprint                                                                                                       |
     +-------------------------+-----------------------------------------------------------------------------------------------------------------------------------------+
     | **Power Source**        | USB C or DC Jack (5V @ >3A)                                                                                                             |
-- 
GitLab