diff --git a/boards/beaglev/fire/demos-and-tutorials/gateware/customize-cape-gateware-verilog.rst b/boards/beaglev/fire/demos-and-tutorials/gateware/customize-cape-gateware-verilog.rst
index 00112f422af6fdd572f28dca0f866e2682e9d4ac..548babfe5837fedb4c7dc017a12945ea009dbed0 100644
--- a/boards/beaglev/fire/demos-and-tutorials/gateware/customize-cape-gateware-verilog.rst
+++ b/boards/beaglev/fire/demos-and-tutorials/gateware/customize-cape-gateware-verilog.rst
@@ -30,7 +30,7 @@ Fork BeagleV-Fire Gateware Repository
 
 .. important:: 
     All new users need to be manually approved to protect from BOT spam. You will not be able to fork the Gateware
-    Repository until you have been approved. A request to 'the forum <https://forum.beagleboard.org/t/requesting-access-to-gitlab-to-fork-gateware/37494>'
+    Repository until you have been approved. A request to `the forum <https://forum.beagleboard.org/t/requesting-access-to-gitlab-to-fork-gateware/37494>`_
     may expedite the process. 
 
 Navigate to BeagleV-Fire's `gateware source code repository <https://git.beagleboard.org/beaglev-fire/gateware>`_.
@@ -392,7 +392,7 @@ On BeagleV-Fire, initiate the reprogramming of the FPGA with your gateware bitst
 
 .. code:: shell
 
-    sudo /usr/share/beagleboard/gateware/changes-gateware.sh ./my_custom_fpga_design
+    sudo /usr/share/beagleboard/gateware/change-gateware.sh ./my_custom_fpga_design
 
 Wait for a couple of minutes for the BeagleV-Fire to reprogram itself.
 
diff --git a/boards/beaglev/fire/demos-and-tutorials/gateware/gateware-tcl-scripts-structure.rst b/boards/beaglev/fire/demos-and-tutorials/gateware/gateware-tcl-scripts-structure.rst
index 6c42f12434ddca42fd5ba54a4408b1feebe18c67..c2121d48c28a4be5204d1b7da3ea713fecd6a6e8 100644
--- a/boards/beaglev/fire/demos-and-tutorials/gateware/gateware-tcl-scripts-structure.rst
+++ b/boards/beaglev/fire/demos-and-tutorials/gateware/gateware-tcl-scripts-structure.rst
@@ -70,7 +70,7 @@ The component directory contains subdirectories for:
 .. figure:: images/gateware-cape-robotics-dirs.png
     :align: center
 
-Gareware TCL Scripts
+Gateware TCL Scripts
 --------------------
 
 The component directory contains the TCL scripts executed by Libero to generate the gateware.
@@ -81,4 +81,17 @@ are typically IP configuration scripts and SmartDesign stiching scripts.
 .. figure:: images/gateware-cape-robotics-files.png
     :align: center
 
+Opening the gateware as a libero project
+========================================
+
+It can be slightly difficult to explore the gateware design through the TCL files. To inspect the
+gateware design in detail easily, you can open the gateware as a Libero project. This is done by running the 
+following command in the gateware directory:
+
+.. code-block:: shell
+
+    python build-bitstream.py ./build-options/default.yaml # build option depending on the gateware
+
+You will need to have all microchip tools installed and the environment variables set up correctly. Refer 
+to the guide `here <mchp-fpga-tools-installation-guide>`_ for information on how to install these tools.