diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml
index 3c36cd0510de8364fd3bb034fd2e9c8e32ed5b85..e396e47b2f13cb0e57bffceaabee255658ad2a5e 100644
--- a/Documentation/devicetree/bindings/eeprom/at24.yaml
+++ b/Documentation/devicetree/bindings/eeprom/at24.yaml
@@ -18,7 +18,9 @@ select:
properties:
compatible:
contains:
- pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
+ anyOf:
+ - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
+ - enum: ["microchip,24aa025e48", "microchip,24aa025e64"]
required:
- compatible
@@ -102,9 +104,6 @@ properties:
pattern: spd$
# These are special cases that don't conform to the above pattern.
# Each requires a standard at24 model as fallback.
- - items:
- - const: belling,bl24c16a
- - const: atmel,24c16
- items:
- enum:
- rohm,br24g01
@@ -122,16 +121,25 @@ properties:
- rohm,br24g04
- const: atmel,24c04
- items:
- - const: renesas,r1ex24016
+ - enum:
+ - belling,bl24c16a
+ - renesas,r1ex24016
- const: atmel,24c16
- items:
- const: giantec,gt24c32a
- const: atmel,24c32
+ - items:
+ - const: onnn,n24s64b
+ - const: atmel,24c64
- items:
- enum:
- renesas,r1ex24128
- samsung,s524ad0xd1
- const: atmel,24c128
+ - items:
+ - const: microchip,24aa025e48
+ - items:
+ - const: microchip,24aa025e64
- pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
label:
diff --git a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml
index 26bed558c6b8779721851540426a62f7f8bba2c4..c4cc8af18280785230021ebdb745c42e754abff0 100644
--- a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml
@@ -30,6 +30,9 @@ properties:
clocks:
minItems: 1
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml b/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml
index b2d19cfb87addc250bda299ea8508209d10b635b..e61cdb5b16efdf5967510200d3a61d6f259d6d9d 100644
--- a/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml
@@ -26,6 +26,7 @@ properties:
- microchip,sam9x60-i2c
- items:
- enum:
+ - microchip,sama7d65-i2c
- microchip,sama7g5-i2c
- microchip,sam9x7-i2c
- const: microchip,sam9x60-i2c
@@ -36,12 +37,6 @@ properties:
interrupts:
maxItems: 1
- "#address-cells":
- const: 1
-
- "#size-cells":
- const: 0
-
clocks:
maxItems: 1
@@ -72,8 +67,6 @@ required:
- compatible
- reg
- interrupts
- - "#address-cells"
- - "#size-cells"
- clocks
allOf:
@@ -86,6 +79,7 @@ allOf:
- atmel,sama5d4-i2c
- atmel,sama5d2-i2c
- microchip,sam9x60-i2c
+ - microchip,sama7d65-i2c
- microchip,sama7g5-i2c
then:
properties:
diff --git a/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml b/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml
index 7070c04469ed70c78bb065c5df8919ac7c4f84b7..ac9ddf228c8281f8e463d80701fe33e78976d670 100644
--- a/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml
@@ -76,21 +76,21 @@ else:
examples:
- |
- bsca: i2c@f0406200 {
- clock-frequency = <390000>;
- compatible = "brcm,brcmstb-i2c";
- interrupt-parent = <&irq0_intc>;
- reg = <0xf0406200 0x58>;
- interrupts = <0x18>;
- interrupt-names = "upg_bsca";
- };
+ bsca: i2c@f0406200 {
+ compatible = "brcm,brcmstb-i2c";
+ reg = <0xf0406200 0x58>;
+ clock-frequency = <390000>;
+ interrupt-parent = <&irq0_intc>;
+ interrupts = <0x18>;
+ interrupt-names = "upg_bsca";
+ };
- |
- ddc0: i2c@7ef04500 {
- compatible = "brcm,bcm2711-hdmi-i2c";
- reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
- reg-names = "bsc", "auto-i2c";
- clock-frequency = <390000>;
- };
+ ddc0: i2c@7ef04500 {
+ compatible = "brcm,bcm2711-hdmi-i2c";
+ reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
+ reg-names = "bsc", "auto-i2c";
+ clock-frequency = <390000>;
+ };
...
diff --git a/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml b/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml
index b813f6d4810c9add9cb711614b9825f914892a0a..1eaf00b90a77a3e5f16ed0ab3f2fb55cb8e2cd37 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml
@@ -109,65 +109,65 @@ examples:
// Example for a bus to be demuxed. It contains various I2C clients for
// HDMI, so the bus is named "i2c-hdmi":
i2chdmi: i2c-mux3 {
- compatible = "i2c-demux-pinctrl";
- i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
- i2c-bus-name = "i2c-hdmi";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ak4643: codec@12 {
- compatible = "asahi-kasei,ak4643";
- #sound-dai-cells = <0>;
- reg = <0x12>;
- };
-
- composite-in@20 {
- compatible = "adi,adv7180";
- reg = <0x20>;
+ compatible = "i2c-demux-pinctrl";
+ i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
+ i2c-bus-name = "i2c-hdmi";
+ #address-cells = <1>;
+ #size-cells = <0>;
- port {
- adv7180: endpoint {
- bus-width = <8>;
- remote-endpoint = <&vin1ep0>;
- };
- };
+ ak4643: codec@12 {
+ compatible = "asahi-kasei,ak4643";
+ #sound-dai-cells = <0>;
+ reg = <0x12>;
+ };
+
+ composite-in@20 {
+ compatible = "adi,adv7180";
+ reg = <0x20>;
+
+ port {
+ adv7180: endpoint {
+ bus-width = <8>;
+ remote-endpoint = <&vin1ep0>;
+ };
};
+ };
+
+ hdmi@39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&cec_clock>;
+ clock-names = "cec";
+
+ avdd-supply = <&fixedregulator1v8>;
+ dvdd-supply = <&fixedregulator1v8>;
+ pvdd-supply = <&fixedregulator1v8>;
+ dvdd-3v-supply = <&fixedregulator3v3>;
+ bgvdd-supply = <&fixedregulator1v8>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
- hdmi@39 {
- compatible = "adi,adv7511w";
- reg = <0x39>;
- interrupt-parent = <&gpio1>;
- interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&cec_clock>;
- clock-names = "cec";
-
- avdd-supply = <&fixedregulator1v8>;
- dvdd-supply = <&fixedregulator1v8>;
- pvdd-supply = <&fixedregulator1v8>;
- dvdd-3v-supply = <&fixedregulator3v3>;
- bgvdd-supply = <&fixedregulator1v8>;
-
- adi,input-depth = <8>;
- adi,input-colorspace = "rgb";
- adi,input-clock = "1x";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- adv7511_in: endpoint {
- remote-endpoint = <&lvds0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- adv7511_out: endpoint {
- remote-endpoint = <&hdmi_con_out>;
- };
- };
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con_out>;
};
+ };
};
+ };
};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-lpc2k.txt b/Documentation/devicetree/bindings/i2c/i2c-lpc2k.txt
deleted file mode 100644
index 4101aa621ad42ecafe4edb938199417216d675d4..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-lpc2k.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-NXP I2C controller for LPC2xxx/178x/18xx/43xx
-
-Required properties:
- - compatible: must be "nxp,lpc1788-i2c"
- - reg: physical address and length of the device registers
- - interrupts: a single interrupt specifier
- - clocks: clock for the device
- - #address-cells: should be <1>
- - #size-cells: should be <0>
-
-Optional properties:
-- clock-frequency: the desired I2C bus clock frequency in Hz; in
- absence of this property the default value is used (100 kHz).
-
-Example:
-i2c0: i2c@400a1000 {
- compatible = "nxp,lpc1788-i2c";
- reg = <0x400a1000 0x1000>;
- interrupts = <18>;
- clocks = <&ccu1 CLK_APB1_I2C0>;
- #address-cells = <1>;
- #size-cells = <0>;
-};
-
-&i2c0 {
- clock-frequency = <400000>;
-
- lm75@48 {
- compatible = "nxp,lm75";
- reg = <0x48>;
- };
-};
-
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
index 424a4fc218b66bfdf7897ad06a864e6b7bcb3cef..92fbc1a2671ad775a4939299858fdb4c24c354fb 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
@@ -87,12 +87,6 @@ properties:
interrupts:
maxItems: 1
- '#address-cells':
- const: 1
-
- '#size-cells':
- const: 0
-
clocks:
minItems: 1
maxItems: 2
diff --git a/Documentation/devicetree/bindings/i2c/nxp,lpc1788-i2c.yaml b/Documentation/devicetree/bindings/i2c/nxp,lpc1788-i2c.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..9a1b95c2d03c75c5ec7a15d6f0ca83b1084ad798
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/nxp,lpc1788-i2c.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/nxp,lpc1788-i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP I2C controller for LPC2xxx/178x/18xx/43xx
+
+maintainers:
+ - Vladimir Zapolskiy <vz@mleia.com>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ const: nxp,lpc1788-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-frequency:
+ description: the desired I2C bus clock frequency in Hz
+ default: 100000
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include "dt-bindings/clock/lpc18xx-ccu.h"
+
+ i2c@400a1000 {
+ compatible = "nxp,lpc1788-i2c";
+ reg = <0x400a1000 0x1000>;
+ interrupts = <18>;
+ clocks = <&ccu1 CLK_APB1_I2C0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/i2c/renesas,iic-emev2.yaml b/Documentation/devicetree/bindings/i2c/renesas,iic-emev2.yaml
index 17c1102562be98e78d7a7853c30d7677872e73cd..551cfa6f885ac6a3af107e46581b501b4f0eafa5 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,iic-emev2.yaml
+++ b/Documentation/devicetree/bindings/i2c/renesas,iic-emev2.yaml
@@ -44,11 +44,11 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
iic0: i2c@e0070000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-emev2";
- reg = <0xe0070000 0x28>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
- clocks = <&iic0_sclk>;
- clock-names = "sclk";
+ compatible = "renesas,iic-emev2";
+ reg = <0xe0070000 0x28>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&iic0_sclk>;
+ clock-names = "sclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
diff --git a/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml b/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml
index 51b220da461b068d3af8614c8fc8d14071169de9..6cc60c3f61cd64be3ee1c8c309fc4bd4756dad12 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml
@@ -153,14 +153,14 @@ examples:
#include <dt-bindings/power/r8a7791-sysc.h>
i2c0: i2c@e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
- reg = <0xe6508000 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <400000>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- i2c-scl-internal-delay-ns = <6>;
+ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0xe6508000 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <400000>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ i2c-scl-internal-delay-ns = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
};
diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
index 91ecf17b7a81a1447ef8adbcd1a8224228681a5c..7993fe463c4c3fafcfefa57ecff3935a838e8d06 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
+++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml
@@ -97,21 +97,21 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c0: i2c@fcfee000 {
- compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
- reg = <0xfcfee000 0x44>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
- "tmoi";
- clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
- clock-frequency = <100000>;
- power-domains = <&cpg_clocks>;
- #address-cells = <1>;
- #size-cells = <0>;
+ compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
+ reg = <0xfcfee000 0x44>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
+ "tmoi";
+ clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
+ clock-frequency = <100000>;
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
};
diff --git a/Documentation/devicetree/bindings/i2c/renesas,rmobile-iic.yaml b/Documentation/devicetree/bindings/i2c/renesas,rmobile-iic.yaml
index 04e4ffd80bc091b3ddc450e47c31322a9ffaef6e..ec5222a1224fa97f771aec1b7460aef68597c4d5 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,rmobile-iic.yaml
+++ b/Documentation/devicetree/bindings/i2c/renesas,rmobile-iic.yaml
@@ -134,16 +134,16 @@ examples:
#include <dt-bindings/power/r8a7790-sysc.h>
iic0: i2c@e6500000 {
- compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
- "renesas,rmobile-iic";
- reg = <0xe6500000 0x425>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 318>;
- clock-frequency = <400000>;
- dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
- resets = <&cpg 318>;
- #address-cells = <1>;
- #size-cells = <0>;
+ compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0xe6500000 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ clock-frequency = <400000>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ #address-cells = <1>;
+ #size-cells = <0>;
};
diff --git a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml
index 1303502cf265536827d6ade4e1e8ea12eea895fc..bbc56848562721d206fe4d72c7c103487d11f7bd 100644
--- a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml
@@ -26,9 +26,6 @@ properties:
- samsung,exynos850-i2c
- const: samsung,s3c2440-i2c
- '#address-cells':
- const: 1
-
clocks:
maxItems: 1
@@ -73,9 +70,6 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
description: Pandle to syscon used to control the system registers.
- '#size-cells':
- const: 0
-
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
index d9293c57f573c0534adb777f88efad95e5da6c85..60035a787e5c066731c02dafed761200afdda124 100644
--- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
@@ -33,6 +33,10 @@ properties:
- const: snps,designware-i2c
- description: Baikal-T1 SoC System I2C controller
const: baikal,bt1-sys-i2c
+ - description: T-HEAD TH1520 SoCs I2C controller
+ items:
+ - const: thead,th1520-i2c
+ - const: snps,designware-i2c
reg:
minItems: 1
diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml
index 8fd8be76875ec12b71da052d6ef5614dd944e7ed..457bb0702ed93556685c0d6d64ade9fb3300afdd 100644
--- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml
@@ -145,31 +145,31 @@ examples:
#include <dt-bindings/mfd/stm32f7-rcc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
//Example 1 (with st,stm32f4-i2c compatible)
- i2c@40005400 {
- compatible = "st,stm32f4-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x40005400 0x400>;
- interrupts = <31>,
- <32>;
- resets = <&rcc 277>;
- clocks = <&rcc 0 149>;
- };
+ i2c@40005400 {
+ compatible = "st,stm32f4-i2c";
+ reg = <0x40005400 0x400>;
+ interrupts = <31>,
+ <32>;
+ resets = <&rcc 277>;
+ clocks = <&rcc 0 149>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
- |
#include <dt-bindings/mfd/stm32f7-rcc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
//Example 2 (with st,stm32f7-i2c compatible)
- i2c@40005800 {
- compatible = "st,stm32f7-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x40005800 0x400>;
- interrupts = <31>,
- <32>;
- resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
- clocks = <&rcc 1 CLK_I2C1>;
- };
+ i2c@40005800 {
+ compatible = "st,stm32f7-i2c";
+ reg = <0x40005800 0x400>;
+ interrupts = <31>,
+ <32>;
+ resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
+ clocks = <&rcc 1 CLK_I2C1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
- |
#include <dt-bindings/mfd/stm32f7-rcc.h>
@@ -178,16 +178,16 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
#include <dt-bindings/reset/stm32mp1-resets.h>
- i2c@40013000 {
- compatible = "st,stm32mp15-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x40013000 0x400>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc I2C2_K>;
- resets = <&rcc I2C2_R>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- st,syscfg-fmp = <&syscfg 0x4 0x2>;
- };
+ i2c@40013000 {
+ compatible = "st,stm32mp15-i2c";
+ reg = <0x40013000 0x400>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc I2C2_K>;
+ resets = <&rcc I2C2_R>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ st,syscfg-fmp = <&syscfg 0x4 0x2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml b/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml
index 781108ae1ce3b48f7a21ce4db4ac2cc5d4b06bcb..8c2e35fabf5b40c6a28ba28c302229848a16eb38 100644
--- a/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml
@@ -37,16 +37,8 @@ properties:
clock-names:
const: fck
- clock-frequency: true
-
power-domains: true
- "#address-cells":
- const: 1
-
- "#size-cells":
- const: 0
-
ti,hwmods:
description:
Must be "i2c<n>", n being the instance number (1-based).
@@ -55,38 +47,34 @@ properties:
$ref: /schemas/types.yaml#/definitions/string
deprecated: true
-# subnode's properties
-patternProperties:
- "@[0-9a-f]+$":
- type: object
- description:
- Flash device uses the below defined properties in the subnode.
-
required:
- compatible
- reg
- interrupts
-additionalProperties: false
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - ti,omap2420-i2c
+ - ti,omap2430-i2c
+ - ti,omap3-i2c
+ - ti,omap4-i2c
-if:
- properties:
- compatible:
- enum:
- - ti,omap2420-i2c
- - ti,omap2430-i2c
- - ti,omap3-i2c
- - ti,omap4-i2c
+ then:
+ properties:
+ ti,hwmods:
+ items:
+ - pattern: "^i2c([1-9])$"
-then:
- properties:
- ti,hwmods:
- items:
- - pattern: "^i2c([1-9])$"
+ else:
+ properties:
+ ti,hwmods: false
-else:
- properties:
- ti,hwmods: false
+unevaluatedProperties: false
examples:
- |
@@ -94,9 +82,9 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
main_i2c0: i2c@2000000 {
- compatible = "ti,j721e-i2c", "ti,omap4-i2c";
- reg = <0x2000000 0x100>;
- interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
+ compatible = "ti,j721e-i2c", "ti,omap4-i2c";
+ reg = <0x2000000 0x100>;
+ interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
diff --git a/Documentation/i2c/busses/i2c-i801.rst b/Documentation/i2c/busses/i2c-i801.rst
index 10eced6c2e4625f78e89cfc52bbb1ead7f417660..c840b597912c8778c7a1ae6845915a2ee8c0f3d1 100644
--- a/Documentation/i2c/busses/i2c-i801.rst
+++ b/Documentation/i2c/busses/i2c-i801.rst
@@ -48,6 +48,7 @@ Supported adapters:
* Intel Raptor Lake (PCH)
* Intel Meteor Lake (SOC and PCH)
* Intel Birch Stream (SOC)
+ * Intel Arrow Lake (SOC)
Datasheets: Publicly available at the Intel website
diff --git a/Documentation/i2c/slave-testunit-backend.rst b/Documentation/i2c/slave-testunit-backend.rst
index ecfc2abec32d7299ee5f612e17125df934ab72fc..37142a48ab35cfcd2930e913df670b781e92f003 100644
--- a/Documentation/i2c/slave-testunit-backend.rst
+++ b/Documentation/i2c/slave-testunit-backend.rst
@@ -16,9 +16,9 @@ Note that this is a device for testing and debugging. It should not be enabled
in a production build. And while there is some versioning and we try hard to
keep backward compatibility, there is no stable ABI guaranteed!
-Instantiating the device is regular. Example for bus 0, address 0x30:
+Instantiating the device is regular. Example for bus 0, address 0x30::
-# echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
+ # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
After that, you will have a write-only device listening. Reads will just return
an 8-bit version number of the testunit. When writing, the device consists of 4
@@ -26,14 +26,17 @@ an 8-bit version number of the testunit. When writing, the device consists of 4
written to start a testcase, i.e. you usually write 4 bytes to the device. The
registers are:
-0x00 CMD - which test to trigger
-0x01 DATAL - configuration byte 1 for the test
-0x02 DATAH - configuration byte 2 for the test
-0x03 DELAY - delay in n * 10ms until test is started
+.. csv-table::
+ :header: "Offset", "Name", "Description"
-Using 'i2cset' from the i2c-tools package, the generic command looks like:
+ 0x00, CMD, which test to trigger
+ 0x01, DATAL, configuration byte 1 for the test
+ 0x02, DATAH, configuration byte 2 for the test
+ 0x03, DELAY, delay in n * 10ms until test is started
-# i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
+Using 'i2cset' from the i2c-tools package, the generic command looks like::
+
+ # i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
DELAY is a generic parameter which will delay the execution of the test in CMD.
While a command is running (including the delay), new commands will not be
@@ -45,44 +48,88 @@ result in the transfer not being acknowledged.
Commands
--------
-0x00 NOOP (reserved for future use)
+0x00 NOOP
+~~~~~~~~~
+
+Reserved for future use.
+
+0x01 READ_BYTES
+~~~~~~~~~~~~~~~
+
+.. list-table::
+ :header-rows: 1
+
+ * - CMD
+ - DATAL
+ - DATAH
+ - DELAY
+
+ * - 0x01
+ - address to read data from (lower 7 bits, highest bit currently unused)
+ - number of bytes to read
+ - n * 10ms
+
+Also needs master mode. This is useful to test if your bus master driver is
+handling multi-master correctly. You can trigger the testunit to read bytes
+from another device on the bus. If the bus master under test also wants to
+access the bus at the same time, the bus will be busy. Example to read 128
+bytes from device 0x50 after 50ms of delay::
+
+ # i2cset -y 0 0x30 0x01 0x50 0x80 0x05 i
+
+0x02 SMBUS_HOST_NOTIFY
+~~~~~~~~~~~~~~~~~~~~~~
+
+.. list-table::
+ :header-rows: 1
+
+ * - CMD
+ - DATAL
+ - DATAH
+ - DELAY
+
+ * - 0x02
+ - low byte of the status word to send
+ - high byte of the status word to send
+ - n * 10ms
+
+Also needs master mode. This test will send an SMBUS_HOST_NOTIFY message to the
+host. Note that the status word is currently ignored in the Linux Kernel.
+Example to send a notification after 10ms::
-0x01 READ_BYTES (also needs master mode)
- DATAL - address to read data from (lower 7 bits, highest bit currently unused)
- DATAH - number of bytes to read
+ # i2cset -y 0 0x30 0x02 0x42 0x64 0x01 i
-This is useful to test if your bus master driver is handling multi-master
-correctly. You can trigger the testunit to read bytes from another device on
-the bus. If the bus master under test also wants to access the bus at the same
-time, the bus will be busy. Example to read 128 bytes from device 0x50 after
-50ms of delay:
+If the host controller supports HostNotify, this message with debug level
+should appear (Linux 6.11 and later)::
-# i2cset -y 0 0x30 0x01 0x50 0x80 0x05 i
+ Detected HostNotify from address 0x30
-0x02 SMBUS_HOST_NOTIFY (also needs master mode)
- DATAL - low byte of the status word to send
- DATAH - high byte of the status word to send
+0x03 SMBUS_BLOCK_PROC_CALL
+~~~~~~~~~~~~~~~~~~~~~~~~~~
-This test will send an SMBUS_HOST_NOTIFY message to the host. Note that the
-status word is currently ignored in the Linux Kernel. Example to send a
-notification after 10ms:
+.. list-table::
+ :header-rows: 1
-# i2cset -y 0 0x30 0x02 0x42 0x64 0x01 i
+ * - CMD
+ - DATAL
+ - DATAH
+ - DELAY
-0x03 SMBUS_BLOCK_PROC_CALL (partial command)
- DATAL - must be '1', i.e. one further byte will be written
- DATAH - number of bytes to be sent back
- DELAY - not applicable, partial command!
+ * - 0x03
+ - must be '1', i.e. one further byte will be written
+ - number of bytes to be sent back
+ - leave out, partial command!
-This test will respond to a block process call as defined by the SMBus
-specification. The one data byte written specifies how many bytes will be sent
-back in the following read transfer. Note that in this read transfer, the
-testunit will prefix the length of the bytes to follow. So, if your host bus
-driver emulates SMBus calls like the majority does, it needs to support the
-I2C_M_RECV_LEN flag of an i2c_msg. This is a good testcase for it. The returned
-data consists of the length first, and then of an array of bytes from length-1
-to 0. Here is an example which emulates i2c_smbus_block_process_call() using
-i2ctransfer (you need i2c-tools v4.2 or later):
+Partial command. This test will respond to a block process call as defined by
+the SMBus specification. The one data byte written specifies how many bytes
+will be sent back in the following read transfer. Note that in this read
+transfer, the testunit will prefix the length of the bytes to follow. So, if
+your host bus driver emulates SMBus calls like the majority does, it needs to
+support the I2C_M_RECV_LEN flag of an i2c_msg. This is a good testcase for it.
+The returned data consists of the length first, and then of an array of bytes
+from length-1 to 0. Here is an example which emulates
+i2c_smbus_block_process_call() using i2ctransfer (you need i2c-tools v4.2 or
+later)::
-# i2ctransfer -y 0 w3@0x30 0x03 0x01 0x10 r?
-0x10 0x0f 0x0e 0x0d 0x0c 0x0b 0x0a 0x09 0x08 0x07 0x06 0x05 0x04 0x03 0x02 0x01 0x00
+ # i2ctransfer -y 0 w3@0x30 0x03 0x01 0x10 r?
+ 0x10 0x0f 0x0e 0x0d 0x0c 0x0b 0x0a 0x09 0x08 0x07 0x06 0x05 0x04 0x03 0x02 0x01 0x00
diff --git a/MAINTAINERS b/MAINTAINERS
index cfcd56315d0ce2277daea6715b2ef4c7774853e4..782decb0d436e2da1443946f3987de61453363bc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2410,7 +2410,7 @@ ARM/LPC18XX ARCHITECTURE
M: Vladimir Zapolskiy <vz@mleia.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
-F: Documentation/devicetree/bindings/i2c/i2c-lpc2k.txt
+F: Documentation/devicetree/bindings/i2c/nxp,lpc1788-i2c.yaml
F: arch/arm/boot/dts/nxp/lpc/lpc43*
F: drivers/i2c/busses/i2c-lpc2k.c
F: drivers/memory/pl172.c
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index fe6e8a1bb6072115991e808e0d5327b55933d23f..3e32fb882101c0c84d7f3b0f53fa3ec473f3a00d 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -159,6 +159,7 @@ config I2C_I801
Raptor Lake (PCH)
Meteor Lake (SOC and PCH)
Birch Stream (SOC)
+ Arrow Lake (SOC)
This driver can also be built as a module. If so, the module
will be called i2c-i801.
@@ -857,7 +858,7 @@ config I2C_MT65XX
config I2C_MT7621
tristate "MT7621/MT7628 I2C Controller"
- depends on (RALINK && (SOC_MT7620 || SOC_MT7621)) || COMPILE_TEST
+ depends on (RALINK && (SOC_MT7620 || SOC_MT7621)) || ARCH_AIROHA || COMPILE_TEST
help
Say Y here to include support for I2C controller in the
MediaTek MT7621/MT7628 SoCs.
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c
index 63897a89bb35f7f7e2602eb786b1d8b37222a8c3..ee4fd66dedb0de8455a139c0a3a4a19d1ca32a2d 100644
--- a/drivers/i2c/busses/i2c-ali1563.c
+++ b/drivers/i2c/busses/i2c-ali1563.c
@@ -438,4 +438,5 @@ static struct pci_driver ali1563_pci_driver = {
module_pci_driver(ali1563_pci_driver);
+MODULE_DESCRIPTION("i2c driver for the ALi 1563 Southbridge");
MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 956e5020d71e2f9dd35f5c678bbbf0e5bdf650d6..4761c7208102270592117da66515566d4ba35190 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -39,7 +39,7 @@
We make sure that the SMB is enabled. We leave the ACPI alone.
This driver controls the SMB Host only.
- The SMB Slave controller on the M15X3 is not enabled.
+ The SMB Target controller on the M15X3 is not enabled.
This driver does not use interrupts.
*/
diff --git a/drivers/i2c/busses/i2c-altera.c b/drivers/i2c/busses/i2c-altera.c
index 252fbd175fb1ccc82878d1fa7b274285554e369b..f4dde08a3b92cbc322b15726da5ef3666ac3bcfb 100644
--- a/drivers/i2c/busses/i2c-altera.c
+++ b/drivers/i2c/busses/i2c-altera.c
@@ -168,7 +168,7 @@ static void altr_i2c_init(struct altr_i2c_dev *idev)
/* SDA Hold Time, 300ns */
writel(3 * clk_mhz / 10, idev->base + ALTR_I2C_SDA_HOLD);
- /* Mask all master interrupt bits */
+ /* Mask all interrupt bits */
altr_i2c_int_enable(idev, ALTR_I2C_ALL_IRQ, false);
}
@@ -376,7 +376,7 @@ static u32 altr_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm altr_i2c_algo = {
- .master_xfer = altr_i2c_xfer,
+ .xfer = altr_i2c_xfer,
.functionality = altr_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c
index 8e43f25c117e6f4471a761e4cf6b3cb014fa5b13..902e420e761ef5f53d280bc965a6503c07bdcf0a 100644
--- a/drivers/i2c/busses/i2c-au1550.c
+++ b/drivers/i2c/busses/i2c-au1550.c
@@ -81,11 +81,10 @@ static int wait_ack(struct i2c_au1550_data *adap)
return 0;
}
-static int wait_master_done(struct i2c_au1550_data *adap)
+static int wait_controller_done(struct i2c_au1550_data *adap)
{
int i;
- /* Wait for Master Done. */
for (i = 0; i < 2 * adap->xfer_timeout; i++) {
if ((RD(adap, PSC_SMBEVNT) & PSC_SMBEVNT_MD) != 0)
return 0;
@@ -120,12 +119,12 @@ do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
if (q)
addr |= PSC_SMBTXRX_STP;
- /* Put byte into fifo, start up master. */
+ /* Put byte into fifo, start up controller */
WR(adap, PSC_SMBTXRX, addr);
WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS);
if (wait_ack(adap))
return -EIO;
- return (q) ? wait_master_done(adap) : 0;
+ return (q) ? wait_controller_done(adap) : 0;
}
static int wait_for_rx_byte(struct i2c_au1550_data *adap, unsigned char *out)
@@ -175,7 +174,7 @@ static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
/* The last byte has to indicate transfer done. */
WR(adap, PSC_SMBTXRX, PSC_SMBTXRX_STP);
- if (wait_master_done(adap))
+ if (wait_controller_done(adap))
return -EIO;
buf[i] = (unsigned char)(RD(adap, PSC_SMBTXRX) & 0xff);
@@ -204,7 +203,7 @@ static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
data = buf[i];
data |= PSC_SMBTXRX_STP;
WR(adap, PSC_SMBTXRX, data);
- if (wait_master_done(adap))
+ if (wait_controller_done(adap))
return -EIO;
return 0;
}
@@ -246,8 +245,8 @@ static u32 au1550_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm au1550_algo = {
- .master_xfer = au1550_xfer,
- .functionality = au1550_func,
+ .xfer = au1550_xfer,
+ .functionality = au1550_func,
};
static void i2c_au1550_setup(struct i2c_au1550_data *priv)
diff --git a/drivers/i2c/busses/i2c-bcm-kona.c b/drivers/i2c/busses/i2c-bcm-kona.c
index a57088ec2b064d141dcbf52f167f5dc61614b939..eb5c46a8f824e43b6df3493cd4959c38f761ca6a 100644
--- a/drivers/i2c/busses/i2c-bcm-kona.c
+++ b/drivers/i2c/busses/i2c-bcm-kona.c
@@ -85,7 +85,7 @@
#define STD_EXT_CLK_FREQ 13000000UL
#define HS_EXT_CLK_FREQ 104000000UL
-#define MASTERCODE 0x08 /* Mastercodes are 0000_1xxxb */
+#define CONTROLLER_CODE 0x08 /* Controller codes are 0000_1xxxb */
#define I2C_TIMEOUT 100 /* msecs */
@@ -544,8 +544,8 @@ static int bcm_kona_i2c_switch_to_hs(struct bcm_kona_i2c_dev *dev)
{
int rc;
- /* Send mastercode at standard speed */
- rc = bcm_kona_i2c_write_byte(dev, MASTERCODE, 1);
+ /* Send controller code at standard speed */
+ rc = bcm_kona_i2c_write_byte(dev, CONTROLLER_CODE, 1);
if (rc < 0) {
pr_err("High speed handshake failed\n");
return rc;
@@ -587,7 +587,6 @@ static int bcm_kona_i2c_switch_to_std(struct bcm_kona_i2c_dev *dev)
return rc;
}
-/* Master transfer function */
static int bcm_kona_i2c_xfer(struct i2c_adapter *adapter,
struct i2c_msg msgs[], int num)
{
@@ -637,7 +636,7 @@ static int bcm_kona_i2c_xfer(struct i2c_adapter *adapter,
}
}
- /* Send slave address */
+ /* Send target address */
if (!(pmsg->flags & I2C_M_NOSTART)) {
rc = bcm_kona_i2c_do_addr(dev, pmsg);
if (rc < 0) {
@@ -697,7 +696,7 @@ static uint32_t bcm_kona_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm bcm_algo = {
- .master_xfer = bcm_kona_i2c_xfer,
+ .xfer = bcm_kona_i2c_xfer,
.functionality = bcm_kona_i2c_functionality,
};
@@ -722,7 +721,7 @@ static int bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev *dev)
dev->std_cfg = &std_cfg_table[BCM_SPD_1MHZ];
break;
case I2C_MAX_HIGH_SPEED_MODE_FREQ:
- /* Send mastercode at 100k */
+ /* Send controller code at 100k */
dev->std_cfg = &std_cfg_table[BCM_SPD_100K];
dev->hs_cfg = &hs_cfg_table[BCM_SPD_3P4MHZ];
break;
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 3045ba82380dbdd73f16a33d74e3090ee4a2bff3..ae42e37052a88675603cf6e71710591f68fe0ebf 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * BCM2835 master mode driver
+ * BCM2835 I2C controller driver
*/
#include <linux/clk.h>
@@ -25,7 +25,7 @@
#define BCM2835_I2C_DEL 0x18
/*
* 16-bit field for the number of SCL cycles to wait after rising SCL
- * before deciding the slave is not responding. 0 disables the
+ * before deciding the target is not responding. 0 disables the
* timeout detection.
*/
#define BCM2835_I2C_CLKT 0x1c
@@ -223,7 +223,7 @@ static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
/*
* Repeated Start Condition (Sr)
* The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
- * talks about reading from a slave with 10 bit address. This is achieved by
+ * talks about reading from a target with 10 bit address. This is achieved by
* issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
* issue a read.
* A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
@@ -390,8 +390,8 @@ static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm bcm2835_i2c_algo = {
- .master_xfer = bcm2835_i2c_xfer,
- .functionality = bcm2835_i2c_func,
+ .xfer = bcm2835_i2c_xfer,
+ .functionality = bcm2835_i2c_func,
};
/*
diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c
index 38f276c99193b29a7a4a94b126b7acaa8edcdb1d..83b85011e3771b5519860441c14ef7d808179432 100644
--- a/drivers/i2c/busses/i2c-brcmstb.c
+++ b/drivers/i2c/busses/i2c-brcmstb.c
@@ -67,7 +67,7 @@
/* BSC block register map structure to cache fields to be written */
struct bsc_regs {
- u32 chip_address; /* slave address */
+ u32 chip_address; /* target address */
u32 data_in[N_DATA_REGS]; /* tx data buffer*/
u32 cnt_reg; /* rx/tx data length */
u32 ctl_reg; /* control register */
@@ -320,7 +320,7 @@ static int brcmstb_send_i2c_cmd(struct brcmstb_i2c_dev *dev,
return rc;
}
-/* Actual data transfer through the BSC master */
+/* Actual data transfer through the BSC controller */
static int brcmstb_i2c_xfer_bsc_data(struct brcmstb_i2c_dev *dev,
u8 *buf, unsigned int len,
struct i2c_msg *pmsg)
@@ -441,7 +441,6 @@ static int brcmstb_i2c_do_addr(struct brcmstb_i2c_dev *dev,
return 0;
}
-/* Master transfer function */
static int brcmstb_i2c_xfer(struct i2c_adapter *adapter,
struct i2c_msg msgs[], int num)
{
@@ -473,7 +472,7 @@ static int brcmstb_i2c_xfer(struct i2c_adapter *adapter,
brcmstb_set_i2c_start_stop(dev, cond);
- /* Send slave address */
+ /* Send target address */
if (!(pmsg->flags & I2C_M_NOSTART)) {
rc = brcmstb_i2c_do_addr(dev, pmsg);
if (rc < 0) {
@@ -545,8 +544,8 @@ static u32 brcmstb_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm brcmstb_i2c_algo = {
- .master_xfer = brcmstb_i2c_xfer,
- .master_xfer_atomic = brcmstb_i2c_xfer_atomic,
+ .xfer = brcmstb_i2c_xfer,
+ .xfer_atomic = brcmstb_i2c_xfer_atomic,
.functionality = brcmstb_i2c_functionality,
};
diff --git a/drivers/i2c/busses/i2c-ccgx-ucsi.c b/drivers/i2c/busses/i2c-ccgx-ucsi.c
index 092dc92dea9fb77fdc8a3b60ed788d945bd07b04..d97233862a6c8d7e8391b67ce40a0048980e3529 100644
--- a/drivers/i2c/busses/i2c-ccgx-ucsi.c
+++ b/drivers/i2c/busses/i2c-ccgx-ucsi.c
@@ -27,4 +27,5 @@ struct i2c_client *i2c_new_ccgx_ucsi(struct i2c_adapter *adapter, int irq,
}
EXPORT_SYMBOL_GPL(i2c_new_ccgx_ucsi);
+MODULE_DESCRIPTION("Instantiate UCSI device for Cypress CCGx Type-C controller");
MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-cht-wc.c b/drivers/i2c/busses/i2c-cht-wc.c
index 0209933b9a847580602efbe6b4229add453345f5..52e3000626c5a162a6a760dfd8bed763c5215988 100644
--- a/drivers/i2c/busses/i2c-cht-wc.c
+++ b/drivers/i2c/busses/i2c-cht-wc.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * Intel CHT Whiskey Cove PMIC I2C Master driver
+ * Intel CHT Whiskey Cove PMIC I2C controller driver
* Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
*
* Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
@@ -106,7 +106,7 @@ static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data)
return IRQ_HANDLED;
}
-static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap)
+static u32 cht_wc_i2c_adap_func(struct i2c_adapter *adap)
{
/* This i2c adapter only supports SMBUS byte transfers */
return I2C_FUNC_SMBUS_BYTE_DATA;
@@ -168,7 +168,7 @@ static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr,
}
static const struct i2c_algorithm cht_wc_i2c_adap_algo = {
- .functionality = cht_wc_i2c_adap_master_func,
+ .functionality = cht_wc_i2c_adap_func,
.smbus_xfer = cht_wc_i2c_adap_smbus_xfer,
};
@@ -554,6 +554,6 @@ static struct platform_driver cht_wc_i2c_adap_driver = {
};
module_platform_driver(cht_wc_i2c_adap_driver);
-MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver");
+MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C controller driver");
MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-cp2615.c b/drivers/i2c/busses/i2c-cp2615.c
index cf3747d870342e3649e290c8f254aa586c36a67a..e7720ea4045eb674616f573a18865af04b14247d 100644
--- a/drivers/i2c/busses/i2c-cp2615.c
+++ b/drivers/i2c/busses/i2c-cp2615.c
@@ -60,11 +60,11 @@ enum cp2615_i2c_status {
CP2615_CFG_LOCKED = -6,
/* read_len or write_len out of range */
CP2615_INVALID_PARAM = -4,
- /* I2C slave did not ACK in time */
+ /* I2C target did not ACK in time */
CP2615_TIMEOUT,
/* I2C bus busy */
CP2615_BUS_BUSY,
- /* I2C bus error (ie. device NAK'd the request) */
+ /* I2C bus error (ie. target NAK'd the request) */
CP2615_BUS_ERROR,
CP2615_SUCCESS
};
@@ -211,7 +211,7 @@ static int cp2615_check_iop(struct usb_interface *usbif)
}
static int
-cp2615_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+cp2615_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
struct usb_interface *usbif = adap->algo_data;
int i = 0, ret = 0;
@@ -250,8 +250,8 @@ cp2615_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm cp2615_i2c_algo = {
- .master_xfer = cp2615_i2c_master_xfer,
- .functionality = cp2615_i2c_func,
+ .xfer = cp2615_i2c_xfer,
+ .functionality = cp2615_i2c_func,
};
/*
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index 4404b4aac6765b15b27840fd0a43ee8551f43aed..4794ec066eb01efdaa83f7e53bb623c392a3aa2e 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -402,7 +402,7 @@ static u32 cpm_i2c_func(struct i2c_adapter *adap)
/* -----exported algorithm data: ------------------------------------- */
static const struct i2c_algorithm cpm_i2c_algo = {
- .master_xfer = cpm_i2c_xfer,
+ .xfer = cpm_i2c_xfer,
.functionality = cpm_i2c_func,
};
@@ -570,7 +570,7 @@ static int cpm_i2c_setup(struct cpm_i2c *cpm)
out_8(&cpm->i2c_reg->i2brg, brg);
out_8(&cpm->i2c_reg->i2mod, 0x00);
- out_8(&cpm->i2c_reg->i2com, I2COM_MASTER); /* Master mode */
+ out_8(&cpm->i2c_reg->i2com, I2COM_MASTER);
/* Disable interrupts. */
out_8(&cpm->i2c_reg->i2cmr, 0);
diff --git a/drivers/i2c/busses/i2c-cros-ec-tunnel.c b/drivers/i2c/busses/i2c-cros-ec-tunnel.c
index 2737fd8abd32494b2aaed2727f9cfe6a824edaf0..ab2688bd4d338a5d35cf2c21bc72e3dcb7169d29 100644
--- a/drivers/i2c/busses/i2c-cros-ec-tunnel.c
+++ b/drivers/i2c/busses/i2c-cros-ec-tunnel.c
@@ -235,8 +235,8 @@ static u32 ec_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm ec_i2c_algorithm = {
- .master_xfer = ec_i2c_xfer,
- .functionality = ec_i2c_functionality,
+ .xfer = ec_i2c_xfer,
+ .functionality = ec_i2c_functionality,
};
static int ec_i2c_probe(struct platform_device *pdev)
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 7ae611120cfa82eaec8477200dc2bdd6f788d61c..c4fb5e9ab50611b0c6e536786fcd023a0c4743fd 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -263,7 +263,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
/* compute clock dividers */
i2c_davinci_calc_clk_dividers(dev);
- /* Respond at reserved "SMBus Host" slave address" (and zero);
+ /* Respond at reserved "SMBus Host" target address" (and zero);
* we seem to have no option to not respond...
*/
davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, DAVINCI_I2C_OWN_ADDRESS);
@@ -407,8 +407,8 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev)
}
/*
- * Low level master read/write transaction. This function is called
- * from i2c_davinci_xfer.
+ * Low level read/write transaction. This function is called from
+ * i2c_davinci_xfer.
*/
static int
i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
@@ -428,7 +428,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
if (pdata->bus_delay)
udelay(pdata->bus_delay);
- /* set the slave address */
+ /* set the target address */
davinci_i2c_write_reg(dev, DAVINCI_I2C_SAR_REG, msg->addr);
dev->buf = msg->buf;
@@ -440,10 +440,9 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
reinit_completion(&dev->cmd_complete);
dev->cmd_err = 0;
- /* Take I2C out of reset and configure it as master */
+ /* Take I2C out of reset and configure it as controller */
flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST;
- /* if the slave address is ten bit address, enable XA bit */
if (msg->flags & I2C_M_TEN)
flag |= DAVINCI_I2C_MDR_XA;
if (!(msg->flags & I2C_M_RD))
@@ -687,7 +686,7 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
break;
case DAVINCI_I2C_IVR_AAS:
- dev_dbg(dev->dev, "Address as slave interrupt\n");
+ dev_dbg(dev->dev, "Address as target interrupt\n");
break;
default:
@@ -744,8 +743,8 @@ static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev)
#endif
static const struct i2c_algorithm i2c_davinci_algo = {
- .master_xfer = i2c_davinci_xfer,
- .functionality = i2c_davinci_func,
+ .xfer = i2c_davinci_xfer,
+ .functionality = i2c_davinci_func,
};
static const struct of_device_id davinci_i2c_of_match[] = {
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 29aac9c873684a8ab3d254ff4060cef6e610af62..df3dc1e8093e365848603f51b5ff8124148ade42 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -101,7 +101,7 @@ static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
}
-static struct regmap_config bt1_i2c_cfg = {
+static const struct regmap_config bt1_i2c_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
diff --git a/drivers/i2c/busses/i2c-digicolor.c b/drivers/i2c/busses/i2c-digicolor.c
index 737604ae11fc6af045e3ee5cf660926ae025c1a8..3e6b80e59b90633623dad9c32e7319b55ca49a68 100644
--- a/drivers/i2c/busses/i2c-digicolor.c
+++ b/drivers/i2c/busses/i2c-digicolor.c
@@ -281,8 +281,8 @@ static u32 dc_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm dc_i2c_algorithm = {
- .master_xfer = dc_i2c_xfer,
- .functionality = dc_i2c_func,
+ .xfer = dc_i2c_xfer,
+ .functionality = dc_i2c_func,
};
static int dc_i2c_probe(struct platform_device *pdev)
@@ -372,5 +372,5 @@ static struct platform_driver dc_i2c_driver = {
module_platform_driver(dc_i2c_driver);
MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
-MODULE_DESCRIPTION("Conexant Digicolor I2C master driver");
+MODULE_DESCRIPTION("Conexant Digicolor I2C controller driver");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-diolan-u2c.c b/drivers/i2c/busses/i2c-diolan-u2c.c
index b48b7888936fec35d278f6720df049f6a39fefad..c02459405b2628a54faba5b7ebdb161774092cf8 100644
--- a/drivers/i2c/busses/i2c-diolan-u2c.c
+++ b/drivers/i2c/busses/i2c-diolan-u2c.c
@@ -414,7 +414,7 @@ static u32 diolan_usb_func(struct i2c_adapter *a)
}
static const struct i2c_algorithm diolan_usb_algorithm = {
- .master_xfer = diolan_usb_xfer,
+ .xfer = diolan_usb_xfer,
.functionality = diolan_usb_func,
};
diff --git a/drivers/i2c/busses/i2c-dln2.c b/drivers/i2c/busses/i2c-dln2.c
index 631109c7a09882c6cd6b376c2d1f7204e11d2cf2..11ed055143d344c3f79d1e3c751b0025231f2584 100644
--- a/drivers/i2c/busses/i2c-dln2.c
+++ b/drivers/i2c/busses/i2c-dln2.c
@@ -175,7 +175,7 @@ static u32 dln2_i2c_func(struct i2c_adapter *a)
}
static const struct i2c_algorithm dln2_i2c_usb_algorithm = {
- .master_xfer = dln2_i2c_xfer,
+ .xfer = dln2_i2c_xfer,
.functionality = dln2_i2c_func,
};
@@ -251,6 +251,6 @@ static struct platform_driver dln2_i2c_driver = {
module_platform_driver(dln2_i2c_driver);
MODULE_AUTHOR("Laurentiu Palcu <laurentiu.palcu@intel.com>");
-MODULE_DESCRIPTION("Driver for the Diolan DLN2 I2C master interface");
+MODULE_DESCRIPTION("Driver for the Diolan DLN2 I2C controller interface");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:dln2-i2c");
diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c
index 10332693edf0d93663fb35fba9404a6209fc2153..ae016a9431dac326971edff693f20e8e9641c845 100644
--- a/drivers/i2c/busses/i2c-fsi.c
+++ b/drivers/i2c/busses/i2c-fsi.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * FSI-attached I2C master algorithm
+ * FSI-attached I2C controller algorithm
*
* Copyright 2018 IBM Corporation
*
@@ -145,7 +145,7 @@
/* choose timeout length from legacy driver; it's well tested */
#define I2C_ABORT_TIMEOUT msecs_to_jiffies(100)
-struct fsi_i2c_master {
+struct fsi_i2c_ctrl {
struct fsi_device *fsi;
u8 fifo_size;
struct list_head ports;
@@ -155,7 +155,7 @@ struct fsi_i2c_master {
struct fsi_i2c_port {
struct list_head list;
struct i2c_adapter adapter;
- struct fsi_i2c_master *master;
+ struct fsi_i2c_ctrl *ctrl;
u16 port;
u16 xfrd;
};
@@ -183,7 +183,7 @@ static int fsi_i2c_write_reg(struct fsi_device *fsi, unsigned int reg,
return fsi_device_write(fsi, reg, &data_be, sizeof(data_be));
}
-static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c)
+static int fsi_i2c_dev_init(struct fsi_i2c_ctrl *i2c)
{
int rc;
u32 mode = I2C_MODE_ENHANCED, extended_status, watermark;
@@ -214,7 +214,7 @@ static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c)
static int fsi_i2c_set_port(struct fsi_i2c_port *port)
{
int rc;
- struct fsi_device *fsi = port->master->fsi;
+ struct fsi_device *fsi = port->ctrl->fsi;
u32 mode, dummy = 0;
rc = fsi_i2c_read_reg(fsi, I2C_FSI_MODE, &mode);
@@ -236,7 +236,7 @@ static int fsi_i2c_set_port(struct fsi_i2c_port *port)
static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg,
bool stop)
{
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
u32 cmd = I2C_CMD_WITH_START | I2C_CMD_WITH_ADDR;
port->xfrd = 0;
@@ -268,7 +268,7 @@ static int fsi_i2c_write_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,
{
int write;
int rc;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
int bytes_to_write = i2c->fifo_size - fifo_count;
int bytes_remaining = msg->len - port->xfrd;
@@ -294,7 +294,7 @@ static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,
{
int read;
int rc;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
int bytes_to_read;
int xfr_remaining = msg->len - port->xfrd;
u32 dummy;
@@ -330,7 +330,7 @@ static int fsi_i2c_get_scl(struct i2c_adapter *adap)
{
u32 stat = 0;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat);
@@ -341,7 +341,7 @@ static void fsi_i2c_set_scl(struct i2c_adapter *adap, int val)
{
u32 dummy = 0;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
if (val)
fsi_i2c_write_reg(i2c->fsi, I2C_FSI_SET_SCL, &dummy);
@@ -353,7 +353,7 @@ static int fsi_i2c_get_sda(struct i2c_adapter *adap)
{
u32 stat = 0;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat);
@@ -364,7 +364,7 @@ static void fsi_i2c_set_sda(struct i2c_adapter *adap, int val)
{
u32 dummy = 0;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
if (val)
fsi_i2c_write_reg(i2c->fsi, I2C_FSI_SET_SDA, &dummy);
@@ -377,7 +377,7 @@ static void fsi_i2c_prepare_recovery(struct i2c_adapter *adap)
int rc;
u32 mode;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_MODE, &mode);
if (rc)
@@ -392,7 +392,7 @@ static void fsi_i2c_unprepare_recovery(struct i2c_adapter *adap)
int rc;
u32 mode;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_MODE, &mode);
if (rc)
@@ -402,7 +402,7 @@ static void fsi_i2c_unprepare_recovery(struct i2c_adapter *adap)
fsi_i2c_write_reg(i2c->fsi, I2C_FSI_MODE, &mode);
}
-static int fsi_i2c_reset_bus(struct fsi_i2c_master *i2c,
+static int fsi_i2c_reset_bus(struct fsi_i2c_ctrl *i2c,
struct fsi_i2c_port *port)
{
int rc;
@@ -435,7 +435,7 @@ static int fsi_i2c_reset_bus(struct fsi_i2c_master *i2c,
return fsi_i2c_dev_init(i2c);
}
-static int fsi_i2c_reset_engine(struct fsi_i2c_master *i2c, u16 port)
+static int fsi_i2c_reset_engine(struct fsi_i2c_ctrl *i2c, u16 port)
{
int rc;
u32 mode, dummy = 0;
@@ -478,7 +478,7 @@ static int fsi_i2c_abort(struct fsi_i2c_port *port, u32 status)
unsigned long start;
u32 cmd = I2C_CMD_WITH_STOP;
u32 stat;
- struct fsi_i2c_master *i2c = port->master;
+ struct fsi_i2c_ctrl *i2c = port->ctrl;
struct fsi_device *fsi = i2c->fsi;
rc = fsi_i2c_reset_engine(i2c, port->port);
@@ -505,7 +505,7 @@ static int fsi_i2c_abort(struct fsi_i2c_port *port, u32 status)
if (rc)
return rc;
- /* wait until we see command complete in the master */
+ /* wait until we see command complete in the controller */
start = jiffies;
do {
@@ -579,7 +579,7 @@ static int fsi_i2c_wait(struct fsi_i2c_port *port, struct i2c_msg *msg,
unsigned long start = jiffies;
do {
- rc = fsi_i2c_read_reg(port->master->fsi, I2C_FSI_STAT,
+ rc = fsi_i2c_read_reg(port->ctrl->fsi, I2C_FSI_STAT,
&status);
if (rc)
return rc;
@@ -609,10 +609,10 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
int i, rc;
unsigned long start_time;
struct fsi_i2c_port *port = adap->algo_data;
- struct fsi_i2c_master *master = port->master;
+ struct fsi_i2c_ctrl *ctrl = port->ctrl;
struct i2c_msg *msg;
- mutex_lock(&master->lock);
+ mutex_lock(&ctrl->lock);
rc = fsi_i2c_set_port(port);
if (rc)
@@ -633,7 +633,7 @@ static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
}
unlock:
- mutex_unlock(&master->lock);
+ mutex_unlock(&ctrl->lock);
return rc ? : num;
}
@@ -654,7 +654,7 @@ static struct i2c_bus_recovery_info fsi_i2c_bus_recovery_info = {
};
static const struct i2c_algorithm fsi_i2c_algorithm = {
- .master_xfer = fsi_i2c_xfer,
+ .xfer = fsi_i2c_xfer,
.functionality = fsi_i2c_functionality,
};
@@ -676,7 +676,7 @@ static struct device_node *fsi_i2c_find_port_of_node(struct device_node *fsi,
static int fsi_i2c_probe(struct device *dev)
{
- struct fsi_i2c_master *i2c;
+ struct fsi_i2c_ctrl *i2c;
struct fsi_i2c_port *port;
struct device_node *np;
u32 port_no, ports, stat;
@@ -699,7 +699,7 @@ static int fsi_i2c_probe(struct device *dev)
return rc;
ports = FIELD_GET(I2C_STAT_MAX_PORT, stat) + 1;
- dev_dbg(dev, "I2C master has %d ports\n", ports);
+ dev_dbg(dev, "I2C controller has %d ports\n", ports);
for (port_no = 0; port_no < ports; port_no++) {
np = fsi_i2c_find_port_of_node(dev->of_node, port_no);
@@ -712,7 +712,7 @@ static int fsi_i2c_probe(struct device *dev)
break;
}
- port->master = i2c;
+ port->ctrl = i2c;
port->port = port_no;
port->adapter.owner = THIS_MODULE;
@@ -742,7 +742,7 @@ static int fsi_i2c_probe(struct device *dev)
static int fsi_i2c_remove(struct device *dev)
{
- struct fsi_i2c_master *i2c = dev_get_drvdata(dev);
+ struct fsi_i2c_ctrl *i2c = dev_get_drvdata(dev);
struct fsi_i2c_port *port, *tmp;
list_for_each_entry_safe(port, tmp, &i2c->ports, list) {
@@ -772,5 +772,5 @@ static struct fsi_driver fsi_i2c_driver = {
module_fsi_driver(fsi_i2c_driver);
MODULE_AUTHOR("Eddie James <eajames@us.ibm.com>");
-MODULE_DESCRIPTION("FSI attached I2C master");
+MODULE_DESCRIPTION("FSI attached I2C controller");
MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index 4f1411b1a775452801dafaed734fab0be7d67ce8..e0bd218e2f146cdf49a6a7327a628c3f747add5b 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -216,8 +216,8 @@ static int fops_lose_arbitration_set(void *data, u64 duration)
priv->scl_irq_data = duration;
/*
- * Interrupt on falling SCL. This ensures that the master under test has
- * really started the transfer. Interrupt on falling SDA did only
+ * Interrupt on falling SCL. This ensures that the controller under test
+ * has really started the transfer. Interrupt on falling SDA did only
* exercise 'bus busy' detection on some HW but not 'arbitration lost'.
* Note that the interrupt latency may cause the first bits to be
* transmitted correctly.
@@ -245,8 +245,8 @@ static int fops_inject_panic_set(void *data, u64 duration)
priv->scl_irq_data = duration;
/*
- * Interrupt on falling SCL. This ensures that the master under test has
- * really started the transfer.
+ * Interrupt on falling SCL. This ensures that the controller under test
+ * has really started the transfer.
*/
return i2c_gpio_fi_act_on_scl_irq(priv, inject_panic_irq);
}
diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c
index 7922bc917c33a7a41255bdc10bf1892a325ede9c..ec1ebacb9aa8d1a935c8481ec7e0dbc6713c8449 100644
--- a/drivers/i2c/busses/i2c-highlander.c
+++ b/drivers/i2c/busses/i2c-highlander.c
@@ -331,7 +331,7 @@ static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
/* Ensure we're in a sane state */
highlander_i2c_done(dev);
- /* Set slave address */
+ /* Set target address */
iowrite16((addr << 1) | read_write, dev->base + SMSMADR);
highlander_i2c_command(dev, command, dev->buf_len);
diff --git a/drivers/i2c/busses/i2c-hisi.c b/drivers/i2c/busses/i2c-hisi.c
index 975c0b1c44deb61ae84bfbe877de390f01502c60..4b735ad9e193e372ea476933db93e26abb5d8bb0 100644
--- a/drivers/i2c/busses/i2c-hisi.c
+++ b/drivers/i2c/busses/i2c-hisi.c
@@ -197,8 +197,8 @@ static void hisi_i2c_reset_xfer(struct hisi_i2c_controller *ctlr)
* wait for the transfer done. The major transfer process is performed
* in the IRQ handler.
*/
-static int hisi_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
- int num)
+static int hisi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
{
struct hisi_i2c_controller *ctlr = i2c_get_adapdata(adap);
DECLARE_COMPLETION_ONSTACK(done);
@@ -236,8 +236,8 @@ static u32 hisi_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm hisi_i2c_algo = {
- .master_xfer = hisi_i2c_master_xfer,
- .functionality = hisi_i2c_functionality,
+ .xfer = hisi_i2c_xfer,
+ .functionality = hisi_i2c_functionality,
};
static int hisi_i2c_read_rx_fifo(struct hisi_i2c_controller *ctlr)
diff --git a/drivers/i2c/busses/i2c-hix5hd2.c b/drivers/i2c/busses/i2c-hix5hd2.c
index a47b9939fa2ce2cb7d5fb99746e65c7da75895fe..64cade6ba92344f0ed6cb57163552c718b58ca4a 100644
--- a/drivers/i2c/busses/i2c-hix5hd2.c
+++ b/drivers/i2c/busses/i2c-hix5hd2.c
@@ -200,7 +200,7 @@ static void hix5hd2_read_handle(struct hix5hd2_i2c_priv *priv)
/* the last byte don't need send ACK */
writel_relaxed(I2C_READ | I2C_NO_ACK, priv->regs + HIX5I2C_COM);
} else if (priv->msg_len > 1) {
- /* if i2c master receive data will send ACK */
+ /* if i2c controller receive data will send ACK */
writel_relaxed(I2C_READ, priv->regs + HIX5I2C_COM);
} else {
hix5hd2_rw_handle_stop(priv);
@@ -384,8 +384,8 @@ static u32 hix5hd2_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm hix5hd2_i2c_algorithm = {
- .master_xfer = hix5hd2_i2c_xfer,
- .functionality = hix5hd2_i2c_func,
+ .xfer = hix5hd2_i2c_xfer,
+ .functionality = hix5hd2_i2c_func,
};
static int hix5hd2_i2c_probe(struct platform_device *pdev)
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index d2d2a6dbe29f22d706e369ff84efef6a6663df33..328c0dab6b147e76a28e2acfc155b6a07f9818aa 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -80,6 +80,7 @@
* Meteor Lake SoC-S (SOC) 0xae22 32 hard yes yes yes
* Meteor Lake PCH-S (PCH) 0x7f23 32 hard yes yes yes
* Birch Stream (SOC) 0x5796 32 hard yes yes yes
+ * Arrow Lake-H (SOC) 0x7722 32 hard yes yes yes
*
* Features supported by this driver:
* Software PEC no
@@ -87,7 +88,7 @@
* Block buffer yes
* Block process call transaction yes
* I2C block read transaction yes (doesn't use the block buffer)
- * Slave mode no
+ * Target mode no
* SMBus Host Notify yes
* Interrupt processing yes
*
@@ -237,6 +238,7 @@
#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_M_SMBUS 0x54a3
#define PCI_DEVICE_ID_INTEL_BIRCH_STREAM_SMBUS 0x5796
#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
+#define PCI_DEVICE_ID_INTEL_ARROW_LAKE_H_SMBUS 0x7722
#define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_S_SMBUS 0x7a23
#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3
#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_P_SMBUS 0x7e22
@@ -1052,6 +1054,7 @@ static const struct pci_device_id i801_ids[] = {
{ PCI_DEVICE_DATA(INTEL, METEOR_LAKE_SOC_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ PCI_DEVICE_DATA(INTEL, METEOR_LAKE_PCH_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ PCI_DEVICE_DATA(INTEL, BIRCH_STREAM_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
+ { PCI_DEVICE_DATA(INTEL, ARROW_LAKE_H_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ 0, }
};
@@ -1274,10 +1277,10 @@ static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv)
i2c_new_client_device(&priv->adapter, &info);
}
-/* Register optional slaves */
-static void i801_probe_optional_slaves(struct i801_priv *priv)
+/* Register optional targets */
+static void i801_probe_optional_targets(struct i801_priv *priv)
{
- /* Only register slaves on main SMBus channel */
+ /* Only register targets on main SMBus channel */
if (priv->features & FEATURE_IDF)
return;
@@ -1304,7 +1307,7 @@ static void i801_probe_optional_slaves(struct i801_priv *priv)
}
#else
static void __init input_apanel_init(void) {}
-static void i801_probe_optional_slaves(struct i801_priv *priv) {}
+static void i801_probe_optional_targets(struct i801_priv *priv) {}
#endif /* CONFIG_X86 && CONFIG_DMI */
#ifdef CONFIG_I2C_I801_MUX
@@ -1774,7 +1777,7 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
/* We ignore errors - multiplexing is optional */
i801_add_mux(priv);
- i801_probe_optional_slaves(priv);
+ i801_probe_optional_targets(priv);
pci_set_drvdata(dev, priv);
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 7fb87b78923e460222fe633e0229aa18df7e608d..82dedb1bb5bee72c55a7c6c989f388e4c25a509e 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -136,11 +136,11 @@ static void iic_dev_init(struct ibm_iic_private* dev)
DBG("%d: init\n", dev->idx);
- /* Clear master address */
+ /* Clear remote target address */
out_8(&iic->lmadr, 0);
out_8(&iic->hmadr, 0);
- /* Clear slave address */
+ /* Clear local target address */
out_8(&iic->lsadr, 0);
out_8(&iic->hsadr, 0);
@@ -337,7 +337,7 @@ static irqreturn_t iic_handler(int irq, void *dev_id)
}
/*
- * Get master transfer result and clear errors if any.
+ * Get controller transfer result and clear errors if any.
* Returns the number of actually transferred bytes or error (<0)
*/
static int iic_xfer_result(struct ibm_iic_private* dev)
@@ -352,7 +352,7 @@ static int iic_xfer_result(struct ibm_iic_private* dev)
out_8(&iic->extsts, EXTSTS_IRQP | EXTSTS_IRQD |
EXTSTS_LA | EXTSTS_ICT | EXTSTS_XFRA);
- /* Flush master data buffer */
+ /* Flush controller data buffer */
out_8(&iic->mdcntl, in_8(&iic->mdcntl) | MDCNTL_FMDB);
/* Is bus free?
@@ -401,7 +401,7 @@ static void iic_abort_xfer(struct ibm_iic_private* dev)
}
/*
- * Wait for master transfer to complete.
+ * Wait for controller transfer to complete.
* It puts current process to sleep until we get interrupt or timeout expires.
* Returns the number of transferred bytes or error (<0)
*/
@@ -452,9 +452,6 @@ static int iic_wait_for_tc(struct ibm_iic_private* dev){
return ret;
}
-/*
- * Low level master transfer routine
- */
static int iic_xfer_bytes(struct ibm_iic_private* dev, struct i2c_msg* pm,
int combined_xfer)
{
@@ -511,9 +508,7 @@ static int iic_xfer_bytes(struct ibm_iic_private* dev, struct i2c_msg* pm,
return ret > 0 ? 0 : ret;
}
-/*
- * Set target slave address for master transfer
- */
+/* Set remote target address for transfer */
static inline void iic_address(struct ibm_iic_private* dev, struct i2c_msg* msg)
{
volatile struct iic_regs __iomem *iic = dev->vaddr;
@@ -546,7 +541,7 @@ static inline int iic_address_neq(const struct i2c_msg* p1,
}
/*
- * Generic master transfer entrypoint.
+ * Generic transfer entrypoint.
* Returns the number of processed messages or error (<0)
*/
static int iic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
@@ -604,11 +599,11 @@ static int iic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
}
}
else {
- /* Flush master data buffer (just in case) */
+ /* Flush controller data buffer (just in case) */
out_8(&iic->mdcntl, in_8(&iic->mdcntl) | MDCNTL_FMDB);
}
- /* Load slave address */
+ /* Load target address */
iic_address(dev, &msgs[0]);
/* Do real transfer */
@@ -624,8 +619,8 @@ static u32 iic_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm iic_algo = {
- .master_xfer = iic_xfer,
- .functionality = iic_func
+ .xfer = iic_xfer,
+ .functionality = iic_func
};
/*
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 2e5f0165c3d3016ee613517838b223af10480a35..859c14e340e7e3541daec39528671349103946ea 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -22,7 +22,7 @@
* - Make it work with IXP46x chips
* - Cleanup function names, coding style, etc
*
- * - writing to slave address causes latchup on iop331.
+ * - writing to local target address causes latchup on iop331.
* fix: driver refuses to address self.
*/
@@ -234,7 +234,7 @@ iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap,
int status;
int rc;
- /* avoid writing to my slave address (hangs on 80331),
+ /* avoid writing to local target address (hangs on 80331),
* forbidden in Intel developer manual
*/
if (msg->addr == MYSAR) {
@@ -349,12 +349,9 @@ iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg *pmsg)
}
}
-/*
- * master_xfer() - main read/write entry
- */
static int
-iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
- int num)
+iop3xx_i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
+ int num)
{
struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data;
int im = 0;
@@ -384,8 +381,8 @@ iop3xx_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm iop3xx_i2c_algo = {
- .master_xfer = iop3xx_i2c_master_xfer,
- .functionality = iop3xx_i2c_func,
+ .xfer = iop3xx_i2c_xfer,
+ .functionality = iop3xx_i2c_func,
};
static void
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
index 416a9968ed2870a26f0a2b735f33e82bba85aa5a..33dbc19d3848dd34062bbc9a7cb4000a12ff64c0 100644
--- a/drivers/i2c/busses/i2c-isch.c
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -104,7 +104,7 @@ static int sch_transaction(void)
result = -EIO;
dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be "
"locked until next hard reset. (sorry!)\n");
- /* Clock stops and slave is stuck in mid-transmission */
+ /* Clock stops and target is stuck in mid-transmission */
} else if (temp & 0x02) {
result = -EIO;
dev_err(&sch_adapter.dev, "Error: no response!\n");
diff --git a/drivers/i2c/busses/i2c-jz4780.c b/drivers/i2c/busses/i2c-jz4780.c
index 7951891d6b97c68f125aeec9dbbbcd03c544ef54..4aafdfab63054160b2abf5938e7d63d81f913c00 100644
--- a/drivers/i2c/busses/i2c-jz4780.c
+++ b/drivers/i2c/busses/i2c-jz4780.c
@@ -730,8 +730,8 @@ static u32 jz4780_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm jz4780_i2c_algorithm = {
- .master_xfer = jz4780_i2c_xfer,
- .functionality = jz4780_i2c_functionality,
+ .xfer = jz4780_i2c_xfer,
+ .functionality = jz4780_i2c_functionality,
};
static const struct ingenic_i2c_config jz4780_i2c_config = {
diff --git a/drivers/i2c/busses/i2c-kempld.c b/drivers/i2c/busses/i2c-kempld.c
index c3a529a73b5bc119a9b829d9ea1c31dda0e41c46..eb66942e0b7d00af03cd82a75573034fc36b3e4b 100644
--- a/drivers/i2c/busses/i2c-kempld.c
+++ b/drivers/i2c/busses/i2c-kempld.c
@@ -276,8 +276,8 @@ static u32 kempld_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm kempld_i2c_algorithm = {
- .master_xfer = kempld_i2c_xfer,
- .functionality = kempld_i2c_func,
+ .xfer = kempld_i2c_xfer,
+ .functionality = kempld_i2c_func,
};
static const struct i2c_adapter kempld_i2c_adapter = {
diff --git a/drivers/i2c/busses/i2c-ljca.c b/drivers/i2c/busses/i2c-ljca.c
index b4927622177c29794049d0718ba397a97bc240e6..0b70621cf9d3389dde3f8c8025992ddb7d570c38 100644
--- a/drivers/i2c/busses/i2c-ljca.c
+++ b/drivers/i2c/busses/i2c-ljca.c
@@ -76,7 +76,7 @@ static int ljca_i2c_init(struct ljca_i2c_dev *ljca_i2c, u8 id)
return ret < 0 ? ret : 0;
}
-static int ljca_i2c_start(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr,
+static int ljca_i2c_start(struct ljca_i2c_dev *ljca_i2c, u8 target_addr,
enum ljca_xfer_type type)
{
struct ljca_i2c_rw_packet *w_packet =
@@ -88,7 +88,7 @@ static int ljca_i2c_start(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr,
w_packet->id = ljca_i2c->i2c_info->id;
w_packet->len = cpu_to_le16(sizeof(*w_packet->data));
- w_packet->data[0] = (slave_addr << 1) | type;
+ w_packet->data[0] = (target_addr << 1) | type;
ret = ljca_transfer(ljca_i2c->ljca, LJCA_I2C_START, (u8 *)w_packet,
struct_size(w_packet, data, 1), (u8 *)r_packet,
@@ -107,7 +107,7 @@ static int ljca_i2c_start(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr,
return 0;
}
-static void ljca_i2c_stop(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr)
+static void ljca_i2c_stop(struct ljca_i2c_dev *ljca_i2c, u8 target_addr)
{
struct ljca_i2c_rw_packet *w_packet =
(struct ljca_i2c_rw_packet *)ljca_i2c->obuf;
@@ -169,16 +169,16 @@ static int ljca_i2c_pure_read(struct ljca_i2c_dev *ljca_i2c, u8 *data, u8 len)
return 0;
}
-static int ljca_i2c_read(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr, u8 *data,
+static int ljca_i2c_read(struct ljca_i2c_dev *ljca_i2c, u8 target_addr, u8 *data,
u8 len)
{
int ret;
- ret = ljca_i2c_start(ljca_i2c, slave_addr, LJCA_I2C_READ_XFER_TYPE);
+ ret = ljca_i2c_start(ljca_i2c, target_addr, LJCA_I2C_READ_XFER_TYPE);
if (!ret)
ret = ljca_i2c_pure_read(ljca_i2c, data, len);
- ljca_i2c_stop(ljca_i2c, slave_addr);
+ ljca_i2c_stop(ljca_i2c, target_addr);
return ret;
}
@@ -213,16 +213,16 @@ static int ljca_i2c_pure_write(struct ljca_i2c_dev *ljca_i2c, u8 *data, u8 len)
return 0;
}
-static int ljca_i2c_write(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr,
+static int ljca_i2c_write(struct ljca_i2c_dev *ljca_i2c, u8 target_addr,
u8 *data, u8 len)
{
int ret;
- ret = ljca_i2c_start(ljca_i2c, slave_addr, LJCA_I2C_WRITE_XFER_TYPE);
+ ret = ljca_i2c_start(ljca_i2c, target_addr, LJCA_I2C_WRITE_XFER_TYPE);
if (!ret)
ret = ljca_i2c_pure_write(ljca_i2c, data, len);
- ljca_i2c_stop(ljca_i2c, slave_addr);
+ ljca_i2c_stop(ljca_i2c, target_addr);
return ret;
}
@@ -266,7 +266,7 @@ static const struct i2c_adapter_quirks ljca_i2c_quirks = {
};
static const struct i2c_algorithm ljca_i2c_algo = {
- .master_xfer = ljca_i2c_xfer,
+ .xfer = ljca_i2c_xfer,
.functionality = ljca_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-lpc2k.c b/drivers/i2c/busses/i2c-lpc2k.c
index e3660333e91cca2ce3d3d65477b8b89272c9081f..9fb33cbf741940635c95ed5738c0e7c8f7c1cec6 100644
--- a/drivers/i2c/busses/i2c-lpc2k.c
+++ b/drivers/i2c/busses/i2c-lpc2k.c
@@ -50,7 +50,7 @@
/*
* 26 possible I2C status codes, but codes applicable only
- * to master are listed here and used in this driver
+ * to controller mode are listed here and used in this driver
*/
enum {
M_BUS_ERROR = 0x00,
@@ -157,7 +157,7 @@ static void i2c_lpc2k_pump_msg(struct lpc2k_i2c *i2c)
break;
case MR_ADDR_R_ACK:
- /* Receive first byte from slave */
+ /* Receive first byte from target */
if (i2c->msg->len == 1) {
/* Last byte, return NACK */
writel(LPC24XX_AA, i2c->base + LPC24XX_I2CONCLR);
@@ -196,7 +196,7 @@ static void i2c_lpc2k_pump_msg(struct lpc2k_i2c *i2c)
}
/*
- * One pre-last data input, send NACK to tell the slave that
+ * One pre-last data input, send NACK to tell the target that
* this is going to be the last data byte to be transferred.
*/
if (i2c->msg_idx >= i2c->msg->len - 2) {
@@ -338,8 +338,8 @@ static u32 i2c_lpc2k_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm i2c_lpc2k_algorithm = {
- .master_xfer = i2c_lpc2k_xfer,
- .functionality = i2c_lpc2k_functionality,
+ .xfer = i2c_lpc2k_xfer,
+ .functionality = i2c_lpc2k_functionality,
};
static int i2c_lpc2k_probe(struct platform_device *pdev)
diff --git a/drivers/i2c/busses/i2c-ls2x.c b/drivers/i2c/busses/i2c-ls2x.c
index ebae6035701db7e301c92551d68d503ea459f912..8821cac3897b692590b2ec6cc5ba1c370a34ed1d 100644
--- a/drivers/i2c/busses/i2c-ls2x.c
+++ b/drivers/i2c/busses/i2c-ls2x.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Loongson-2K/Loongson LS7A I2C master mode driver
+ * Loongson-2K/Loongson LS7A I2C controller mode driver
*
* Copyright (C) 2013 Loongson Technology Corporation Limited.
* Copyright (C) 2014-2017 Lemote, Inc.
@@ -51,7 +51,7 @@
/* Control Register Bit */
#define LS2X_CTR_EN BIT(7) /* 0: I2c frequency setting 1: Normal */
#define LS2X_CTR_IEN BIT(6) /* Enable i2c interrupt */
-#define LS2X_CTR_MST BIT(5) /* 0: Slave mode 1: Master mode */
+#define LS2X_CTR_MST BIT(5) /* 0: Target mode 1: Controller mode */
#define CTR_FREQ_MASK GENMASK(7, 6)
#define CTR_READY_MASK GENMASK(7, 5)
@@ -251,8 +251,7 @@ static int ls2x_i2c_xfer_one(struct ls2x_i2c_priv *priv,
return ret;
}
-static int ls2x_i2c_master_xfer(struct i2c_adapter *adap,
- struct i2c_msg *msgs, int num)
+static int ls2x_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
int ret;
struct i2c_msg *msg, *emsg = msgs + num;
@@ -273,8 +272,8 @@ static unsigned int ls2x_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm ls2x_i2c_algo = {
- .master_xfer = ls2x_i2c_master_xfer,
- .functionality = ls2x_i2c_func,
+ .xfer = ls2x_i2c_xfer,
+ .functionality = ls2x_i2c_func,
};
static int ls2x_i2c_probe(struct platform_device *pdev)
diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c
index 099291a0411dec07664bb98fbabf1b4e4e19adf4..8223f6d29eb3b22f5fc40156fda4f67d7f91b828 100644
--- a/drivers/i2c/busses/i2c-mlxcpld.c
+++ b/drivers/i2c/busses/i2c-mlxcpld.c
@@ -197,8 +197,8 @@ static int mlxcpld_i2c_check_status(struct mlxcpld_i2c_priv *priv, int *status)
if (val & MLXCPLD_LPCI2C_TRANS_END) {
if (val & MLXCPLD_LPCI2C_STATUS_NACK)
/*
- * The slave is unable to accept the data. No such
- * slave, command not understood, or unable to accept
+ * The target is unable to accept the data. No such
+ * target, command not understood, or unable to accept
* any more data.
*/
*status = MLXCPLD_LPCI2C_NACK_IND;
@@ -280,7 +280,7 @@ static int mlxcpld_i2c_wait_for_free(struct mlxcpld_i2c_priv *priv)
}
/*
- * Wait for master transfer to complete.
+ * Wait for transfer to complete.
* It puts current process to sleep until we get interrupt or timeout expires.
* Returns the number of transferred or read bytes or error (<0).
*/
@@ -315,7 +315,7 @@ static int mlxcpld_i2c_wait_for_tc(struct mlxcpld_i2c_priv *priv)
/*
* Actual read data len will be always the same as
* requested len. 0xff (line pull-up) will be returned
- * if slave has no data to return. Thus don't read
+ * if target has no data to return. Thus don't read
* MLXCPLD_LPCI2C_NUM_DAT_REG reg from CPLD. Only in case of
* SMBus block read transaction data len can be different,
* check this case.
@@ -375,7 +375,7 @@ static void mlxcpld_i2c_xfer_msg(struct mlxcpld_i2c_priv *priv)
}
/*
- * Set target slave address with command for master transfer.
+ * Set target address with command for transfer.
* It should be latest executed function before CPLD transaction.
*/
cmd = (priv->xfer.msg[0].addr << 1) | priv->xfer.cmd;
@@ -449,8 +449,8 @@ static u32 mlxcpld_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm mlxcpld_i2c_algo = {
- .master_xfer = mlxcpld_i2c_xfer,
- .functionality = mlxcpld_i2c_func
+ .xfer = mlxcpld_i2c_xfer,
+ .functionality = mlxcpld_i2c_func
};
static const struct i2c_adapter_quirks mlxcpld_i2c_quirks = {
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index c4223556b3b8b747c2a374a44f3c3b5b22255e82..41d6c8ed163a26ddf04b56d61d58b682acfa46cb 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -115,7 +115,7 @@ static inline void writeccr(struct mpc_i2c *i2c, u32 x)
writeb(x, i2c->base + MPC_I2C_CR);
}
-/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
+/* Sometimes 9th clock pulse isn't generated, and target doesn't release
* the bus, because it wants to send ACK.
* Following sequence of enabling/disabling and sending start/stop generates
* the 9 pulses, each with a START then ending with STOP, so it's all OK.
@@ -759,7 +759,7 @@ static int fsl_i2c_bus_recovery(struct i2c_adapter *adap)
}
static const struct i2c_algorithm mpc_algo = {
- .master_xfer = mpc_xfer,
+ .xfer = mpc_xfer,
.functionality = mpc_functionality,
};
diff --git a/drivers/i2c/busses/i2c-mt7621.c b/drivers/i2c/busses/i2c-mt7621.c
index 81d46169bc1f9da1b1f53c2a766d6dae0d254e7a..23d417ff5e71c85e9101b99dcb6a82910c55134f 100644
--- a/drivers/i2c/busses/i2c-mt7621.c
+++ b/drivers/i2c/busses/i2c-mt7621.c
@@ -117,27 +117,27 @@ static int mtk_i2c_check_ack(struct mtk_i2c *i2c, u32 expected)
return ((ack & ack_expected) == ack_expected) ? 0 : -ENXIO;
}
-static int mtk_i2c_master_start(struct mtk_i2c *i2c)
+static int mtk_i2c_start(struct mtk_i2c *i2c)
{
iowrite32(SM0CTL1_START | SM0CTL1_TRI, i2c->base + REG_SM0CTL1_REG);
return mtk_i2c_wait_idle(i2c);
}
-static int mtk_i2c_master_stop(struct mtk_i2c *i2c)
+static int mtk_i2c_stop(struct mtk_i2c *i2c)
{
iowrite32(SM0CTL1_STOP | SM0CTL1_TRI, i2c->base + REG_SM0CTL1_REG);
return mtk_i2c_wait_idle(i2c);
}
-static int mtk_i2c_master_cmd(struct mtk_i2c *i2c, u32 cmd, int page_len)
+static int mtk_i2c_cmd(struct mtk_i2c *i2c, u32 cmd, int page_len)
{
iowrite32(cmd | SM0CTL1_TRI | SM0CTL1_PGLEN(page_len),
i2c->base + REG_SM0CTL1_REG);
return mtk_i2c_wait_idle(i2c);
}
-static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
- int num)
+static int mtk_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
{
struct mtk_i2c *i2c;
struct i2c_msg *pmsg;
@@ -157,7 +157,7 @@ static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
goto err_timeout;
/* start sequence */
- ret = mtk_i2c_master_start(i2c);
+ ret = mtk_i2c_start(i2c);
if (ret)
goto err_timeout;
@@ -169,14 +169,14 @@ static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
if (pmsg->flags & I2C_M_RD)
addr |= 1;
iowrite32(addr, i2c->base + REG_SM0D0_REG);
- ret = mtk_i2c_master_cmd(i2c, SM0CTL1_WRITE, 2);
+ ret = mtk_i2c_cmd(i2c, SM0CTL1_WRITE, 2);
if (ret)
goto err_timeout;
} else {
/* 7 bits address */
addr = i2c_8bit_addr_from_msg(pmsg);
iowrite32(addr, i2c->base + REG_SM0D0_REG);
- ret = mtk_i2c_master_cmd(i2c, SM0CTL1_WRITE, 1);
+ ret = mtk_i2c_cmd(i2c, SM0CTL1_WRITE, 1);
if (ret)
goto err_timeout;
}
@@ -202,7 +202,7 @@ static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
cmd = SM0CTL1_WRITE;
}
- ret = mtk_i2c_master_cmd(i2c, cmd, page_len);
+ ret = mtk_i2c_cmd(i2c, cmd, page_len);
if (ret)
goto err_timeout;
@@ -222,7 +222,7 @@ static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
}
}
- ret = mtk_i2c_master_stop(i2c);
+ ret = mtk_i2c_stop(i2c);
if (ret)
goto err_timeout;
@@ -230,7 +230,7 @@ static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
return i;
err_ack:
- ret = mtk_i2c_master_stop(i2c);
+ ret = mtk_i2c_stop(i2c);
if (ret)
goto err_timeout;
return -ENXIO;
@@ -247,8 +247,8 @@ static u32 mtk_i2c_func(struct i2c_adapter *a)
}
static const struct i2c_algorithm mtk_i2c_algo = {
- .master_xfer = mtk_i2c_master_xfer,
- .functionality = mtk_i2c_func,
+ .xfer = mtk_i2c_xfer,
+ .functionality = mtk_i2c_func,
};
static const struct of_device_id i2c_mtk_dt_ids[] = {
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index dc160cbc315531e06868415a20b2541c8e1091be..29f94efedf605a499b3be173a6da7f039aea4a55 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -89,8 +89,8 @@ enum {
MV64XXX_I2C_STATE_WAITING_FOR_RESTART,
MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK,
MV64XXX_I2C_STATE_WAITING_FOR_ADDR_2_ACK,
- MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK,
- MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_DATA,
+ MV64XXX_I2C_STATE_WAITING_FOR_TARGET_ACK,
+ MV64XXX_I2C_STATE_WAITING_FOR_TARGET_DATA,
};
/* Driver actions */
@@ -279,7 +279,7 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
} else {
drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA;
drv_data->state =
- MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK;
+ MV64XXX_I2C_STATE_WAITING_FOR_TARGET_ACK;
drv_data->bytes_left--;
}
break;
@@ -307,7 +307,7 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
drv_data->action = MV64XXX_I2C_ACTION_RCV_DATA;
drv_data->bytes_left--;
}
- drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_DATA;
+ drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_TARGET_DATA;
if ((drv_data->bytes_left == 1) || drv_data->aborting)
drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_ACK;
@@ -797,8 +797,8 @@ static int mv64xxx_i2c_xfer_atomic(struct i2c_adapter *adap,
}
static const struct i2c_algorithm mv64xxx_i2c_algo = {
- .master_xfer = mv64xxx_i2c_xfer,
- .master_xfer_atomic = mv64xxx_i2c_xfer_atomic,
+ .xfer = mv64xxx_i2c_xfer,
+ .xfer_atomic = mv64xxx_i2c_xfer_atomic,
.functionality = mv64xxx_i2c_functionality,
};
diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c
index 26622d24bb1b2d40e3ffbaa90791cf4d7574f215..9bcaa29a71913daddce3d983d5de291a32f5f144 100644
--- a/drivers/i2c/busses/i2c-nvidia-gpu.c
+++ b/drivers/i2c/busses/i2c-nvidia-gpu.c
@@ -163,8 +163,7 @@ static int gpu_i2c_write(struct gpu_i2c_dev *i2cd, u8 data)
return gpu_i2c_check_status(i2cd);
}
-static int gpu_i2c_master_xfer(struct i2c_adapter *adap,
- struct i2c_msg *msgs, int num)
+static int gpu_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
struct gpu_i2c_dev *i2cd = i2c_get_adapdata(adap);
int status, status2;
@@ -234,8 +233,8 @@ static u32 gpu_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm gpu_i2c_algorithm = {
- .master_xfer = gpu_i2c_master_xfer,
- .functionality = gpu_i2c_functionality,
+ .xfer = gpu_i2c_xfer,
+ .functionality = gpu_i2c_functionality,
};
/*
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 4ad670a80a63af7b1d5be98c2886757b85545e5e..482b37c8a12970438400960bc667e6f7331e0e54 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -444,8 +444,8 @@ static u32 ocores_func(struct i2c_adapter *adap)
}
static struct i2c_algorithm ocores_algorithm = {
- .master_xfer = ocores_xfer,
- .master_xfer_atomic = ocores_xfer_polling,
+ .xfer = ocores_xfer,
+ .xfer_atomic = ocores_xfer_polling,
.functionality = ocores_func,
};
@@ -682,13 +682,13 @@ static int ocores_i2c_probe(struct platform_device *pdev)
}
if (irq == -ENXIO) {
- ocores_algorithm.master_xfer = ocores_xfer_polling;
+ ocores_algorithm.xfer = ocores_xfer_polling;
} else {
if (irq < 0)
return irq;
}
- if (ocores_algorithm.master_xfer != ocores_xfer_polling) {
+ if (ocores_algorithm.xfer != ocores_xfer_polling) {
ret = devm_request_any_context_irq(&pdev->dev, irq,
ocores_isr, 0,
pdev->name, i2c);
diff --git a/drivers/i2c/busses/i2c-octeon-core.c b/drivers/i2c/busses/i2c-octeon-core.c
index 5b7b942141e725c7f9071c217c728efce067cee6..16cc34a0526e6e49e742cb095cf4d5b969bd00f0 100644
--- a/drivers/i2c/busses/i2c-octeon-core.c
+++ b/drivers/i2c/busses/i2c-octeon-core.c
@@ -221,14 +221,14 @@ static int octeon_i2c_check_status(struct octeon_i2c *i2c, int final_read)
case STAT_LOST_ARB_B0:
return -EAGAIN;
- /* Being addressed as slave, should back off & listen */
+ /* Being addressed as local target, should back off & listen */
case STAT_SLAVE_60:
case STAT_SLAVE_70:
case STAT_GENDATA_ACK:
case STAT_GENDATA_NAK:
return -EOPNOTSUPP;
- /* Core busy as slave */
+ /* Core busy as local target */
case STAT_SLAVE_80:
case STAT_SLAVE_88:
case STAT_SLAVE_A0:
@@ -608,7 +608,7 @@ static int octeon_i2c_hlc_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msg
}
/**
- * octeon_i2c_xfer - The driver's master_xfer function
+ * octeon_i2c_xfer - The driver's xfer function
* @adap: Pointer to the i2c_adapter structure
* @msgs: Pointer to the messages to be processed
* @num: Length of the MSGS array
diff --git a/drivers/i2c/busses/i2c-octeon-core.h b/drivers/i2c/busses/i2c-octeon-core.h
index 7af01864da7522fc9485511e1feb184e8659c74f..b265e21189a1619de6b30d6e94a35aff37af18b6 100644
--- a/drivers/i2c/busses/i2c-octeon-core.h
+++ b/drivers/i2c/busses/i2c-octeon-core.h
@@ -39,8 +39,8 @@
/* Controller command and status bits */
#define TWSI_CTL_CE 0x80 /* High level controller enable */
#define TWSI_CTL_ENAB 0x40 /* Bus enable */
-#define TWSI_CTL_STA 0x20 /* Master-mode start, HW clears when done */
-#define TWSI_CTL_STP 0x10 /* Master-mode stop, HW clears when done */
+#define TWSI_CTL_STA 0x20 /* Controller-mode start, HW clears when done */
+#define TWSI_CTL_STP 0x10 /* Controller-mode stop, HW clears when done */
#define TWSI_CTL_IFLG 0x08 /* HW event, SW writes 0 to ACK */
#define TWSI_CTL_AAK 0x04 /* Assert ACK */
diff --git a/drivers/i2c/busses/i2c-octeon-platdrv.c b/drivers/i2c/busses/i2c-octeon-platdrv.c
index 7d54b3203f71665711641dd74562ca327acebba4..dc6dff95c68ce7ad87bbee0b0d7f8c8d8b1e84f6 100644
--- a/drivers/i2c/busses/i2c-octeon-platdrv.c
+++ b/drivers/i2c/busses/i2c-octeon-platdrv.c
@@ -122,7 +122,7 @@ static u32 octeon_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm octeon_i2c_algo = {
- .master_xfer = octeon_i2c_xfer,
+ .xfer = octeon_i2c_xfer,
.functionality = octeon_i2c_functionality,
};
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 30a5ea282a8b080eab1a8d99366a1aaa5626b367..35a3f0a64986455932f9029c93dd810ab3d71f0b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1534,7 +1534,7 @@ static void omap_i2c_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
}
-static int __maybe_unused omap_i2c_runtime_suspend(struct device *dev)
+static int omap_i2c_runtime_suspend(struct device *dev)
{
struct omap_i2c_dev *omap = dev_get_drvdata(dev);
@@ -1560,7 +1560,7 @@ static int __maybe_unused omap_i2c_runtime_suspend(struct device *dev)
return 0;
}
-static int __maybe_unused omap_i2c_runtime_resume(struct device *dev)
+static int omap_i2c_runtime_resume(struct device *dev)
{
struct omap_i2c_dev *omap = dev_get_drvdata(dev);
@@ -1574,11 +1574,33 @@ static int __maybe_unused omap_i2c_runtime_resume(struct device *dev)
return 0;
}
+static int omap_i2c_suspend(struct device *dev)
+{
+ /*
+ * If the controller is autosuspended, there is no way to wakeup it once
+ * runtime pm is disabled (in suspend_late()).
+ * But a device may need the controller up during suspend_noirq() or
+ * resume_noirq().
+ * Wakeup the controller while runtime pm is enabled, so it is available
+ * until its suspend_noirq(), and from resume_noirq().
+ */
+ return pm_runtime_resume_and_get(dev);
+}
+
+static int omap_i2c_resume(struct device *dev)
+{
+ pm_runtime_mark_last_busy(dev);
+ pm_runtime_put_autosuspend(dev);
+
+ return 0;
+}
+
static const struct dev_pm_ops omap_i2c_pm_ops = {
- SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
- pm_runtime_force_resume)
- SET_RUNTIME_PM_OPS(omap_i2c_runtime_suspend,
- omap_i2c_runtime_resume, NULL)
+ NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+ SYSTEM_SLEEP_PM_OPS(omap_i2c_suspend, omap_i2c_resume)
+ RUNTIME_PM_OPS(omap_i2c_runtime_suspend,
+ omap_i2c_runtime_resume, NULL)
};
static struct platform_driver omap_i2c_driver = {
@@ -1586,7 +1608,7 @@ static struct platform_driver omap_i2c_driver = {
.remove_new = omap_i2c_remove,
.driver = {
.name = "omap_i2c",
- .pm = &omap_i2c_pm_ops,
+ .pm = pm_ptr(&omap_i2c_pm_ops),
.of_match_table = of_match_ptr(omap_i2c_of_match),
},
};
diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
index 17ef87d50f7c7d51d5c8d0187fb3663f5a742a58..d9dd71cf37fd29f5d7aca4a386084a7d98abc9ba 100644
--- a/drivers/i2c/busses/i2c-opal.c
+++ b/drivers/i2c/busses/i2c-opal.c
@@ -70,8 +70,8 @@ static int i2c_opal_send_request(u32 bus_id, struct opal_i2c_request *req)
return rc;
}
-static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
- int num)
+static int i2c_opal_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
{
unsigned long opal_id = (unsigned long)adap->algo_data;
struct opal_i2c_request req;
@@ -179,9 +179,9 @@ static u32 i2c_opal_func(struct i2c_adapter *adapter)
}
static const struct i2c_algorithm i2c_opal_algo = {
- .master_xfer = i2c_opal_master_xfer,
- .smbus_xfer = i2c_opal_smbus_xfer,
- .functionality = i2c_opal_func,
+ .xfer = i2c_opal_xfer,
+ .smbus_xfer = i2c_opal_smbus_xfer,
+ .functionality = i2c_opal_func,
};
/*
diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c
index 777f1a0278c747b59a7e64d249a0b232822d4fb1..84a195e358866d693fb6d435a5beaaee640fd2e2 100644
--- a/drivers/i2c/busses/i2c-owl.c
+++ b/drivers/i2c/busses/i2c-owl.c
@@ -172,7 +172,7 @@ static void owl_i2c_xfer_data(struct owl_i2c_dev *i2c_dev)
i2c_dev->err = 0;
- /* Handle NACK from slave */
+ /* Handle NACK from target */
fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT);
if (fifostat & OWL_I2C_FIFOSTAT_RNB) {
i2c_dev->err = -ENXIO;
@@ -302,7 +302,7 @@ static int owl_i2c_xfer_common(struct i2c_adapter *adap, struct i2c_msg *msgs,
OWL_I2C_CTL_IRQE, !atomic);
/*
- * Select: FIFO enable, Master mode, Stop enable, Data count enable,
+ * Select: FIFO enable, controller mode, Stop enable, Data count enable,
* Send start bit
*/
i2c_cmd = OWL_I2C_CMD_SECL | OWL_I2C_CMD_MSS | OWL_I2C_CMD_SE |
@@ -314,7 +314,7 @@ static int owl_i2c_xfer_common(struct i2c_adapter *adap, struct i2c_msg *msgs,
i2c_cmd |= OWL_I2C_CMD_AS(msgs[0].len + 1) |
OWL_I2C_CMD_SAS(1) | OWL_I2C_CMD_RBE;
- /* Write slave address */
+ /* Write target address */
addr = i2c_8bit_addr_from_msg(&msgs[0]);
writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
@@ -420,9 +420,9 @@ static int owl_i2c_xfer_atomic(struct i2c_adapter *adap,
}
static const struct i2c_algorithm owl_i2c_algorithm = {
- .master_xfer = owl_i2c_xfer,
- .master_xfer_atomic = owl_i2c_xfer_atomic,
- .functionality = owl_i2c_func,
+ .xfer = owl_i2c_xfer,
+ .xfer_atomic = owl_i2c_xfer_atomic,
+ .functionality = owl_i2c_func,
};
static const struct i2c_adapter_quirks owl_i2c_quirks = {
diff --git a/drivers/i2c/busses/i2c-pasemi-core.c b/drivers/i2c/busses/i2c-pasemi-core.c
index bd8becbdeeb28f4aa7f094df18fa7d059113dcae..dac694a9d781f86afe634ddc4d93dee51bd2edff 100644
--- a/drivers/i2c/busses/i2c-pasemi-core.c
+++ b/drivers/i2c/busses/i2c-pasemi-core.c
@@ -336,9 +336,9 @@ static u32 pasemi_smb_func(struct i2c_adapter *adapter)
}
static const struct i2c_algorithm smbus_algorithm = {
- .master_xfer = pasemi_i2c_xfer,
- .smbus_xfer = pasemi_smb_xfer,
- .functionality = pasemi_smb_func,
+ .xfer = pasemi_i2c_xfer,
+ .smbus_xfer = pasemi_smb_xfer,
+ .functionality = pasemi_smb_func,
};
int pasemi_i2c_common_probe(struct pasemi_smbus *smbus)
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 6a0392172b2f2ea643c70080d127232427d32873..84aa18d1003b51ca3d3dd22fbfb4c0db958314fe 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -589,7 +589,7 @@ static int piix4_transaction(struct i2c_adapter *piix4_adapter)
result = -EIO;
dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
"locked until next hard reset. (sorry!)\n");
- /* Clock stops and slave is stuck in mid-transmission */
+ /* Clock stops and target is stuck in mid-transmission */
}
if (temp & 0x04) {
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 8e57ebe595be501e3e4ef16d29a3d79537fd29f2..b6b03539f62688b2e1333f5049b54729feec5688 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -127,13 +127,13 @@ static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
}
/*
- * Generic i2c master transfer entrypoint. This driver only support single
+ * Generic i2c transfer entrypoint. This driver only supports single
* messages (for "lame i2c" transfers). Anything else should use the smbus
* entry point
*/
-static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
- struct i2c_msg *msgs,
- int num)
+static int i2c_powermac_xfer(struct i2c_adapter *adap,
+ struct i2c_msg *msgs,
+ int num)
{
struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
int rc = 0;
@@ -179,9 +179,9 @@ static u32 i2c_powermac_func(struct i2c_adapter * adapter)
/* For now, we only handle smbus */
static const struct i2c_algorithm i2c_powermac_algorithm = {
- .smbus_xfer = i2c_powermac_smbus_xfer,
- .master_xfer = i2c_powermac_master_xfer,
- .functionality = i2c_powermac_func,
+ .smbus_xfer = i2c_powermac_smbus_xfer,
+ .xfer = i2c_powermac_xfer,
+ .functionality = i2c_powermac_func,
};
static const struct i2c_adapter_quirks i2c_powermac_quirks = {
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c
index 08b3229c443df794df59a172f8a3afdc7997338b..6b3c6a73336823cf5006b9c7789d74d630c005a0 100644
--- a/drivers/i2c/busses/i2c-pxa-pci.c
+++ b/drivers/i2c/busses/i2c-pxa-pci.c
@@ -4,7 +4,7 @@
* Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
*
* The CE4100's I2C device is more or less the same one as found on PXA.
- * It does not support slave mode, the register slightly moved. This PCI
+ * It does not support target mode, the register slightly moved. This PCI
* device provides three bars, every contains a single I2C controller.
*/
#include <linux/init.h>
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index f495560bd99c12f0a9eb41c5bb0aa813bf99e7bb..031175113dd41240aa455d0d1e24453b240cfd00 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -1593,6 +1593,7 @@ static void __exit i2c_adap_pxa_exit(void)
platform_driver_unregister(&i2c_pxa_driver);
}
+MODULE_DESCRIPTION("Intel PXA2XX I2C adapter");
MODULE_LICENSE("GPL");
subsys_initcall(i2c_adap_pxa_init);
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index c9b43a3c4bd3c04badea2288806abb912e967cdb..4a2c745751a234718903282fd5202a4309b0f95b 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -1985,5 +1985,6 @@ static struct platform_driver qup_i2c_driver = {
module_platform_driver(qup_i2c_driver);
+MODULE_DESCRIPTION("Qualcomm QUP based I2C controller");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:i2c_qup");
diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 185a5d60f10192006ffd526a752335145471a7a1..da4b07c0ed4c078213d6e062d5144667d0690f6d 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -191,8 +191,7 @@ static int rcar_i2c_get_scl(struct i2c_adapter *adap)
struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
return !!(rcar_i2c_read(priv, ICMCR) & FSCL);
-
-};
+}
static void rcar_i2c_set_scl(struct i2c_adapter *adap, int val)
{
@@ -204,7 +203,7 @@ static void rcar_i2c_set_scl(struct i2c_adapter *adap, int val)
priv->recovery_icmcr &= ~FSCL;
rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
-};
+}
static void rcar_i2c_set_sda(struct i2c_adapter *adap, int val)
{
@@ -216,15 +215,14 @@ static void rcar_i2c_set_sda(struct i2c_adapter *adap, int val)
priv->recovery_icmcr &= ~FSDA;
rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);
-};
+}
static int rcar_i2c_get_bus_free(struct i2c_adapter *adap)
{
struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
return !(rcar_i2c_read(priv, ICMCR) & FSDA);
-
-};
+}
static struct i2c_bus_recovery_info rcar_i2c_bri = {
.get_scl = rcar_i2c_get_scl,
@@ -233,6 +231,7 @@ static struct i2c_bus_recovery_info rcar_i2c_bri = {
.get_bus_free = rcar_i2c_get_bus_free,
.recover_bus = i2c_generic_scl_recovery,
};
+
static void rcar_i2c_init(struct rcar_i2c_priv *priv)
{
/* reset master mode */
@@ -553,7 +552,7 @@ static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
u32 irqs_to_clear = MDE;
/* FIXME: sometimes, unknown interrupt happened. Do nothing */
- if (!(msr & MDE))
+ if (WARN(!(msr & MDE), "spurious irq"))
return;
if (msr & MAT)
diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
index f608b1838cade702bf4efb27df61d516089a6cfe..d6f585cdb7e5d62261f94a6223ceb7a345df9580 100644
--- a/drivers/i2c/busses/i2c-riic.c
+++ b/drivers/i2c/busses/i2c-riic.c
@@ -12,9 +12,9 @@
*
* 1) The main xfer routine kicks off a transmission by putting the start bit
* (or repeated start) on the bus and enabling the transmit interrupt (TIE)
- * since we need to send the slave address + RW bit in every case.
+ * since we need to send the target address + RW bit in every case.
*
- * 2) TIE sends slave address + RW bit and selects how to continue.
+ * 2) TIE sends target address + RW bit and selects how to continue.
*
* 3a) Write case: We keep utilizing TIE as long as we have data to send. If we
* are done, we switch over to the transmission done interrupt (TEIE) and mark
@@ -294,8 +294,8 @@ static u32 riic_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm riic_algo = {
- .master_xfer = riic_xfer,
- .functionality = riic_func,
+ .xfer = riic_xfer,
+ .functionality = riic_func,
};
static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t)
diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
index beca61700c89c96bdfb9e444357e9d5fa5016850..4ef9bad77b856fc0c58aafba9c753f14cab0302b 100644
--- a/drivers/i2c/busses/i2c-rk3x.c
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -28,8 +28,8 @@
/* Register Map */
#define REG_CON 0x00 /* control register */
#define REG_CLKDIV 0x04 /* clock divisor register */
-#define REG_MRXADDR 0x08 /* slave address for REGISTER_TX */
-#define REG_MRXRADDR 0x0c /* slave register address for REGISTER_TX */
+#define REG_MRXADDR 0x08 /* target address for REGISTER_TX */
+#define REG_MRXRADDR 0x0c /* target register address for REGISTER_TX */
#define REG_MTXCNT 0x10 /* number of bytes to be transmitted */
#define REG_MRXCNT 0x14 /* number of bytes to be received */
#define REG_IEN 0x18 /* interrupt enable */
@@ -68,8 +68,8 @@ enum {
/* REG_IEN/REG_IPD bits */
#define REG_INT_BTF BIT(0) /* a byte was transmitted */
#define REG_INT_BRF BIT(1) /* a byte was received */
-#define REG_INT_MBTF BIT(2) /* master data transmit finished */
-#define REG_INT_MBRF BIT(3) /* master data receive finished */
+#define REG_INT_MBTF BIT(2) /* controller data transmit finished */
+#define REG_INT_MBRF BIT(3) /* controller data receive finished */
#define REG_INT_START BIT(4) /* START condition generated */
#define REG_INT_STOP BIT(5) /* STOP condition generated */
#define REG_INT_NAKRCV BIT(6) /* NACK received */
@@ -184,7 +184,7 @@ struct rk3x_i2c_soc_data {
* @wait: the waitqueue to wait for i2c transfer
* @busy: the condition for the event to wait for
* @msg: current i2c message
- * @addr: addr of i2c slave device
+ * @addr: addr of i2c target device
* @mode: mode of i2c transfer
* @is_last_msg: flag determines whether it is the last msg in this transfer
* @state: state of i2c transfer
@@ -979,7 +979,7 @@ static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num)
/*
* The I2C adapter can issue a small (len < 4) write packet before
* reading. This speeds up SMBus-style register reads.
- * The MRXADDR/MRXRADDR hold the slave address and the slave register
+ * The MRXADDR/MRXRADDR hold the target address and the target register
* address in this case.
*/
@@ -1016,7 +1016,7 @@ static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num)
addr |= 1; /* set read bit */
/*
- * We have to transmit the slave addr first. Use
+ * We have to transmit the target addr first. Use
* MOD_REGISTER_TX for that purpose.
*/
i2c->mode = REG_CON_MOD_REGISTER_TX;
@@ -1160,9 +1160,9 @@ static u32 rk3x_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm rk3x_i2c_algorithm = {
- .master_xfer = rk3x_i2c_xfer,
- .master_xfer_atomic = rk3x_i2c_xfer_polling,
- .functionality = rk3x_i2c_func,
+ .xfer = rk3x_i2c_xfer,
+ .xfer_atomic = rk3x_i2c_xfer_polling,
+ .functionality = rk3x_i2c_func,
};
static const struct rk3x_i2c_soc_data rv1108_soc_data = {
diff --git a/drivers/i2c/busses/i2c-robotfuzz-osif.c b/drivers/i2c/busses/i2c-robotfuzz-osif.c
index 66dfa211e736b1a8a7d0e9392f8dfad95eeac569..80d45079b763c0104426a26a1b702c5132f6db29 100644
--- a/drivers/i2c/busses/i2c-robotfuzz-osif.c
+++ b/drivers/i2c/busses/i2c-robotfuzz-osif.c
@@ -112,8 +112,8 @@ static u32 osif_func(struct i2c_adapter *adapter)
}
static const struct i2c_algorithm osif_algorithm = {
- .master_xfer = osif_xfer,
- .functionality = osif_func,
+ .xfer = osif_xfer,
+ .functionality = osif_func,
};
#define USB_OSIF_VENDOR_ID 0x1964
diff --git a/drivers/i2c/busses/i2c-rzv2m.c b/drivers/i2c/busses/i2c-rzv2m.c
index b0bfc96b9ede7f6fd292b60fc1e747a1475e4835..8380a68538abc08a397835712e0a6e30cf21bbd1 100644
--- a/drivers/i2c/busses/i2c-rzv2m.c
+++ b/drivers/i2c/busses/i2c-rzv2m.c
@@ -321,8 +321,8 @@ static int rzv2m_i2c_stop_condition(struct rzv2m_i2c_priv *priv)
100, jiffies_to_usecs(priv->adap.timeout));
}
-static int rzv2m_i2c_master_xfer_msg(struct rzv2m_i2c_priv *priv,
- struct i2c_msg *msg, int stop)
+static int rzv2m_i2c_xfer_msg(struct rzv2m_i2c_priv *priv,
+ struct i2c_msg *msg, int stop)
{
unsigned int count = 0;
int ret, read = !!(msg->flags & I2C_M_RD);
@@ -351,8 +351,8 @@ static int rzv2m_i2c_master_xfer_msg(struct rzv2m_i2c_priv *priv,
return ret;
}
-static int rzv2m_i2c_master_xfer(struct i2c_adapter *adap,
- struct i2c_msg *msgs, int num)
+static int rzv2m_i2c_xfer(struct i2c_adapter *adap,
+ struct i2c_msg *msgs, int num)
{
struct rzv2m_i2c_priv *priv = i2c_get_adapdata(adap);
struct device *dev = priv->adap.dev.parent;
@@ -370,7 +370,7 @@ static int rzv2m_i2c_master_xfer(struct i2c_adapter *adap,
/* I2C main transfer */
for (i = 0; i < num; i++) {
- ret = rzv2m_i2c_master_xfer_msg(priv, &msgs[i], i == (num - 1));
+ ret = rzv2m_i2c_xfer_msg(priv, &msgs[i], i == (num - 1));
if (ret < 0)
goto out;
}
@@ -408,7 +408,7 @@ static const struct i2c_adapter_quirks rzv2m_i2c_quirks = {
};
static struct i2c_algorithm rzv2m_i2c_algo = {
- .master_xfer = rzv2m_i2c_master_xfer,
+ .xfer = rzv2m_i2c_xfer,
.functionality = rzv2m_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index 32476dc10ad61f0e13c8f316e41455de5020f968..ca06fffb8f61ff1ec9ea7d4e819cb95a6de577bd 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -257,7 +257,7 @@ static int sis5595_transaction(struct i2c_adapter *adap)
if (temp & 0x20) {
dev_err(&adap->dev, "Bus collision! SMBus may be locked until "
"next hard reset (or not...)\n");
- /* Clock stops and slave is stuck in mid-transmission */
+ /* Clock stops and target is stuck in mid-transmission */
result = -EIO;
}
diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c
index 28c88901d9bcd1db6e856983c8a81194e3eb163e..9c45e75b918733fb84db446553ea6a892cbcb0b3 100644
--- a/drivers/i2c/busses/i2c-sprd.c
+++ b/drivers/i2c/busses/i2c-sprd.c
@@ -283,8 +283,8 @@ static int sprd_i2c_handle_msg(struct i2c_adapter *i2c_adap,
return i2c_dev->err;
}
-static int sprd_i2c_master_xfer(struct i2c_adapter *i2c_adap,
- struct i2c_msg *msgs, int num)
+static int sprd_i2c_xfer(struct i2c_adapter *i2c_adap,
+ struct i2c_msg *msgs, int num)
{
struct sprd_i2c *i2c_dev = i2c_adap->algo_data;
int im, ret;
@@ -314,7 +314,7 @@ static u32 sprd_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm sprd_i2c_algo = {
- .master_xfer = sprd_i2c_master_xfer,
+ .xfer = sprd_i2c_xfer,
.functionality = sprd_i2c_func,
};
@@ -378,12 +378,12 @@ static irqreturn_t sprd_i2c_isr_thread(int irq, void *dev_id)
i2c_tran = i2c_dev->count;
/*
- * If we got one ACK from slave when writing data, and we did not
+ * If we got one ACK from target when writing data, and we did not
* finish this transmission (i2c_tran is not zero), then we should
* continue to write data.
*
* For reading data, ack is always true, if i2c_tran is not 0 which
- * means we still need to contine to read data from slave.
+ * means we still need to contine to read data from target.
*/
if (i2c_tran && ack) {
sprd_i2c_data_transfer(i2c_dev);
@@ -393,7 +393,7 @@ static irqreturn_t sprd_i2c_isr_thread(int irq, void *dev_id)
i2c_dev->err = 0;
/*
- * If we did not get one ACK from slave when writing data, we should
+ * If we did not get one ACK from target when writing data, we should
* return -EIO to notify users.
*/
if (!ack)
@@ -422,7 +422,7 @@ static irqreturn_t sprd_i2c_isr(int irq, void *dev_id)
i2c_tran = i2c_dev->count;
/*
- * If we did not get one ACK from slave when writing data, then we
+ * If we did not get one ACK from target when writing data, then we
* should finish this transmission since we got some errors.
*
* When writing data, if i2c_tran == 0 which means we have writen
@@ -653,5 +653,5 @@ static struct platform_driver sprd_i2c_driver = {
module_platform_driver(sprd_i2c_driver);
-MODULE_DESCRIPTION("Spreadtrum I2C master controller driver");
+MODULE_DESCRIPTION("Spreadtrum I2C controller driver");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-st.c b/drivers/i2c/busses/i2c-st.c
index 5e01fe3dbb63f1dd1fa12ed3a7ec683d767fde02..05b19ede65a0fee77d61ff3076e394860c0be4c8 100644
--- a/drivers/i2c/busses/i2c-st.c
+++ b/drivers/i2c/busses/i2c-st.c
@@ -2,7 +2,7 @@
/*
* Copyright (C) 2013 STMicroelectronics
*
- * I2C master mode controller driver, used in STMicroelectronics devices.
+ * I2C controller driver, used in STMicroelectronics devices.
*
* Author: Maxime Coquelin <maxime.coquelin@st.com>
*/
@@ -150,7 +150,7 @@ struct st_i2c_timings {
/**
* struct st_i2c_client - client specific data
- * @addr: 8-bit slave addr, including r/w bit
+ * @addr: 8-bit target addr, including r/w bit
* @count: number of bytes to be transfered
* @xfered: number of bytes already transferred
* @buf: data buffer
@@ -667,7 +667,7 @@ static int st_i2c_xfer_msg(struct st_i2c_dev *i2c_dev, struct i2c_msg *msg,
i2c |= SSC_I2C_ACKG;
st_i2c_set_bits(i2c_dev->base + SSC_I2C, i2c);
- /* Write slave address */
+ /* Write target address */
st_i2c_write_tx_fifo(i2c_dev, c->addr);
/* Pre-fill Tx fifo with data in case of write */
@@ -766,7 +766,7 @@ static u32 st_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm st_i2c_algo = {
- .master_xfer = st_i2c_xfer,
+ .xfer = st_i2c_xfer,
.functionality = st_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c
index f8b12be6ef55b02fa0b8dad3292e53c79da1e0a2..230fff0c0bf93e4307d5a09d6055e60c0153fcb6 100644
--- a/drivers/i2c/busses/i2c-stm32f4.c
+++ b/drivers/i2c/busses/i2c-stm32f4.c
@@ -95,7 +95,7 @@
/**
* struct stm32f4_i2c_msg - client specific data
- * @addr: 8-bit slave addr, including r/w bit
+ * @addr: 8-bit target addr, including r/w bit
* @count: number of bytes to be transferred
* @buf: data buffer
* @result: result of the transfer
@@ -480,7 +480,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)
/**
* stm32f4_i2c_handle_rx_addr() - Handle address matched interrupt in case of
- * master receiver
+ * controller receiver
* @i2c_dev: Controller's private data
*/
static void stm32f4_i2c_handle_rx_addr(struct stm32f4_i2c_dev *i2c_dev)
@@ -643,7 +643,7 @@ static irqreturn_t stm32f4_i2c_isr_error(int irq, void *data)
/*
* Acknowledge failure:
- * In master transmitter mode a Stop must be generated by software
+ * In controller transmitter mode a Stop must be generated by software
*/
if (status & STM32F4_I2C_SR1_AF) {
if (!(msg->addr & I2C_M_RD)) {
@@ -749,7 +749,7 @@ static u32 stm32f4_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm stm32f4_i2c_algo = {
- .master_xfer = stm32f4_i2c_xfer,
+ .xfer = stm32f4_i2c_xfer,
.functionality = stm32f4_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-sun6i-p2wi.c b/drivers/i2c/busses/i2c-sun6i-p2wi.c
index 85e035e7a1d75e06cd96398fab8b1c684d369ff8..074eade6c4a4fcb040cff6fccf9db1a8a6960dad 100644
--- a/drivers/i2c/busses/i2c-sun6i-p2wi.c
+++ b/drivers/i2c/busses/i2c-sun6i-p2wi.c
@@ -10,7 +10,7 @@
* The P2WI controller looks like an SMBus controller which only supports byte
* data transfers. But, it differs from standard SMBus protocol on several
* aspects:
- * - it supports only one slave device, and thus drop the address field
+ * - it supports only one target device, and thus drop the address field
* - it adds a parity bit every 8bits of data
* - only one read access is required to read a byte (instead of a write
* followed by a read access in standard SMBus protocol)
@@ -88,7 +88,7 @@ struct p2wi {
void __iomem *regs;
struct clk *clk;
struct reset_control *rstc;
- int slave_addr;
+ int target_addr;
};
static irqreturn_t p2wi_interrupt(int irq, void *dev_id)
@@ -121,7 +121,7 @@ static int p2wi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
struct p2wi *p2wi = i2c_get_adapdata(adap);
unsigned long dlen = P2WI_DLEN_DATA_LENGTH(1);
- if (p2wi->slave_addr >= 0 && addr != p2wi->slave_addr) {
+ if (p2wi->target_addr >= 0 && addr != p2wi->target_addr) {
dev_err(&adap->dev, "invalid P2WI address\n");
return -EINVAL;
}
@@ -188,7 +188,7 @@ static int p2wi_probe(struct platform_device *pdev)
unsigned long parent_clk_freq;
u32 clk_freq = I2C_MAX_STANDARD_MODE_FREQ;
struct p2wi *p2wi;
- u32 slave_addr;
+ u32 target_addr;
int clk_div;
int irq;
int ret;
@@ -207,7 +207,7 @@ static int p2wi_probe(struct platform_device *pdev)
}
if (of_get_child_count(np) > 1) {
- dev_err(dev, "P2WI only supports one slave device\n");
+ dev_err(dev, "P2WI only supports one target device\n");
return -EINVAL;
}
@@ -215,24 +215,24 @@ static int p2wi_probe(struct platform_device *pdev)
if (!p2wi)
return -ENOMEM;
- p2wi->slave_addr = -1;
+ p2wi->target_addr = -1;
/*
* Authorize a p2wi node without any children to be able to use an
* i2c-dev from userpace.
- * In this case the slave_addr is set to -1 and won't be checked when
+ * In this case the target_addr is set to -1 and won't be checked when
* launching a P2WI transfer.
*/
childnp = of_get_next_available_child(np, NULL);
if (childnp) {
- ret = of_property_read_u32(childnp, "reg", &slave_addr);
+ ret = of_property_read_u32(childnp, "reg", &target_addr);
if (ret) {
- dev_err(dev, "invalid slave address on node %pOF\n",
+ dev_err(dev, "invalid target address on node %pOF\n",
childnp);
return -EINVAL;
}
- p2wi->slave_addr = slave_addr;
+ p2wi->target_addr = target_addr;
}
p2wi->regs = devm_platform_ioremap_resource(pdev, 0);
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
index b0f0120793e17684018a1c9cd4ae233c0e03b402..cb97f72291bc209eec83efefe13f2500c64ddfe8 100644
--- a/drivers/i2c/busses/i2c-taos-evm.c
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for the TAOS evaluation modules
- * These devices include an I2C master which can be controlled over the
+ * These devices include an I2C controller which can be controlled over the
* serial port.
*
* Copyright (C) 2007 Jean Delvare <jdelvare@suse.de>
diff --git a/drivers/i2c/busses/i2c-tegra-bpmp.c b/drivers/i2c/busses/i2c-tegra-bpmp.c
index b0840fa0f53e09ea37c174059490a53e4f3f9998..dabadbcc6d6a2dc630546b6f7bd01f1a230b696a 100644
--- a/drivers/i2c/busses/i2c-tegra-bpmp.c
+++ b/drivers/i2c/busses/i2c-tegra-bpmp.c
@@ -275,8 +275,8 @@ static u32 tegra_bpmp_i2c_func(struct i2c_adapter *adapter)
}
static const struct i2c_algorithm tegra_bpmp_i2c_algo = {
- .master_xfer = tegra_bpmp_i2c_xfer,
- .master_xfer_atomic = tegra_bpmp_i2c_xfer_atomic,
+ .xfer = tegra_bpmp_i2c_xfer,
+ .xfer_atomic = tegra_bpmp_i2c_xfer_atomic,
.functionality = tegra_bpmp_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-thunderx-pcidrv.c b/drivers/i2c/busses/i2c-thunderx-pcidrv.c
index 32d0e3930b675484138084e1bbed2e7cf898e1e1..143d012fa43ecd854e9a8898c3398ac191acb464 100644
--- a/drivers/i2c/busses/i2c-thunderx-pcidrv.c
+++ b/drivers/i2c/busses/i2c-thunderx-pcidrv.c
@@ -72,7 +72,7 @@ static u32 thunderx_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm thunderx_i2c_algo = {
- .master_xfer = octeon_i2c_xfer,
+ .xfer = octeon_i2c_xfer,
.functionality = thunderx_i2c_functionality,
};
diff --git a/drivers/i2c/busses/i2c-tiny-usb.c b/drivers/i2c/busses/i2c-tiny-usb.c
index 1bffe36c40ad890d68f7a482b1a8dbbed94f3ef4..0f2ed181b2665ce9cc5f22d73007639bb358547d 100644
--- a/drivers/i2c/busses/i2c-tiny-usb.c
+++ b/drivers/i2c/busses/i2c-tiny-usb.c
@@ -54,8 +54,6 @@ static int usb_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
struct i2c_msg *pmsg;
int i, ret;
- dev_dbg(&adapter->dev, "master xfer %d messages:\n", num);
-
pstatus = kmalloc(sizeof(*pstatus), GFP_KERNEL);
if (!pstatus)
return -ENOMEM;
@@ -142,8 +140,8 @@ static u32 usb_func(struct i2c_adapter *adapter)
/* This is the actual algorithm we define */
static const struct i2c_algorithm usb_algorithm = {
- .master_xfer = usb_xfer,
- .functionality = usb_func,
+ .xfer = usb_xfer,
+ .functionality = usb_func,
};
/* ----- end of i2c layer ------------------------------------------------ */
diff --git a/drivers/i2c/busses/i2c-uniphier-f.c b/drivers/i2c/busses/i2c-uniphier-f.c
index 6c3dac2cf568fa44b4353028202ac0c2603fbe79..10a99cd08972f444fe1676c55000457c2ac4ed45 100644
--- a/drivers/i2c/busses/i2c-uniphier-f.c
+++ b/drivers/i2c/busses/i2c-uniphier-f.c
@@ -12,15 +12,15 @@
#include <linux/platform_device.h>
#define UNIPHIER_FI2C_CR 0x00 /* control register */
-#define UNIPHIER_FI2C_CR_MST BIT(3) /* master mode */
+#define UNIPHIER_FI2C_CR_MST BIT(3) /* controller mode */
#define UNIPHIER_FI2C_CR_STA BIT(2) /* start condition */
#define UNIPHIER_FI2C_CR_STO BIT(1) /* stop condition */
#define UNIPHIER_FI2C_CR_NACK BIT(0) /* do not return ACK */
#define UNIPHIER_FI2C_DTTX 0x04 /* TX FIFO */
-#define UNIPHIER_FI2C_DTTX_CMD BIT(8) /* send command (slave addr) */
+#define UNIPHIER_FI2C_DTTX_CMD BIT(8) /* send command (target addr) */
#define UNIPHIER_FI2C_DTTX_RD BIT(0) /* read transaction */
#define UNIPHIER_FI2C_DTRX 0x04 /* RX FIFO */
-#define UNIPHIER_FI2C_SLAD 0x0c /* slave address */
+#define UNIPHIER_FI2C_SLAD 0x0c /* target address */
#define UNIPHIER_FI2C_CYC 0x10 /* clock cycle control */
#define UNIPHIER_FI2C_LCTL 0x14 /* clock low period control */
#define UNIPHIER_FI2C_SSUT 0x18 /* restart/stop setup time control */
@@ -96,7 +96,7 @@ static void uniphier_fi2c_fill_txfifo(struct uniphier_fi2c_priv *priv,
int fifo_space = UNIPHIER_FI2C_FIFO_SIZE;
/*
- * TX-FIFO stores slave address in it for the first access.
+ * TX-FIFO stores target address in it for the first access.
* Decrement the counter.
*/
if (first)
@@ -252,7 +252,7 @@ static void uniphier_fi2c_tx_init(struct uniphier_fi2c_priv *priv, u16 addr,
/* do not use TX byte counter */
writel(0, priv->membase + UNIPHIER_FI2C_TBC);
- /* set slave address */
+ /* set target address */
writel(UNIPHIER_FI2C_DTTX_CMD | addr << 1,
priv->membase + UNIPHIER_FI2C_DTTX);
/*
@@ -288,7 +288,7 @@ static void uniphier_fi2c_rx_init(struct uniphier_fi2c_priv *priv, u16 addr)
uniphier_fi2c_set_irqs(priv);
- /* set slave address with RD bit */
+ /* set target address with RD bit */
writel(UNIPHIER_FI2C_DTTX_CMD | UNIPHIER_FI2C_DTTX_RD | addr << 1,
priv->membase + UNIPHIER_FI2C_DTTX);
}
@@ -310,9 +310,8 @@ static void uniphier_fi2c_recover(struct uniphier_fi2c_priv *priv)
i2c_recover_bus(&priv->adap);
}
-static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap,
- struct i2c_msg *msg, bool repeat,
- bool stop)
+static int uniphier_fi2c_xfer_one(struct i2c_adapter *adap, struct i2c_msg *msg,
+ bool repeat, bool stop)
{
struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap);
bool is_read = msg->flags & I2C_M_RD;
@@ -340,7 +339,7 @@ static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap,
uniphier_fi2c_tx_init(priv, msg->addr, repeat);
/*
- * For a repeated START condition, writing a slave address to the FIFO
+ * For a repeated START condition, writing a target address to the FIFO
* kicks the controller. So, the UNIPHIER_FI2C_CR register should be
* written only for a non-repeated START condition.
*/
@@ -403,8 +402,7 @@ static int uniphier_fi2c_check_bus_busy(struct i2c_adapter *adap)
return 0;
}
-static int uniphier_fi2c_master_xfer(struct i2c_adapter *adap,
- struct i2c_msg *msgs, int num)
+static int uniphier_fi2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
struct i2c_msg *msg, *emsg = msgs + num;
bool repeat = false;
@@ -418,7 +416,7 @@ static int uniphier_fi2c_master_xfer(struct i2c_adapter *adap,
/* Emit STOP if it is the last message or I2C_M_STOP is set. */
bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP);
- ret = uniphier_fi2c_master_xfer_one(adap, msg, repeat, stop);
+ ret = uniphier_fi2c_xfer_one(adap, msg, repeat, stop);
if (ret)
return ret;
@@ -434,7 +432,7 @@ static u32 uniphier_fi2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm uniphier_fi2c_algo = {
- .master_xfer = uniphier_fi2c_master_xfer,
+ .xfer = uniphier_fi2c_xfer,
.functionality = uniphier_fi2c_functionality,
};
diff --git a/drivers/i2c/busses/i2c-uniphier.c b/drivers/i2c/busses/i2c-uniphier.c
index e1b4c80e028545fedf296b56c3361a9cc7a6e7b8..ef575330746919864a7b28187e9190954704ee3a 100644
--- a/drivers/i2c/busses/i2c-uniphier.c
+++ b/drivers/i2c/busses/i2c-uniphier.c
@@ -17,13 +17,13 @@
#define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */
#define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */
#define UNIPHIER_I2C_DREC 0x04 /* RX register */
-#define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = master, 0 = slave */
+#define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = controller, 0 = target */
#define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */
#define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */
#define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */
#define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */
#define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */
-#define UNIPHIER_I2C_MYAD 0x08 /* slave address */
+#define UNIPHIER_I2C_MYAD 0x08 /* local target address */
#define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */
#define UNIPHIER_I2C_BRST 0x10 /* bus reset */
#define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */
@@ -152,8 +152,8 @@ static int uniphier_i2c_stop(struct i2c_adapter *adap)
UNIPHIER_I2C_DTRM_NACK);
}
-static int uniphier_i2c_master_xfer_one(struct i2c_adapter *adap,
- struct i2c_msg *msg, bool stop)
+static int uniphier_i2c_xfer_one(struct i2c_adapter *adap,
+ struct i2c_msg *msg, bool stop)
{
bool is_read = msg->flags & I2C_M_RD;
bool recovery = false;
@@ -211,8 +211,7 @@ static int uniphier_i2c_check_bus_busy(struct i2c_adapter *adap)
return 0;
}
-static int uniphier_i2c_master_xfer(struct i2c_adapter *adap,
- struct i2c_msg *msgs, int num)
+static int uniphier_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
struct i2c_msg *msg, *emsg = msgs + num;
int ret;
@@ -225,7 +224,7 @@ static int uniphier_i2c_master_xfer(struct i2c_adapter *adap,
/* Emit STOP if it is the last message or I2C_M_STOP is set. */
bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP);
- ret = uniphier_i2c_master_xfer_one(adap, msg, stop);
+ ret = uniphier_i2c_xfer_one(adap, msg, stop);
if (ret)
return ret;
}
@@ -239,7 +238,7 @@ static u32 uniphier_i2c_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm uniphier_i2c_algo = {
- .master_xfer = uniphier_i2c_master_xfer,
+ .xfer = uniphier_i2c_xfer,
.functionality = uniphier_i2c_functionality,
};
diff --git a/drivers/i2c/busses/i2c-viai2c-common.c b/drivers/i2c/busses/i2c-viai2c-common.c
index 162b31306cba8db2a4cb45cf1ba8b186c723f62e..5a53ed95a59b6739a230725f0d835e257f98f523 100644
--- a/drivers/i2c/busses/i2c-viai2c-common.c
+++ b/drivers/i2c/busses/i2c-viai2c-common.c
@@ -198,6 +198,6 @@ int viai2c_init(struct platform_device *pdev, struct viai2c **pi2c, int plat)
}
EXPORT_SYMBOL_GPL(viai2c_init);
-MODULE_DESCRIPTION("Via/Wondermedia/Zhaoxin I2C master-mode bus adapter");
+MODULE_DESCRIPTION("Via/Wondermedia/Zhaoxin I2C controller core");
MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-viai2c-wmt.c b/drivers/i2c/busses/i2c-viai2c-wmt.c
index 420fd10fe3aa5512c8fc5cedf2bd96a8f9f01360..3415683dab91c57fba68bd110b9c54c0f0dfdfab 100644
--- a/drivers/i2c/busses/i2c-viai2c-wmt.c
+++ b/drivers/i2c/busses/i2c-viai2c-wmt.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * Wondermedia I2C Master Mode Driver
+ * Wondermedia I2C Controller Driver
*
* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
*
@@ -35,8 +35,8 @@ static u32 wmt_i2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm wmt_i2c_algo = {
- .master_xfer = viai2c_xfer,
- .functionality = wmt_i2c_func,
+ .xfer = viai2c_xfer,
+ .functionality = wmt_i2c_func,
};
static int wmt_i2c_reset_hardware(struct viai2c *i2c)
@@ -178,7 +178,7 @@ static struct platform_driver wmt_i2c_driver = {
module_platform_driver(wmt_i2c_driver);
-MODULE_DESCRIPTION("Wondermedia I2C master-mode bus adapter");
+MODULE_DESCRIPTION("Wondermedia I2C controller driver");
MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(of, wmt_i2c_dt_ids);
diff --git a/drivers/i2c/busses/i2c-viai2c-zhaoxin.c b/drivers/i2c/busses/i2c-viai2c-zhaoxin.c
index ab3e44e147e91a4190e4cc2c04f127525a2fd433..95dc64902b7cdb01beea04acf7bad8f20133d965 100644
--- a/drivers/i2c/busses/i2c-viai2c-zhaoxin.c
+++ b/drivers/i2c/busses/i2c-viai2c-zhaoxin.c
@@ -38,7 +38,7 @@
#define ZXI2C_GOLD_FSTP_400K 0x38
#define ZXI2C_GOLD_FSTP_1M 0x13
#define ZXI2C_GOLD_FSTP_3400K 0x37
-#define ZXI2C_HS_MASTER_CODE (0x08 << 8)
+#define ZXI2C_HS_CTRL_CODE (0x08 << 8)
#define ZXI2C_FIFO_SIZE 32
@@ -136,7 +136,7 @@ static int viai2c_fifo_irq_xfer(struct viai2c *i2c)
return 0;
}
-static int zxi2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+static int zxi2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
u8 tmp;
int ret;
@@ -194,8 +194,8 @@ static u32 zxi2c_func(struct i2c_adapter *adap)
}
static const struct i2c_algorithm zxi2c_algorithm = {
- .master_xfer = zxi2c_master_xfer,
- .functionality = zxi2c_func,
+ .xfer = zxi2c_xfer,
+ .functionality = zxi2c_func,
};
static const struct i2c_adapter_quirks zxi2c_quirks = {
@@ -250,9 +250,9 @@ static void zxi2c_get_bus_speed(struct viai2c *i2c)
i2c->tcr = params[1];
priv->mcr = ioread16(i2c->base + VIAI2C_REG_MCR);
- /* for Hs-mode, use 0x80 as master code */
+ /* for Hs-mode, use 0x80 as controller code */
if (params[0] == I2C_MAX_HIGH_SPEED_MODE_FREQ)
- priv->mcr |= ZXI2C_HS_MASTER_CODE;
+ priv->mcr |= ZXI2C_HS_CTRL_CODE;
dev_info(i2c->dev, "speed mode is %s\n", i2c_freq_mode_string(params[0]));
}
diff --git a/drivers/i2c/busses/i2c-viperboard.c b/drivers/i2c/busses/i2c-viperboard.c
index 3784b07f537164a4b6134f81c73835e61d548291..2ed4130c033958df3eac989fa9197494e6a2c41f 100644
--- a/drivers/i2c/busses/i2c-viperboard.c
+++ b/drivers/i2c/busses/i2c-viperboard.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * Nano River Technologies viperboard i2c master driver
+ * Nano River Technologies viperboard i2c controller driver
*
* (C) 2012 by Lemonage GmbH
* Author: Lars Poeschel <poeschel@lemonage.de>
@@ -273,8 +273,6 @@ static int vprbrd_i2c_xfer(struct i2c_adapter *i2c, struct i2c_msg *msgs,
(struct vprbrd_i2c_addr_msg *)vb->buf;
struct vprbrd_i2c_status *smsg = (struct vprbrd_i2c_status *)vb->buf;
- dev_dbg(&i2c->dev, "master xfer %d messages:\n", num);
-
for (i = 0 ; i < num ; i++) {
pmsg = &msgs[i];
@@ -345,8 +343,8 @@ static u32 vprbrd_i2c_func(struct i2c_adapter *i2c)
/* This is the actual algorithm we define */
static const struct i2c_algorithm vprbrd_algorithm = {
- .master_xfer = vprbrd_i2c_xfer,
- .functionality = vprbrd_i2c_func,
+ .xfer = vprbrd_i2c_xfer,
+ .functionality = vprbrd_i2c_func,
};
static const struct i2c_adapter_quirks vprbrd_quirks = {
@@ -460,6 +458,6 @@ static void __exit vprbrd_i2c_exit(void)
module_exit(vprbrd_i2c_exit);
MODULE_AUTHOR("Lars Poeschel <poeschel@lemonage.de>");
-MODULE_DESCRIPTION("I2C master driver for Nano River Techs Viperboard");
+MODULE_DESCRIPTION("I2C controller driver for Nano River Techs Viperboard");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:viperboard-i2c");
diff --git a/drivers/i2c/busses/i2c-virtio.c b/drivers/i2c/busses/i2c-virtio.c
index c60ae531ba57c7f0a5f830267e0d0bbb044da2b7..52ba1e0845ca78480592b58b1d8ab2744ee9a9ab 100644
--- a/drivers/i2c/busses/i2c-virtio.c
+++ b/drivers/i2c/busses/i2c-virtio.c
@@ -183,7 +183,7 @@ static u32 virtio_i2c_func(struct i2c_adapter *adap)
}
static struct i2c_algorithm virtio_algorithm = {
- .master_xfer = virtio_i2c_xfer,
+ .xfer = virtio_i2c_xfer,
.functionality = virtio_i2c_func,
};
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 71391b590adaeba9d69044dd5b66afcfa8c32aea..19468565120e1cde6bc2a508f840d95f178de3ad 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -1105,8 +1105,11 @@ static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num)
mutex_lock(&i2c->lock);
ret = xiic_busy(i2c);
- if (ret)
+ if (ret) {
+ dev_err(i2c->adap.dev.parent,
+ "cannot start a transfer while busy\n");
goto out;
+ }
i2c->tx_msg = msgs;
i2c->rx_msg = NULL;
@@ -1164,10 +1167,8 @@ static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
return err;
err = xiic_start_xfer(i2c, msgs, num);
- if (err < 0) {
- dev_err(adap->dev.parent, "Error xiic_start_xfer\n");
+ if (err < 0)
goto out;
- }
err = wait_for_completion_timeout(&i2c->completion, XIIC_XFER_TIMEOUT);
mutex_lock(&i2c->lock);
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 7e7b15440832b316c0bb522638553712afb6e634..f76b7f4fafc191b8ef6c8242dff32f2678e434c4 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -1066,8 +1066,8 @@ EXPORT_SYMBOL(i2c_find_device_by_fwnode);
static const struct i2c_device_id dummy_id[] = {
- { "dummy", 0 },
- { "smbus_host_notify", 0 },
+ { "dummy", },
+ { "smbus_host_notify", },
{ },
};
@@ -1469,6 +1469,8 @@ int i2c_handle_smbus_host_notify(struct i2c_adapter *adap, unsigned short addr)
if (!adap)
return -EINVAL;
+ dev_dbg(&adap->dev, "Detected HostNotify from address 0x%02x", addr);
+
irq = irq_find_mapping(adap->host_notify_domain, addr);
if (irq <= 0)
return -ENXIO;
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 8b7e599f167411be1cc8bc63e2e4c8f5b45059bc..f4fb212b7f3920503f2d9454ea584dd0f9a3ed17 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -139,6 +139,10 @@ static ssize_t i2cdev_read(struct file *file, char __user *buf, size_t count,
struct i2c_client *client = file->private_data;
+ /* Adapter must support I2C transfers */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+ return -EOPNOTSUPP;
+
if (count > 8192)
count = 8192;
@@ -163,6 +167,10 @@ static ssize_t i2cdev_write(struct file *file, const char __user *buf,
char *tmp;
struct i2c_client *client = file->private_data;
+ /* Adapter must support I2C transfers */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+ return -EOPNOTSUPP;
+
if (count > 8192)
count = 8192;
@@ -238,6 +246,10 @@ static noinline int i2cdev_ioctl_rdwr(struct i2c_client *client,
u8 __user **data_ptrs;
int i, res;
+ /* Adapter must support I2C transfers */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+ return -EOPNOTSUPP;
+
data_ptrs = kmalloc_array(nmsgs, sizeof(u8 __user *), GFP_KERNEL);
if (data_ptrs == NULL) {
kfree(msgs);
diff --git a/drivers/i2c/i2c-slave-testunit.c b/drivers/i2c/i2c-slave-testunit.c
index 23a11e4e925672bc99c65911e64a070c8bae9378..4e03b75f9ad7724d2306ee4a85f5acc6e3f9769f 100644
--- a/drivers/i2c/i2c-slave-testunit.c
+++ b/drivers/i2c/i2c-slave-testunit.c
@@ -172,7 +172,7 @@ static void i2c_slave_testunit_remove(struct i2c_client *client)
}
static const struct i2c_device_id i2c_slave_testunit_id[] = {
- { "slave-testunit", 0 },
+ { "slave-testunit" },
{ }
};
MODULE_DEVICE_TABLE(i2c, i2c_slave_testunit_id);
diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c
index f809f0ef200444eed0735615b5806047a59c9679..1cb137b9181d676fc41bbe9c56c8ea01b35e7952 100644
--- a/drivers/i2c/i2c-smbus.c
+++ b/drivers/i2c/i2c-smbus.c
@@ -160,7 +160,7 @@ static void smbalert_remove(struct i2c_client *ara)
}
static const struct i2c_device_id smbalert_ids[] = {
- { "smbus_alert", 0 },
+ { "smbus_alert" },
{ /* LIST END */ }
};
MODULE_DEVICE_TABLE(i2c, smbalert_ids);
diff --git a/drivers/i2c/muxes/i2c-mux-pca9541.c b/drivers/i2c/muxes/i2c-mux-pca9541.c
index e28694d991fb07ab1148de950da80189fd6f133a..8663c8a7c2693638c65a486a9bfb7f7cd14d9fa5 100644
--- a/drivers/i2c/muxes/i2c-mux-pca9541.c
+++ b/drivers/i2c/muxes/i2c-mux-pca9541.c
@@ -78,7 +78,7 @@ struct pca9541 {
};
static const struct i2c_device_id pca9541_id[] = {
- {"pca9541", 0},
+ { "pca9541" },
{}
};
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 4bd4f32bcdabb8f98d2b764f04bb2ac9f8270d83..ca872e3465ed9b82df7fcbeecc6ddc3a470af6a2 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -174,6 +174,10 @@ AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
AT24_FLAG_MAC | AT24_FLAG_READONLY);
AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
AT24_FLAG_MAC | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8,
+ AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8,
+ AT24_FLAG_READONLY);
/* spd is a 24c02 in memory DIMMs */
AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
@@ -218,6 +222,8 @@ static const struct i2c_device_id at24_ids[] = {
{ "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
{ "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
{ "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
+ { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 },
+ { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 },
{ "spd", (kernel_ulong_t)&at24_data_spd },
{ "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
{ "24c04", (kernel_ulong_t)&at24_data_24c04 },
@@ -270,6 +276,8 @@ static const struct of_device_id __maybe_unused at24_of_match[] = {
{ .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
{ .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
{ .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
+ { .compatible = "microchip,24aa025e48", .data = &at24_data_24aa025e48 },
+ { .compatible = "microchip,24aa025e64", .data = &at24_data_24aa025e64 },
{ /* END OF LIST */ },
};
MODULE_DEVICE_TABLE(of, at24_of_match);
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 424acb98c7c265cc80197d692600c7e4790f9c64..e9cc14b1f9a1078adada872618bc4f90b4a092c1 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -513,10 +513,10 @@ i2c_register_board_info(int busnum, struct i2c_board_info const *info,
/**
* struct i2c_algorithm - represent I2C transfer method
- * @master_xfer: Issue a set of i2c transactions to the given I2C adapter
+ * @xfer: Issue a set of i2c transactions to the given I2C adapter
* defined by the msgs array, with num messages available to transfer via
* the adapter specified by adap.
- * @master_xfer_atomic: same as @master_xfer. Yet, only using atomic context
+ * @xfer_atomic: same as @xfer. Yet, only using atomic context
* so e.g. PMICs can be accessed very late before shutdown. Optional.
* @smbus_xfer: Issue smbus transactions to the given I2C adapter. If this
* is not present, then the bus layer will try and convert the SMBus calls
@@ -525,33 +525,47 @@ i2c_register_board_info(int busnum, struct i2c_board_info const *info,
* so e.g. PMICs can be accessed very late before shutdown. Optional.
* @functionality: Return the flags that this algorithm/adapter pair supports
* from the ``I2C_FUNC_*`` flags.
- * @reg_slave: Register given client to I2C slave mode of this adapter
- * @unreg_slave: Unregister given client from I2C slave mode of this adapter
+ * @reg_target: Register given client to local target mode of this adapter
+ * @unreg_target: Unregister given client from local target mode of this adapter
+ *
+ * @master_xfer: deprecated, use @xfer
+ * @master_xfer_atomic: deprecated, use @xfer_atomic
+ * @reg_slave: deprecated, use @reg_target
+ * @unreg_slave: deprecated, use @unreg_target
+ *
*
* The following structs are for those who like to implement new bus drivers:
* i2c_algorithm is the interface to a class of hardware solutions which can
* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
* to name two of the most common.
*
- * The return codes from the ``master_xfer{_atomic}`` fields should indicate the
+ * The return codes from the ``xfer{_atomic}`` fields should indicate the
* type of error code that occurred during the transfer, as documented in the
* Kernel Documentation file Documentation/i2c/fault-codes.rst. Otherwise, the
* number of messages executed should be returned.
*/
struct i2c_algorithm {
/*
- * If an adapter algorithm can't do I2C-level access, set master_xfer
+ * If an adapter algorithm can't do I2C-level access, set xfer
* to NULL. If an adapter algorithm can do SMBus access, set
* smbus_xfer. If set to NULL, the SMBus protocol is simulated
* using common I2C messages.
*
- * master_xfer should return the number of messages successfully
+ * xfer should return the number of messages successfully
* processed, or a negative value on error
*/
- int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
- int num);
- int (*master_xfer_atomic)(struct i2c_adapter *adap,
+ union {
+ int (*xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num);
+ int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num);
+ };
+ union {
+ int (*xfer_atomic)(struct i2c_adapter *adap,
struct i2c_msg *msgs, int num);
+ int (*master_xfer_atomic)(struct i2c_adapter *adap,
+ struct i2c_msg *msgs, int num);
+ };
int (*smbus_xfer)(struct i2c_adapter *adap, u16 addr,
unsigned short flags, char read_write,
u8 command, int size, union i2c_smbus_data *data);
@@ -563,8 +577,14 @@ struct i2c_algorithm {
u32 (*functionality)(struct i2c_adapter *adap);
#if IS_ENABLED(CONFIG_I2C_SLAVE)
- int (*reg_slave)(struct i2c_client *client);
- int (*unreg_slave)(struct i2c_client *client);
+ union {
+ int (*reg_target)(struct i2c_client *client);
+ int (*reg_slave)(struct i2c_client *client);
+ };
+ union {
+ int (*unreg_target)(struct i2c_client *client);
+ int (*unreg_slave)(struct i2c_client *client);
+ };
#endif
};