diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 5277b9832d58e642bd97e0e23e4be94ae395c477..b55bd3b5f5cd0394d679cbe4ef7592d5d743bc6c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -290,6 +290,8 @@ static void vmw_print_capabilities2(uint32_t capabilities2) DRM_INFO(" Grow oTable.\n"); if (capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY) DRM_INFO(" IntraSurface copy.\n"); + if (capabilities2 & SVGA_CAP2_DX3) + DRM_INFO(" DX3.\n"); } static void vmw_print_capabilities(uint32_t capabilities) @@ -900,6 +902,13 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) if (vmw_read(dev_priv, SVGA_REG_DEV_CAP)) dev_priv->sm_type = VMW_SM_4_1; + + if (has_sm4_1_context(dev_priv) && + (dev_priv->capabilities2 & SVGA_CAP2_DX3)) { + vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_SM5); + if (vmw_read(dev_priv, SVGA_REG_DEV_CAP)) + dev_priv->sm_type = VMW_SM_5; + } } ret = vmw_kms_init(dev_priv); @@ -913,6 +922,8 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) DRM_INFO("Atomic: %s\n", (dev->driver->driver_features & DRIVER_ATOMIC) ? "yes." : "no."); + if (dev_priv->sm_type == VMW_SM_5) + DRM_INFO("SM5 support available.\n"); if (dev_priv->sm_type == VMW_SM_4_1) DRM_INFO("SM4_1 support available.\n"); if (dev_priv->sm_type == VMW_SM_4) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index 24373181388707bf6443c8e0912de56a3562de12..262e57623df46a21f13d7634e57444d466eff658 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h @@ -446,12 +446,14 @@ enum { * @VMW_SM_LEGACY: Pre DX context. * @VMW_SM_4: Context support upto SM4. * @VMW_SM_4_1: Context support upto SM4_1. + * @VMW_SM_5: Context support up to SM5. * @VMW_SM_MAX: Should be the last. */ enum vmw_sm_type { VMW_SM_LEGACY = 0, VMW_SM_4, VMW_SM_4_1, + VMW_SM_5, VMW_SM_MAX }; @@ -684,6 +686,17 @@ static inline bool has_sm4_1_context(const struct vmw_private *dev_priv) return (dev_priv->sm_type >= VMW_SM_4_1); } +/** + * has_sm5_context - Does the device support SM5 context. + * @dev_priv: Device private. + * + * Return: Bool value if device support SM5 context or not. + */ +static inline bool has_sm5_context(const struct vmw_private *dev_priv) +{ + return (dev_priv->sm_type >= VMW_SM_5); +} + extern void vmw_svga_enable(struct vmw_private *dev_priv); extern void vmw_svga_disable(struct vmw_private *dev_priv);