From 10d43c861476978389e370eed177ba8a18f8146c Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Mon, 1 Feb 2021 14:30:00 +0100
Subject: [PATCH] ARM: dts: ebaz4205: add pinctrl entries for switches
Add the pinctrl entries for the GPIOs which are connected to the
push buttons on this board.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210201133000.23402-1-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts b/arch/arm/boot/dts/zynq-ebaz4205.dts
index e802d4ae88049..b0b836aedd765 100644
--- a/arch/arm/boot/dts/zynq-ebaz4205.dts
+++ b/arch/arm/boot/dts/zynq-ebaz4205.dts
@@ -43,7 +43,30 @@ phy: ethernet-phy@0 {
};
};
+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio0_default>;
+};
+
&pinctrl0 {
+ pinctrl_gpio0_default: gpio0-default {
+ mux {
+ groups = "gpio0_20_grp", "gpio0_32_grp";
+ function = "gpio0";
+ };
+
+ conf {
+ groups = "gpio0_20_grp", "gpio0_32_grp";
+ io-standard = <3>;
+ slew-rate = <0>;
+ };
+
+ conf-pull-up {
+ pins = "MIO20", "MIO32";
+ bias-disable;
+ };
+ };
+
pinctrl_sdhci0_default: sdhci0-default {
mux {
groups = "sdio0_2_grp";
--
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