From c00bc38354cf81ce83b678ff13ecf01e75d0e8da Mon Sep 17 00:00:00 2001
From: Gregory CLEMENT <gregory.clement@bootlin.com>
Date: Tue, 11 Sep 2018 22:57:26 +0200
Subject: [PATCH] arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 5 ++++-
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++++++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
index ea13ae78f50d3..c25bc65727b54 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
@@ -21,6 +21,7 @@ cpu0: cpu@0 {
reg = <0x000>;
enable-method = "psci";
#cooling-cells = <2>;
+ clocks = <&cpu_clk 0>;
};
cpu1: cpu@1 {
device_type = "cpu";
@@ -28,6 +29,7 @@ cpu1: cpu@1 {
reg = <0x001>;
enable-method = "psci";
#cooling-cells = <2>;
+ clocks = <&cpu_clk 0>;
};
cpu2: cpu@100 {
device_type = "cpu";
@@ -35,6 +37,7 @@ cpu2: cpu@100 {
reg = <0x100>;
enable-method = "psci";
#cooling-cells = <2>;
+ clocks = <&cpu_clk 1>;
};
cpu3: cpu@101 {
device_type = "cpu";
@@ -42,7 +45,7 @@ cpu3: cpu@101 {
reg = <0x101>;
enable-method = "psci";
#cooling-cells = <2>;
+ clocks = <&cpu_clk 1>;
};
};
-
};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 96228f93b2722..d06dd198f2c78 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -280,6 +280,13 @@ ap_syscon1: system-controller@6f8000 {
#address-cells = <1>;
#size-cells = <1>;
+ cpu_clk: clock-cpu@278 {
+ compatible = "marvell,ap806-cpu-clock";
+ clocks = <&ap_clk 0>, <&ap_clk 1>;
+ #clock-cells = <1>;
+ reg = <0x278 0xa30>;
+ };
+
ap_thermal: thermal-sensor@80 {
compatible = "marvell,armada-ap806-thermal";
reg = <0x80 0x10>;
--
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