From e672c7d79e3c7d3c30383de58b6f1fcb81da4484 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 7 Dec 2021 13:40:22 -0600
Subject: [PATCH] kernel v5.16-rc4 rebase with: device-tree/etc AUFS:
https://github.com/sfjro/aufs5-standalone/commit/03a3ee3199ae847b9e5ac7596900c64fc17cfd5a
BBDTBS:
https://github.com/beagleboard/BeagleBoard-DeviceTrees/commit/493a8c35752815a30a3b0c34c130054a0f546d27
TI_AMX3_CM3:
http://git.ti.com/gitweb/?p=processor-firmware/ti-amx3-cm3-pm-firmware.git;a=commit;h=fb484c5e54f2e31cf0a338d2927a06a2870bcc2c
WPANUSB:
https://github.com/statropy/wpanusb/commit/251f0167545bf2dcaa3cad991a59dbf5ab05490a
BCFSERIAL:
https://github.com/statropy/bcfserial/commit/aded88429a8a00143596b41f4c1f50d9ae3d4069
WIRELESS_REGDB:
https://git.kernel.org/pub/scm/linux/kernel/git/sforshee/wireless-regdb.git/commit/?id=47007d0169c4c6c855a3fc5333c142489a43e89e
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
patch.sh | 10 +-
...1-Overlays-Port-RPi-Overlay-building.patch | 2 +-
...-https-github.com-statropy-bcfserial.patch | 4 +-
patches/defconfig | 2 +-
patches/git/BBDTBS | 2 +-
patches/ref_omap2plus_defconfig | 2 +-
...-BeagleBoard.org-Device-Tree-Changes.patch | 11134 +++++++++++++++-
...eless-regdb-regulatory-database-file.patch | 4 +-
...sb-https-github.com-statropy-wpanusb.patch | 4 +-
version.sh | 4 +-
10 files changed, 10734 insertions(+), 434 deletions(-)
diff --git a/patch.sh b/patch.sh
index acbda5b91..87773041c 100644
--- a/patch.sh
+++ b/patch.sh
@@ -436,12 +436,12 @@ beagleboard_dtbs () {
cp -vr ../${work_dir}/src/arm/* arch/arm/boot/dts/
cp -vr ../${work_dir}/include/dt-bindings/* ./include/dt-bindings/
- #device="am335x-bonegreen-gateway.dtb" ; dtb_makefile_append
+ device="am335x-bonegreen-gateway.dtb" ; dtb_makefile_append
- #device="am335x-boneblack-uboot.dtb" ; dtb_makefile_append
+ device="am335x-boneblack-uboot.dtb" ; dtb_makefile_append
- #device="am335x-bone-uboot-univ.dtb" ; dtb_makefile_append
- #device="am335x-boneblack-uboot-univ.dtb" ; dtb_makefile_append
+ device="am335x-bone-uboot-univ.dtb" ; dtb_makefile_append
+ device="am335x-boneblack-uboot-univ.dtb" ; dtb_makefile_append
${git_bin} add -f arch/arm/boot/dts/
${git_bin} add -f include/dt-bindings/
@@ -587,7 +587,7 @@ fixes
packaging () {
#do_backport="enable"
if [ "x${do_backport}" = "xenable" ] ; then
- backport_tag="v5.15.5"
+ backport_tag="v5.15.6"
subsystem="bindeb-pkg"
#regenerate="enable"
diff --git a/patches/RPi/0001-Overlays-Port-RPi-Overlay-building.patch b/patches/RPi/0001-Overlays-Port-RPi-Overlay-building.patch
index a205fa4b1..9dd714601 100644
--- a/patches/RPi/0001-Overlays-Port-RPi-Overlay-building.patch
+++ b/patches/RPi/0001-Overlays-Port-RPi-Overlay-building.patch
@@ -32,7 +32,7 @@ index 0de64f237cd8..b5028711807f 100644
+targets += dtbs dtbs_install
+targets += $(dtb-y)
+
-+#subdir-y := overlays
++subdir-y := overlays
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
index 190d781e84f4..84c46c081218 100644
--- a/scripts/Makefile.dtbinst
diff --git a/patches/bcfserial/0001-merge-bcfserial-https-github.com-statropy-bcfserial.patch b/patches/bcfserial/0001-merge-bcfserial-https-github.com-statropy-bcfserial.patch
index bcbe325e1..398d9d6a5 100644
--- a/patches/bcfserial/0001-merge-bcfserial-https-github.com-statropy-bcfserial.patch
+++ b/patches/bcfserial/0001-merge-bcfserial-https-github.com-statropy-bcfserial.patch
@@ -1,6 +1,6 @@
-From 51ff3992ccf851954ac88deda24c1a27b7f6f16d Mon Sep 17 00:00:00 2001
+From b24578d1b4af965fcedddc1ee4fd882ce942d746 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 29 Nov 2021 11:00:46 -0600
+Date: Tue, 7 Dec 2021 13:28:26 -0600
Subject: [PATCH] merge: bcfserial: https://github.com/statropy/bcfserial
https://github.com/statropy/bcfserial/commit/aded88429a8a00143596b41f4c1f50d9ae3d4069
diff --git a/patches/defconfig b/patches/defconfig
index d3323e87a..fd9245bac 100644
--- a/patches/defconfig
+++ b/patches/defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm 5.16.0-rc3 Kernel Configuration
+# Linux/arm 5.16.0-rc4 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabi-gcc (GCC) 11.1.0"
CONFIG_CC_IS_GCC=y
diff --git a/patches/git/BBDTBS b/patches/git/BBDTBS
index 989b4c090..527e99fee 100644
--- a/patches/git/BBDTBS
+++ b/patches/git/BBDTBS
@@ -1 +1 @@
-BBDTBS: https://github.com/beagleboard/BeagleBoard-DeviceTrees/commit/c4f23c3bdc49965f4ed66d0162bc49fa9b629687
+BBDTBS: https://github.com/beagleboard/BeagleBoard-DeviceTrees/commit/493a8c35752815a30a3b0c34c130054a0f546d27
diff --git a/patches/ref_omap2plus_defconfig b/patches/ref_omap2plus_defconfig
index 38ca5c01a..9a37f47f3 100644
--- a/patches/ref_omap2plus_defconfig
+++ b/patches/ref_omap2plus_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm 5.16.0-rc3 Kernel Configuration
+# Linux/arm 5.16.0-rc4 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="arm-linux-gnueabi-gcc (GCC) 11.1.0"
CONFIG_CC_IS_GCC=y
diff --git a/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-Device-Tree-Changes.patch b/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-Device-Tree-Changes.patch
index 812d6fc0e..0f84fcc4b 100644
--- a/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-Device-Tree-Changes.patch
+++ b/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-Device-Tree-Changes.patch
@@ -1,455 +1,10300 @@
-From bfac201fcdb32175520607523c675be3f8c4d832 Mon Sep 17 00:00:00 2001
+From 4463eb8dd961c13fb3cd087c7373efcdf141bad3 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 29 Nov 2021 11:01:31 -0600
+Date: Tue, 7 Dec 2021 13:30:14 -0600
Subject: [PATCH] Add BeagleBoard.org Device Tree Changes
https://github.com/beagleboard/BeagleBoard-DeviceTrees/tree/v5.16.x
-https://github.com/beagleboard/BeagleBoard-DeviceTrees/commit/c4f23c3bdc49965f4ed66d0162bc49fa9b629687
+https://github.com/beagleboard/BeagleBoard-DeviceTrees/commit/493a8c35752815a30a3b0c34c130054a0f546d27
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
- arch/arm/boot/dts/am335x-bone-common.dtsi | 25 +++++++++--------
- arch/arm/boot/dts/am335x-bone.dts | 5 ++++
- .../boot/dts/am335x-boneblack-wireless.dts | 5 ++++
- arch/arm/boot/dts/am335x-boneblack.dts | 5 ++++
- arch/arm/boot/dts/am335x-boneblue.dts | 3 ++-
- .../arm/boot/dts/am335x-bonegreen-common.dtsi | 1 +
- .../boot/dts/am335x-bonegreen-wireless.dts | 5 ++++
- arch/arm/boot/dts/am335x-bonegreen.dts | 5 ++++
- arch/arm/boot/dts/am335x-osd3358-sm-red.dts | 7 +++++
- arch/arm/boot/dts/am335x-osd335x-common.dtsi | 1 +
- arch/arm/boot/dts/am335x-pocketbeagle.dts | 2 ++
- .../arm/boot/dts/am335x-sancloud-bbe-lite.dts | 6 +++++
- arch/arm/boot/dts/am335x-sancloud-bbe.dts | 5 ++++
- arch/arm/boot/dts/am33xx.dtsi | 7 +++++
- arch/arm/boot/dts/am5729-beagleboneai.dts | 5 ++++
- arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts | 5 ++++
- arch/arm/boot/dts/am57xx-beagle-x15-revc.dts | 5 ++++
- arch/arm/boot/dts/am57xx-beagle-x15.dts | 5 ++++
- arch/arm/boot/dts/dra7.dtsi | 16 +++++++++++
- arch/arm/boot/dts/overlays/BBORG_FAN-A000.dts | 27 +++++++++++++++++++
- 20 files changed, 133 insertions(+), 12 deletions(-)
+ arch/arm/boot/dts/Makefile | 4 +
+ arch/arm/boot/dts/am335x-bbb-bone-buses.dtsi | 85 +
+ .../arm/boot/dts/am335x-bone-common-univ.dtsi | 2909 +++++++++++++++++
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 25 +-
+ arch/arm/boot/dts/am335x-bone-uboot-univ.dts | 29 +
+ arch/arm/boot/dts/am335x-bone.dts | 5 +
+ .../boot/dts/am335x-boneblack-uboot-univ.dts | 184 ++
+ arch/arm/boot/dts/am335x-boneblack-uboot.dts | 193 ++
+ .../boot/dts/am335x-boneblack-wireless.dts | 5 +
+ arch/arm/boot/dts/am335x-boneblack.dts | 5 +
+ arch/arm/boot/dts/am335x-boneblue.dts | 3 +-
+ .../arm/boot/dts/am335x-bonegreen-common.dtsi | 1 +
+ .../arm/boot/dts/am335x-bonegreen-gateway.dts | 248 ++
+ ...am335x-bonegreen-wireless-common-univ.dtsi | 2783 ++++++++++++++++
+ .../am335x-bonegreen-wireless-uboot-univ.dts | 56 +
+ .../boot/dts/am335x-bonegreen-wireless.dts | 5 +
+ arch/arm/boot/dts/am335x-bonegreen.dts | 5 +
+ arch/arm/boot/dts/am335x-osd3358-sm-red.dts | 147 +-
+ arch/arm/boot/dts/am335x-osd335x-common.dtsi | 1 +
+ arch/arm/boot/dts/am335x-pocketbeagle.dts | 971 +++++-
+ .../arm/boot/dts/am335x-sancloud-bbe-lite.dts | 6 +
+ arch/arm/boot/dts/am335x-sancloud-bbe.dts | 5 +
+ arch/arm/boot/dts/am33xx-l4.dtsi | 4 +-
+ arch/arm/boot/dts/am33xx.dtsi | 7 +
+ arch/arm/boot/dts/am5729-beagleboneai.dts | 5 +
+ arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts | 5 +
+ arch/arm/boot/dts/am57xx-beagle-x15-revc.dts | 5 +
+ arch/arm/boot/dts/am57xx-beagle-x15.dts | 5 +
+ arch/arm/boot/dts/dra7.dtsi | 16 +
+ arch/arm/boot/dts/omap3-cpu-thermal.dtsi | 2 +-
+ arch/arm/boot/dts/overlays/BB-ADC-00A0.dts | 26 +
+ .../boot/dts/overlays/BB-BBBW-WL1835-00A0.dts | 120 +
+ .../boot/dts/overlays/BB-BBGG-WL1835-00A0.dts | 237 ++
+ .../boot/dts/overlays/BB-BBGW-WL1835-00A0.dts | 155 +
+ .../dts/overlays/BB-BONE-4D5R-01-00A1.dts | 224 ++
+ .../dts/overlays/BB-BONE-LCD4-01-00A1.dts | 276 ++
+ .../boot/dts/overlays/BB-BONE-NH7C-01-A0.dts | 232 ++
+ .../dts/overlays/BB-BONE-eMMC1-01-00A0.dts | 61 +
+ .../dts/overlays/BB-CAPE-DISP-CT4-00A0.dts | 210 ++
+ .../dts/overlays/BB-HDMI-TDA998x-00A0.dts | 188 ++
+ .../arm/boot/dts/overlays/BB-SPIDEV0-00A0.dts | 81 +
+ .../arm/boot/dts/overlays/BB-SPIDEV1-00A0.dts | 81 +
+ .../boot/dts/overlays/BBORG_COMMS-00A2.dts | 63 +
+ arch/arm/boot/dts/overlays/BBORG_FAN-A000.dts | 27 +
+ .../boot/dts/overlays/BBORG_RELAY-00A2.dts | 74 +
+ arch/arm/boot/dts/overlays/BONE-ADC.dts | 28 +
+ arch/arm/boot/dts/overlays/M-BB-BBG-00A0.dts | 21 +
+ arch/arm/boot/dts/overlays/M-BB-BBGG-00A0.dts | 24 +
+ arch/arm/boot/dts/overlays/Makefile | 31 +
+ arch/arm/boot/dts/overlays/PB-MIKROBUS-0.dts | 112 +
+ arch/arm/boot/dts/overlays/PB-MIKROBUS-1.dts | 108 +
+ include/dt-bindings/pinctrl/omap.h | 4 +-
+ 52 files changed, 9841 insertions(+), 266 deletions(-)
+ create mode 100644 arch/arm/boot/dts/am335x-bbb-bone-buses.dtsi
+ create mode 100644 arch/arm/boot/dts/am335x-bone-common-univ.dtsi
+ create mode 100644 arch/arm/boot/dts/am335x-bone-uboot-univ.dts
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-uboot.dts
+ create mode 100644 arch/arm/boot/dts/am335x-bonegreen-gateway.dts
+ create mode 100644 arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
+ create mode 100644 arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-ADC-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BBBW-WL1835-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BBGG-WL1835-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BBGW-WL1835-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BONE-4D5R-01-00A1.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BONE-LCD4-01-00A1.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BONE-NH7C-01-A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-BONE-eMMC1-01-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-CAPE-DISP-CT4-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-HDMI-TDA998x-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-SPIDEV0-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BB-SPIDEV1-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BBORG_COMMS-00A2.dts
create mode 100644 arch/arm/boot/dts/overlays/BBORG_FAN-A000.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BBORG_RELAY-00A2.dts
+ create mode 100644 arch/arm/boot/dts/overlays/BONE-ADC.dts
+ create mode 100644 arch/arm/boot/dts/overlays/M-BB-BBG-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/M-BB-BBGG-00A0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/Makefile
+ create mode 100644 arch/arm/boot/dts/overlays/PB-MIKROBUS-0.dts
+ create mode 100644 arch/arm/boot/dts/overlays/PB-MIKROBUS-1.dts
-diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
-index 0ccdc7cd463b..22ee262a4c28 100644
---- a/arch/arm/boot/dts/am335x-bone-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
-@@ -26,14 +26,14 @@ leds {
- compatible = "gpio-leds";
-
- led2 {
-- label = "beaglebone:green:heartbeat";
-+ label = "beaglebone:green:usr0";
- gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
-
- led3 {
-- label = "beaglebone:green:mmc0";
-+ label = "beaglebone:green:usr1";
- gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- default-state = "off";
-@@ -63,9 +63,6 @@ vmmcsd_fixed: fixedregulator0 {
- };
-
- &am33xx_pinmux {
-- pinctrl-names = "default";
-- pinctrl-0 = <&clkout2_pin>;
--
- user_leds_s0: user_leds_s0 {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
-@@ -96,12 +93,6 @@ AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
- >;
- };
-
-- clkout2_pin: pinmux_clkout2_pin {
-- pinctrl-single,pins = <
-- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
-- >;
-- };
--
- cpsw_default: cpsw_default {
- pinctrl-single,pins = <
- /* Slave 1 */
-@@ -189,6 +180,7 @@ &uart0 {
- pinctrl-0 = <&uart0_pins>;
-
- status = "okay";
-+ symlink = "bone/uart/0";
- };
-
- &usb0 {
-@@ -207,6 +199,7 @@ &i2c0 {
-
- status = "okay";
- clock-frequency = <400000>;
-+ symlink = "bone/i2c/0";
-
- tps: tps@24 {
- reg = <0x24>;
-@@ -230,6 +223,7 @@ &i2c2 {
-
- status = "okay";
- clock-frequency = <100000>;
-+ symlink = "bone/i2c/2";
-
- cape_eeprom0: cape_eeprom0@54 {
- compatible = "atmel,24c256";
-@@ -404,3 +398,12 @@ &rtc {
- &pruss_tm {
- status = "okay";
- };
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 0de64f237cd8..db7ae3d79585 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -857,6 +857,10 @@ dtb-$(CONFIG_SOC_AM33XX) += \
+ am335x-base0033.dtb \
+ am335x-bone.dtb \
+ am335x-boneblack.dtb \
++ am335x-boneblack-uboot-univ.dtb \
++ am335x-bone-uboot-univ.dtb \
++ am335x-boneblack-uboot.dtb \
++ am335x-bonegreen-gateway.dtb \
+ am335x-boneblack-wireless.dtb \
+ am335x-boneblue.dtb \
+ am335x-bonegreen.dtb \
+diff --git a/arch/arm/boot/dts/am335x-bbb-bone-buses.dtsi b/arch/arm/boot/dts/am335x-bbb-bone-buses.dtsi
+new file mode 100644
+index 000000000000..02cd206a37a6
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bbb-bone-buses.dtsi
+@@ -0,0 +1,85 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
++ * Copyright (C) 2021 Robert Nelson <robertcnelson@gmail.com>
++ * See Cape Interface Spec page for more info on Bone Buses
++ * https://elinux.org/Beagleboard:BeagleBone_cape_interface_spec
++ */
+
-+&tscadc {
-+ adc {
-+ ti,adc-channels = <0 1 2 3 4 5 6 7>;
-+ ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
-+ ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
-+ ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++// For dummy refrence when peripheral is not available.
++&{/} {
++ not_available: not_available {
++ // Use ¬_available when required.
++ // This node is responsible to create these entries,
++ // /sys/firmware/devicetree/base/__symbols__/not_available
++ // /sys/firmware/devicetree/base/not_available
+ };
+};
-diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
-index b5d85ef51a02..ea138cb34091 100644
---- a/arch/arm/boot/dts/am335x-bone.dts
-+++ b/arch/arm/boot/dts/am335x-bone.dts
-@@ -10,6 +10,11 @@
- / {
- model = "TI AM335x BeagleBone";
- compatible = "ti,am335x-bone", "ti,am33xx";
+
-+ chosen {
-+ base_dtb = "am335x-bone.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
-+ };
- };
-
- &ldo3_reg {
-diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
-index c72b09ab8da0..cd7c22c66e12 100644
---- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts
-+++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
-@@ -14,6 +14,11 @@ / {
- model = "TI AM335x BeagleBone Black Wireless";
- compatible = "ti,am335x-bone-black-wireless", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
-
-+ chosen {
-+ base_dtb = "am335x-boneblack-wireless.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++// For compatible bone pinmuxing
++bone_pinmux: &am33xx_pinmux {
++ emmc_pins: pinmux_emmc_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
++ >;
+ };
+
- wlan_en_reg: fixedregulator@2 {
- compatible = "regulator-fixed";
- regulator-name = "wlan-en-regulator";
-diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
-index 9312197316f0..2788ab042727 100644
---- a/arch/arm/boot/dts/am335x-boneblack.dts
-+++ b/arch/arm/boot/dts/am335x-boneblack.dts
-@@ -12,6 +12,11 @@
- / {
- model = "TI AM335x BeagleBone Black";
- compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ >;
++ };
+
-+ chosen {
-+ base_dtb = "am335x-boneblack.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++ nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
++ >;
+ };
- };
-
- &cpu0_opp_table {
-diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
-index c6bb325ead33..97e53a3ff62f 100644
---- a/arch/arm/boot/dts/am335x-boneblue.dts
-+++ b/arch/arm/boot/dts/am335x-boneblue.dts
-@@ -14,6 +14,8 @@ / {
-
- chosen {
- stdout-path = &uart0;
-+ base_dtb = "am335x-boneblue.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
- };
-
- leds {
-@@ -128,7 +130,6 @@ AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.g
- AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
- AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
- AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
--
- >;
- };
-
-diff --git a/arch/arm/boot/dts/am335x-bonegreen-common.dtsi b/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
-index 9f7fb63744d0..4c87de57d1a1 100644
---- a/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
-@@ -34,6 +34,7 @@ &uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart2_pins>;
- status = "okay";
-+ symlink = "bone/uart/2";
- };
-
- &rtc {
-diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
-index 215f279e476b..0952a637bf5f 100644
---- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
-+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
-@@ -13,6 +13,11 @@ / {
- model = "TI AM335x BeagleBone Green Wireless";
- compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
-
-+ chosen {
-+ base_dtb = "am335x-bonegreen-wireless.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++
++ mcasp0_pins: mcasp0_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
++ >;
+ };
++};
+
- wlan_en_reg: fixedregulator@2 {
- compatible = "regulator-fixed";
- regulator-name = "wlan-en-regulator";
-diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
-index 18cc0f49e999..62ca9c8764bd 100644
---- a/arch/arm/boot/dts/am335x-bonegreen.dts
-+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
-@@ -11,4 +11,9 @@
- / {
- model = "TI AM335x BeagleBone Green";
- compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++// ADC
++bone_adc: &tscadc {
+
-+ chosen {
-+ base_dtb = "am335x-bonegreen.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
-+ };
- };
-diff --git a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-index 605b2a436edf..94c3929bb902 100644
---- a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-+++ b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-@@ -17,6 +17,11 @@
- / {
- model = "Octavo Systems OSD3358-SM-RED";
- compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++};
+diff --git a/arch/arm/boot/dts/am335x-bone-common-univ.dtsi b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
+new file mode 100644
+index 000000000000..ec3867c46949
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
+@@ -0,0 +1,2909 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
+
-+ chosen {
-+ base_dtb = "am335x-osd3358-sm-red.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
-+ };
- };
-
- &ldo3_reg {
-@@ -372,6 +377,7 @@ &uart0 {
- pinctrl-0 = <&uart0_pins>;
-
- status = "okay";
-+ symlink = "bone/uart/0";
- };
-
- &usb0 {
-@@ -389,6 +395,7 @@ &i2c2 {
- pinctrl-0 = <&i2c2_pins>;
- status = "okay";
- clock-frequency = <100000>;
-+ symlink = "bone/i2c/2";
- };
-
- &cpsw_port1 {
-diff --git a/arch/arm/boot/dts/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
-index 2888b15999ee..49ba87edadbb 100644
---- a/arch/arm/boot/dts/am335x-osd335x-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
-@@ -48,6 +48,7 @@ &i2c0 {
-
- status = "okay";
- clock-frequency = <400000>;
-+ symlink = "bone/i2c/0";
-
- tps: tps@24 {
- reg = <0x24>;
-diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-index 5e415d8ffdd8..18f240e5eb58 100644
---- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
-+++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-@@ -15,6 +15,8 @@ / {
-
- chosen {
- stdout-path = &uart0;
-+ base_dtb = "am335x-pocketbeagle.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
- };
-
- leds {
-diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts b/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
-index d6ef19311a91..5ba77a20f79f 100644
---- a/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
-+++ b/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
-@@ -16,6 +16,11 @@ / {
- "ti,am335x-bone-black",
- "ti,am335x-bone",
- "ti,am33xx";
++&am33xx_pinmux {
++ /************************/
++ /* P8 Header */
++ /************************/
+
-+ chosen {
++ /* P8_01 GND */
++
++ /* P8_02 GND */
++
++
++ /* P8_03 (ZCZ ball R9) emmc */
++ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++
++ /* P8_04 (ZCZ ball T9) emmc */
++ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++
++ /* P8_05 (ZCZ ball R8) emmc */
++ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++
++ /* P8_06 (ZCZ ball T8) emmc */
++ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++
++ /* P8_07 (ZCZ ball R7) gpio2_2 */
++ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
++
++ /* P8_08 (ZCZ ball T7) gpio2_3 */
++ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
++
++ /* P8_09 (ZCZ ball T6) gpio2_5 */
++ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
++
++ /* P8_10 (ZCZ ball U6) gpio2_4 */
++ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
++
++ /* P8_11 (ZCZ ball R12) gpio1_13 */
++ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
++ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
++
++ /* P8_12 (ZCZ ball T12) gpio1_12 */
++ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
++ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
++
++ /* P8_13 (ZCZ ball T10) gpio0_23 */
++ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
++
++ /* P8_14 (ZCZ ball T11) gpio0_26 */
++ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
++
++ /* P8_15 (ZCZ ball U13) gpio1_15 */
++ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
++ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
++ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
++
++ /* P8_16 (ZCZ ball V13) gpio1_14 */
++ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
++ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
++
++ /* P8_17 (ZCZ ball U12) gpio0_27 */
++ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P8_17_pwm_pin: pinmux_P8_17_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
++
++ /* P8_18 (ZCZ ball V12) gpio2_1 */
++ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++
++ /* P8_19 (ZCZ ball U10) gpio0_22 */
++ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
++
++ /* P8_20 (ZCZ ball V9) emmc */
++ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
++ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
++
++ /* P8_21 (ZCZ ball U9) emmc */
++ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
++ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
++
++ /* P8_22 (ZCZ ball V8) emmc */
++ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++
++ /* P8_23 (ZCZ ball U8) emmc */
++ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++
++ /* P8_24 (ZCZ ball V7) emmc */
++ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++
++ /* P8_25 (ZCZ ball U7) emmc */
++ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++
++ /* P8_26 (ZCZ ball V6) gpio1_29 */
++ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
++ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x087c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
++ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
++ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
++ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x087c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
++
++ /* P8_27 (ZCZ ball U5) hdmi */
++ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
++ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
++
++ /* P8_28 (ZCZ ball V5) hdmi */
++ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
++ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
++
++ /* P8_29 (ZCZ ball R5) hdmi */
++ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
++ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
++
++ /* P8_30 (ZCZ ball R6) hdmi */
++ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
++ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
++
++ /* P8_31 (ZCZ ball V4) hdmi */
++ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
++ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
++
++ /* P8_32 (ZCZ ball T5) hdmi */
++ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
++
++ /* P8_33 (ZCZ ball V3) hdmi */
++ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
++
++ /* P8_34 (ZCZ ball U4) hdmi */
++ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
++
++ /* P8_35 (ZCZ ball V2) hdmi */
++ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
++
++ /* P8_36 (ZCZ ball U3) hdmi */
++ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
++
++ /* P8_37 (ZCZ ball U1) hdmi */
++ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
++ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
++
++ /* P8_38 (ZCZ ball U2) hdmi */
++ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
++ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
++
++ /* P8_39 (ZCZ ball T3) hdmi */
++ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
++ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
++ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
++
++ /* P8_40 (ZCZ ball T4) hdmi */
++ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
++ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
++ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
++
++ /* P8_41 (ZCZ ball T1) hdmi */
++ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
++ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
++ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
++
++ /* P8_42 (ZCZ ball T2) hdmi */
++ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
++ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
++ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
++
++ /* P8_43 (ZCZ ball R3) hdmi */
++ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
++ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
++ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
++
++ /* P8_44 (ZCZ ball R4) hdmi */
++ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
++ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
++ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
++
++ /* P8_45 (ZCZ ball R1) hdmi */
++ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
++ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
++ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
++
++ /* P8_46 (ZCZ ball R2) hdmi */
++ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
++ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
++ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
++
++ /************************/
++ /* P9 Header */
++ /************************/
++
++ /* P9_01 GND */
++
++ /* P9_02 GND */
++
++ /* P9_03 3V3 */
++
++ /* P9_04 3V3 */
++
++ /* P9_05 VDD_5V */
++
++ /* P9_06 VDD_5V */
++
++ /* P9_07 SYS_5V */
++
++ /* P9_08 SYS_5V */
++
++ /* P9_09 PWR_BUT */
++
++ /* P9_10 RSTn */
++
++ /* P9_11 (ZCZ ball T17) gpio0_30 */
++ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
++
++ /* P9_12 (ZCZ ball U18) gpio1_28 */
++ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++
++ /* P9_13 (ZCZ ball U17) gpio0_31 */
++ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
++
++ /* P9_14 (ZCZ ball U14) gpio1_18 */
++ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
++
++ /* P9_15 (ZCZ ball R13) gpio1_16 */
++ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
++
++ /* P9_16 (ZCZ ball T14) gpio1_19 */
++ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
++
++ /* P9_17 (ZCZ ball A16) gpio0_5 */
++ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
++ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
++ P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
++ P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
++
++ /* P9_18 (ZCZ ball B16) gpio0_4 */
++ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
++ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
++ P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
++ P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
++
++ /* P9_19 (ZCZ ball D17) i2c2_scl */
++ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
++ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
++ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
++ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
++
++ /* P9_20 (ZCZ ball D18) i2c2_sda */
++ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
++ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
++ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
++ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
++
++ /* P9_21 (ZCZ ball B17) gpio0_3 */
++ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
++ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
++ P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
++ P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
++ P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
++
++ /* P9_22 (ZCZ ball A17) gpio0_2 */
++ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
++ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
++ P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
++ P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
++ P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
++
++ /* P9_23 (ZCZ ball V14) gpio1_17 */
++ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
++
++ /* P9_24 (ZCZ ball D15) gpio0_15 */
++ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
++ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
++ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
++ P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
++ P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
++
++ /* P9_25 (ZCZ ball A14) audio */
++ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
++ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
++ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
++
++ /* P9_26 (ZCZ ball D16) gpio0_14 */
++ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
++ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
++ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
++ P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
++ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
++
++ /* P9_27 (ZCZ ball C13) gpio3_19 */
++ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
++ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
++ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
++
++ /* P9_28 (ZCZ ball C12) audio */
++ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
++ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
++ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
++ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
++ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
++
++ /* P9_29 (ZCZ ball B13) audio */
++ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
++ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
++ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
++ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
++
++ /* P9_30 (ZCZ ball D12) gpio3_16 */
++ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P9_30_pwm_pin: pinmux_P9_30_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
++ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
++ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
++ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
++
++ /* P9_31 (ZCZ ball A13) audio */
++ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
++ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
++ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
++ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
++
++ /* P9_32 VADC */
++
++ /* P9_33 (ZCZ ball C8) AIN4 */
++
++ /* P9_34 AGND */
++
++ /* P9_35 (ZCZ ball A8) AIN6 */
++
++ /* P9_36 (ZCZ ball B8) AIN5 */
++
++ /* P9_37 (ZCZ ball B7) AIN2 */
++
++ /* P9_38 (ZCZ ball A7) AIN3 */
++
++ /* P9_39 (ZCZ ball B6) AIN0 */
++
++ /* P9_40 (ZCZ ball C7) AIN1 */
++
++ /* P9_41 (ZCZ ball D14) gpio0_20 */
++ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
++ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
++
++ /* P9_41.1 */
++ /* P9_91 (ZCZ ball D13) gpio3_20 */
++ P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
++ P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
++ P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
++
++ /* P9_42 (ZCZ ball C18) gpio0_7 */
++ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
++ P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
++ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
++ P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
++ P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
++
++ /* P9_42.1 */
++ /* P9_92 (ZCZ ball B12) gpio3_18 */
++ P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
++ P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
++ P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
++
++ /* P9_43 GND */
++
++ /* P9_44 GND */
++
++ /* P9_45 GND */
++
++ /* P9_46 GND */
++};
++
++&i2c1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ clock-frequency = <100000>;
++ symlink = "bone/i2c/1";
++};
++
++&i2c2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ clock-frequency = <100000>;
++ symlink = "bone/i2c/2";
++};
++
++&uart1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/1";
++};
++
++&uart2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/2";
++};
++
++&uart3 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/3";
++};
++
++&uart4 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/4";
++};
++
++&uart5 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/5";
++};
++
++&dcan0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/can/0";
++};
++
++&dcan1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/can/1";
++};
++
++&eqep0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/eqep/0";
++};
++
++&eqep1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/eqep/1";
++};
++
++&eqep2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/eqep/2";
++};
++
++&epwmss0 {
++ status = "okay";
++};
++
++&epwmss1 {
++ status = "okay";
++};
++
++&epwmss2 {
++ status = "okay";
++};
++
++&ehrpwm0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ehrpwm1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ehrpwm2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ecap0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ecap1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ecap2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&spi0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/0.0";
++
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/0.1";
++
++ reg = <1>;
++ spi-max-frequency = <16000000>;
++ };
++};
++
++&spi1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/1.0";
++
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/1.1";
++
++ reg = <1>;
++ spi-max-frequency = <16000000>;
++ };
++};
++
++/**********************************************************************/
++/* Pin Multiplex Helpers */
++/* */
++/* These provide userspace runtime pin configuration for the */
++/* BeagleBone cape expansion headers */
++/**********************************************************************/
++
++&ocp {
++ /************************/
++ /* P8 Header */
++ /************************/
++
++ /* P8_01 GND */
++
++ /* P8_02 GND */
++
++
++ /* P8_03 (ZCZ ball R9) emmc */
++ P8_03_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_03_default_pin>;
++ pinctrl-1 = <&P8_03_gpio_pin>;
++ pinctrl-2 = <&P8_03_gpio_pu_pin>;
++ pinctrl-3 = <&P8_03_gpio_pd_pin>;
++ pinctrl-4 = <&P8_03_gpio_input_pin>;
++ };
++
++ /* P8_04 (ZCZ ball T9) emmc */
++ P8_04_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_04_default_pin>;
++ pinctrl-1 = <&P8_04_gpio_pin>;
++ pinctrl-2 = <&P8_04_gpio_pu_pin>;
++ pinctrl-3 = <&P8_04_gpio_pd_pin>;
++ pinctrl-4 = <&P8_04_gpio_input_pin>;
++ };
++
++ /* P8_05 (ZCZ ball R8) emmc */
++ P8_05_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_05_default_pin>;
++ pinctrl-1 = <&P8_05_gpio_pin>;
++ pinctrl-2 = <&P8_05_gpio_pu_pin>;
++ pinctrl-3 = <&P8_05_gpio_pd_pin>;
++ pinctrl-4 = <&P8_05_gpio_input_pin>;
++ };
++
++ /* P8_06 (ZCZ ball T8) emmc */
++ P8_06_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_06_default_pin>;
++ pinctrl-1 = <&P8_06_gpio_pin>;
++ pinctrl-2 = <&P8_06_gpio_pu_pin>;
++ pinctrl-3 = <&P8_06_gpio_pd_pin>;
++ pinctrl-4 = <&P8_06_gpio_input_pin>;
++ };
++
++ /* P8_07 (ZCZ ball R7) */
++ P8_07_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_07_default_pin>;
++ pinctrl-1 = <&P8_07_gpio_pin>;
++ pinctrl-2 = <&P8_07_gpio_pu_pin>;
++ pinctrl-3 = <&P8_07_gpio_pd_pin>;
++ pinctrl-4 = <&P8_07_gpio_input_pin>;
++ pinctrl-5 = <&P8_07_timer_pin>;
++ };
++
++ /* P8_08 (ZCZ ball T7) */
++ P8_08_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_08_default_pin>;
++ pinctrl-1 = <&P8_08_gpio_pin>;
++ pinctrl-2 = <&P8_08_gpio_pu_pin>;
++ pinctrl-3 = <&P8_08_gpio_pd_pin>;
++ pinctrl-4 = <&P8_08_gpio_input_pin>;
++ pinctrl-5 = <&P8_08_timer_pin>;
++ };
++
++ /* P8_09 (ZCZ ball T6) */
++ P8_09_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_09_default_pin>;
++ pinctrl-1 = <&P8_09_gpio_pin>;
++ pinctrl-2 = <&P8_09_gpio_pu_pin>;
++ pinctrl-3 = <&P8_09_gpio_pd_pin>;
++ pinctrl-4 = <&P8_09_gpio_input_pin>;
++ pinctrl-5 = <&P8_09_timer_pin>;
++ };
++
++ /* P8_10 (ZCZ ball U6) */
++ P8_10_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_10_default_pin>;
++ pinctrl-1 = <&P8_10_gpio_pin>;
++ pinctrl-2 = <&P8_10_gpio_pu_pin>;
++ pinctrl-3 = <&P8_10_gpio_pd_pin>;
++ pinctrl-4 = <&P8_10_gpio_input_pin>;
++ pinctrl-5 = <&P8_10_timer_pin>;
++ };
++
++ /* P8_11 (ZCZ ball R12) */
++ P8_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
++ pinctrl-0 = <&P8_11_default_pin>;
++ pinctrl-1 = <&P8_11_gpio_pin>;
++ pinctrl-2 = <&P8_11_gpio_pu_pin>;
++ pinctrl-3 = <&P8_11_gpio_pd_pin>;
++ pinctrl-4 = <&P8_11_gpio_input_pin>;
++ pinctrl-5 = <&P8_11_qep_pin>;
++ pinctrl-6 = <&P8_11_pruout_pin>;
++ };
++
++ /* P8_12 (ZCZ ball T12) */
++ P8_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
++ pinctrl-0 = <&P8_12_default_pin>;
++ pinctrl-1 = <&P8_12_gpio_pin>;
++ pinctrl-2 = <&P8_12_gpio_pu_pin>;
++ pinctrl-3 = <&P8_12_gpio_pd_pin>;
++ pinctrl-4 = <&P8_12_gpio_input_pin>;
++ pinctrl-5 = <&P8_12_qep_pin>;
++ pinctrl-6 = <&P8_12_pruout_pin>;
++ };
++
++ /* P8_13 (ZCZ ball T10) */
++ P8_13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_13_default_pin>;
++ pinctrl-1 = <&P8_13_gpio_pin>;
++ pinctrl-2 = <&P8_13_gpio_pu_pin>;
++ pinctrl-3 = <&P8_13_gpio_pd_pin>;
++ pinctrl-4 = <&P8_13_gpio_input_pin>;
++ pinctrl-5 = <&P8_13_pwm_pin>;
++ };
++
++ /* P8_14 (ZCZ ball T11) */
++ P8_14_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_14_default_pin>;
++ pinctrl-1 = <&P8_14_gpio_pin>;
++ pinctrl-2 = <&P8_14_gpio_pu_pin>;
++ pinctrl-3 = <&P8_14_gpio_pd_pin>;
++ pinctrl-4 = <&P8_14_gpio_input_pin>;
++ pinctrl-5 = <&P8_14_pwm_pin>;
++ };
++
++ /* P8_15 (ZCZ ball U13) */
++ P8_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
++ pinctrl-0 = <&P8_15_default_pin>;
++ pinctrl-1 = <&P8_15_gpio_pin>;
++ pinctrl-2 = <&P8_15_gpio_pu_pin>;
++ pinctrl-3 = <&P8_15_gpio_pd_pin>;
++ pinctrl-4 = <&P8_15_gpio_input_pin>;
++ pinctrl-5 = <&P8_15_qep_pin>;
++ pinctrl-6 = <&P8_15_pru_ecap_pin>;
++ pinctrl-7 = <&P8_15_pruin_pin>;
++ };
++
++ /* P8_16 (ZCZ ball V13) */
++ P8_16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
++ pinctrl-0 = <&P8_16_default_pin>;
++ pinctrl-1 = <&P8_16_gpio_pin>;
++ pinctrl-2 = <&P8_16_gpio_pu_pin>;
++ pinctrl-3 = <&P8_16_gpio_pd_pin>;
++ pinctrl-4 = <&P8_16_gpio_input_pin>;
++ pinctrl-5 = <&P8_16_qep_pin>;
++ pinctrl-6 = <&P8_16_pruin_pin>;
++ };
++
++ /* P8_17 (ZCZ ball U12) */
++ P8_17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_17_default_pin>;
++ pinctrl-1 = <&P8_17_gpio_pin>;
++ pinctrl-2 = <&P8_17_gpio_pu_pin>;
++ pinctrl-3 = <&P8_17_gpio_pd_pin>;
++ pinctrl-4 = <&P8_17_gpio_input_pin>;
++ pinctrl-5 = <&P8_17_pwm_pin>;
++ };
++
++ /* P8_18 (ZCZ ball V12) */
++ P8_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_18_default_pin>;
++ pinctrl-1 = <&P8_18_gpio_pin>;
++ pinctrl-2 = <&P8_18_gpio_pu_pin>;
++ pinctrl-3 = <&P8_18_gpio_pd_pin>;
++ pinctrl-4 = <&P8_18_gpio_input_pin>;
++ };
++
++ /* P8_19 (ZCZ ball U10) */
++ P8_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_19_default_pin>;
++ pinctrl-1 = <&P8_19_gpio_pin>;
++ pinctrl-2 = <&P8_19_gpio_pu_pin>;
++ pinctrl-3 = <&P8_19_gpio_pd_pin>;
++ pinctrl-4 = <&P8_19_gpio_input_pin>;
++ pinctrl-5 = <&P8_19_pwm_pin>;
++ };
++
++ /* P8_20 (ZCZ ball V9) emmc */
++ P8_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_20_default_pin>;
++ pinctrl-1 = <&P8_20_gpio_pin>;
++ pinctrl-2 = <&P8_20_gpio_pu_pin>;
++ pinctrl-3 = <&P8_20_gpio_pd_pin>;
++ pinctrl-4 = <&P8_20_gpio_input_pin>;
++ pinctrl-5 = <&P8_20_pruout_pin>;
++ pinctrl-6 = <&P8_20_pruin_pin>;
++ };
++
++ /* P8_21 (ZCZ ball U9) emmc */
++ P8_21_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_21_default_pin>;
++ pinctrl-1 = <&P8_21_gpio_pin>;
++ pinctrl-2 = <&P8_21_gpio_pu_pin>;
++ pinctrl-3 = <&P8_21_gpio_pd_pin>;
++ pinctrl-4 = <&P8_21_gpio_input_pin>;
++ pinctrl-5 = <&P8_21_pruout_pin>;
++ pinctrl-6 = <&P8_21_pruin_pin>;
++ };
++
++ /* P8_22 (ZCZ ball V8) emmc */
++ P8_22_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_22_default_pin>;
++ pinctrl-1 = <&P8_22_gpio_pin>;
++ pinctrl-2 = <&P8_22_gpio_pu_pin>;
++ pinctrl-3 = <&P8_22_gpio_pd_pin>;
++ pinctrl-4 = <&P8_22_gpio_input_pin>;
++ };
++
++ /* P8_23 (ZCZ ball U8) emmc */
++ P8_23_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_23_default_pin>;
++ pinctrl-1 = <&P8_23_gpio_pin>;
++ pinctrl-2 = <&P8_23_gpio_pu_pin>;
++ pinctrl-3 = <&P8_23_gpio_pd_pin>;
++ pinctrl-4 = <&P8_23_gpio_input_pin>;
++ };
++
++ /* P8_24 (ZCZ ball V7) emmc */
++ P8_24_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_24_default_pin>;
++ pinctrl-1 = <&P8_24_gpio_pin>;
++ pinctrl-2 = <&P8_24_gpio_pu_pin>;
++ pinctrl-3 = <&P8_24_gpio_pd_pin>;
++ pinctrl-4 = <&P8_24_gpio_input_pin>;
++ };
++
++ /* P8_25 (ZCZ ball U7) emmc */
++ P8_25_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_25_default_pin>;
++ pinctrl-1 = <&P8_25_gpio_pin>;
++ pinctrl-2 = <&P8_25_gpio_pu_pin>;
++ pinctrl-3 = <&P8_25_gpio_pd_pin>;
++ pinctrl-4 = <&P8_25_gpio_input_pin>;
++ };
++
++ /* P8_26 (ZCZ ball V6) */
++ P8_26_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_26_default_pin>;
++ pinctrl-1 = <&P8_26_gpio_pin>;
++ pinctrl-2 = <&P8_26_gpio_pu_pin>;
++ pinctrl-3 = <&P8_26_gpio_pd_pin>;
++ pinctrl-4 = <&P8_26_gpio_input_pin>;
++ };
++
++ /* P8_27 (ZCZ ball U5) hdmi */
++ P8_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_27_default_pin>;
++ pinctrl-1 = <&P8_27_gpio_pin>;
++ pinctrl-2 = <&P8_27_gpio_pu_pin>;
++ pinctrl-3 = <&P8_27_gpio_pd_pin>;
++ pinctrl-4 = <&P8_27_gpio_input_pin>;
++ pinctrl-5 = <&P8_27_pruout_pin>;
++ pinctrl-6 = <&P8_27_pruin_pin>;
++ };
++
++ /* P8_28 (ZCZ ball V5) hdmi */
++ P8_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_28_default_pin>;
++ pinctrl-1 = <&P8_28_gpio_pin>;
++ pinctrl-2 = <&P8_28_gpio_pu_pin>;
++ pinctrl-3 = <&P8_28_gpio_pd_pin>;
++ pinctrl-4 = <&P8_28_gpio_input_pin>;
++ pinctrl-5 = <&P8_28_pruout_pin>;
++ pinctrl-6 = <&P8_28_pruin_pin>;
++ };
++
++ /* P8_29 (ZCZ ball R5) hdmi */
++ P8_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_29_default_pin>;
++ pinctrl-1 = <&P8_29_gpio_pin>;
++ pinctrl-2 = <&P8_29_gpio_pu_pin>;
++ pinctrl-3 = <&P8_29_gpio_pd_pin>;
++ pinctrl-4 = <&P8_29_gpio_input_pin>;
++ pinctrl-5 = <&P8_29_pruout_pin>;
++ pinctrl-6 = <&P8_29_pruin_pin>;
++ };
++
++ /* P8_30 (ZCZ ball R6) hdmi */
++ P8_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_30_default_pin>;
++ pinctrl-1 = <&P8_30_gpio_pin>;
++ pinctrl-2 = <&P8_30_gpio_pu_pin>;
++ pinctrl-3 = <&P8_30_gpio_pd_pin>;
++ pinctrl-4 = <&P8_30_gpio_input_pin>;
++ pinctrl-5 = <&P8_30_pruout_pin>;
++ pinctrl-6 = <&P8_30_pruin_pin>;
++ };
++
++ /* P8_31 (ZCZ ball V4) hdmi */
++ P8_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "qep";
++ pinctrl-0 = <&P8_31_default_pin>;
++ pinctrl-1 = <&P8_31_gpio_pin>;
++ pinctrl-2 = <&P8_31_gpio_pu_pin>;
++ pinctrl-3 = <&P8_31_gpio_pd_pin>;
++ pinctrl-4 = <&P8_31_gpio_input_pin>;
++ pinctrl-5 = <&P8_31_uart_pin>;
++ pinctrl-6 = <&P8_31_qep_pin>;
++ };
++
++ /* P8_32 (ZCZ ball T5) hdmi */
++ P8_32_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P8_32_default_pin>;
++ pinctrl-1 = <&P8_32_gpio_pin>;
++ pinctrl-2 = <&P8_32_gpio_pu_pin>;
++ pinctrl-3 = <&P8_32_gpio_pd_pin>;
++ pinctrl-4 = <&P8_32_gpio_input_pin>;
++ pinctrl-5 = <&P8_32_qep_pin>;
++ };
++
++ /* P8_33 (ZCZ ball V3) hdmi */
++ P8_33_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P8_33_default_pin>;
++ pinctrl-1 = <&P8_33_gpio_pin>;
++ pinctrl-2 = <&P8_33_gpio_pu_pin>;
++ pinctrl-3 = <&P8_33_gpio_pd_pin>;
++ pinctrl-4 = <&P8_33_gpio_input_pin>;
++ pinctrl-5 = <&P8_33_qep_pin>;
++ };
++
++ /* P8_34 (ZCZ ball U4) hdmi */
++ P8_34_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_34_default_pin>;
++ pinctrl-1 = <&P8_34_gpio_pin>;
++ pinctrl-2 = <&P8_34_gpio_pu_pin>;
++ pinctrl-3 = <&P8_34_gpio_pd_pin>;
++ pinctrl-4 = <&P8_34_gpio_input_pin>;
++ pinctrl-5 = <&P8_34_pwm_pin>;
++ };
++
++ /* P8_35 (ZCZ ball V2) hdmi */
++ P8_35_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P8_35_default_pin>;
++ pinctrl-1 = <&P8_35_gpio_pin>;
++ pinctrl-2 = <&P8_35_gpio_pu_pin>;
++ pinctrl-3 = <&P8_35_gpio_pd_pin>;
++ pinctrl-4 = <&P8_35_gpio_input_pin>;
++ pinctrl-5 = <&P8_35_qep_pin>;
++ };
++
++ /* P8_36 (ZCZ ball U3) hdmi */
++ P8_36_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_36_default_pin>;
++ pinctrl-1 = <&P8_36_gpio_pin>;
++ pinctrl-2 = <&P8_36_gpio_pu_pin>;
++ pinctrl-3 = <&P8_36_gpio_pd_pin>;
++ pinctrl-4 = <&P8_36_gpio_input_pin>;
++ pinctrl-5 = <&P8_36_pwm_pin>;
++ };
++
++ /* P8_37 (ZCZ ball U1) hdmi */
++ P8_37_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
++ pinctrl-0 = <&P8_37_default_pin>;
++ pinctrl-1 = <&P8_37_gpio_pin>;
++ pinctrl-2 = <&P8_37_gpio_pu_pin>;
++ pinctrl-3 = <&P8_37_gpio_pd_pin>;
++ pinctrl-4 = <&P8_37_gpio_input_pin>;
++ pinctrl-5 = <&P8_37_uart_pin>;
++ pinctrl-6 = <&P8_37_pwm_pin>;
++ };
++
++ /* P8_38 (ZCZ ball U2) hdmi */
++ P8_38_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
++ pinctrl-0 = <&P8_38_default_pin>;
++ pinctrl-1 = <&P8_38_gpio_pin>;
++ pinctrl-2 = <&P8_38_gpio_pu_pin>;
++ pinctrl-3 = <&P8_38_gpio_pd_pin>;
++ pinctrl-4 = <&P8_38_gpio_input_pin>;
++ pinctrl-5 = <&P8_38_uart_pin>;
++ pinctrl-6 = <&P8_38_pwm_pin>;
++ };
++
++ /* P8_39 (ZCZ ball T3) hdmi */
++ P8_39_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_39_default_pin>;
++ pinctrl-1 = <&P8_39_gpio_pin>;
++ pinctrl-2 = <&P8_39_gpio_pu_pin>;
++ pinctrl-3 = <&P8_39_gpio_pd_pin>;
++ pinctrl-4 = <&P8_39_gpio_input_pin>;
++ pinctrl-5 = <&P8_39_qep_pin>;
++ pinctrl-6 = <&P8_39_pruout_pin>;
++ pinctrl-7 = <&P8_39_pruin_pin>;
++ };
++
++ /* P8_40 (ZCZ ball T4) hdmi */
++ P8_40_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_40_default_pin>;
++ pinctrl-1 = <&P8_40_gpio_pin>;
++ pinctrl-2 = <&P8_40_gpio_pu_pin>;
++ pinctrl-3 = <&P8_40_gpio_pd_pin>;
++ pinctrl-4 = <&P8_40_gpio_input_pin>;
++ pinctrl-5 = <&P8_40_qep_pin>;
++ pinctrl-6 = <&P8_40_pruout_pin>;
++ pinctrl-7 = <&P8_40_pruin_pin>;
++ };
++
++ /* P8_41 (ZCZ ball T1) hdmi */
++ P8_41_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_41_default_pin>;
++ pinctrl-1 = <&P8_41_gpio_pin>;
++ pinctrl-2 = <&P8_41_gpio_pu_pin>;
++ pinctrl-3 = <&P8_41_gpio_pd_pin>;
++ pinctrl-4 = <&P8_41_gpio_input_pin>;
++ pinctrl-5 = <&P8_41_qep_pin>;
++ pinctrl-6 = <&P8_41_pruout_pin>;
++ pinctrl-7 = <&P8_41_pruin_pin>;
++ };
++
++ /* P8_42 (ZCZ ball T2) hdmi */
++ P8_42_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_42_default_pin>;
++ pinctrl-1 = <&P8_42_gpio_pin>;
++ pinctrl-2 = <&P8_42_gpio_pu_pin>;
++ pinctrl-3 = <&P8_42_gpio_pd_pin>;
++ pinctrl-4 = <&P8_42_gpio_input_pin>;
++ pinctrl-5 = <&P8_42_qep_pin>;
++ pinctrl-6 = <&P8_42_pruout_pin>;
++ pinctrl-7 = <&P8_42_pruin_pin>;
++ };
++
++ /* P8_43 (ZCZ ball R3) hdmi */
++ P8_43_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_43_default_pin>;
++ pinctrl-1 = <&P8_43_gpio_pin>;
++ pinctrl-2 = <&P8_43_gpio_pu_pin>;
++ pinctrl-3 = <&P8_43_gpio_pd_pin>;
++ pinctrl-4 = <&P8_43_gpio_input_pin>;
++ pinctrl-5 = <&P8_43_pwm_pin>;
++ pinctrl-6 = <&P8_43_pruout_pin>;
++ pinctrl-7 = <&P8_43_pruin_pin>;
++ };
++
++ /* P8_44 (ZCZ ball R4) hdmi */
++ P8_44_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_44_default_pin>;
++ pinctrl-1 = <&P8_44_gpio_pin>;
++ pinctrl-2 = <&P8_44_gpio_pu_pin>;
++ pinctrl-3 = <&P8_44_gpio_pd_pin>;
++ pinctrl-4 = <&P8_44_gpio_input_pin>;
++ pinctrl-5 = <&P8_44_pwm_pin>;
++ pinctrl-6 = <&P8_44_pruout_pin>;
++ pinctrl-7 = <&P8_44_pruin_pin>;
++ };
++
++ /* P8_45 (ZCZ ball R1) hdmi */
++ P8_45_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_45_default_pin>;
++ pinctrl-1 = <&P8_45_gpio_pin>;
++ pinctrl-2 = <&P8_45_gpio_pu_pin>;
++ pinctrl-3 = <&P8_45_gpio_pd_pin>;
++ pinctrl-4 = <&P8_45_gpio_input_pin>;
++ pinctrl-5 = <&P8_45_pwm_pin>;
++ pinctrl-6 = <&P8_45_pruout_pin>;
++ pinctrl-7 = <&P8_45_pruin_pin>;
++ };
++
++ /* P8_46 (ZCZ ball R2) hdmi */
++ P8_46_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_46_default_pin>;
++ pinctrl-1 = <&P8_46_gpio_pin>;
++ pinctrl-2 = <&P8_46_gpio_pu_pin>;
++ pinctrl-3 = <&P8_46_gpio_pd_pin>;
++ pinctrl-4 = <&P8_46_gpio_input_pin>;
++ pinctrl-5 = <&P8_46_pwm_pin>;
++ pinctrl-6 = <&P8_46_pruout_pin>;
++ pinctrl-7 = <&P8_46_pruin_pin>;
++ };
++
++ /************************/
++ /* P9 Header */
++ /************************/
++
++ /* P9_01 GND */
++
++ /* P9_02 GND */
++
++ /* P9_03 3V3 */
++
++ /* P9_04 3V3 */
++
++ /* P9_05 VDD_5V */
++
++ /* P9_06 VDD_5V */
++
++ /* P9_07 SYS_5V */
++
++ /* P9_08 SYS_5V */
++
++ /* P9_09 PWR_BUT */
++
++ /* P9_10 RSTn */
++
++ /* P9_11 (ZCZ ball T17) */
++ P9_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
++ pinctrl-0 = <&P9_11_default_pin>;
++ pinctrl-1 = <&P9_11_gpio_pin>;
++ pinctrl-2 = <&P9_11_gpio_pu_pin>;
++ pinctrl-3 = <&P9_11_gpio_pd_pin>;
++ pinctrl-4 = <&P9_11_gpio_input_pin>;
++ pinctrl-5 = <&P9_11_uart_pin>;
++ };
++
++ /* P9_12 (ZCZ ball U18) */
++ P9_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P9_12_default_pin>;
++ pinctrl-1 = <&P9_12_gpio_pin>;
++ pinctrl-2 = <&P9_12_gpio_pu_pin>;
++ pinctrl-3 = <&P9_12_gpio_pd_pin>;
++ pinctrl-4 = <&P9_12_gpio_input_pin>;
++ };
++
++ /* P9_13 (ZCZ ball U17) */
++ P9_13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
++ pinctrl-0 = <&P9_13_default_pin>;
++ pinctrl-1 = <&P9_13_gpio_pin>;
++ pinctrl-2 = <&P9_13_gpio_pu_pin>;
++ pinctrl-3 = <&P9_13_gpio_pd_pin>;
++ pinctrl-4 = <&P9_13_gpio_input_pin>;
++ pinctrl-5 = <&P9_13_uart_pin>;
++ };
++
++ /* P9_14 (ZCZ ball U14) */
++ P9_14_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_14_default_pin>;
++ pinctrl-1 = <&P9_14_gpio_pin>;
++ pinctrl-2 = <&P9_14_gpio_pu_pin>;
++ pinctrl-3 = <&P9_14_gpio_pd_pin>;
++ pinctrl-4 = <&P9_14_gpio_input_pin>;
++ pinctrl-5 = <&P9_14_pwm_pin>;
++ };
++
++ /* P9_15 (ZCZ ball R13) */
++ P9_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_15_default_pin>;
++ pinctrl-1 = <&P9_15_gpio_pin>;
++ pinctrl-2 = <&P9_15_gpio_pu_pin>;
++ pinctrl-3 = <&P9_15_gpio_pd_pin>;
++ pinctrl-4 = <&P9_15_gpio_input_pin>;
++ pinctrl-5 = <&P9_15_pwm_pin>;
++ };
++
++ /* P9_16 (ZCZ ball T14) */
++ P9_16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_16_default_pin>;
++ pinctrl-1 = <&P9_16_gpio_pin>;
++ pinctrl-2 = <&P9_16_gpio_pu_pin>;
++ pinctrl-3 = <&P9_16_gpio_pd_pin>;
++ pinctrl-4 = <&P9_16_gpio_input_pin>;
++ pinctrl-5 = <&P9_16_pwm_pin>;
++ };
++
++ /* P9_17 (ZCZ ball A16) */
++ P9_17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_17_default_pin>;
++ pinctrl-1 = <&P9_17_gpio_pin>;
++ pinctrl-2 = <&P9_17_gpio_pu_pin>;
++ pinctrl-3 = <&P9_17_gpio_pd_pin>;
++ pinctrl-4 = <&P9_17_gpio_input_pin>;
++ pinctrl-5 = <&P9_17_spi_cs_pin>;
++ pinctrl-6 = <&P9_17_i2c_pin>;
++ pinctrl-7 = <&P9_17_pwm_pin>;
++ pinctrl-8 = <&P9_17_pru_uart_pin>;
++ };
++
++ /* P9_18 (ZCZ ball B16) */
++ P9_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_18_default_pin>;
++ pinctrl-1 = <&P9_18_gpio_pin>;
++ pinctrl-2 = <&P9_18_gpio_pu_pin>;
++ pinctrl-3 = <&P9_18_gpio_pd_pin>;
++ pinctrl-4 = <&P9_18_gpio_input_pin>;
++ pinctrl-5 = <&P9_18_spi_pin>;
++ pinctrl-6 = <&P9_18_i2c_pin>;
++ pinctrl-7 = <&P9_18_pwm_pin>;
++ pinctrl-8 = <&P9_18_pru_uart_pin>;
++ };
++
++ /* P9_19 (ZCZ ball D17) i2c */
++ P9_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
++ pinctrl-0 = <&P9_19_default_pin>;
++ pinctrl-1 = <&P9_19_gpio_pin>;
++ pinctrl-2 = <&P9_19_gpio_pu_pin>;
++ pinctrl-3 = <&P9_19_gpio_pd_pin>;
++ pinctrl-4 = <&P9_19_gpio_input_pin>;
++ pinctrl-5 = <&P9_19_spi_cs_pin>;
++ pinctrl-6 = <&P9_19_can_pin>;
++ pinctrl-7 = <&P9_19_i2c_pin>;
++ pinctrl-8 = <&P9_19_pru_uart_pin>;
++ pinctrl-9 = <&P9_19_timer_pin>;
++ };
++
++ /* P9_20 (ZCZ ball D18) i2c */
++ P9_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
++ pinctrl-0 = <&P9_20_default_pin>;
++ pinctrl-1 = <&P9_20_gpio_pin>;
++ pinctrl-2 = <&P9_20_gpio_pu_pin>;
++ pinctrl-3 = <&P9_20_gpio_pd_pin>;
++ pinctrl-4 = <&P9_20_gpio_input_pin>;
++ pinctrl-5 = <&P9_20_spi_cs_pin>;
++ pinctrl-6 = <&P9_20_can_pin>;
++ pinctrl-7 = <&P9_20_i2c_pin>;
++ pinctrl-8 = <&P9_20_pru_uart_pin>;
++ pinctrl-9 = <&P9_20_timer_pin>;
++ };
++
++ /* P9_21 (ZCZ ball B17) */
++ P9_21_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_21_default_pin>;
++ pinctrl-1 = <&P9_21_gpio_pin>;
++ pinctrl-2 = <&P9_21_gpio_pu_pin>;
++ pinctrl-3 = <&P9_21_gpio_pd_pin>;
++ pinctrl-4 = <&P9_21_gpio_input_pin>;
++ pinctrl-5 = <&P9_21_spi_pin>;
++ pinctrl-6 = <&P9_21_uart_pin>;
++ pinctrl-7 = <&P9_21_i2c_pin>;
++ pinctrl-8 = <&P9_21_pwm_pin>;
++ pinctrl-9 = <&P9_21_pru_uart_pin>;
++ };
++
++ /* P9_22 (ZCZ ball A17) */
++ P9_22_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_22_default_pin>;
++ pinctrl-1 = <&P9_22_gpio_pin>;
++ pinctrl-2 = <&P9_22_gpio_pu_pin>;
++ pinctrl-3 = <&P9_22_gpio_pd_pin>;
++ pinctrl-4 = <&P9_22_gpio_input_pin>;
++ pinctrl-5 = <&P9_22_spi_sclk_pin>;
++ pinctrl-6 = <&P9_22_uart_pin>;
++ pinctrl-7 = <&P9_22_i2c_pin>;
++ pinctrl-8 = <&P9_22_pwm_pin>;
++ pinctrl-9 = <&P9_22_pru_uart_pin>;
++ };
++
++ /* P9_23 (ZCZ ball V14) */
++ P9_23_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_23_default_pin>;
++ pinctrl-1 = <&P9_23_gpio_pin>;
++ pinctrl-2 = <&P9_23_gpio_pu_pin>;
++ pinctrl-3 = <&P9_23_gpio_pd_pin>;
++ pinctrl-4 = <&P9_23_gpio_input_pin>;
++ pinctrl-5 = <&P9_23_pwm_pin>;
++ };
++
++ /* P9_24 (ZCZ ball D15) */
++ P9_24_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
++ pinctrl-0 = <&P9_24_default_pin>;
++ pinctrl-1 = <&P9_24_gpio_pin>;
++ pinctrl-2 = <&P9_24_gpio_pu_pin>;
++ pinctrl-3 = <&P9_24_gpio_pd_pin>;
++ pinctrl-4 = <&P9_24_gpio_input_pin>;
++ pinctrl-5 = <&P9_24_uart_pin>;
++ pinctrl-6 = <&P9_24_can_pin>;
++ pinctrl-7 = <&P9_24_i2c_pin>;
++ pinctrl-8 = <&P9_24_pru_uart_pin>;
++ pinctrl-9 = <&P9_24_pruin_pin>;
++ };
++
++ /* P9_25 (ZCZ ball A14) audio */
++ P9_25_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_25_default_pin>;
++ pinctrl-1 = <&P9_25_gpio_pin>;
++ pinctrl-2 = <&P9_25_gpio_pu_pin>;
++ pinctrl-3 = <&P9_25_gpio_pd_pin>;
++ pinctrl-4 = <&P9_25_gpio_input_pin>;
++ pinctrl-5 = <&P9_25_qep_pin>;
++ pinctrl-6 = <&P9_25_pruout_pin>;
++ pinctrl-7 = <&P9_25_pruin_pin>;
++ };
++
++ /* P9_26 (ZCZ ball D16) */
++ P9_26_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
++ pinctrl-0 = <&P9_26_default_pin>;
++ pinctrl-1 = <&P9_26_gpio_pin>;
++ pinctrl-2 = <&P9_26_gpio_pu_pin>;
++ pinctrl-3 = <&P9_26_gpio_pd_pin>;
++ pinctrl-4 = <&P9_26_gpio_input_pin>;
++ pinctrl-5 = <&P9_26_uart_pin>;
++ pinctrl-6 = <&P9_26_can_pin>;
++ pinctrl-7 = <&P9_26_i2c_pin>;
++ pinctrl-8 = <&P9_26_pru_uart_pin>;
++ pinctrl-9 = <&P9_26_pruin_pin>;
++ };
++
++ /* P9_27 (ZCZ ball C13) */
++ P9_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_27_default_pin>;
++ pinctrl-1 = <&P9_27_gpio_pin>;
++ pinctrl-2 = <&P9_27_gpio_pu_pin>;
++ pinctrl-3 = <&P9_27_gpio_pd_pin>;
++ pinctrl-4 = <&P9_27_gpio_input_pin>;
++ pinctrl-5 = <&P9_27_qep_pin>;
++ pinctrl-6 = <&P9_27_pruout_pin>;
++ pinctrl-7 = <&P9_27_pruin_pin>;
++ };
++
++ /* P9_28 (ZCZ ball C12) audio */
++ P9_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pwm2", "pruout", "pruin";
++ pinctrl-0 = <&P9_28_default_pin>;
++ pinctrl-1 = <&P9_28_gpio_pin>;
++ pinctrl-2 = <&P9_28_gpio_pu_pin>;
++ pinctrl-3 = <&P9_28_gpio_pd_pin>;
++ pinctrl-4 = <&P9_28_gpio_input_pin>;
++ pinctrl-5 = <&P9_28_spi_cs_pin>;
++ pinctrl-6 = <&P9_28_pwm_pin>;
++ pinctrl-7 = <&P9_28_pwm2_pin>;
++ pinctrl-8 = <&P9_28_pruout_pin>;
++ pinctrl-9 = <&P9_28_pruin_pin>;
++ };
++
++ /* P9_29 (ZCZ ball B13) audio */
++ P9_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P9_29_default_pin>;
++ pinctrl-1 = <&P9_29_gpio_pin>;
++ pinctrl-2 = <&P9_29_gpio_pu_pin>;
++ pinctrl-3 = <&P9_29_gpio_pd_pin>;
++ pinctrl-4 = <&P9_29_gpio_input_pin>;
++ pinctrl-5 = <&P9_29_spi_pin>;
++ pinctrl-6 = <&P9_29_pwm_pin>;
++ pinctrl-7 = <&P9_29_pruout_pin>;
++ pinctrl-8 = <&P9_29_pruin_pin>;
++ };
++
++ /* P9_30 (ZCZ ball D12) */
++ P9_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P9_30_default_pin>;
++ pinctrl-1 = <&P9_30_gpio_pin>;
++ pinctrl-2 = <&P9_30_gpio_pu_pin>;
++ pinctrl-3 = <&P9_30_gpio_pd_pin>;
++ pinctrl-4 = <&P9_30_gpio_input_pin>;
++ pinctrl-5 = <&P9_30_spi_pin>;
++ pinctrl-6 = <&P9_30_pwm_pin>;
++ pinctrl-7 = <&P9_30_pruout_pin>;
++ pinctrl-8 = <&P9_30_pruin_pin>;
++ };
++
++ /* P9_31 (ZCZ ball A13) audio */
++ P9_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P9_31_default_pin>;
++ pinctrl-1 = <&P9_31_gpio_pin>;
++ pinctrl-2 = <&P9_31_gpio_pu_pin>;
++ pinctrl-3 = <&P9_31_gpio_pd_pin>;
++ pinctrl-4 = <&P9_31_gpio_input_pin>;
++ pinctrl-5 = <&P9_31_spi_sclk_pin>;
++ pinctrl-6 = <&P9_31_pwm_pin>;
++ pinctrl-7 = <&P9_31_pruout_pin>;
++ pinctrl-8 = <&P9_31_pruin_pin>;
++ };
++
++ /* P9_32 VADC */
++
++ /* P9_33 (ZCZ ball C8) AIN4 */
++
++ /* P9_34 AGND */
++
++ /* P9_35 (ZCZ ball A8) AIN6 */
++
++ /* P9_36 (ZCZ ball B8) AIN5 */
++
++ /* P9_37 (ZCZ ball B7) AIN2 */
++
++ /* P9_38 (ZCZ ball A7) AIN3 */
++
++ /* P9_39 (ZCZ ball B6) AIN0 */
++
++ /* P9_40 (ZCZ ball C7) AIN1 */
++
++ /* P9_41 (ZCZ ball D14) */
++ P9_41_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer", "pruin";
++ pinctrl-0 = <&P9_41_default_pin>;
++ pinctrl-1 = <&P9_41_gpio_pin>;
++ pinctrl-2 = <&P9_41_gpio_pu_pin>;
++ pinctrl-3 = <&P9_41_gpio_pd_pin>;
++ pinctrl-4 = <&P9_41_gpio_input_pin>;
++ pinctrl-5 = <&P9_41_timer_pin>;
++ pinctrl-6 = <&P9_41_pruin_pin>;
++ };
++
++ /* P9_41.1 */
++ /* P9_91 (ZCZ ball D13) */
++ P9_91_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_91_default_pin>;
++ pinctrl-1 = <&P9_91_gpio_pin>;
++ pinctrl-2 = <&P9_91_gpio_pu_pin>;
++ pinctrl-3 = <&P9_91_gpio_pd_pin>;
++ pinctrl-4 = <&P9_91_gpio_input_pin>;
++ pinctrl-5 = <&P9_91_qep_pin>;
++ pinctrl-6 = <&P9_91_pruout_pin>;
++ pinctrl-7 = <&P9_91_pruin_pin>;
++ };
++
++ /* P9_42 (ZCZ ball C18) */
++ P9_42_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
++ pinctrl-0 = <&P9_42_default_pin>;
++ pinctrl-1 = <&P9_42_gpio_pin>;
++ pinctrl-2 = <&P9_42_gpio_pu_pin>;
++ pinctrl-3 = <&P9_42_gpio_pd_pin>;
++ pinctrl-4 = <&P9_42_gpio_input_pin>;
++ pinctrl-5 = <&P9_42_spi_cs_pin>;
++ pinctrl-6 = <&P9_42_spi_sclk_pin>;
++ pinctrl-7 = <&P9_42_uart_pin>;
++ pinctrl-8 = <&P9_42_pwm_pin>;
++ pinctrl-9 = <&P9_42_pru_ecap_pin>;
++ };
++
++ /* P9_42.1 */
++ /* P9_92 (ZCZ ball B12) */
++ P9_92_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_92_default_pin>;
++ pinctrl-1 = <&P9_92_gpio_pin>;
++ pinctrl-2 = <&P9_92_gpio_pu_pin>;
++ pinctrl-3 = <&P9_92_gpio_pd_pin>;
++ pinctrl-4 = <&P9_92_gpio_input_pin>;
++ pinctrl-5 = <&P9_92_qep_pin>;
++ pinctrl-6 = <&P9_92_pruout_pin>;
++ pinctrl-7 = <&P9_92_pruin_pin>;
++ };
++
++ /* P9_43 GND */
++
++ /* P9_44 GND */
++
++ /* P9_45 GND */
++
++ /* P9_46 GND */
++
++ cape-universal {
++ compatible = "gpio-of-helper";
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ P8_03 {
++ gpio-name = "P8_03";
++ gpio = <&gpio1 6 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_04 {
++ gpio-name = "P8_04";
++ gpio = <&gpio1 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_05 {
++ gpio-name = "P8_05";
++ gpio = <&gpio1 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_06 {
++ gpio-name = "P8_06";
++ gpio = <&gpio1 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_07 {
++ gpio-name = "P8_07";
++ gpio = <&gpio2 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_08 {
++ gpio-name = "P8_08";
++ gpio = <&gpio2 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_09 {
++ gpio-name = "P8_09";
++ gpio = <&gpio2 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_10 {
++ gpio-name = "P8_10";
++ gpio = <&gpio2 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_11 {
++ gpio-name = "P8_11";
++ gpio = <&gpio1 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_12 {
++ gpio-name = "P8_12";
++ gpio = <&gpio1 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_13 {
++ gpio-name = "P8_13";
++ gpio = <&gpio0 23 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_14 {
++ gpio-name = "P8_14";
++ gpio = <&gpio0 26 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_15 {
++ gpio-name = "P8_15";
++ gpio = <&gpio1 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_16 {
++ gpio-name = "P8_16";
++ gpio = <&gpio1 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_17 {
++ gpio-name = "P8_17";
++ gpio = <&gpio0 27 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_18 {
++ gpio-name = "P8_18";
++ gpio = <&gpio2 1 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_19 {
++ gpio-name = "P8_19";
++ gpio = <&gpio0 22 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_20 {
++ gpio-name = "P8_20";
++ gpio = <&gpio1 31 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_21 {
++ gpio-name = "P8_21";
++ gpio = <&gpio1 30 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_22 {
++ gpio-name = "P8_22";
++ gpio = <&gpio1 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_23 {
++ gpio-name = "P8_23";
++ gpio = <&gpio1 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_24 {
++ gpio-name = "P8_24";
++ gpio = <&gpio1 1 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_25 {
++ gpio-name = "P8_25";
++ gpio = <&gpio1 0 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_26 {
++ gpio-name = "P8_26";
++ gpio = <&gpio1 29 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_27 {
++ gpio-name = "P8_27";
++ gpio = <&gpio2 22 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_28 {
++ gpio-name = "P8_28";
++ gpio = <&gpio2 24 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_29 {
++ gpio-name = "P8_29";
++ gpio = <&gpio2 23 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_30 {
++ gpio-name = "P8_30";
++ gpio = <&gpio2 25 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_31 {
++ gpio-name = "P8_31";
++ gpio = <&gpio0 10 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_32 {
++ gpio-name = "P8_32";
++ gpio = <&gpio0 11 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_33 {
++ gpio-name = "P8_33";
++ gpio = <&gpio0 9 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_34 {
++ gpio-name = "P8_34";
++ gpio = <&gpio2 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_35 {
++ gpio-name = "P8_35";
++ gpio = <&gpio0 8 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_36 {
++ gpio-name = "P8_36";
++ gpio = <&gpio2 16 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_37 {
++ gpio-name = "P8_37";
++ gpio = <&gpio2 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_38 {
++ gpio-name = "P8_38";
++ gpio = <&gpio2 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_39 {
++ gpio-name = "P8_39";
++ gpio = <&gpio2 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_40 {
++ gpio-name = "P8_40";
++ gpio = <&gpio2 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_41 {
++ gpio-name = "P8_41";
++ gpio = <&gpio2 10 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_42 {
++ gpio-name = "P8_42";
++ gpio = <&gpio2 11 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_43 {
++ gpio-name = "P8_43";
++ gpio = <&gpio2 8 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_44 {
++ gpio-name = "P8_44";
++ gpio = <&gpio2 9 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_45 {
++ gpio-name = "P8_45";
++ gpio = <&gpio2 6 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_46 {
++ gpio-name = "P8_46";
++ gpio = <&gpio2 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_11 {
++ gpio-name = "P9_11";
++ gpio = <&gpio0 30 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_12 {
++ gpio-name = "P9_12";
++ gpio = <&gpio1 28 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_13 {
++ gpio-name = "P9_13";
++ gpio = <&gpio0 31 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_14 {
++ gpio-name = "P9_14";
++ gpio = <&gpio1 18 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_15 {
++ gpio-name = "P9_15";
++ gpio = <&gpio1 16 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_16 {
++ gpio-name = "P9_16";
++ gpio = <&gpio1 19 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_17 {
++ gpio-name = "P9_17";
++ gpio = <&gpio0 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_18 {
++ gpio-name = "P9_18";
++ gpio = <&gpio0 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_19 {
++ gpio-name = "P9_19";
++ gpio = <&gpio0 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_20 {
++ gpio-name = "P9_20";
++ gpio = <&gpio0 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_21 {
++ gpio-name = "P9_21";
++ gpio = <&gpio0 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_22 {
++ gpio-name = "P9_22";
++ gpio = <&gpio0 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_23 {
++ gpio-name = "P9_23";
++ gpio = <&gpio1 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_24 {
++ gpio-name = "P9_24";
++ gpio = <&gpio0 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_25 {
++ gpio-name = "P9_25";
++ gpio = <&gpio3 21 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_26 {
++ gpio-name = "P9_26";
++ gpio = <&gpio0 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_27 {
++ gpio-name = "P9_27";
++ gpio = <&gpio3 19 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_28 {
++ gpio-name = "P9_28";
++ gpio = <&gpio3 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_29 {
++ gpio-name = "P9_29";
++ gpio = <&gpio3 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_30 {
++ gpio-name = "P9_30";
++ gpio = <&gpio3 16 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_31 {
++ gpio-name = "P9_31";
++ gpio = <&gpio3 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_41 {
++ gpio-name = "P9_41";
++ gpio = <&gpio0 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_91 {
++ gpio-name = "P9_91";
++ gpio = <&gpio3 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_42 {
++ gpio-name = "P9_42";
++ gpio = <&gpio0 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_92 {
++ gpio-name = "P9_92";
++ gpio = <&gpio3 18 0>;
++ input;
++ dir-changeable;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index 0ccdc7cd463b..22ee262a4c28 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -26,14 +26,14 @@ leds {
+ compatible = "gpio-leds";
+
+ led2 {
+- label = "beaglebone:green:heartbeat";
++ label = "beaglebone:green:usr0";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led3 {
+- label = "beaglebone:green:mmc0";
++ label = "beaglebone:green:usr1";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+@@ -63,9 +63,6 @@ vmmcsd_fixed: fixedregulator0 {
+ };
+
+ &am33xx_pinmux {
+- pinctrl-names = "default";
+- pinctrl-0 = <&clkout2_pin>;
+-
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
+@@ -96,12 +93,6 @@ AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ >;
+ };
+
+- clkout2_pin: pinmux_clkout2_pin {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
+- >;
+- };
+-
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+@@ -189,6 +180,7 @@ &uart0 {
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
++ symlink = "bone/uart/0";
+ };
+
+ &usb0 {
+@@ -207,6 +199,7 @@ &i2c0 {
+
+ status = "okay";
+ clock-frequency = <400000>;
++ symlink = "bone/i2c/0";
+
+ tps: tps@24 {
+ reg = <0x24>;
+@@ -230,6 +223,7 @@ &i2c2 {
+
+ status = "okay";
+ clock-frequency = <100000>;
++ symlink = "bone/i2c/2";
+
+ cape_eeprom0: cape_eeprom0@54 {
+ compatible = "atmel,24c256";
+@@ -404,3 +398,12 @@ &rtc {
+ &pruss_tm {
+ status = "okay";
+ };
++
++&tscadc {
++ adc {
++ ti,adc-channels = <0 1 2 3 4 5 6 7>;
++ ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
++ ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
++ ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bone-uboot-univ.dts b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
+new file mode 100644
+index 000000000000..ac9f257025c8
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
+@@ -0,0 +1,29 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++/dts-v1/;
++
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
++#include "am335x-bone-common-univ.dtsi"
++
++/ {
++ model = "TI AM335x BeagleBone";
++ compatible = "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-bone-uboot-univ.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++};
++
++&ldo3_reg {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++};
++
++&mmc1 {
++ vmmc-supply = <&ldo3_reg>;
++};
+diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
+index b5d85ef51a02..ea138cb34091 100644
+--- a/arch/arm/boot/dts/am335x-bone.dts
++++ b/arch/arm/boot/dts/am335x-bone.dts
+@@ -10,6 +10,11 @@
+ / {
+ model = "TI AM335x BeagleBone";
+ compatible = "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-bone.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &ldo3_reg {
+diff --git a/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
+new file mode 100644
+index 000000000000..8bf3f9d40f74
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
+@@ -0,0 +1,184 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++/dts-v1/;
++
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
++#include "am335x-bone-common-univ.dtsi"
++
++/ {
++ model = "TI AM335x BeagleBone Black";
++ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-boneblack-uboot-univ.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++};
++
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro-1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
++&ldo3_reg {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++};
++
++&mmc1 {
++ vmmc-supply = <&vmmcsd_fixed>;
++};
++
++&gpio0 {
++ gpio-line-names =
++ "[mdio_data]",
++ "[mdio_clk]",
++ "P9_22 [spi0_sclk]",
++ "P9_21 [spi0_d0]",
++ "P9_18 [spi0_d1]",
++ "P9_17 [spi0_cs0]",
++ "[mmc0_cd]",
++ "P8_42A [ecappwm0]",
++ "P8_35 [lcd d12]",
++ "P8_33 [lcd d13]",
++ "P8_31 [lcd d14]",
++ "P8_32 [lcd d15]",
++ "P9_20 [i2c2_sda]",
++ "P9_19 [i2c2_scl]",
++ "P9_26 [uart1_rxd]",
++ "P9_24 [uart1_txd]",
++ "[rmii1_txd3]",
++ "[rmii1_txd2]",
++ "[usb0_drvvbus]",
++ "[hdmi cec]",
++ "P9_41B",
++ "[rmii1_txd1]",
++ "P8_19 [ehrpwm2a]",
++ "P8_13 [ehrpwm2b]",
++ "NC",
++ "NC",
++ "P8_14",
++ "P8_17",
++ "[rmii1_txd0]",
++ "[rmii1_refclk]",
++ "P9_11 [uart4_rxd]",
++ "P9_13 [uart4_txd]";
++};
++
++&gpio1 {
++ gpio-line-names =
++ "P8_25 [mmc1_dat0]",
++ "[mmc1_dat1]",
++ "P8_5 [mmc1_dat2]",
++ "P8_6 [mmc1_dat3]",
++ "P8_23 [mmc1_dat4]",
++ "P8_22 [mmc1_dat5]",
++ "P8_3 [mmc1_dat6]",
++ "P8_4 [mmc1_dat7]",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "P8_12",
++ "P8_11",
++ "P8_16",
++ "P8_15",
++ "P9_15A",
++ "P9_23",
++ "P9_14 [ehrpwm1a]",
++ "P9_16 [ehrpwm1b]",
++ "[emmc rst]",
++ "[usr0 led]",
++ "[usr1 led]",
++ "[usr2 led]",
++ "[usr3 led]",
++ "[hdmi irq]",
++ "[usb vbus oc]",
++ "[hdmi audio]",
++ "P9_12",
++ "P8_26",
++ "P8_21 [emmc]",
++ "P8_20 [emmc]";
++};
++
++&gpio2 {
++ gpio-line-names =
++ "P9_15B",
++ "P8_18",
++ "P8_7",
++ "P8_8",
++ "P8_10",
++ "P8_9",
++ "P8_45 [hdmi]",
++ "P8_46 [hdmi]",
++ "P8_43 [hdmi]",
++ "P8_44 [hdmi]",
++ "P8_41 [hdmi]",
++ "P8_42 [hdmi]",
++ "P8_39 [hdmi]",
++ "P8_40 [hdmi]",
++ "P8_37 [hdmi]",
++ "P8_38 [hdmi]",
++ "P8_36 [hdmi]",
++ "P8_34 [hdmi]",
++ "[rmii1_rxd3]",
++ "[rmii1_rxd2]",
++ "[rmii1_rxd1]",
++ "[rmii1_rxd0]",
++ "P8_27 [hdmi]",
++ "P8_29 [hdmi]",
++ "P8_28 [hdmi]",
++ "P8_30 [hdmi]",
++ "[mmc0_dat3]",
++ "[mmc0_dat2]",
++ "[mmc0_dat1]",
++ "[mmc0_dat0]",
++ "[mmc0_clk]",
++ "[mmc0_cmd]";
++};
++
++&gpio3 {
++ gpio-line-names =
++ "[mii col]",
++ "[mii crs]",
++ "[mii rx err]",
++ "[mii tx en]",
++ "[mii rx dv]",
++ "[i2c0 sda]",
++ "[i2c0 scl]",
++ "[jtag emu0]",
++ "[jtag emu1]",
++ "[mii tx clk]",
++ "[mii rx clk]",
++ "NC",
++ "NC",
++ "[usb vbus en]",
++ "P9_31 [spi1_sclk]",
++ "P9_29 [spi1_d0]",
++ "P9_30 [spi1_d1]",
++ "P9_28 [spi1_cs0]",
++ "P9_42B [ecappwm0]",
++ "P9_27",
++ "P9_41A",
++ "P9_25",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC";
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-uboot.dts b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
+new file mode 100644
+index 000000000000..4226cc500569
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
+@@ -0,0 +1,193 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++/dts-v1/;
++
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
++#include "am335x-bbb-bone-buses.dtsi"
++
++/ {
++ model = "TI AM335x BeagleBone Black";
++ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-boneblack-uboot.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++
++ memory@80000000 {
++ device_type = "memory";
++ reg = <0x80000000 0x20000000>; /* 512 MB */
++ };
++};
++
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro-1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
++&ldo3_reg {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++};
++
++&mmc1 {
++ vmmc-supply = <&vmmcsd_fixed>;
++};
++
++&rtc {
++ system-power-controller;
++};
++
++&gpio0 {
++ gpio-line-names =
++ "[mdio_data]",
++ "[mdio_clk]",
++ "P9_22 [spi0_sclk]",
++ "P9_21 [spi0_d0]",
++ "P9_18 [spi0_d1]",
++ "P9_17 [spi0_cs0]",
++ "[mmc0_cd]",
++ "P8_42A [ecappwm0]",
++ "P8_35 [lcd d12]",
++ "P8_33 [lcd d13]",
++ "P8_31 [lcd d14]",
++ "P8_32 [lcd d15]",
++ "P9_20 [i2c2_sda]",
++ "P9_19 [i2c2_scl]",
++ "P9_26 [uart1_rxd]",
++ "P9_24 [uart1_txd]",
++ "[rmii1_txd3]",
++ "[rmii1_txd2]",
++ "[usb0_drvvbus]",
++ "[hdmi cec]",
++ "P9_41B",
++ "[rmii1_txd1]",
++ "P8_19 [ehrpwm2a]",
++ "P8_13 [ehrpwm2b]",
++ "NC",
++ "NC",
++ "P8_14",
++ "P8_17",
++ "[rmii1_txd0]",
++ "[rmii1_refclk]",
++ "P9_11 [uart4_rxd]",
++ "P9_13 [uart4_txd]";
++};
++
++&gpio1 {
++ gpio-line-names =
++ "P8_25 [mmc1_dat0]",
++ "[mmc1_dat1]",
++ "P8_5 [mmc1_dat2]",
++ "P8_6 [mmc1_dat3]",
++ "P8_23 [mmc1_dat4]",
++ "P8_22 [mmc1_dat5]",
++ "P8_3 [mmc1_dat6]",
++ "P8_4 [mmc1_dat7]",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "P8_12",
++ "P8_11",
++ "P8_16",
++ "P8_15",
++ "P9_15A",
++ "P9_23",
++ "P9_14 [ehrpwm1a]",
++ "P9_16 [ehrpwm1b]",
++ "[emmc rst]",
++ "[usr0 led]",
++ "[usr1 led]",
++ "[usr2 led]",
++ "[usr3 led]",
++ "[hdmi irq]",
++ "[usb vbus oc]",
++ "[hdmi audio]",
++ "P9_12",
++ "P8_26",
++ "P8_21 [emmc]",
++ "P8_20 [emmc]";
++};
++
++&gpio2 {
++ gpio-line-names =
++ "P9_15B",
++ "P8_18",
++ "P8_7",
++ "P8_8",
++ "P8_10",
++ "P8_9",
++ "P8_45 [hdmi]",
++ "P8_46 [hdmi]",
++ "P8_43 [hdmi]",
++ "P8_44 [hdmi]",
++ "P8_41 [hdmi]",
++ "P8_42 [hdmi]",
++ "P8_39 [hdmi]",
++ "P8_40 [hdmi]",
++ "P8_37 [hdmi]",
++ "P8_38 [hdmi]",
++ "P8_36 [hdmi]",
++ "P8_34 [hdmi]",
++ "[rmii1_rxd3]",
++ "[rmii1_rxd2]",
++ "[rmii1_rxd1]",
++ "[rmii1_rxd0]",
++ "P8_27 [hdmi]",
++ "P8_29 [hdmi]",
++ "P8_28 [hdmi]",
++ "P8_30 [hdmi]",
++ "[mmc0_dat3]",
++ "[mmc0_dat2]",
++ "[mmc0_dat1]",
++ "[mmc0_dat0]",
++ "[mmc0_clk]",
++ "[mmc0_cmd]";
++};
++
++&gpio3 {
++ gpio-line-names =
++ "[mii col]",
++ "[mii crs]",
++ "[mii rx err]",
++ "[mii tx en]",
++ "[mii rx dv]",
++ "[i2c0 sda]",
++ "[i2c0 scl]",
++ "[jtag emu0]",
++ "[jtag emu1]",
++ "[mii tx clk]",
++ "[mii rx clk]",
++ "NC",
++ "NC",
++ "[usb vbus en]",
++ "P9_31 [spi1_sclk]",
++ "P9_29 [spi1_d0]",
++ "P9_30 [spi1_d1]",
++ "P9_28 [spi1_cs0]",
++ "P9_42B [ecappwm0]",
++ "P9_27",
++ "P9_41A",
++ "P9_25",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC",
++ "NC";
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
+index c72b09ab8da0..cd7c22c66e12 100644
+--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts
++++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
+@@ -14,6 +14,11 @@ / {
+ model = "TI AM335x BeagleBone Black Wireless";
+ compatible = "ti,am335x-bone-black-wireless", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+
++ chosen {
++ base_dtb = "am335x-boneblack-wireless.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++
+ wlan_en_reg: fixedregulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 9312197316f0..2788ab042727 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -12,6 +12,11 @@
+ / {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-boneblack.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &cpu0_opp_table {
+diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
+index c6bb325ead33..97e53a3ff62f 100644
+--- a/arch/arm/boot/dts/am335x-boneblue.dts
++++ b/arch/arm/boot/dts/am335x-boneblue.dts
+@@ -14,6 +14,8 @@ / {
+
+ chosen {
+ stdout-path = &uart0;
++ base_dtb = "am335x-boneblue.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
+ };
+
+ leds {
+@@ -128,7 +130,6 @@ AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.g
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
+-
+ >;
+ };
+
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-common.dtsi b/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
+index 9f7fb63744d0..4c87de57d1a1 100644
+--- a/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
+@@ -34,6 +34,7 @@ &uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
++ symlink = "bone/uart/2";
+ };
+
+ &rtc {
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-gateway.dts b/arch/arm/boot/dts/am335x-bonegreen-gateway.dts
+new file mode 100644
+index 000000000000..cb80edee3394
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bonegreen-gateway.dts
+@@ -0,0 +1,248 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
++#include "am335x-bonegreen-common.dtsi"
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/ {
++ model = "SeeedStudio BeagleBone Green Gateway";
++ compatible = "ti,am335x-bone-green-gateway", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ aliases {
++ rtc0 = &extrtc;
++ rtc1 = &rtc;
++ };
++
++ chosen {
++ base_dtb = "am335x-bonegreen-gateway.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++
++ wlan_en_reg: fixedregulator@2 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ startup-delay-us= <70000>;
++
++ /* WL_EN */
++ gpio = <&gpio3 9 0>;
++ enable-active-high;
++ };
++
++ leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&user_leds_s0>;
++
++ compatible = "gpio-leds";
++
++ led2 {
++ label = "beaglebone:green:usr0";
++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++
++ led3 {
++ label = "beaglebone:green:usr1";
++ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc0";
++ default-state = "off";
++ };
++
++ led4 {
++ label = "beaglebone:green:usr2";
++ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "cpu0";
++ default-state = "off";
++ };
++
++ led5 {
++ label = "beaglebone:green:usr3";
++ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc1";
++ default-state = "off";
++ };
++
++ led6 {
++ label = "beaglebone:green:usr4";
++ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "netdev";
++ default-state = "off";
++ };
++ };
++};
++
++&cpu0_opp_table {
++ /*
++ * Octavo Systems:
++ * The EFUSE_SMA register is not programmed for any of the AM335x wafers
++ * we get and we are not programming them during our production test.
++ * Therefore, from a DEVICE_ID revision point of view, the silicon looks
++ * like it is Revision 2.1. However, from an EFUSE_SMA point of view for
++ * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
++ * EFUSE_SMA register reads as all zeros).
++ */
++ oppnitro-1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
++&am33xx_pinmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&usbhost_pins>;
++
++ user_leds_s0: user_leds_s0 {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* WL_Active_LED / USR4 */
++ >;
++ };
++
++ bt_pins: pinmux_bt_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */
++ >;
++ };
++
++ mmc3_pins: pinmux_mmc3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
++ >;
++ };
++
++ uart2_grove_pins: pinmux_uart2_grove_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6)
++ AM33XX_IOPAD(0x910, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6)
++ >;
++ };
++
++ uart3_pins: pinmux_uart3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */
++ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */
++ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */
++ >;
++ };
++
++ usbhost_pins: pinmux_usbhost_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd1.gpio0[21] */
++ >;
++ };
++
++ wl18xx_pins: pinmux_wl18xx_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */
++ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */
++ >;
++ };
++};
++
++&mac_sw {
++ status = "disabled";
++};
++
++&mmc3 {
++ dmas = <&edma_xbar 12 0 1
++ &edma_xbar 13 0 2>;
++ dma-names = "tx", "rx";
++ status = "okay";
++ vmmc-supply = <&wlan_en_reg>;
++ bus-width = <4>;
++ non-removable;
++ cap-power-off-card;
++ keep-power-in-suspend;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1835";
++ reg = <2>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <29 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart2_grove_pins>;
++ status = "okay";
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart3_pins &bt_pins>;
++ status = "okay";
++
++ bluetooth {
++ compatible = "ti,wl1835-st";
++ enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&i2c0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ extrtc: rtc@68 {
++ compatible = "dallas,ds1340";
++ reg = <0x68>;
++ };
++};
++
++// (K16) gmii1_txd1.gpio0[21]
++&gpio0 {
++ usb-reset-hog {
++ gpio-hog;
++ gpios = <21 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "usb_reset";
++ };
++};
++
++&gpio3 {
++ ls-buf-en-hog {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LS_BUF_EN";
++ };
++};
++
++&usb1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ hub@1 {
++ compatible = "usb424,9512";
++ reg = <1>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet: ethernet@1 {
++ compatible = "usb424,ec00";
++ reg = <1>;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
+new file mode 100644
+index 000000000000..725c9bcb37f2
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
+@@ -0,0 +1,2783 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++&am33xx_pinmux {
++ /************************/
++ /* P8 Header */
++ /************************/
++
++ /* P8_01 GND */
++
++ /* P8_02 GND */
++
++
++ /* P8_03 (ZCZ ball R9) emmc */
++ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++
++ /* P8_04 (ZCZ ball T9) emmc */
++ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
++
++ /* P8_05 (ZCZ ball R8) emmc */
++ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
++
++ /* P8_06 (ZCZ ball T8) emmc */
++ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
++
++ /* P8_07 (ZCZ ball R7) gpio2_2 */
++ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
++ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
++
++ /* P8_08 (ZCZ ball T7) gpio2_3 */
++ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
++ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
++
++ /* P8_09 (ZCZ ball T6) gpio2_5 */
++ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
++ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
++
++ /* P8_10 (ZCZ ball U6) gpio2_4 */
++ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
++ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
++
++ /* P8_11 (ZCZ ball R12) gpio1_13 */
++ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
++ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
++
++ /* P8_12 (ZCZ ball T12) gpio1_12 */
++ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
++ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
++
++ /* P8_13 (ZCZ ball T10) gpio0_23 */
++ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
++
++ /* P8_14 (ZCZ ball T11) wl1835: wl_en */
++
++ /* P8_15 (ZCZ ball U13) gpio1_15 */
++ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
++ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
++ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
++
++ /* P8_16 (ZCZ ball V13) gpio1_14 */
++ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
++ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
++
++ /* P8_17 (ZCZ ball U12) wl1835: wl_irq */
++
++ /* P8_18 (ZCZ ball V12) gpio2_1 */
++ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++
++ /* P8_19 (ZCZ ball U10) gpio0_22 */
++ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
++ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
++
++ /* P8_20 (ZCZ ball V9) emmc */
++ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
++ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
++ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
++
++ /* P8_21 (ZCZ ball U9) emmc */
++ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
++ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
++ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
++
++ /* P8_22 (ZCZ ball V8) emmc */
++ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
++
++ /* P8_23 (ZCZ ball U8) emmc */
++ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
++
++ /* P8_24 (ZCZ ball V7) emmc */
++ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
++
++ /* P8_25 (ZCZ ball U7) emmc */
++ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
++
++ /* P8_26 (ZCZ ball V6) gpio-hog wl1835 */
++
++ /* P8_27 (ZCZ ball U5) hdmi */
++ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
++ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
++
++ /* P8_28 (ZCZ ball V5) hdmi */
++ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
++ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
++
++ /* P8_29 (ZCZ ball R5) hdmi */
++ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
++ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
++
++ /* P8_30 (ZCZ ball R6) hdmi */
++ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
++ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
++
++ /* P8_31 (ZCZ ball V4) hdmi */
++ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
++ P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
++ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
++
++ /* P8_32 (ZCZ ball T5) hdmi */
++ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
++ P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
++
++ /* P8_33 (ZCZ ball V3) hdmi */
++ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
++ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
++
++ /* P8_34 (ZCZ ball U4) hdmi */
++ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
++ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
++
++ /* P8_35 (ZCZ ball V2) hdmi */
++ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
++ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
++
++ /* P8_36 (ZCZ ball U3) hdmi */
++ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
++ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
++
++ /* P8_37 (ZCZ ball U1) hdmi */
++ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
++ P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
++ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
++
++ /* P8_38 (ZCZ ball U2) hdmi */
++ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
++ P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
++ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
++
++ /* P8_39 (ZCZ ball T3) hdmi */
++ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
++ P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
++ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
++ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
++
++ /* P8_40 (ZCZ ball T4) hdmi */
++ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
++ P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
++ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
++ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
++
++ /* P8_41 (ZCZ ball T1) hdmi */
++ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
++ P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
++ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
++ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
++
++ /* P8_42 (ZCZ ball T2) hdmi */
++ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
++ P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
++ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
++ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
++
++ /* P8_43 (ZCZ ball R3) hdmi */
++ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
++ P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
++ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
++ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
++
++ /* P8_44 (ZCZ ball R4) hdmi */
++ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
++ P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
++ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
++ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
++
++ /* P8_45 (ZCZ ball R1) hdmi */
++ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
++ P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
++ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
++ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
++
++ /* P8_46 (ZCZ ball R2) hdmi */
++ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
++ P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
++ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
++ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
++
++ /************************/
++ /* P9 Header */
++ /************************/
++
++ /* P9_01 GND */
++
++ /* P9_02 GND */
++
++ /* P9_03 3V3 */
++
++ /* P9_04 3V3 */
++
++ /* P9_05 VDD_5V */
++
++ /* P9_06 VDD_5V */
++
++ /* P9_07 SYS_5V */
++
++ /* P9_08 SYS_5V */
++
++ /* P9_09 PWR_BUT */
++
++ /* P9_10 RSTn */
++
++ /* P9_11 (ZCZ ball T17) gpio0_30 */
++ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
++
++ /* P9_12 (ZCZ ball U18) gpio1_28 */
++ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++
++ /* P9_13 (ZCZ ball U17) gpio0_31 */
++ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
++
++ /* P9_14 (ZCZ ball U14) gpio1_18 */
++ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
++
++ /* P9_15 (ZCZ ball R13) gpio1_16 */
++ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
++ P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
++
++ /* P9_16 (ZCZ ball T14) gpio1_19 */
++ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
++ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
++
++ /* P9_17 (ZCZ ball A16) gpio0_5 */
++ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
++ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
++ P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
++ P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
++
++ /* P9_18 (ZCZ ball B16) gpio0_4 */
++ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
++ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
++ P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
++ P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
++
++ /* P9_19 (ZCZ ball D17) i2c2_scl */
++ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
++ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
++ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
++ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
++
++ /* P9_20 (ZCZ ball D18) i2c2_sda */
++ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
++ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
++ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
++ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
++
++ /* P9_21 (ZCZ ball B17) gpio0_3 */
++ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
++ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
++ P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
++ P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
++ P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
++
++ /* P9_22 (ZCZ ball A17) gpio0_2 */
++ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
++ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
++ P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
++ P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
++ P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
++
++ /* P9_23 (ZCZ ball V14) gpio1_17 */
++ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
++ P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
++
++ /* P9_24 (ZCZ ball D15) gpio0_15 */
++ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
++ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
++ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
++ P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
++ P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
++
++ /* P9_25 (ZCZ ball A14) audio */
++ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
++ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
++ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
++
++ /* P9_26 (ZCZ ball D16) gpio0_14 */
++ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
++ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
++ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
++ P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
++ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
++
++ /* P9_27 (ZCZ ball C13) gpio3_19 */
++ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
++ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
++ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
++
++ /* P9_28 (ZCZ ball C12) audio */
++ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
++ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
++ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
++ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
++ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
++
++ /* P9_29 (ZCZ ball B13) audio */
++ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
++ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
++ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
++ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
++
++ /* P9_30 (ZCZ ball D12) gpio-hog wl1835 */
++
++ /* P9_31 (ZCZ ball A13) audio */
++ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
++ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
++ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
++ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
++
++ /* P9_32 VADC */
++
++ /* P9_33 (ZCZ ball C8) AIN4 */
++
++ /* P9_34 AGND */
++
++ /* P9_35 (ZCZ ball A8) AIN6 */
++
++ /* P9_36 (ZCZ ball B8) AIN5 */
++
++ /* P9_37 (ZCZ ball B7) AIN2 */
++
++ /* P9_38 (ZCZ ball A7) AIN3 */
++
++ /* P9_39 (ZCZ ball B6) AIN0 */
++
++ /* P9_40 (ZCZ ball C7) AIN1 */
++
++ /* P9_41 (ZCZ ball D14) gpio0_20 */
++ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
++ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
++
++ /* P9_41.1 */
++ /* P9_91 (ZCZ ball D13) gpio3_20 */
++ P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
++ P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
++ P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
++
++ /* P9_42 (ZCZ ball C18) gpio0_7 */
++ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
++ P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
++ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
++ P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
++ P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
++
++ /* P9_42.1 */
++ /* P9_92 (ZCZ ball B12) gpio3_18 */
++ P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
++ P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
++ P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
++
++ /* P9_43 GND */
++
++ /* P9_44 GND */
++
++ /* P9_45 GND */
++
++ /* P9_46 GND */
++};
++
++&i2c1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ clock-frequency = <100000>;
++ symlink = "bone/i2c/1";
++};
++
++&i2c2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ clock-frequency = <100000>;
++ symlink = "bone/i2c/2";
++};
++
++&uart1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/1";
++};
++
++&uart2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/2";
++};
++
++&uart3 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/3";
++};
++
++&uart4 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/4";
++};
++
++&uart5 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/uart/5";
++};
++
++&dcan0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/can/0";
++};
++
++&dcan1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/can/1";
++};
++
++&eqep0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/eqep/0";
++};
++
++&eqep1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/eqep/1";
++};
++
++&eqep2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++ symlink = "bone/eqep/2";
++};
++
++&epwmss0 {
++ status = "okay";
++};
++
++&epwmss1 {
++ status = "okay";
++};
++
++&epwmss2 {
++ status = "okay";
++};
++
++&ehrpwm0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ehrpwm1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ehrpwm2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ecap0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ecap1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ecap2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&spi0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/0.0";
++
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/0.1";
++
++ reg = <1>;
++ spi-max-frequency = <16000000>;
++ };
++};
++
++&spi1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/1.0";
++
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/1.1";
++
++ reg = <1>;
++ spi-max-frequency = <16000000>;
++ };
++};
++
++/**********************************************************************/
++/* Pin Multiplex Helpers */
++/* */
++/* These provide userspace runtime pin configuration for the */
++/* BeagleBone cape expansion headers */
++/**********************************************************************/
++
++&ocp {
++ /************************/
++ /* P8 Header */
++ /************************/
++
++ /* P8_01 GND */
++
++ /* P8_02 GND */
++
++
++ /* P8_03 (ZCZ ball R9) emmc */
++ P8_03_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_03_default_pin>;
++ pinctrl-1 = <&P8_03_gpio_pin>;
++ pinctrl-2 = <&P8_03_gpio_pu_pin>;
++ pinctrl-3 = <&P8_03_gpio_pd_pin>;
++ pinctrl-4 = <&P8_03_gpio_input_pin>;
++ };
++
++ /* P8_04 (ZCZ ball T9) emmc */
++ P8_04_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_04_default_pin>;
++ pinctrl-1 = <&P8_04_gpio_pin>;
++ pinctrl-2 = <&P8_04_gpio_pu_pin>;
++ pinctrl-3 = <&P8_04_gpio_pd_pin>;
++ pinctrl-4 = <&P8_04_gpio_input_pin>;
++ };
++
++ /* P8_05 (ZCZ ball R8) emmc */
++ P8_05_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_05_default_pin>;
++ pinctrl-1 = <&P8_05_gpio_pin>;
++ pinctrl-2 = <&P8_05_gpio_pu_pin>;
++ pinctrl-3 = <&P8_05_gpio_pd_pin>;
++ pinctrl-4 = <&P8_05_gpio_input_pin>;
++ };
++
++ /* P8_06 (ZCZ ball T8) emmc */
++ P8_06_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_06_default_pin>;
++ pinctrl-1 = <&P8_06_gpio_pin>;
++ pinctrl-2 = <&P8_06_gpio_pu_pin>;
++ pinctrl-3 = <&P8_06_gpio_pd_pin>;
++ pinctrl-4 = <&P8_06_gpio_input_pin>;
++ };
++
++ /* P8_07 (ZCZ ball R7) */
++ P8_07_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_07_default_pin>;
++ pinctrl-1 = <&P8_07_gpio_pin>;
++ pinctrl-2 = <&P8_07_gpio_pu_pin>;
++ pinctrl-3 = <&P8_07_gpio_pd_pin>;
++ pinctrl-4 = <&P8_07_gpio_input_pin>;
++ pinctrl-5 = <&P8_07_timer_pin>;
++ };
++
++ /* P8_08 (ZCZ ball T7) */
++ P8_08_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_08_default_pin>;
++ pinctrl-1 = <&P8_08_gpio_pin>;
++ pinctrl-2 = <&P8_08_gpio_pu_pin>;
++ pinctrl-3 = <&P8_08_gpio_pd_pin>;
++ pinctrl-4 = <&P8_08_gpio_input_pin>;
++ pinctrl-5 = <&P8_08_timer_pin>;
++ };
++
++ /* P8_09 (ZCZ ball T6) */
++ P8_09_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_09_default_pin>;
++ pinctrl-1 = <&P8_09_gpio_pin>;
++ pinctrl-2 = <&P8_09_gpio_pu_pin>;
++ pinctrl-3 = <&P8_09_gpio_pd_pin>;
++ pinctrl-4 = <&P8_09_gpio_input_pin>;
++ pinctrl-5 = <&P8_09_timer_pin>;
++ };
++
++ /* P8_10 (ZCZ ball U6) */
++ P8_10_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
++ pinctrl-0 = <&P8_10_default_pin>;
++ pinctrl-1 = <&P8_10_gpio_pin>;
++ pinctrl-2 = <&P8_10_gpio_pu_pin>;
++ pinctrl-3 = <&P8_10_gpio_pd_pin>;
++ pinctrl-4 = <&P8_10_gpio_input_pin>;
++ pinctrl-5 = <&P8_10_timer_pin>;
++ };
++
++ /* P8_11 (ZCZ ball R12) */
++ P8_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
++ pinctrl-0 = <&P8_11_default_pin>;
++ pinctrl-1 = <&P8_11_gpio_pin>;
++ pinctrl-2 = <&P8_11_gpio_pu_pin>;
++ pinctrl-3 = <&P8_11_gpio_pd_pin>;
++ pinctrl-4 = <&P8_11_gpio_input_pin>;
++ pinctrl-5 = <&P8_11_qep_pin>;
++ pinctrl-6 = <&P8_11_pruout_pin>;
++ };
++
++ /* P8_12 (ZCZ ball T12) */
++ P8_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
++ pinctrl-0 = <&P8_12_default_pin>;
++ pinctrl-1 = <&P8_12_gpio_pin>;
++ pinctrl-2 = <&P8_12_gpio_pu_pin>;
++ pinctrl-3 = <&P8_12_gpio_pd_pin>;
++ pinctrl-4 = <&P8_12_gpio_input_pin>;
++ pinctrl-5 = <&P8_12_qep_pin>;
++ pinctrl-6 = <&P8_12_pruout_pin>;
++ };
++
++ /* P8_13 (ZCZ ball T10) */
++ P8_13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_13_default_pin>;
++ pinctrl-1 = <&P8_13_gpio_pin>;
++ pinctrl-2 = <&P8_13_gpio_pu_pin>;
++ pinctrl-3 = <&P8_13_gpio_pd_pin>;
++ pinctrl-4 = <&P8_13_gpio_input_pin>;
++ pinctrl-5 = <&P8_13_pwm_pin>;
++ };
++
++ /* P8_14 (ZCZ ball T11) wl1835: wl_en */
++
++ /* P8_15 (ZCZ ball U13) */
++ P8_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
++ pinctrl-0 = <&P8_15_default_pin>;
++ pinctrl-1 = <&P8_15_gpio_pin>;
++ pinctrl-2 = <&P8_15_gpio_pu_pin>;
++ pinctrl-3 = <&P8_15_gpio_pd_pin>;
++ pinctrl-4 = <&P8_15_gpio_input_pin>;
++ pinctrl-5 = <&P8_15_qep_pin>;
++ pinctrl-6 = <&P8_15_pru_ecap_pin>;
++ pinctrl-7 = <&P8_15_pruin_pin>;
++ };
++
++ /* P8_16 (ZCZ ball V13) */
++ P8_16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
++ pinctrl-0 = <&P8_16_default_pin>;
++ pinctrl-1 = <&P8_16_gpio_pin>;
++ pinctrl-2 = <&P8_16_gpio_pu_pin>;
++ pinctrl-3 = <&P8_16_gpio_pd_pin>;
++ pinctrl-4 = <&P8_16_gpio_input_pin>;
++ pinctrl-5 = <&P8_16_qep_pin>;
++ pinctrl-6 = <&P8_16_pruin_pin>;
++ };
++
++ /* P8_17 (ZCZ ball U12) wl1835: wl_irq */
++
++ /* P8_18 (ZCZ ball V12) */
++ P8_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_18_default_pin>;
++ pinctrl-1 = <&P8_18_gpio_pin>;
++ pinctrl-2 = <&P8_18_gpio_pu_pin>;
++ pinctrl-3 = <&P8_18_gpio_pd_pin>;
++ pinctrl-4 = <&P8_18_gpio_input_pin>;
++ };
++
++ /* P8_19 (ZCZ ball U10) */
++ P8_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_19_default_pin>;
++ pinctrl-1 = <&P8_19_gpio_pin>;
++ pinctrl-2 = <&P8_19_gpio_pu_pin>;
++ pinctrl-3 = <&P8_19_gpio_pd_pin>;
++ pinctrl-4 = <&P8_19_gpio_input_pin>;
++ pinctrl-5 = <&P8_19_pwm_pin>;
++ };
++
++ /* P8_20 (ZCZ ball V9) emmc */
++ P8_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_20_default_pin>;
++ pinctrl-1 = <&P8_20_gpio_pin>;
++ pinctrl-2 = <&P8_20_gpio_pu_pin>;
++ pinctrl-3 = <&P8_20_gpio_pd_pin>;
++ pinctrl-4 = <&P8_20_gpio_input_pin>;
++ pinctrl-5 = <&P8_20_pruout_pin>;
++ pinctrl-6 = <&P8_20_pruin_pin>;
++ };
++
++ /* P8_21 (ZCZ ball U9) emmc */
++ P8_21_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_21_default_pin>;
++ pinctrl-1 = <&P8_21_gpio_pin>;
++ pinctrl-2 = <&P8_21_gpio_pu_pin>;
++ pinctrl-3 = <&P8_21_gpio_pd_pin>;
++ pinctrl-4 = <&P8_21_gpio_input_pin>;
++ pinctrl-5 = <&P8_21_pruout_pin>;
++ pinctrl-6 = <&P8_21_pruin_pin>;
++ };
++
++ /* P8_22 (ZCZ ball V8) emmc */
++ P8_22_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_22_default_pin>;
++ pinctrl-1 = <&P8_22_gpio_pin>;
++ pinctrl-2 = <&P8_22_gpio_pu_pin>;
++ pinctrl-3 = <&P8_22_gpio_pd_pin>;
++ pinctrl-4 = <&P8_22_gpio_input_pin>;
++ };
++
++ /* P8_23 (ZCZ ball U8) emmc */
++ P8_23_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_23_default_pin>;
++ pinctrl-1 = <&P8_23_gpio_pin>;
++ pinctrl-2 = <&P8_23_gpio_pu_pin>;
++ pinctrl-3 = <&P8_23_gpio_pd_pin>;
++ pinctrl-4 = <&P8_23_gpio_input_pin>;
++ };
++
++ /* P8_24 (ZCZ ball V7) emmc */
++ P8_24_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_24_default_pin>;
++ pinctrl-1 = <&P8_24_gpio_pin>;
++ pinctrl-2 = <&P8_24_gpio_pu_pin>;
++ pinctrl-3 = <&P8_24_gpio_pd_pin>;
++ pinctrl-4 = <&P8_24_gpio_input_pin>;
++ };
++
++ /* P8_25 (ZCZ ball U7) emmc */
++ P8_25_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P8_25_default_pin>;
++ pinctrl-1 = <&P8_25_gpio_pin>;
++ pinctrl-2 = <&P8_25_gpio_pu_pin>;
++ pinctrl-3 = <&P8_25_gpio_pd_pin>;
++ pinctrl-4 = <&P8_25_gpio_input_pin>;
++ };
++
++ /* P8_26 (ZCZ ball V6) gpio-hog wl1835 */
++
++ /* P8_27 (ZCZ ball U5) hdmi */
++ P8_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_27_default_pin>;
++ pinctrl-1 = <&P8_27_gpio_pin>;
++ pinctrl-2 = <&P8_27_gpio_pu_pin>;
++ pinctrl-3 = <&P8_27_gpio_pd_pin>;
++ pinctrl-4 = <&P8_27_gpio_input_pin>;
++ pinctrl-5 = <&P8_27_pruout_pin>;
++ pinctrl-6 = <&P8_27_pruin_pin>;
++ };
++
++ /* P8_28 (ZCZ ball V5) hdmi */
++ P8_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_28_default_pin>;
++ pinctrl-1 = <&P8_28_gpio_pin>;
++ pinctrl-2 = <&P8_28_gpio_pu_pin>;
++ pinctrl-3 = <&P8_28_gpio_pd_pin>;
++ pinctrl-4 = <&P8_28_gpio_input_pin>;
++ pinctrl-5 = <&P8_28_pruout_pin>;
++ pinctrl-6 = <&P8_28_pruin_pin>;
++ };
++
++ /* P8_29 (ZCZ ball R5) hdmi */
++ P8_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_29_default_pin>;
++ pinctrl-1 = <&P8_29_gpio_pin>;
++ pinctrl-2 = <&P8_29_gpio_pu_pin>;
++ pinctrl-3 = <&P8_29_gpio_pd_pin>;
++ pinctrl-4 = <&P8_29_gpio_input_pin>;
++ pinctrl-5 = <&P8_29_pruout_pin>;
++ pinctrl-6 = <&P8_29_pruin_pin>;
++ };
++
++ /* P8_30 (ZCZ ball R6) hdmi */
++ P8_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P8_30_default_pin>;
++ pinctrl-1 = <&P8_30_gpio_pin>;
++ pinctrl-2 = <&P8_30_gpio_pu_pin>;
++ pinctrl-3 = <&P8_30_gpio_pd_pin>;
++ pinctrl-4 = <&P8_30_gpio_input_pin>;
++ pinctrl-5 = <&P8_30_pruout_pin>;
++ pinctrl-6 = <&P8_30_pruin_pin>;
++ };
++
++ /* P8_31 (ZCZ ball V4) hdmi */
++ P8_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "qep";
++ pinctrl-0 = <&P8_31_default_pin>;
++ pinctrl-1 = <&P8_31_gpio_pin>;
++ pinctrl-2 = <&P8_31_gpio_pu_pin>;
++ pinctrl-3 = <&P8_31_gpio_pd_pin>;
++ pinctrl-4 = <&P8_31_gpio_input_pin>;
++ pinctrl-5 = <&P8_31_uart_pin>;
++ pinctrl-6 = <&P8_31_qep_pin>;
++ };
++
++ /* P8_32 (ZCZ ball T5) hdmi */
++ P8_32_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P8_32_default_pin>;
++ pinctrl-1 = <&P8_32_gpio_pin>;
++ pinctrl-2 = <&P8_32_gpio_pu_pin>;
++ pinctrl-3 = <&P8_32_gpio_pd_pin>;
++ pinctrl-4 = <&P8_32_gpio_input_pin>;
++ pinctrl-5 = <&P8_32_qep_pin>;
++ };
++
++ /* P8_33 (ZCZ ball V3) hdmi */
++ P8_33_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P8_33_default_pin>;
++ pinctrl-1 = <&P8_33_gpio_pin>;
++ pinctrl-2 = <&P8_33_gpio_pu_pin>;
++ pinctrl-3 = <&P8_33_gpio_pd_pin>;
++ pinctrl-4 = <&P8_33_gpio_input_pin>;
++ pinctrl-5 = <&P8_33_qep_pin>;
++ };
++
++ /* P8_34 (ZCZ ball U4) hdmi */
++ P8_34_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_34_default_pin>;
++ pinctrl-1 = <&P8_34_gpio_pin>;
++ pinctrl-2 = <&P8_34_gpio_pu_pin>;
++ pinctrl-3 = <&P8_34_gpio_pd_pin>;
++ pinctrl-4 = <&P8_34_gpio_input_pin>;
++ pinctrl-5 = <&P8_34_pwm_pin>;
++ };
++
++ /* P8_35 (ZCZ ball V2) hdmi */
++ P8_35_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P8_35_default_pin>;
++ pinctrl-1 = <&P8_35_gpio_pin>;
++ pinctrl-2 = <&P8_35_gpio_pu_pin>;
++ pinctrl-3 = <&P8_35_gpio_pd_pin>;
++ pinctrl-4 = <&P8_35_gpio_input_pin>;
++ pinctrl-5 = <&P8_35_qep_pin>;
++ };
++
++ /* P8_36 (ZCZ ball U3) hdmi */
++ P8_36_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P8_36_default_pin>;
++ pinctrl-1 = <&P8_36_gpio_pin>;
++ pinctrl-2 = <&P8_36_gpio_pu_pin>;
++ pinctrl-3 = <&P8_36_gpio_pd_pin>;
++ pinctrl-4 = <&P8_36_gpio_input_pin>;
++ pinctrl-5 = <&P8_36_pwm_pin>;
++ };
++
++ /* P8_37 (ZCZ ball U1) hdmi */
++ P8_37_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
++ pinctrl-0 = <&P8_37_default_pin>;
++ pinctrl-1 = <&P8_37_gpio_pin>;
++ pinctrl-2 = <&P8_37_gpio_pu_pin>;
++ pinctrl-3 = <&P8_37_gpio_pd_pin>;
++ pinctrl-4 = <&P8_37_gpio_input_pin>;
++ pinctrl-5 = <&P8_37_uart_pin>;
++ pinctrl-6 = <&P8_37_pwm_pin>;
++ };
++
++ /* P8_38 (ZCZ ball U2) hdmi */
++ P8_38_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
++ pinctrl-0 = <&P8_38_default_pin>;
++ pinctrl-1 = <&P8_38_gpio_pin>;
++ pinctrl-2 = <&P8_38_gpio_pu_pin>;
++ pinctrl-3 = <&P8_38_gpio_pd_pin>;
++ pinctrl-4 = <&P8_38_gpio_input_pin>;
++ pinctrl-5 = <&P8_38_uart_pin>;
++ pinctrl-6 = <&P8_38_pwm_pin>;
++ };
++
++ /* P8_39 (ZCZ ball T3) hdmi */
++ P8_39_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_39_default_pin>;
++ pinctrl-1 = <&P8_39_gpio_pin>;
++ pinctrl-2 = <&P8_39_gpio_pu_pin>;
++ pinctrl-3 = <&P8_39_gpio_pd_pin>;
++ pinctrl-4 = <&P8_39_gpio_input_pin>;
++ pinctrl-5 = <&P8_39_qep_pin>;
++ pinctrl-6 = <&P8_39_pruout_pin>;
++ pinctrl-7 = <&P8_39_pruin_pin>;
++ };
++
++ /* P8_40 (ZCZ ball T4) hdmi */
++ P8_40_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_40_default_pin>;
++ pinctrl-1 = <&P8_40_gpio_pin>;
++ pinctrl-2 = <&P8_40_gpio_pu_pin>;
++ pinctrl-3 = <&P8_40_gpio_pd_pin>;
++ pinctrl-4 = <&P8_40_gpio_input_pin>;
++ pinctrl-5 = <&P8_40_qep_pin>;
++ pinctrl-6 = <&P8_40_pruout_pin>;
++ pinctrl-7 = <&P8_40_pruin_pin>;
++ };
++
++ /* P8_41 (ZCZ ball T1) hdmi */
++ P8_41_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_41_default_pin>;
++ pinctrl-1 = <&P8_41_gpio_pin>;
++ pinctrl-2 = <&P8_41_gpio_pu_pin>;
++ pinctrl-3 = <&P8_41_gpio_pd_pin>;
++ pinctrl-4 = <&P8_41_gpio_input_pin>;
++ pinctrl-5 = <&P8_41_qep_pin>;
++ pinctrl-6 = <&P8_41_pruout_pin>;
++ pinctrl-7 = <&P8_41_pruin_pin>;
++ };
++
++ /* P8_42 (ZCZ ball T2) hdmi */
++ P8_42_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P8_42_default_pin>;
++ pinctrl-1 = <&P8_42_gpio_pin>;
++ pinctrl-2 = <&P8_42_gpio_pu_pin>;
++ pinctrl-3 = <&P8_42_gpio_pd_pin>;
++ pinctrl-4 = <&P8_42_gpio_input_pin>;
++ pinctrl-5 = <&P8_42_qep_pin>;
++ pinctrl-6 = <&P8_42_pruout_pin>;
++ pinctrl-7 = <&P8_42_pruin_pin>;
++ };
++
++ /* P8_43 (ZCZ ball R3) hdmi */
++ P8_43_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_43_default_pin>;
++ pinctrl-1 = <&P8_43_gpio_pin>;
++ pinctrl-2 = <&P8_43_gpio_pu_pin>;
++ pinctrl-3 = <&P8_43_gpio_pd_pin>;
++ pinctrl-4 = <&P8_43_gpio_input_pin>;
++ pinctrl-5 = <&P8_43_pwm_pin>;
++ pinctrl-6 = <&P8_43_pruout_pin>;
++ pinctrl-7 = <&P8_43_pruin_pin>;
++ };
++
++ /* P8_44 (ZCZ ball R4) hdmi */
++ P8_44_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_44_default_pin>;
++ pinctrl-1 = <&P8_44_gpio_pin>;
++ pinctrl-2 = <&P8_44_gpio_pu_pin>;
++ pinctrl-3 = <&P8_44_gpio_pd_pin>;
++ pinctrl-4 = <&P8_44_gpio_input_pin>;
++ pinctrl-5 = <&P8_44_pwm_pin>;
++ pinctrl-6 = <&P8_44_pruout_pin>;
++ pinctrl-7 = <&P8_44_pruin_pin>;
++ };
++
++ /* P8_45 (ZCZ ball R1) hdmi */
++ P8_45_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_45_default_pin>;
++ pinctrl-1 = <&P8_45_gpio_pin>;
++ pinctrl-2 = <&P8_45_gpio_pu_pin>;
++ pinctrl-3 = <&P8_45_gpio_pd_pin>;
++ pinctrl-4 = <&P8_45_gpio_input_pin>;
++ pinctrl-5 = <&P8_45_pwm_pin>;
++ pinctrl-6 = <&P8_45_pruout_pin>;
++ pinctrl-7 = <&P8_45_pruin_pin>;
++ };
++
++ /* P8_46 (ZCZ ball R2) hdmi */
++ P8_46_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P8_46_default_pin>;
++ pinctrl-1 = <&P8_46_gpio_pin>;
++ pinctrl-2 = <&P8_46_gpio_pu_pin>;
++ pinctrl-3 = <&P8_46_gpio_pd_pin>;
++ pinctrl-4 = <&P8_46_gpio_input_pin>;
++ pinctrl-5 = <&P8_46_pwm_pin>;
++ pinctrl-6 = <&P8_46_pruout_pin>;
++ pinctrl-7 = <&P8_46_pruin_pin>;
++ };
++
++ /************************/
++ /* P9 Header */
++ /************************/
++
++ /* P9_01 GND */
++
++ /* P9_02 GND */
++
++ /* P9_03 3V3 */
++
++ /* P9_04 3V3 */
++
++ /* P9_05 VDD_5V */
++
++ /* P9_06 VDD_5V */
++
++ /* P9_07 SYS_5V */
++
++ /* P9_08 SYS_5V */
++
++ /* P9_09 PWR_BUT */
++
++ /* P9_10 RSTn */
++
++ /* P9_11 (ZCZ ball T17) */
++ P9_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
++ pinctrl-0 = <&P9_11_default_pin>;
++ pinctrl-1 = <&P9_11_gpio_pin>;
++ pinctrl-2 = <&P9_11_gpio_pu_pin>;
++ pinctrl-3 = <&P9_11_gpio_pd_pin>;
++ pinctrl-4 = <&P9_11_gpio_input_pin>;
++ pinctrl-5 = <&P9_11_uart_pin>;
++ };
++
++ /* P9_12 (ZCZ ball U18) */
++ P9_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P9_12_default_pin>;
++ pinctrl-1 = <&P9_12_gpio_pin>;
++ pinctrl-2 = <&P9_12_gpio_pu_pin>;
++ pinctrl-3 = <&P9_12_gpio_pd_pin>;
++ pinctrl-4 = <&P9_12_gpio_input_pin>;
++ };
++
++ /* P9_13 (ZCZ ball U17) */
++ P9_13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
++ pinctrl-0 = <&P9_13_default_pin>;
++ pinctrl-1 = <&P9_13_gpio_pin>;
++ pinctrl-2 = <&P9_13_gpio_pu_pin>;
++ pinctrl-3 = <&P9_13_gpio_pd_pin>;
++ pinctrl-4 = <&P9_13_gpio_input_pin>;
++ pinctrl-5 = <&P9_13_uart_pin>;
++ };
++
++ /* P9_14 (ZCZ ball U14) */
++ P9_14_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_14_default_pin>;
++ pinctrl-1 = <&P9_14_gpio_pin>;
++ pinctrl-2 = <&P9_14_gpio_pu_pin>;
++ pinctrl-3 = <&P9_14_gpio_pd_pin>;
++ pinctrl-4 = <&P9_14_gpio_input_pin>;
++ pinctrl-5 = <&P9_14_pwm_pin>;
++ };
++
++ /* P9_15 (ZCZ ball R13) */
++ P9_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_15_default_pin>;
++ pinctrl-1 = <&P9_15_gpio_pin>;
++ pinctrl-2 = <&P9_15_gpio_pu_pin>;
++ pinctrl-3 = <&P9_15_gpio_pd_pin>;
++ pinctrl-4 = <&P9_15_gpio_input_pin>;
++ pinctrl-5 = <&P9_15_pwm_pin>;
++ };
++
++ /* P9_16 (ZCZ ball T14) */
++ P9_16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_16_default_pin>;
++ pinctrl-1 = <&P9_16_gpio_pin>;
++ pinctrl-2 = <&P9_16_gpio_pu_pin>;
++ pinctrl-3 = <&P9_16_gpio_pd_pin>;
++ pinctrl-4 = <&P9_16_gpio_input_pin>;
++ pinctrl-5 = <&P9_16_pwm_pin>;
++ };
++
++ /* P9_17 (ZCZ ball A16) */
++ P9_17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_17_default_pin>;
++ pinctrl-1 = <&P9_17_gpio_pin>;
++ pinctrl-2 = <&P9_17_gpio_pu_pin>;
++ pinctrl-3 = <&P9_17_gpio_pd_pin>;
++ pinctrl-4 = <&P9_17_gpio_input_pin>;
++ pinctrl-5 = <&P9_17_spi_cs_pin>;
++ pinctrl-6 = <&P9_17_i2c_pin>;
++ pinctrl-7 = <&P9_17_pwm_pin>;
++ pinctrl-8 = <&P9_17_pru_uart_pin>;
++ };
++
++ /* P9_18 (ZCZ ball B16) */
++ P9_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_18_default_pin>;
++ pinctrl-1 = <&P9_18_gpio_pin>;
++ pinctrl-2 = <&P9_18_gpio_pu_pin>;
++ pinctrl-3 = <&P9_18_gpio_pd_pin>;
++ pinctrl-4 = <&P9_18_gpio_input_pin>;
++ pinctrl-5 = <&P9_18_spi_pin>;
++ pinctrl-6 = <&P9_18_i2c_pin>;
++ pinctrl-7 = <&P9_18_pwm_pin>;
++ pinctrl-8 = <&P9_18_pru_uart_pin>;
++ };
++
++ /* P9_19 (ZCZ ball D17) i2c */
++ P9_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
++ pinctrl-0 = <&P9_19_default_pin>;
++ pinctrl-1 = <&P9_19_gpio_pin>;
++ pinctrl-2 = <&P9_19_gpio_pu_pin>;
++ pinctrl-3 = <&P9_19_gpio_pd_pin>;
++ pinctrl-4 = <&P9_19_gpio_input_pin>;
++ pinctrl-5 = <&P9_19_spi_cs_pin>;
++ pinctrl-6 = <&P9_19_can_pin>;
++ pinctrl-7 = <&P9_19_i2c_pin>;
++ pinctrl-8 = <&P9_19_pru_uart_pin>;
++ pinctrl-9 = <&P9_19_timer_pin>;
++ };
++
++ /* P9_20 (ZCZ ball D18) i2c */
++ P9_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
++ pinctrl-0 = <&P9_20_default_pin>;
++ pinctrl-1 = <&P9_20_gpio_pin>;
++ pinctrl-2 = <&P9_20_gpio_pu_pin>;
++ pinctrl-3 = <&P9_20_gpio_pd_pin>;
++ pinctrl-4 = <&P9_20_gpio_input_pin>;
++ pinctrl-5 = <&P9_20_spi_cs_pin>;
++ pinctrl-6 = <&P9_20_can_pin>;
++ pinctrl-7 = <&P9_20_i2c_pin>;
++ pinctrl-8 = <&P9_20_pru_uart_pin>;
++ pinctrl-9 = <&P9_20_timer_pin>;
++ };
++
++ /* P9_21 (ZCZ ball B17) */
++ P9_21_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_21_default_pin>;
++ pinctrl-1 = <&P9_21_gpio_pin>;
++ pinctrl-2 = <&P9_21_gpio_pu_pin>;
++ pinctrl-3 = <&P9_21_gpio_pd_pin>;
++ pinctrl-4 = <&P9_21_gpio_input_pin>;
++ pinctrl-5 = <&P9_21_spi_pin>;
++ pinctrl-6 = <&P9_21_uart_pin>;
++ pinctrl-7 = <&P9_21_i2c_pin>;
++ pinctrl-8 = <&P9_21_pwm_pin>;
++ pinctrl-9 = <&P9_21_pru_uart_pin>;
++ };
++
++ /* P9_22 (ZCZ ball A17) */
++ P9_22_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P9_22_default_pin>;
++ pinctrl-1 = <&P9_22_gpio_pin>;
++ pinctrl-2 = <&P9_22_gpio_pu_pin>;
++ pinctrl-3 = <&P9_22_gpio_pd_pin>;
++ pinctrl-4 = <&P9_22_gpio_input_pin>;
++ pinctrl-5 = <&P9_22_spi_sclk_pin>;
++ pinctrl-6 = <&P9_22_uart_pin>;
++ pinctrl-7 = <&P9_22_i2c_pin>;
++ pinctrl-8 = <&P9_22_pwm_pin>;
++ pinctrl-9 = <&P9_22_pru_uart_pin>;
++ };
++
++ /* P9_23 (ZCZ ball V14) */
++ P9_23_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P9_23_default_pin>;
++ pinctrl-1 = <&P9_23_gpio_pin>;
++ pinctrl-2 = <&P9_23_gpio_pu_pin>;
++ pinctrl-3 = <&P9_23_gpio_pd_pin>;
++ pinctrl-4 = <&P9_23_gpio_input_pin>;
++ pinctrl-5 = <&P9_23_pwm_pin>;
++ };
++
++ /* P9_24 (ZCZ ball D15) */
++ P9_24_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
++ pinctrl-0 = <&P9_24_default_pin>;
++ pinctrl-1 = <&P9_24_gpio_pin>;
++ pinctrl-2 = <&P9_24_gpio_pu_pin>;
++ pinctrl-3 = <&P9_24_gpio_pd_pin>;
++ pinctrl-4 = <&P9_24_gpio_input_pin>;
++ pinctrl-5 = <&P9_24_uart_pin>;
++ pinctrl-6 = <&P9_24_can_pin>;
++ pinctrl-7 = <&P9_24_i2c_pin>;
++ pinctrl-8 = <&P9_24_pru_uart_pin>;
++ pinctrl-9 = <&P9_24_pruin_pin>;
++ };
++
++ /* P9_25 (ZCZ ball A14) audio */
++ P9_25_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_25_default_pin>;
++ pinctrl-1 = <&P9_25_gpio_pin>;
++ pinctrl-2 = <&P9_25_gpio_pu_pin>;
++ pinctrl-3 = <&P9_25_gpio_pd_pin>;
++ pinctrl-4 = <&P9_25_gpio_input_pin>;
++ pinctrl-5 = <&P9_25_qep_pin>;
++ pinctrl-6 = <&P9_25_pruout_pin>;
++ pinctrl-7 = <&P9_25_pruin_pin>;
++ };
++
++ /* P9_26 (ZCZ ball D16) */
++ P9_26_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
++ pinctrl-0 = <&P9_26_default_pin>;
++ pinctrl-1 = <&P9_26_gpio_pin>;
++ pinctrl-2 = <&P9_26_gpio_pu_pin>;
++ pinctrl-3 = <&P9_26_gpio_pd_pin>;
++ pinctrl-4 = <&P9_26_gpio_input_pin>;
++ pinctrl-5 = <&P9_26_uart_pin>;
++ pinctrl-6 = <&P9_26_can_pin>;
++ pinctrl-7 = <&P9_26_i2c_pin>;
++ pinctrl-8 = <&P9_26_pru_uart_pin>;
++ pinctrl-9 = <&P9_26_pruin_pin>;
++ };
++
++ /* P9_27 (ZCZ ball C13) */
++ P9_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_27_default_pin>;
++ pinctrl-1 = <&P9_27_gpio_pin>;
++ pinctrl-2 = <&P9_27_gpio_pu_pin>;
++ pinctrl-3 = <&P9_27_gpio_pd_pin>;
++ pinctrl-4 = <&P9_27_gpio_input_pin>;
++ pinctrl-5 = <&P9_27_qep_pin>;
++ pinctrl-6 = <&P9_27_pruout_pin>;
++ pinctrl-7 = <&P9_27_pruin_pin>;
++ };
++
++ /* P9_28 (ZCZ ball C12) audio */
++ P9_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pwm2", "pruout", "pruin";
++ pinctrl-0 = <&P9_28_default_pin>;
++ pinctrl-1 = <&P9_28_gpio_pin>;
++ pinctrl-2 = <&P9_28_gpio_pu_pin>;
++ pinctrl-3 = <&P9_28_gpio_pd_pin>;
++ pinctrl-4 = <&P9_28_gpio_input_pin>;
++ pinctrl-5 = <&P9_28_spi_cs_pin>;
++ pinctrl-6 = <&P9_28_pwm_pin>;
++ pinctrl-7 = <&P9_28_pwm2_pin>;
++ pinctrl-8 = <&P9_28_pruout_pin>;
++ pinctrl-9 = <&P9_28_pruin_pin>;
++ };
++
++ /* P9_29 (ZCZ ball B13) audio */
++ P9_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P9_29_default_pin>;
++ pinctrl-1 = <&P9_29_gpio_pin>;
++ pinctrl-2 = <&P9_29_gpio_pu_pin>;
++ pinctrl-3 = <&P9_29_gpio_pd_pin>;
++ pinctrl-4 = <&P9_29_gpio_input_pin>;
++ pinctrl-5 = <&P9_29_spi_pin>;
++ pinctrl-6 = <&P9_29_pwm_pin>;
++ pinctrl-7 = <&P9_29_pruout_pin>;
++ pinctrl-8 = <&P9_29_pruin_pin>;
++ };
++
++ /* P9_30 (ZCZ ball D12) gpio-hog wl1835 */
++
++ /* P9_31 (ZCZ ball A13) audio */
++ P9_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P9_31_default_pin>;
++ pinctrl-1 = <&P9_31_gpio_pin>;
++ pinctrl-2 = <&P9_31_gpio_pu_pin>;
++ pinctrl-3 = <&P9_31_gpio_pd_pin>;
++ pinctrl-4 = <&P9_31_gpio_input_pin>;
++ pinctrl-5 = <&P9_31_spi_sclk_pin>;
++ pinctrl-6 = <&P9_31_pwm_pin>;
++ pinctrl-7 = <&P9_31_pruout_pin>;
++ pinctrl-8 = <&P9_31_pruin_pin>;
++ };
++
++ /* P9_32 VADC */
++
++ /* P9_33 (ZCZ ball C8) AIN4 */
++
++ /* P9_34 AGND */
++
++ /* P9_35 (ZCZ ball A8) AIN6 */
++
++ /* P9_36 (ZCZ ball B8) AIN5 */
++
++ /* P9_37 (ZCZ ball B7) AIN2 */
++
++ /* P9_38 (ZCZ ball A7) AIN3 */
++
++ /* P9_39 (ZCZ ball B6) AIN0 */
++
++ /* P9_40 (ZCZ ball C7) AIN1 */
++
++ /* P9_41 (ZCZ ball D14) */
++ P9_41_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer", "pruin";
++ pinctrl-0 = <&P9_41_default_pin>;
++ pinctrl-1 = <&P9_41_gpio_pin>;
++ pinctrl-2 = <&P9_41_gpio_pu_pin>;
++ pinctrl-3 = <&P9_41_gpio_pd_pin>;
++ pinctrl-4 = <&P9_41_gpio_input_pin>;
++ pinctrl-5 = <&P9_41_timer_pin>;
++ pinctrl-6 = <&P9_41_pruin_pin>;
++ };
++
++ /* P9_41.1 */
++ /* P9_91 (ZCZ ball D13) */
++ P9_91_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_91_default_pin>;
++ pinctrl-1 = <&P9_91_gpio_pin>;
++ pinctrl-2 = <&P9_91_gpio_pu_pin>;
++ pinctrl-3 = <&P9_91_gpio_pd_pin>;
++ pinctrl-4 = <&P9_91_gpio_input_pin>;
++ pinctrl-5 = <&P9_91_qep_pin>;
++ pinctrl-6 = <&P9_91_pruout_pin>;
++ pinctrl-7 = <&P9_91_pruin_pin>;
++ };
++
++ /* P9_42 (ZCZ ball C18) */
++ P9_42_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
++ pinctrl-0 = <&P9_42_default_pin>;
++ pinctrl-1 = <&P9_42_gpio_pin>;
++ pinctrl-2 = <&P9_42_gpio_pu_pin>;
++ pinctrl-3 = <&P9_42_gpio_pd_pin>;
++ pinctrl-4 = <&P9_42_gpio_input_pin>;
++ pinctrl-5 = <&P9_42_spi_cs_pin>;
++ pinctrl-6 = <&P9_42_spi_sclk_pin>;
++ pinctrl-7 = <&P9_42_uart_pin>;
++ pinctrl-8 = <&P9_42_pwm_pin>;
++ pinctrl-9 = <&P9_42_pru_ecap_pin>;
++ };
++
++ /* P9_42.1 */
++ /* P9_92 (ZCZ ball B12) */
++ P9_92_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_92_default_pin>;
++ pinctrl-1 = <&P9_92_gpio_pin>;
++ pinctrl-2 = <&P9_92_gpio_pu_pin>;
++ pinctrl-3 = <&P9_92_gpio_pd_pin>;
++ pinctrl-4 = <&P9_92_gpio_input_pin>;
++ pinctrl-5 = <&P9_92_qep_pin>;
++ pinctrl-6 = <&P9_92_pruout_pin>;
++ pinctrl-7 = <&P9_92_pruin_pin>;
++ };
++
++ /* P9_43 GND */
++
++ /* P9_44 GND */
++
++ /* P9_45 GND */
++
++ /* P9_46 GND */
++
++ cape-universal {
++ compatible = "gpio-of-helper";
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ P8_03 {
++ gpio-name = "P8_03";
++ gpio = <&gpio1 6 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_04 {
++ gpio-name = "P8_04";
++ gpio = <&gpio1 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_05 {
++ gpio-name = "P8_05";
++ gpio = <&gpio1 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_06 {
++ gpio-name = "P8_06";
++ gpio = <&gpio1 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_07 {
++ gpio-name = "P8_07";
++ gpio = <&gpio2 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_08 {
++ gpio-name = "P8_08";
++ gpio = <&gpio2 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_09 {
++ gpio-name = "P8_09";
++ gpio = <&gpio2 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_10 {
++ gpio-name = "P8_10";
++ gpio = <&gpio2 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_11 {
++ gpio-name = "P8_11";
++ gpio = <&gpio1 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_12 {
++ gpio-name = "P8_12";
++ gpio = <&gpio1 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_13 {
++ gpio-name = "P8_13";
++ gpio = <&gpio0 23 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_15 {
++ gpio-name = "P8_15";
++ gpio = <&gpio1 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_16 {
++ gpio-name = "P8_16";
++ gpio = <&gpio1 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_18 {
++ gpio-name = "P8_18";
++ gpio = <&gpio2 1 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_19 {
++ gpio-name = "P8_19";
++ gpio = <&gpio0 22 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_20 {
++ gpio-name = "P8_20";
++ gpio = <&gpio1 31 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_21 {
++ gpio-name = "P8_21";
++ gpio = <&gpio1 30 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_22 {
++ gpio-name = "P8_22";
++ gpio = <&gpio1 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_23 {
++ gpio-name = "P8_23";
++ gpio = <&gpio1 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_24 {
++ gpio-name = "P8_24";
++ gpio = <&gpio1 1 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_25 {
++ gpio-name = "P8_25";
++ gpio = <&gpio1 0 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_27 {
++ gpio-name = "P8_27";
++ gpio = <&gpio2 22 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_28 {
++ gpio-name = "P8_28";
++ gpio = <&gpio2 24 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_29 {
++ gpio-name = "P8_29";
++ gpio = <&gpio2 23 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_30 {
++ gpio-name = "P8_30";
++ gpio = <&gpio2 25 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_31 {
++ gpio-name = "P8_31";
++ gpio = <&gpio0 10 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_32 {
++ gpio-name = "P8_32";
++ gpio = <&gpio0 11 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_33 {
++ gpio-name = "P8_33";
++ gpio = <&gpio0 9 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_34 {
++ gpio-name = "P8_34";
++ gpio = <&gpio2 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_35 {
++ gpio-name = "P8_35";
++ gpio = <&gpio0 8 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_36 {
++ gpio-name = "P8_36";
++ gpio = <&gpio2 16 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_37 {
++ gpio-name = "P8_37";
++ gpio = <&gpio2 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_38 {
++ gpio-name = "P8_38";
++ gpio = <&gpio2 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_39 {
++ gpio-name = "P8_39";
++ gpio = <&gpio2 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_40 {
++ gpio-name = "P8_40";
++ gpio = <&gpio2 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_41 {
++ gpio-name = "P8_41";
++ gpio = <&gpio2 10 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_42 {
++ gpio-name = "P8_42";
++ gpio = <&gpio2 11 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_43 {
++ gpio-name = "P8_43";
++ gpio = <&gpio2 8 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_44 {
++ gpio-name = "P8_44";
++ gpio = <&gpio2 9 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_45 {
++ gpio-name = "P8_45";
++ gpio = <&gpio2 6 0>;
++ input;
++ dir-changeable;
++ };
++
++ P8_46 {
++ gpio-name = "P8_46";
++ gpio = <&gpio2 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_11 {
++ gpio-name = "P9_11";
++ gpio = <&gpio0 30 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_12 {
++ gpio-name = "P9_12";
++ gpio = <&gpio1 28 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_13 {
++ gpio-name = "P9_13";
++ gpio = <&gpio0 31 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_14 {
++ gpio-name = "P9_14";
++ gpio = <&gpio1 18 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_15 {
++ gpio-name = "P9_15";
++ gpio = <&gpio1 16 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_16 {
++ gpio-name = "P9_16";
++ gpio = <&gpio1 19 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_17 {
++ gpio-name = "P9_17";
++ gpio = <&gpio0 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_18 {
++ gpio-name = "P9_18";
++ gpio = <&gpio0 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_19 {
++ gpio-name = "P9_19";
++ gpio = <&gpio0 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_20 {
++ gpio-name = "P9_20";
++ gpio = <&gpio0 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_21 {
++ gpio-name = "P9_21";
++ gpio = <&gpio0 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_22 {
++ gpio-name = "P9_22";
++ gpio = <&gpio0 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_23 {
++ gpio-name = "P9_23";
++ gpio = <&gpio1 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_24 {
++ gpio-name = "P9_24";
++ gpio = <&gpio0 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_25 {
++ gpio-name = "P9_25";
++ gpio = <&gpio3 21 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_26 {
++ gpio-name = "P9_26";
++ gpio = <&gpio0 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_27 {
++ gpio-name = "P9_27";
++ gpio = <&gpio3 19 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_28 {
++ gpio-name = "P9_28";
++ gpio = <&gpio3 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_29 {
++ gpio-name = "P9_29";
++ gpio = <&gpio3 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_31 {
++ gpio-name = "P9_31";
++ gpio = <&gpio3 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_41 {
++ gpio-name = "P9_41";
++ gpio = <&gpio0 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_91 {
++ gpio-name = "P9_91";
++ gpio = <&gpio3 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_42 {
++ gpio-name = "P9_42";
++ gpio = <&gpio0 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_92 {
++ gpio-name = "P9_92";
++ gpio = <&gpio3 18 0>;
++ input;
++ dir-changeable;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
+new file mode 100644
+index 000000000000..02fbbe9ece34
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
+@@ -0,0 +1,56 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++/dts-v1/;
++
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
++#include "am335x-bonegreen-wireless-common-univ.dtsi"
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/ {
++ model = "TI AM335x BeagleBone Green Wireless";
++ compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-bonegreen-wireless-uboot-univ.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++};
++
++&ldo3_reg {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++};
++
++&mmc1 {
++ vmmc-supply = <&vmmcsd_fixed>;
++};
++
++&gpio1 {
++ ls-buf-en-hog {
++ gpio-hog;
++ gpios = <29 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LS_BUF_EN";
++ };
++};
++
++/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/
++/* in case it isn't, wilink8 ends up in one of the test modes that */
++/* intruces various issues (elp wkaeup timeouts etc.) */
++/* On the BBGW this pin is routed through the level shifter (U21) that */
++/* introduces a pullup on the line and wilink8 ends up in a bad state. */
++/* use a gpio hog to force this pin low. An alternative may be adding */
++/* an external pulldown on U21 pin 4. */
++
++&gpio3 {
++ bt-aud-in-hog {
++ gpio-hog;
++ gpios = <16 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "MCASP0_AHCLKR";
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
+index 215f279e476b..0952a637bf5f 100644
+--- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
+@@ -13,6 +13,11 @@ / {
+ model = "TI AM335x BeagleBone Green Wireless";
+ compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+
++ chosen {
++ base_dtb = "am335x-bonegreen-wireless.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
++
+ wlan_en_reg: fixedregulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
+index 18cc0f49e999..62ca9c8764bd 100644
+--- a/arch/arm/boot/dts/am335x-bonegreen.dts
++++ b/arch/arm/boot/dts/am335x-bonegreen.dts
+@@ -11,4 +11,9 @@
+ / {
+ model = "TI AM335x BeagleBone Green";
+ compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-bonegreen.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+diff --git a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
+index 605b2a436edf..ea12398e951d 100644
+--- a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
++++ b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
+@@ -10,13 +10,16 @@
+
+ #include "am33xx.dtsi"
+ #include "am335x-osd335x-common.dtsi"
+-#include <dt-bindings/interrupt-controller/irq.h>
+-
+-#include <dt-bindings/display/tda998x.h>
++#include "am335x-boneblack-hdmi.dtsi"
+
+ / {
+ model = "Octavo Systems OSD3358-SM-RED";
+ compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-osd3358-sm-red.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &ldo3_reg {
+@@ -33,48 +36,7 @@ &mmc2 {
+ status = "okay";
+ };
+
+-&lcdc {
+- status = "okay";
+-
+- /* If you want to get 24 bit RGB and 16 BGR mode instead of
+- * current 16 bit RGB and 24 BGR modes, set the propety
+- * below to "crossed" and uncomment the video-ports -property
+- * in tda19988 node.
+- * AM335x errata for wiring:
+- * https://www.ti.com/lit/er/sprz360i/sprz360i.pdf
+- */
+-
+- blue-and-red-wiring = "straight";
+-
+- port {
+- lcdc_0: endpoint {
+- remote-endpoint = <&hdmi_0>;
+- };
+- };
+-};
+-
+ &i2c0 {
+- tda19988: hdmi-encoder@70 {
+- compatible = "nxp,tda998x";
+- reg = <0x70>;
+-
+- pinctrl-names = "default", "off";
+- pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+-
+- /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+- /* video-ports = <0x234501>; */
+-
+- #sound-dai-cells = <0>;
+- audio-ports = < TDA998x_I2S 0x03>;
+-
+- port {
+- hdmi_0: endpoint {
+- remote-endpoint = <&lcdc_0>;
+- };
+- };
+- };
+-
+ mpu9250: imu@68 {
+ compatible = "invensense,mpu6050";
+ reg = <0x68>;
+@@ -101,51 +63,7 @@ bmp280: pressure@76 {
+ };
+ };
+
+-&mcasp0 {
+- #sound-dai-cells = <0>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&mcasp0_pins>;
+- status = "okay";
+- op-mode = <0>; /* MCASP_IIS_MODE */
+- tdm-slots = <2>;
+- serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+- 0 0 1 0
+- >;
+- tx-num-evt = <32>;
+- rx-num-evt = <32>;
+-};
+-
+ / {
+- clk_mcasp0_fixed: clk-mcasp0-fixed {
+- #clock-cells = <0>;
+- compatible = "fixed-clock";
+- clock-frequency = <24576000>;
+- };
+-
+- clk_mcasp0: clk-mcasp0 {
+- #clock-cells = <0>;
+- compatible = "gpio-gate-clock";
+- clocks = <&clk_mcasp0_fixed>;
+- enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
+- };
+-
+- sound {
+- compatible = "simple-audio-card";
+- simple-audio-card,name = "TI BeagleBone Black";
+- simple-audio-card,format = "i2s";
+- simple-audio-card,bitclock-master = <&dailink0_master>;
+- simple-audio-card,frame-master = <&dailink0_master>;
+-
+- dailink0_master: simple-audio-card,cpu {
+- sound-dai = <&mcasp0>;
+- clocks = <&clk_mcasp0>;
+- };
+-
+- simple-audio-card,codec {
+- sound-dai = <&tda19988>;
+- };
+- };
+-
+ chosen {
+ stdout-path = &uart0;
+ };
+@@ -194,51 +112,6 @@ vmmcsd_fixed: fixedregulator0 {
+ };
+
+ &am33xx_pinmux {
+- pinctrl-names = "default";
+- pinctrl-0 = <&clkout2_pin>;
+-
+- nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+- >;
+- };
+-
+- nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
+- >;
+- };
+-
+- mcasp0_pins: mcasp0-pins {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
+- AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+- AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
+- >;
+- };
+-
+ flash_enable: flash-enable {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */
+@@ -280,12 +153,6 @@ AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ >;
+ };
+
+- clkout2_pin: pinmux-clkout2-pin {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
+- >;
+- };
+-
+ cpsw_default: cpsw-default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+@@ -372,6 +239,7 @@ &uart0 {
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
++ symlink = "bone/uart/0";
+ };
+
+ &usb0 {
+@@ -389,6 +257,7 @@ &i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ status = "okay";
+ clock-frequency = <100000>;
++ symlink = "bone/i2c/2";
+ };
+
+ &cpsw_port1 {
+diff --git a/arch/arm/boot/dts/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
+index 2888b15999ee..49ba87edadbb 100644
+--- a/arch/arm/boot/dts/am335x-osd335x-common.dtsi
++++ b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
+@@ -48,6 +48,7 @@ &i2c0 {
+
+ status = "okay";
+ clock-frequency = <400000>;
++ symlink = "bone/i2c/0";
+
+ tps: tps@24 {
+ reg = <0x24>;
+diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
+index 5e415d8ffdd8..6e4c2c7672d0 100644
+--- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
++++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
+@@ -15,6 +15,8 @@ / {
+
+ chosen {
+ stdout-path = &uart0;
++ base_dtb = "am335x-pocketbeagle.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
+ };
+
+ leds {
+@@ -205,130 +207,830 @@ &gpio3 {
+
+ &am33xx_pinmux {
+
+- compatible = "pinconf-single";
+- pinctrl-names = "default";
++/************************/
++ /* P1 Header */
++ /************************/
+
+- pinctrl-0 = < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
+- &P2_33_gpio &P2_22_gpio &P2_18_gpio &P2_10_gpio
+- &P2_06_gpio &P2_04_gpio &P2_02_gpio &P2_08_gpio
+- &P2_17_gpio >;
++ /* P1_01 VIN-AC */
+
+- /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
+- P2_03_gpio: pinmux_P2_03_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_02 (ZCZ ball R5) gpio2_23 */
++ P1_02_default_pin: pinmux_P1_02_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_pin: pinmux_P1_02_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_pu_pin: pinmux_P1_02_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_pd_pin: pinmux_P1_02_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_input_pin: pinmux_P1_02_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_pruout_pin: pinmux_P1_02_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
++ P1_02_pruin_pin: pinmux_P1_02_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+- /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
+- P1_34_gpio: pinmux_P1_34_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
+
+- /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
+- P2_19_gpio: pinmux_P2_19_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_04 (ZCZ ball R6) gpio2_25 */
++ P1_04_default_pin: pinmux_P1_04_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_pin: pinmux_P1_04_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_pu_pin: pinmux_P1_04_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_pd_pin: pinmux_P1_04_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_input_pin: pinmux_P1_04_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_pruout_pin: pinmux_P1_04_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
++ P1_04_pruin_pin: pinmux_P1_04_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+- /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */
+- P2_24_gpio: pinmux_P2_24_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
+
+- /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */
+- P2_33_gpio: pinmux_P2_33_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_06 (ZCZ ball A16) spi0_cs0 */
++ P1_06_default_pin: pinmux_P1_06_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
++ P1_06_gpio_pin: pinmux_P1_06_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_gpio_pu_pin: pinmux_P1_06_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_gpio_pd_pin: pinmux_P1_06_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_gpio_input_pin: pinmux_P1_06_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_spi_cs_pin: pinmux_P1_06_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
++ P1_06_i2c_pin: pinmux_P1_06_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
++ P1_06_pwm_pin: pinmux_P1_06_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
++ P1_06_pru_uart_pin: pinmux_P1_06_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+- /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */
+- P2_22_gpio: pinmux_P2_22_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_07 VIN-USB */
+
+- /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */
+- P2_18_gpio: pinmux_P2_18_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_08 (ZCZ ball A17) spi0_sclk */
++ P1_08_default_pin: pinmux_P1_08_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
++ P1_08_gpio_pin: pinmux_P1_08_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_gpio_pu_pin: pinmux_P1_08_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_gpio_pd_pin: pinmux_P1_08_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_gpio_input_pin: pinmux_P1_08_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_spi_sclk_pin: pinmux_P1_08_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
++ P1_08_uart_pin: pinmux_P1_08_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
++ P1_08_i2c_pin: pinmux_P1_08_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
++ P1_08_pwm_pin: pinmux_P1_08_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
++ P1_08_pru_uart_pin: pinmux_P1_08_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+- /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */
+- P2_10_gpio: pinmux_P2_10_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_09 (ZCZ ball R18) USB1-DN */
+
+- /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */
+- P2_06_gpio: pinmux_P2_06_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_10 (ZCZ ball B17) spi0_d0 */
++ P1_10_default_pin: pinmux_P1_10_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
++ P1_10_gpio_pin: pinmux_P1_10_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_gpio_pu_pin: pinmux_P1_10_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_gpio_pd_pin: pinmux_P1_10_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_gpio_input_pin: pinmux_P1_10_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_spi_pin: pinmux_P1_10_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
++ P1_10_uart_pin: pinmux_P1_10_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
++ P1_10_i2c_pin: pinmux_P1_10_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
++ P1_10_pwm_pin: pinmux_P1_10_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
++ P1_10_pru_uart_pin: pinmux_P1_10_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+- /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */
+- P2_04_gpio: pinmux_P2_04_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_11 (ZCZ ball R17) USB1-DP */
+
+- /* P2_02 (ZCZ ball V17) gpio1_27 0x86c PIN 27 */
+- P2_02_gpio: pinmux_P2_02_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_12 (ZCZ ball B16) spi0_d1 */
++ P1_12_default_pin: pinmux_P1_12_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
++ P1_12_gpio_pin: pinmux_P1_12_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_gpio_pu_pin: pinmux_P1_12_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_gpio_pd_pin: pinmux_P1_12_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_gpio_input_pin: pinmux_P1_12_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_spi_pin: pinmux_P1_12_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
++ P1_12_i2c_pin: pinmux_P1_12_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
++ P1_12_pwm_pin: pinmux_P1_12_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
++ P1_12_pru_uart_pin: pinmux_P1_12_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+- /* P2_08 (ZCZ ball U18) gpio1_28 0x878 PIN 30 */
+- P2_08_gpio: pinmux_P2_08_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x00 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x00 0x00 0x10 0x18>;
+- };
++ /* P1_13 (ZCZ ball P17) USB1-ID */
+
+- /* P2_17 (ZCZ ball V12) gpio2_1 0x88c PIN 35 */
+- P2_17_gpio: pinmux_P2_17_gpio {
+- pinctrl-single,pins = <
+- AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7)
+- >;
+- pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
+- pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
+- };
++ /* P1_14 VOUT-3.3V */
++
++ /* P1_15 GND */
++
++ /* P1_16 GND */
++
++ /* P1_17 (ZCZ ball A9) VREFN */
++
++ /* P1_18 (ZCZ ball B9) VREFP */
++
++ /* P1_19 (ZCZ ball B6) AIN0 */
++
++ /* P1_20 (ZCZ ball D14) gpio0_20 */
++ P1_20_default_pin: pinmux_P1_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_pin: pinmux_P1_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_pu_pin: pinmux_P1_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_pd_pin: pinmux_P1_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_input_pin: pinmux_P1_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_pruin_pin: pinmux_P1_20_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
++
++ /* P1_21 (ZCZ ball C7) AIN1 */
++
++ /* P1_22 GND */
++
++ /* P1_23 (ZCZ ball B7) AIN2 */
++
++ /* P1_24 VOUT-5V */
++
++ /* P1_25 (ZCZ ball A7) AIN3 */
++
++ /* P1_26 (ZCZ ball D18) i2c2_sda */
++ P1_26_default_pin: pinmux_P1_26_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P1_26_gpio_pin: pinmux_P1_26_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_gpio_pu_pin: pinmux_P1_26_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_gpio_pd_pin: pinmux_P1_26_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_gpio_input_pin: pinmux_P1_26_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_can_pin: pinmux_P1_26_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
++ P1_26_i2c_pin: pinmux_P1_26_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P1_26_spi_cs_pin: pinmux_P1_26_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
++ P1_26_pru_uart_pin: pinmux_P1_26_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
++
++ /* P1_27 (ZCZ ball C8) AIN4 */
++
++ /* P1_28 (ZCZ ball D17) i2c2_scl */
++ P1_28_default_pin: pinmux_P1_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P1_28_gpio_pin: pinmux_P1_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_gpio_pu_pin: pinmux_P1_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_gpio_pd_pin: pinmux_P1_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_gpio_input_pin: pinmux_P1_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_can_pin: pinmux_P1_28_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
++ P1_28_i2c_pin: pinmux_P1_28_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P1_28_spi_cs_pin: pinmux_P1_28_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
++ P1_28_pru_uart_pin: pinmux_P1_28_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
++
++ /* P1_29 (ZCZ ball A14) pru0_in7 */
++ P1_29_default_pin: pinmux_P1_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
++ P1_29_gpio_pin: pinmux_P1_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_gpio_pu_pin: pinmux_P1_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_gpio_pd_pin: pinmux_P1_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_gpio_input_pin: pinmux_P1_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_qep_pin: pinmux_P1_29_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
++ P1_29_pruout_pin: pinmux_P1_29_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
++ P1_29_pruin_pin: pinmux_P1_29_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
++
++ /* P1_30 (ZCZ ball E16) uart0_txd */
++ P1_30_default_pin: pinmux_P1_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
++ P1_30_gpio_pin: pinmux_P1_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_gpio_pu_pin: pinmux_P1_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_gpio_pd_pin: pinmux_P1_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_gpio_input_pin: pinmux_P1_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_uart_pin: pinmux_P1_30_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
++ P1_30_spi_cs_pin: pinmux_P1_30_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_txd.spi1_cs1 */
++ P1_30_can_pin: pinmux_P1_30_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_txd.dcan0_rx */
++ P1_30_i2c_pin: pinmux_P1_30_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_txd.i2c2_scl */
++ P1_30_pruout_pin: pinmux_P1_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_txd.pru1_out15 */
++ P1_30_pruin_pin: pinmux_P1_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE6) >; }; /* uart0_txd.pru1_in15 */
++
++ /* P1_31 (ZCZ ball B12) pru0_in4 */
++ P1_31_default_pin: pinmux_P1_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
++ P1_31_gpio_pin: pinmux_P1_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_gpio_pu_pin: pinmux_P1_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_gpio_pd_pin: pinmux_P1_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_gpio_input_pin: pinmux_P1_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_qep_pin: pinmux_P1_31_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
++ P1_31_pruout_pin: pinmux_P1_31_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
++ P1_31_pruin_pin: pinmux_P1_31_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
++
++ /* P1_32 (ZCZ ball E15) uart0_rxd */
++ P1_32_default_pin: pinmux_P1_32_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
++ P1_32_gpio_pin: pinmux_P1_32_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_gpio_pu_pin: pinmux_P1_32_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_gpio_pd_pin: pinmux_P1_32_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_gpio_input_pin: pinmux_P1_32_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_uart_pin: pinmux_P1_32_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
++ P1_32_spi_cs_pin: pinmux_P1_32_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rxd.spi1_cs0 */
++ P1_32_can_pin: pinmux_P1_32_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rxd.dcan0_tx */
++ P1_32_i2c_pin: pinmux_P1_32_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rxd.i2c2_sda */
++ P1_32_pruout_pin: pinmux_P1_32_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_rxd.pru1_out14 */
++ P1_32_pruin_pin: pinmux_P1_32_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE6) >; }; /* uart0_rxd.pru1_in14 */
++
++ /* P1_33 (ZCZ ball B13) pru0_in1 */
++ P1_33_default_pin: pinmux_P1_33_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
++ P1_33_gpio_pin: pinmux_P1_33_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_gpio_pu_pin: pinmux_P1_33_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_gpio_pd_pin: pinmux_P1_33_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_gpio_input_pin: pinmux_P1_33_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_pwm_pin: pinmux_P1_33_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
++ P1_33_spi_pin: pinmux_P1_33_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
++ P1_33_pruout_pin: pinmux_P1_33_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
++ P1_33_pruin_pin: pinmux_P1_33_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
++
++ /* P1_34 (ZCZ ball T11) gpio0_26 */
++ P1_34_default_pin: pinmux_P1_34_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_pin: pinmux_P1_34_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_pu_pin: pinmux_P1_34_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_pd_pin: pinmux_P1_34_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_input_pin: pinmux_P1_34_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_pwm_pin: pinmux_P1_34_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
++
++ /* P1_35 (ZCZ ball V5) pru1_in10 */
++ P1_35_default_pin: pinmux_P1_35_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
++ P1_35_gpio_pin: pinmux_P1_35_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_gpio_pu_pin: pinmux_P1_35_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_gpio_pd_pin: pinmux_P1_35_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_gpio_input_pin: pinmux_P1_35_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_pruout_pin: pinmux_P1_35_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
++ P1_35_pruin_pin: pinmux_P1_35_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
++
++ /* P1_36 (ZCZ ball A13) ehrpwm0a */
++ P1_36_default_pin: pinmux_P1_36_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
++ P1_36_gpio_pin: pinmux_P1_36_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_gpio_pu_pin: pinmux_P1_36_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_gpio_pd_pin: pinmux_P1_36_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_gpio_input_pin: pinmux_P1_36_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_pwm_pin: pinmux_P1_36_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
++ P1_36_spi_sclk_pin: pinmux_P1_36_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
++ P1_36_pruout_pin: pinmux_P1_36_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
++ P1_36_pruin_pin: pinmux_P1_36_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
++
++
++ /************************/
++ /* P2 Header */
++ /************************/
++
++ /* P2_01 (ZCZ ball U14) ehrpwm1a */
++ P2_01_default_pin: pinmux_P2_01_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
++ P2_01_gpio_pin: pinmux_P2_01_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_gpio_pu_pin: pinmux_P2_01_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_gpio_pd_pin: pinmux_P2_01_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_gpio_input_pin: pinmux_P2_01_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_pwm_pin: pinmux_P2_01_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
++
++ /* P2_02 (ZCZ ball V17) gpio1_27 */
++ P2_02_default_pin: pinmux_P2_02_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_pin: pinmux_P2_02_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_pu_pin: pinmux_P2_02_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_pd_pin: pinmux_P2_02_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_input_pin: pinmux_P2_02_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++
++ /* P2_03 (ZCZ ball T10) gpio0_23 */
++ P2_03_default_pin: pinmux_P2_03_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_pin: pinmux_P2_03_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_pu_pin: pinmux_P2_03_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_pd_pin: pinmux_P2_03_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_input_pin: pinmux_P2_03_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_pwm_pin: pinmux_P2_03_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
++
++ /* P2_04 (ZCZ ball T16) gpio1_26 */
++ P2_04_default_pin: pinmux_P2_04_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_pin: pinmux_P2_04_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_pu_pin: pinmux_P2_04_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_pd_pin: pinmux_P2_04_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_input_pin: pinmux_P2_04_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++
++ /* P2_05 (ZCZ ball T17) uart4_rxd */
++ P2_05_default_pin: pinmux_P2_05_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
++ P2_05_gpio_pin: pinmux_P2_05_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_gpio_pu_pin: pinmux_P2_05_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_gpio_pd_pin: pinmux_P2_05_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_gpio_input_pin: pinmux_P2_05_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_uart_pin: pinmux_P2_05_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
++
++ /* P2_06 (ZCZ ball U16) gpio1_25 */
++ P2_06_default_pin: pinmux_P2_06_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_pin: pinmux_P2_06_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_pu_pin: pinmux_P2_06_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_pd_pin: pinmux_P2_06_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_input_pin: pinmux_P2_06_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++
++ /* P2_07 (ZCZ ball U17) uart4_txd */
++ P2_07_default_pin: pinmux_P2_07_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
++ P2_07_gpio_pin: pinmux_P2_07_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_gpio_pu_pin: pinmux_P2_07_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_gpio_pd_pin: pinmux_P2_07_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_gpio_input_pin: pinmux_P2_07_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_uart_pin: pinmux_P2_07_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
++
++ /* P2_08 (ZCZ ball U18) gpio1_28 */
++ P2_08_default_pin: pinmux_P2_08_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_pin: pinmux_P2_08_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_pu_pin: pinmux_P2_08_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_pd_pin: pinmux_P2_08_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_input_pin: pinmux_P2_08_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++
++ /* P2_09 (ZCZ ball D15) i2c1_scl */
++ P2_09_default_pin: pinmux_P2_09_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
++ P2_09_gpio_pin: pinmux_P2_09_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_gpio_pu_pin: pinmux_P2_09_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_gpio_pd_pin: pinmux_P2_09_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_gpio_input_pin: pinmux_P2_09_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_uart_pin: pinmux_P2_09_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
++ P2_09_can_pin: pinmux_P2_09_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
++ P2_09_i2c_pin: pinmux_P2_09_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
++ P2_09_pru_uart_pin: pinmux_P2_09_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
++ P2_09_pruin_pin: pinmux_P2_09_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
++
++ /* P2_10 (ZCZ ball R14) gpio1_20 */
++ P2_10_default_pin: pinmux_P2_10_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_pin: pinmux_P2_10_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_pu_pin: pinmux_P2_10_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_pd_pin: pinmux_P2_10_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_input_pin: pinmux_P2_10_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_qep_pin: pinmux_P2_10_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a4.eqep1a_in */
++
++ /* P2_11 (ZCZ ball D16) i2c1_sda */
++ P2_11_default_pin: pinmux_P2_11_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
++ P2_11_gpio_pin: pinmux_P2_11_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_gpio_pu_pin: pinmux_P2_11_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_gpio_pd_pin: pinmux_P2_11_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_gpio_input_pin: pinmux_P2_11_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_uart_pin: pinmux_P2_11_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
++ P2_11_can_pin: pinmux_P2_11_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
++ P2_11_i2c_pin: pinmux_P2_11_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
++ P2_11_pru_uart_pin: pinmux_P2_11_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
++ P2_11_pruin_pin: pinmux_P2_11_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
++
++ /* P2_12 POWER_BUTTON */
++
++ /* P2_13 VOUT-5V */
++
++ /* P2_14 BAT-VIN */
++
++ /* P2_15 GND */
++
++ /* P2_16 BAT-TEMP */
++
++ /* P2_17 (ZCZ ball V12) gpio2_1 */
++ P2_17_default_pin: pinmux_P2_17_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_pin: pinmux_P2_17_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_pu_pin: pinmux_P2_17_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_pd_pin: pinmux_P2_17_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_input_pin: pinmux_P2_17_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++
++ /* P2_18 (ZCZ ball U13) gpio1_15 */
++ P2_18_default_pin: pinmux_P2_18_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_pin: pinmux_P2_18_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_pu_pin: pinmux_P2_18_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_pd_pin: pinmux_P2_18_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_input_pin: pinmux_P2_18_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_qep_pin: pinmux_P2_18_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
++ P2_18_pru_ecap_pin: pinmux_P2_18_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
++ P2_18_pruin_pin: pinmux_P2_18_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
++
++ /* P2_19 (ZCZ ball U12) gpio0_27 */
++ P2_19_default_pin: pinmux_P2_19_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_pin: pinmux_P2_19_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_pu_pin: pinmux_P2_19_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_pd_pin: pinmux_P2_19_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_input_pin: pinmux_P2_19_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_pwm_pin: pinmux_P2_19_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
++
++ /* P2_20 (ZCZ ball T13) gpio2_0 */
++ P2_20_default_pin: pinmux_P2_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_pin: pinmux_P2_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_pu_pin: pinmux_P2_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_pd_pin: pinmux_P2_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_input_pin: pinmux_P2_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++
++ /* P2_21 GND */
++
++ /* P2_22 (ZCZ ball V13) gpio1_14 */
++ P2_22_default_pin: pinmux_P2_22_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_pin: pinmux_P2_22_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_pu_pin: pinmux_P2_22_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_pd_pin: pinmux_P2_22_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_input_pin: pinmux_P2_22_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_qep_pin: pinmux_P2_22_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
++ P2_22_pruin_pin: pinmux_P2_22_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
++
++ /* P2_23 VOUT-3.3V */
++
++ /* P2_24 (ZCZ ball T12) gpio1_12 */
++ P2_24_default_pin: pinmux_P2_24_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_pin: pinmux_P2_24_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_pu_pin: pinmux_P2_24_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_pd_pin: pinmux_P2_24_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_input_pin: pinmux_P2_24_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_qep_pin: pinmux_P2_24_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
++ P2_24_pruout_pin: pinmux_P2_24_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
++
++ /* P2_25 (ZCZ ball E17) spi1_d1 */
++ P2_25_default_pin: pinmux_P2_25_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
++ P2_25_gpio_pin: pinmux_P2_25_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_gpio_pu_pin: pinmux_P2_25_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_gpio_pd_pin: pinmux_P2_25_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_gpio_input_pin: pinmux_P2_25_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_uart_pin: pinmux_P2_25_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rtsn.uart4_txd */
++ P2_25_can_pin: pinmux_P2_25_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rtsn.dcan1_rx */
++ P2_25_i2c_pin: pinmux_P2_25_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rtsn.i2c1_scl */
++ P2_25_spi_pin: pinmux_P2_25_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
++ P2_25_spi_cs_pin: pinmux_P2_25_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart0_rtsn.spi1_cs0 */
++
++ /* P2_26 RESET# */
++
++ /* P2_27 (ZCZ ball E18) spi1_d0 */
++ P2_27_default_pin: pinmux_P2_27_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
++ P2_27_gpio_pin: pinmux_P2_27_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_gpio_pu_pin: pinmux_P2_27_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_gpio_pd_pin: pinmux_P2_27_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_gpio_input_pin: pinmux_P2_27_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_INPUT | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_uart_pin: pinmux_P2_27_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_ctsn.uart4_rxd */
++ P2_27_can_pin: pinmux_P2_27_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_ctsn.dcan1_tx */
++ P2_27_i2c_pin: pinmux_P2_27_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_ctsn.i2c1_sda */
++ P2_27_spi_pin: pinmux_P2_27_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
++
++ /* P2_28 (ZCZ ball D13) pru0_in6 */
++ P2_28_default_pin: pinmux_P2_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
++ P2_28_gpio_pin: pinmux_P2_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_gpio_pu_pin: pinmux_P2_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_gpio_pd_pin: pinmux_P2_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_gpio_input_pin: pinmux_P2_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_qep_pin: pinmux_P2_28_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
++ P2_28_pruout_pin: pinmux_P2_28_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
++ P2_28_pruin_pin: pinmux_P2_28_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
++
++ /* P2_29 (ZCZ ball C18) spi1_sclk */
++ P2_29_default_pin: pinmux_P2_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
++ P2_29_gpio_pin: pinmux_P2_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_gpio_pu_pin: pinmux_P2_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_gpio_pd_pin: pinmux_P2_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_gpio_input_pin: pinmux_P2_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_pwm_pin: pinmux_P2_29_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
++ P2_29_uart_pin: pinmux_P2_29_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
++ P2_29_spi_cs_pin: pinmux_P2_29_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
++ P2_29_pru_ecap_pin: pinmux_P2_29_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
++ P2_29_spi_sclk_pin: pinmux_P2_29_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
++
++ /* P2_30 (ZCZ ball C12) pru0_in3 */
++ P2_30_default_pin: pinmux_P2_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
++ P2_30_gpio_pin: pinmux_P2_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_gpio_pu_pin: pinmux_P2_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_gpio_pd_pin: pinmux_P2_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_gpio_input_pin: pinmux_P2_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_pwm_pin: pinmux_P2_30_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
++ P2_30_spi_cs_pin: pinmux_P2_30_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
++ P2_30_pruout_pin: pinmux_P2_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
++ P2_30_pruin_pin: pinmux_P2_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
++
++ /* P2_31 (ZCZ ball A15) spi1_cs1 */
++ P2_31_default_pin: pinmux_P2_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
++ P2_31_gpio_pin: pinmux_P2_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_gpio_pu_pin: pinmux_P2_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_gpio_pd_pin: pinmux_P2_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_gpio_input_pin: pinmux_P2_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_spi_cs_pin: pinmux_P2_31_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
++ P2_31_pruin_pin: pinmux_P2_31_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr0.pru1_in16 */
++
++ /* P2_32 (ZCZ ball D12) pru0_in2 */
++ P2_32_default_pin: pinmux_P2_32_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
++ P2_32_gpio_pin: pinmux_P2_32_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_gpio_pu_pin: pinmux_P2_32_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_gpio_pd_pin: pinmux_P2_32_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_gpio_input_pin: pinmux_P2_32_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_pwm_pin: pinmux_P2_32_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
++ P2_32_spi_pin: pinmux_P2_32_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
++ P2_32_pruout_pin: pinmux_P2_32_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
++ P2_32_pruin_pin: pinmux_P2_32_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
++
++ /* P2_33 (ZCZ ball R12) gpio1_13 */
++ P2_33_default_pin: pinmux_P2_33_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_pin: pinmux_P2_33_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_pu_pin: pinmux_P2_33_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_pd_pin: pinmux_P2_33_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_input_pin: pinmux_P2_33_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_qep_pin: pinmux_P2_33_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
++ P2_33_pruout_pin: pinmux_P2_33_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
++
++ /* P2_34 (ZCZ ball C13) pru0_in5 */
++ P2_34_default_pin: pinmux_P2_34_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
++ P2_34_gpio_pin: pinmux_P2_34_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_gpio_pu_pin: pinmux_P2_34_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_gpio_pd_pin: pinmux_P2_34_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_gpio_input_pin: pinmux_P2_34_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_qep_pin: pinmux_P2_34_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
++ P2_34_pruout_pin: pinmux_P2_34_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
++ P2_34_pruin_pin: pinmux_P2_34_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
++
++ /* P2_35 (ZCZ ball U5) gpio2_22 */
++ P2_35_default_pin: pinmux_P2_35_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_pin: pinmux_P2_35_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_pu_pin: pinmux_P2_35_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_pd_pin: pinmux_P2_35_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_input_pin: pinmux_P2_35_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_pruout_pin: pinmux_P2_35_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
++ P2_35_pruin_pin: pinmux_P2_35_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ i2c2_pins: pinmux-i2c2-pins {
+ pinctrl-single,pins = <
+@@ -482,3 +1184,52 @@ &usb0 {
+ &usb1 {
+ dr_mode = "host";
+ };
++
++&spi0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "bone/spi/0.0";
++ reg = <0>;
++ spi-max-frequency = <24000000>;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "bone/spi/0.1";
++ reg = <1>;
++ spi-max-frequency = <24000000>;
++ status = "disabled";
++ };
++};
++
++&spi1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "bone/spi/1.0";
++ reg = <0>;
++ spi-max-frequency = <24000000>;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "bone/spi/1.1";
++ reg = <1>;
++ spi-max-frequency = <24000000>;
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts b/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
+index d6ef19311a91..5ba77a20f79f 100644
+--- a/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
++++ b/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
+@@ -16,6 +16,11 @@ / {
+ "ti,am335x-bone-black",
+ "ti,am335x-bone",
+ "ti,am33xx";
++
++ chosen {
+ base_dtb = "am335x-sancloud-bbe-lite.dts";
+ base_dtb_timestamp = __TIMESTAMP__;
+ };
- };
-
- &am33xx_pinmux {
-@@ -42,6 +47,7 @@ channel@0 {
- #size-cells = <0>;
-
- compatible = "micron,spi-authenta";
-+ symlink = "bone/spi/0.0";
-
- reg = <0>;
- spi-max-frequency = <16000000>;
-diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe.dts b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
-index efbe93135dbe..5df4fc464e45 100644
---- a/arch/arm/boot/dts/am335x-sancloud-bbe.dts
-+++ b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
-@@ -14,6 +14,11 @@
- / {
- model = "SanCloud BeagleBone Enhanced";
- compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+ };
+
+ &am33xx_pinmux {
+@@ -42,6 +47,7 @@ channel@0 {
+ #size-cells = <0>;
+
+ compatible = "micron,spi-authenta";
++ symlink = "bone/spi/0.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe.dts b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
+index efbe93135dbe..5df4fc464e45 100644
+--- a/arch/arm/boot/dts/am335x-sancloud-bbe.dts
++++ b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
+@@ -14,6 +14,11 @@
+ / {
+ model = "SanCloud BeagleBone Enhanced";
+ compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ chosen {
++ base_dtb = "am335x-sancloud-bbe.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &am33xx_pinmux {
+diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
+index c9629cb5ccd1..11fb7c5d44f7 100644
+--- a/arch/arm/boot/dts/am33xx-l4.dtsi
++++ b/arch/arm/boot/dts/am33xx-l4.dtsi
+@@ -300,7 +300,7 @@ scm: scm@0 {
+ am33xx_pinmux: pinmux@800 {
+ compatible = "pinctrl-single";
+ reg = <0x800 0x238>;
+- #pinctrl-cells = <2>;
++ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x7f>;
+ };
+@@ -852,7 +852,7 @@ pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x300000 0x80000>;
+- status = "disabled";
++ status = "okay";
+
+ pruss: pruss@0 {
+ compatible = "ti,am3356-pruss";
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index f6ec85d58dd1..ba7ebd5ee910 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -633,6 +633,13 @@ target-module@56000000 {
+ * Closed source PowerVR driver, no child device
+ * binding or driver in mainline
+ */
++ gpu: gpu@0 {
++ compatible = "ti,am3352-sgx530", "img,sgx530";
++ reg = <0x0 0x10000>;
++ interrupts = <37>;
++ clocks = <&gfx_fck_div_ck>;
++ clock-names = "fclk";
++ };
+ };
+ };
+ };
+diff --git a/arch/arm/boot/dts/am5729-beagleboneai.dts b/arch/arm/boot/dts/am5729-beagleboneai.dts
+index 149cfafb90bf..630107b270e7 100644
+--- a/arch/arm/boot/dts/am5729-beagleboneai.dts
++++ b/arch/arm/boot/dts/am5729-beagleboneai.dts
+@@ -26,6 +26,8 @@ aliases {
+
+ chosen {
+ stdout-path = &uart1;
++ base_dtb = "am5729-beagleboneai.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
+ };
+
+ memory@0 {
+@@ -204,6 +206,7 @@ extcon_usb1: extcon_usb1 {
+ &i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
++ symlink = "bone/i2c/0";
+
+ tps659038: tps659038@58 {
+ compatible = "ti,tps659038";
+@@ -486,6 +489,7 @@ &cpu0 {
+
+ &uart1 {
+ status = "okay";
++ symlink = "bone/uart/0";
+ };
+
+ &davinci_mdio_sw {
+@@ -675,6 +679,7 @@ &uart6 {
+ &i2c4 {
+ status = "okay";
+ clock-frequency = <100000>;
++ symlink = "bone/i2c/2";
+ };
+
+ &cpu0_opp_table {
+diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
+index 83e174e053c7..0ba920286dfb 100644
+--- a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
++++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
+@@ -7,6 +7,11 @@
+
+ / {
+ model = "TI AM5728 BeagleBoard-X15 rev B1";
++
++ chosen {
++ base_dtb = "am57xx-beagle-x15-revb1.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &tpd12s015 {
+diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts
+index 656dd84460d2..9c721c0308f3 100644
+--- a/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts
++++ b/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts
+@@ -7,6 +7,11 @@
+
+ / {
+ model = "TI AM5728 BeagleBoard-X15 rev C";
++
++ chosen {
++ base_dtb = "am57xx-beagle-x15-revc.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &tpd12s015 {
+diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
+index 0a8b16505ed9..028928f8d43e 100644
+--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
++++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
+@@ -8,6 +8,11 @@
+ / {
+ /* NOTE: This describes the "original" pre-production A2 revision */
+ model = "TI AM5728 BeagleBoard-X15";
++
++ chosen {
++ base_dtb = "am57xx-beagle-x15.dts";
++ base_dtb_timestamp = __TIMESTAMP__;
++ };
+ };
+
+ &tpd12s015 {
+diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
+index 6b485cbed8d5..e322709ff046 100644
+--- a/arch/arm/boot/dts/dra7.dtsi
++++ b/arch/arm/boot/dts/dra7.dtsi
+@@ -853,6 +853,22 @@ target-module@56000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x56000000 0x2000000>;
++
++ /*
++ * Closed source PowerVR driver, no child device
++ * binding or driver in mainline
++ */
++ gpu: gpu@0 {
++ compatible = "ti,dra7-sgx544", "img,sgx544";
++ reg = <0x0 0x10000>;
++ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&l3_iclk_div>,
++ <&gpu_core_gclk_mux>,
++ <&gpu_hyd_gclk_mux>;
++ clock-names = "iclk",
++ "fclk1",
++ "fclk2";
++ };
+ };
+
+ crossbar_mpu: crossbar@4a002a48 {
+diff --git a/arch/arm/boot/dts/omap3-cpu-thermal.dtsi b/arch/arm/boot/dts/omap3-cpu-thermal.dtsi
+index a9069cca5888..1ed837859374 100644
+--- a/arch/arm/boot/dts/omap3-cpu-thermal.dtsi
++++ b/arch/arm/boot/dts/omap3-cpu-thermal.dtsi
+@@ -10,7 +10,7 @@
+
+ #include <dt-bindings/thermal/thermal.h>
+
+-cpu_thermal: cpu-thermal {
++cpu_thermal: cpu_thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ coefficients = <0 20000>;
+diff --git a/arch/arm/boot/dts/overlays/BB-ADC-00A0.dts b/arch/arm/boot/dts/overlays/BB-ADC-00A0.dts
+new file mode 100644
+index 000000000000..302db25cc3b4
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-ADC-00A0.dts
+@@ -0,0 +1,26 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-ADC-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++&tscadc {
++ status = "okay";
++ adc {
++ ti,adc-channels = <0 1 2 3 4 5 6 7>;
++ ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
++ ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
++ ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BBBW-WL1835-00A0.dts b/arch/arm/boot/dts/overlays/BB-BBBW-WL1835-00A0.dts
+new file mode 100644
+index 000000000000..1f09a3999bfa
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BBBW-WL1835-00A0.dts
+@@ -0,0 +1,120 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BBBW-WL1835-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++&{/} {
++ model = "TI AM335x BeagleBone Black Wireless";
++ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ wlan_en_reg: fixedregulator@2 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ startup-delay-us= <70000>;
++
++ /* WL_EN */
++ gpio = <&gpio3 9 0>;
++ enable-active-high;
++ };
++};
++
++&am33xx_pinmux {
++ bt_pins: pinmux_bt_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */
++ >;
++ };
++
++ mmc3_pins: pinmux_mmc3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
++ >;
++ };
++
++ uart3_pins: pinmux_uart3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */
++ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */
++ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */
++ >;
++ };
++
++ wl18xx_pins: pinmux_wl18xx_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */
++ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */
++ >;
++ };
++};
++
++&mac {
++ status = "disabled";
++};
++
++&mmc3 {
++ dmas = <&edma_xbar 12 0 1
++ &edma_xbar 13 0 2>;
++ dma-names = "tx", "rx";
++ status = "okay";
++ vmmc-supply = <&wlan_en_reg>;
++ bus-width = <4>;
++ non-removable;
++ cap-power-off-card;
++ keep-power-in-suspend;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1835";
++ reg = <2>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <29 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart3_pins &bt_pins>;
++ status = "okay";
++
++ bluetooth {
++ compatible = "ti,wl1835-st";
++ enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&gpio3 {
++ ls-buf-en-hog {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LS_BUF_EN";
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BBGG-WL1835-00A0.dts b/arch/arm/boot/dts/overlays/BB-BBGG-WL1835-00A0.dts
+new file mode 100644
+index 000000000000..c212470bcdd9
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BBGG-WL1835-00A0.dts
+@@ -0,0 +1,237 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BBGG-WL1835-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++&{/} {
++ model = "SeeedStudio BeagleBone Green Gateway";
++ compatible = "ti,am335x-bone-green-gateway", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++
++ aliases {
++ rtc0 = &extrtc;
++ rtc1 = "/ocp/rtc@44e3e000";
++ };
++
++ wlan_en_reg: fixedregulator@2 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ startup-delay-us= <70000>;
++
++ /* WL_EN */
++ gpio = <&gpio3 9 0>;
++ enable-active-high;
++ };
++
++ leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&user_leds_s0>;
++
++ compatible = "gpio-leds";
++
++ led2 {
++ label = "beaglebone:green:usr0";
++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++
++ led3 {
++ label = "beaglebone:green:usr1";
++ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc0";
++ default-state = "off";
++ };
++
++ led4 {
++ label = "beaglebone:green:usr2";
++ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "cpu0";
++ default-state = "off";
++ };
++
++ led5 {
++ label = "beaglebone:green:usr3";
++ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc1";
++ default-state = "off";
++ };
++
++ led6 {
++ label = "beaglebone:green:usr4";
++ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "netdev";
++ default-state = "off";
++ };
++ };
++};
++
++&am33xx_pinmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&usbhost_pins>;
++
++ user_leds_s0: user_leds_s0 {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* WL_Active_LED / USR4 */
++ >;
++ };
++
++ bt_pins: pinmux_bt_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */
++ >;
++ };
++
++ mmc3_pins: pinmux_mmc3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
++ AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
++ >;
++ };
++
++ uart2_grove_pins: pinmux_uart2_grove_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6)
++ AM33XX_IOPAD(0x910, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6)
++ >;
++ };
++
++ uart3_pins: pinmux_uart3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */
++ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */
++ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */
++ >;
++ };
++
++ usbhost_pins: pinmux_usbhost_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd1.gpio0[21] */
++ >;
++ };
++
++ wl18xx_pins: pinmux_wl18xx_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */
++ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */
++ >;
++ };
++};
++
++&mac {
++ status = "disabled";
++};
++
++&mmc3 {
++ dmas = <&edma_xbar 12 0 1
++ &edma_xbar 13 0 2>;
++ dma-names = "tx", "rx";
++ status = "okay";
++ vmmc-supply = <&wlan_en_reg>;
++ bus-width = <4>;
++ non-removable;
++ cap-power-off-card;
++ keep-power-in-suspend;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1835";
++ reg = <2>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <29 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart2_grove_pins>;
++ status = "okay";
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart3_pins &bt_pins>;
++ status = "okay";
++
++ bluetooth {
++ compatible = "ti,wl1835-st";
++ enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&i2c0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ extrtc: rtc@68 {
++ compatible = "dallas,ds1340";
++ reg = <0x68>;
++ };
++};
++
++// (K16) gmii1_txd1.gpio0[21]
++&gpio0 {
++ usb-reset-hog {
++ gpio-hog;
++ gpios = <21 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "usb_reset";
++ };
++};
++
++&gpio3 {
++ ls-buf-en-hog {
++ gpio-hog;
++ gpios = <10 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LS_BUF_EN";
++ };
++};
++
++&usb1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ hub@1 {
++ compatible = "usb424,9512";
++ reg = <1>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet: ethernet@1 {
++ compatible = "usb424,ec00";
++ reg = <1>;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BBGW-WL1835-00A0.dts b/arch/arm/boot/dts/overlays/BB-BBGW-WL1835-00A0.dts
+new file mode 100644
+index 000000000000..8295afdbd7d1
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BBGW-WL1835-00A0.dts
+@@ -0,0 +1,155 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BBGW-WL1835-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_12_pinmux { status = "disabled"; }; /* gpmc_ad12.gpio1_28 BT_EN */
++ P8_12_pinmux { status = "disabled"; }; /* gpmc_ad12.mmc2_dat0 */
++ P8_11_pinmux { status = "disabled"; }; /* gpmc_ad13.mmc2_dat1 */
++ P8_16_pinmux { status = "disabled"; }; /* gpmc_ad14.mmc2_dat2 */
++ P8_15_pinmux { status = "disabled"; }; /* gpmc_ad15.mmc2_dat3 */
++
++ P8_18_pinmux { status = "disabled"; }; /* gpmc_clk.mmc2_clk */
++
++ //Audio...
++ P9_28_pinmux { status = "disabled"; };
++ P9_29_pinmux { status = "disabled"; };
++ P9_31_pinmux { status = "disabled"; };
++};
++
++&{/} {
++ model = "TI AM335x BeagleBone Green Wireless";
++ compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone", "ti,am33xx";
++
++ wlan_en_reg: fixedregulator@2 {
++ compatible = "regulator-fixed";
++ regulator-name = "wlan-en-regulator";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ startup-delay-us= <70000>;
++
++ /* WL_EN */
++ gpio = <&gpio0 26 0>;
++ enable-active-high;
++ };
++};
++
++&am33xx_pinmux {
++ bt_pins: pinmux_bt_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_ad12.gpio1_28 BT_EN */
++ >;
++ };
++
++ mmc3_pins: pinmux_mmc3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */
++ >;
++ };
++
++ uart3_pins: pinmux_uart3_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */
++ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */
++ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */
++ >;
++ };
++
++ wl18xx_pins: pinmux_wl18xx_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 LS_BUF_EN */
++ >;
++ };
++};
++
++&mac {
++ status = "disabled";
++};
++
++&mmc3 {
++ dmas = <&edma_xbar 12 0 1
++ &edma_xbar 13 0 2>;
++ dma-names = "tx", "rx";
++ status = "okay";
++ vmmc-supply = <&wlan_en_reg>;
++ bus-width = <4>;
++ non-removable;
++ cap-power-off-card;
++ keep-power-in-suspend;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1835";
++ reg = <2>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <27 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart3_pins &bt_pins>;
++ status = "okay";
++
++ bluetooth {
++ compatible = "ti,wl1835-st";
++ enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&gpio1 {
++ ls-buf-en-hog {
++ gpio-hog;
++ gpios = <29 GPIO_ACTIVE_HIGH>;
++ output-high;
++ line-name = "LS_BUF_EN";
++ };
++};
++
++/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/
++/* in case it isn't, wilink8 ends up in one of the test modes that */
++/* intruces various issues (elp wkaeup timeouts etc.) */
++/* On the BBGW this pin is routed through the level shifter (U21) that */
++/* introduces a pullup on the line and wilink8 ends up in a bad state. */
++/* use a gpio hog to force this pin low. An alternative may be adding */
++/* an external pulldown on U21 pin 4. */
++
++&gpio3 {
++ bt-aud-in-hog {
++ gpio-hog;
++ gpios = <16 GPIO_ACTIVE_HIGH>;
++ output-low;
++ line-name = "MCASP0_AHCLKR";
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BONE-4D5R-01-00A1.dts b/arch/arm/boot/dts/overlays/BB-BONE-4D5R-01-00A1.dts
+new file mode 100644
+index 000000000000..2c3a82b7a629
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BONE-4D5R-01-00A1.dts
+@@ -0,0 +1,224 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BONE-4D5R-01-00A1.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P8_45_pinmux { status = "disabled"; }; /* lcd: lcd_data0 */
++ P8_46_pinmux { status = "disabled"; }; /* lcd: lcd_data1 */
++ P8_43_pinmux { status = "disabled"; }; /* lcd: lcd_data2 */
++ P8_44_pinmux { status = "disabled"; }; /* lcd: lcd_data3 */
++ P8_41_pinmux { status = "disabled"; }; /* lcd: lcd_data4 */
++ P8_42_pinmux { status = "disabled"; }; /* lcd: lcd_data5 */
++ P8_39_pinmux { status = "disabled"; }; /* lcd: lcd_data6 */
++ P8_40_pinmux { status = "disabled"; }; /* lcd: lcd_data7 */
++ P8_37_pinmux { status = "disabled"; }; /* lcd: lcd_data8 */
++ P8_38_pinmux { status = "disabled"; }; /* lcd: lcd_data9 */
++ P8_36_pinmux { status = "disabled"; }; /* lcd: lcd_data10 */
++ P8_34_pinmux { status = "disabled"; }; /* lcd: lcd_data11 */
++ P8_35_pinmux { status = "disabled"; }; /* lcd: lcd_data12 */
++ P8_33_pinmux { status = "disabled"; }; /* lcd: lcd_data13 */
++ P8_31_pinmux { status = "disabled"; }; /* lcd: lcd_data14 */
++ P8_32_pinmux { status = "disabled"; }; /* lcd: lcd_data15 */
++
++ P8_27_pinmux { status = "disabled"; }; /* lcd: lcd_vsync */
++ P8_29_pinmux { status = "disabled"; }; /* lcd: lcd_hsync */
++ P8_28_pinmux { status = "disabled"; }; /* lcd: lcd_pclk */
++ P8_30_pinmux { status = "disabled"; }; /* lcd: lcd_ac_bias_en */
++
++ P9_27_pinmux { status = "disabled"; }; /* lcd: gpio3_19 DISPEN */
++
++ P9_14_pinmux { status = "disabled"; }; /* pwm: ehrpwm1a PWM_BL */
++
++ P9_18_pinmux { status = "disabled"; }; /* i2c1_sda */
++ P9_17_pinmux { status = "disabled"; }; /* i2c1_scl */
++ P9_26_pinmux { status = "disabled"; }; /* touch interrupt on gpio0_14 */
++};
++
++&am33xx_pinmux {
++ bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE6) /* gpmc_a2.ehrpwm1a, OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT */
++ >;
++ };
++
++ bb_lcd_lcd_pins: pinmux_bb_lcd_lcd_pins {
++ pinctrl-single,pins = <
++ /*LCD enable */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT, MUX_MODE7) /* mcasp0_fsr.gpio3_19, OUTPUT | MODE7 LCD DISEN */
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
++ >;
++ };
++
++ bb_i2c1_pins: pinmux_bb_i2c1_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE2) /* spi0_d1.i2c1_sda */
++ AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE2) /* spi0_cs0.i2c1_scl */
++ >;
++ };
++
++ ar1021_pins: pinmux_ar1021_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE7)
++ >;
++ };
++};
++
++&epwmss1 {
++ status = "okay";
++};
++
++&ehrpwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_pwm_backlight_pins>;
++ status = "okay";
++};
++
++&lcdc {
++ status = "okay";
++
++ blue-and-red-wiring = "straight";
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // lcdc_0: endpoint@0 {
++ // remote-endpoint = <&panel_0>;
++ // };
++ //};
++};
++
++&i2c1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_i2c1_pins>;
++
++ clock-frequency = <100000>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ar1021: ar1021@4d {
++ status = "okay";
++ compatible = "microchip,ar1021-i2c";
++ reg = <0x4d>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&ar1021_pins>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
++
++ touchscreen-offset-x=<250>;
++ touchscreen-offset-y=<300>;
++
++ touchscreen-inverted-y;
++ };
++};
++
++&{/} {
++ backlight: backlight {
++ status = "okay";
++ compatible = "pwm-backlight";
++ pwms = <&ehrpwm1 0 500000 0>;
++ brightness-levels = <
++ 0 1 2 3 4 5 6 7 8 9
++ 10 11 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27 28 29
++ 30 31 32 33 34 35 36 37 38 39
++ 40 41 42 43 44 45 46 47 48 49
++ 50 51 52 53 54 55 56 57 58 59
++ 60 61 62 63 64 65 66 67 68 69
++ 70 71 72 73 74 75 76 77 78 79
++ 80 81 82 83 84 85 86 87 88 89
++ 90 91 92 93 94 95 96 97 98 99
++ 100
++ >;
++ default-brightness-level = <100>;
++ };
++
++ panel {
++ status = "okay";
++ compatible = "ti,tilcdc,panel";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_lcd_pins>;
++ backlight = <&backlight>;
++ enable-gpios = <&gpio3 19 0>;
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // panel_0: endpoint@0 {
++ // remote-endpoint = <&lcdc_0>;
++ // };
++ //};
++
++ panel-info {
++ ac-bias = <255>;
++ ac-bias-intrpt = <0>;
++ dma-burst-sz = <16>;
++ bpp = <16>;
++ fdd = <0x80>;
++ sync-edge = <0>;
++ sync-ctrl = <1>;
++ raster-order = <0>;
++ fifo-th = <0>;
++ };
++
++ display-timings {
++ native-mode = <&timing0>;
++ /* Settings for ThreeFive S9700RTWV35TR / LCD7 cape: */
++ timing0: 800x480 {
++ clock-frequency = <30000000>;
++ hactive = <800>;
++ vactive = <480>;
++ hfront-porch = <40>;
++ hback-porch = <40>;
++ hsync-len = <48>;
++ vback-porch = <30>;
++ vfront-porch = <13>;
++ vsync-len = <3>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ de-active = <1>;
++ pixelclk-active = <0>;
++ };
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BONE-LCD4-01-00A1.dts b/arch/arm/boot/dts/overlays/BB-BONE-LCD4-01-00A1.dts
+new file mode 100644
+index 000000000000..ad6beadcc21f
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BONE-LCD4-01-00A1.dts
+@@ -0,0 +1,276 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BONE-LCD4-01-00A1.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_12_pinmux { status = "disabled"; }; /* P9_12: gpmc_ben1.gpio1_28, INPUT | PULLDIS | MODE7 */
++
++ P9_14_pinmux { status = "disabled"; }; /* P9_14: gpmc_a2.ehrpwm1a */
++
++ P9_27_pinmux { status = "disabled"; }; /* P9_27: mcasp0_fsr.gpio3_19 */
++
++ P8_45_pinmux { status = "disabled"; }; /* P8_45: lcd_data0.lcd_data0 */
++ P8_46_pinmux { status = "disabled"; }; /* P8_46: lcd_data1.lcd_data1 */
++ P8_43_pinmux { status = "disabled"; }; /* P8_43: lcd_data2.lcd_data2 */
++ P8_44_pinmux { status = "disabled"; }; /* P8_44: lcd_data3.lcd_data3 */
++ P8_41_pinmux { status = "disabled"; }; /* P8_41: lcd_data4.lcd_data4 */
++ P8_42_pinmux { status = "disabled"; }; /* P8_42: lcd_data5.lcd_data5 */
++ P8_39_pinmux { status = "disabled"; }; /* P8_39: lcd_data6.lcd_data6 */
++ P8_40_pinmux { status = "disabled"; }; /* P8_40: lcd_data7.lcd_data7 */
++ P8_37_pinmux { status = "disabled"; }; /* P8_37: lcd_data8.lcd_data8 */
++ P8_38_pinmux { status = "disabled"; }; /* P8_38: lcd_data9.lcd_data9 */
++ P8_36_pinmux { status = "disabled"; }; /* P8_36: lcd_data10.lcd_data10 */
++ P8_34_pinmux { status = "disabled"; }; /* P8_34: lcd_data11.lcd_data11 */
++ P8_35_pinmux { status = "disabled"; }; /* P8_35: lcd_data12.lcd_data12 */
++ P8_33_pinmux { status = "disabled"; }; /* P8_33: lcd_data13.lcd_data13 */
++ P8_31_pinmux { status = "disabled"; }; /* P8_31: lcd_data14.lcd_data14 */
++ P8_32_pinmux { status = "disabled"; }; /* P8_32: lcd_data15.lcd_data15 */
++
++ P8_27_pinmux { status = "disabled"; }; /* P8_27: lcd_vsync.lcd_vsync */
++ P8_29_pinmux { status = "disabled"; }; /* P8_29: lcd_hsync.lcd_hsync */
++ P8_28_pinmux { status = "disabled"; }; /* P8_28: lcd_pclk.lcd_pclk */
++ P8_30_pinmux { status = "disabled"; }; /* P8_30: lcd_ac_bias_en.lcd_ac_bias_en */
++
++ P9_15_pinmux { status = "disabled"; }; /* P9_15: gpmc_a0.gpio1_16 */
++ P9_23_pinmux { status = "disabled"; }; /* P9_23: gpmc_a1.gpio1_17 */
++ P9_16_pinmux { status = "disabled"; }; /* P9_16: gpmc_a3.gpio1_19 */
++ P9_30_pinmux { status = "disabled"; }; /* P9_30: mcasp0_axr0.gpio3_16 */
++ P9_24_pinmux { status = "disabled"; }; /* P9_24: uart1_txd.gpio0_15 */
++};
++
++&am33xx_pinmux {
++ bb_lcd_led_pins: pinmux_bb_lcd_led_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT, MUX_MODE7) /* P9_12: gpmc_ben1.gpio1_28, INPUT | PULLDIS | MODE7 */
++ >;
++ };
++
++ bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* P9_14: gpmc_a2.ehrpwm1a */
++ >;
++ };
++
++ bb_lcd_lcd_pins: pinmux_bb_lcd_lcd_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLUP, MUX_MODE7) /* P9_27: mcasp0_fsr.gpio3_19 */
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
++ >;
++ };
++
++ bb_lcd_keymap_pins: pinmux_bb_lcd_keymap_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT, MUX_MODE7) /* P9_15: gpmc_a0.gpio1_16 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT, MUX_MODE7) /* P9_23: gpmc_a1.gpio1_17 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT, MUX_MODE7) /* P9_16: gpmc_a3.gpio1_19 */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT, MUX_MODE7) /* P9_30: mcasp0_axr0.gpio3_16 */
++ AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE7) /* P9_24: uart1_txd.gpio0_15 */
++ >;
++ };
++};
++
++&epwmss1 {
++ status = "okay";
++};
++
++&ehrpwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_pwm_backlight_pins>;
++ status = "okay";
++};
++
++&lcdc {
++ status = "okay";
++
++ blue-and-red-wiring = "straight";
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // lcdc_0: endpoint@0 {
++ // remote-endpoint = <&panel_0>;
++ // };
++ //};
++};
++
++&tscadc {
++ status = "okay";
++ tsc {
++ ti,wires = <4>;
++ ti,x-plate-resistance = <200>;
++ ti,coordinate-readouts = <5>;
++ ti,wire-config = <0x00 0x11 0x22 0x33>;
++ ti,charge-delay = <0x400>;
++ };
++
++ adc {
++ ti,adc-channels = <4 5 6 7>;
++ };
++};
++
++&{/} {
++ backlight: backlight {
++ status = "okay";
++ compatible = "pwm-backlight";
++ pwms = <&ehrpwm1 0 500000 0>;
++ brightness-levels = <
++ 0 1 2 3 4 5 6 7 8 9
++ 10 11 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27 28 29
++ 30 31 32 33 34 35 36 37 38 39
++ 40 41 42 43 44 45 46 47 48 49
++ 50 51 52 53 54 55 56 57 58 59
++ 60 61 62 63 64 65 66 67 68 69
++ 70 71 72 73 74 75 76 77 78 79
++ 80 81 82 83 84 85 86 87 88 89
++ 90 91 92 93 94 95 96 97 98 99
++ 100
++ >;
++ default-brightness-level = <100>;
++ };
++
++ panel {
++ status = "okay";
++ compatible = "ti,tilcdc,panel";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_lcd_pins>;
++ backlight = <&backlight>;
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // panel_0: endpoint@0 {
++ // remote-endpoint = <&lcdc_0>;
++ // };
++ //};
++
++ panel-info {
++ ac-bias = <255>;
++ ac-bias-intrpt = <0>;
++ dma-burst-sz = <16>;
++ bpp = <16>;
++ fdd = <0x80>;
++ sync-edge = <0>;
++ sync-ctrl = <1>;
++ raster-order = <0>;
++ fifo-th = <0>;
++ };
++ display-timings {
++ native-mode = <&timing0>;
++ /* www.newhavendisplay.com/app_notes/OTA5180A.pdf */
++ timing0: 480x272 {
++ clock-frequency = <9200000>;
++ hactive = <480>;
++ vactive = <272>;
++ hfront-porch = <8>;
++ hback-porch = <47>;
++ hsync-len = <41>;
++ vback-porch = <2>;
++ vfront-porch = <3>;
++ vsync-len = <10>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ de-active = <1>;
++ pixelclk-active = <0>;
++ };
++ };
++ };
++
++ gpio-leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_led_pins>;
++
++ led-ld0 {
++ label = "lcd:green:usr0";
++ gpios = <&gpio1 28 0>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_keymap_pins>;
++
++ button-1 {
++ debounce_interval = <50>;
++ linux,code = <105>;
++ label = "left";
++ gpios = <&gpio1 16 0x1>;
++ gpio-key,wakeup;
++ autorepeat;
++ };
++ button-2 {
++ debounce_interval = <50>;
++ linux,code = <106>;
++ label = "right";
++ gpios = <&gpio1 17 0x1>;
++ gpio-key,wakeup;
++ autorepeat;
++ };
++ button-3 {
++ debounce_interval = <50>;
++ linux,code = <103>;
++ label = "up";
++ gpios = <&gpio1 19 0x1>;
++ gpio-key,wakeup;
++ autorepeat;
++ };
++ button-4 {
++ debounce_interval = <50>;
++ linux,code = <108>;
++ label = "down";
++ gpios = <&gpio3 16 0x1>;
++ gpio-key,wakeup;
++ autorepeat;
++ };
++ button-5 {
++ debounce_interval = <50>;
++ linux,code = <28>;
++ label = "enter";
++ gpios = <&gpio0 15 0x1>;
++ gpio-key,wakeup;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BONE-NH7C-01-A0.dts b/arch/arm/boot/dts/overlays/BB-BONE-NH7C-01-A0.dts
+new file mode 100644
+index 000000000000..be9dfd135be5
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BONE-NH7C-01-A0.dts
+@@ -0,0 +1,232 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BONE-NH7C-01-A0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P8_45_pinmux { status = "disabled"; }; /* lcd: lcd_data0 */
++ P8_46_pinmux { status = "disabled"; }; /* lcd: lcd_data1 */
++ P8_43_pinmux { status = "disabled"; }; /* lcd: lcd_data2 */
++ P8_44_pinmux { status = "disabled"; }; /* lcd: lcd_data3 */
++ P8_41_pinmux { status = "disabled"; }; /* lcd: lcd_data4 */
++ P8_42_pinmux { status = "disabled"; }; /* lcd: lcd_data5 */
++ P8_39_pinmux { status = "disabled"; }; /* lcd: lcd_data6 */
++ P8_40_pinmux { status = "disabled"; }; /* lcd: lcd_data7 */
++ P8_37_pinmux { status = "disabled"; }; /* lcd: lcd_data8 */
++ P8_38_pinmux { status = "disabled"; }; /* lcd: lcd_data9 */
++ P8_36_pinmux { status = "disabled"; }; /* lcd: lcd_data10 */
++ P8_34_pinmux { status = "disabled"; }; /* lcd: lcd_data11 */
++ P8_35_pinmux { status = "disabled"; }; /* lcd: lcd_data12 */
++ P8_33_pinmux { status = "disabled"; }; /* lcd: lcd_data13 */
++ P8_31_pinmux { status = "disabled"; }; /* lcd: lcd_data14 */
++ P8_32_pinmux { status = "disabled"; }; /* lcd: lcd_data15 */
++
++ P8_15_pinmux { status = "disabled"; }; /* gpmc_ad15.lcd_data16 */
++ P8_16_pinmux { status = "disabled"; }; /* gpmc_ad14.lcd_data17 */
++ P8_11_pinmux { status = "disabled"; }; /* gpmc_ad13.lcd_data18 */
++ P8_12_pinmux { status = "disabled"; }; /* gpmc_ad12.lcd_data19 */
++ P8_17_pinmux { status = "disabled"; }; /* gpmc_ad11.lcd_data20 */
++ P8_14_pinmux { status = "disabled"; }; /* gpmc_ad10.lcd_data21 */
++ P8_13_pinmux { status = "disabled"; }; /* gpmc_ad9.lcd_data22 */
++ P8_19_pinmux { status = "disabled"; }; /* gpmc_ad8.lcd_data23 */
++
++ P8_27_pinmux { status = "disabled"; }; /* lcd: lcd_vsync */
++ P8_29_pinmux { status = "disabled"; }; /* lcd: lcd_hsync */
++ P8_28_pinmux { status = "disabled"; }; /* lcd: lcd_pclk */
++ P8_30_pinmux { status = "disabled"; }; /* lcd: lcd_ac_bias_en */
++
++ P8_18_pinmux { status = "disabled"; }; /* lcd: enable */
++
++ P9_14_pinmux { status = "disabled"; }; /* pwm: ehrpwm1a */
++
++ P9_27_pinmux { status = "disabled"; }; /* ft5336: gpio3_15 */
++};
++
++&am33xx_pinmux {
++ bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* P9_14: gpmc_a2.ehrpwm1a */
++ >;
++ };
++
++ bb_lcd_lcd_pins: pinmux_bb_lcd_lcd_pins {
++ pinctrl-single,pins = <
++ /*LCD enable */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_clk_mux0.gpio2_1 */
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
++
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1) /* P8_15: gpmc_ad15.lcd_data16 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1) /* P8_16: gpmc_ad14.lcd_data17 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1) /* P8_11: gpmc_ad13.lcd_data18 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1) /* P8_12: gpmc_ad12.lcd_data19 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1) /* P8_17: gpmc_ad11.lcd_data20 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1) /* P8_14: gpmc_ad10.lcd_data21 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1) /* P8_13: gpmc_ad9.lcd_data22 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1) /* P8_19: gpmc_ad8.lcd_data23 */
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
++ >;
++ };
++
++ edt_ft5x06_pins: pinmux_edt_ft5x06_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsr.gpio3_19 */
++ >;
++ };
++};
++
++&epwmss1 {
++ status = "okay";
++};
++
++&ehrpwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_pwm_backlight_pins>;
++ status = "okay";
++};
++
++&lcdc {
++ status = "okay";
++
++ blue-and-red-wiring = "crossed";
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // lcdc_0: endpoint@0 {
++ // remote-endpoint = <&panel_0>;
++ // };
++ //};
++};
++
++&i2c2 {
++ status = "okay";
++
++ clock-frequency = <100000>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ edt-ft5x06@38 {
++ status = "okay";
++ compatible = "edt,edt-ft5406";
++ reg = <0x38>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&edt_ft5x06_pins>;
++ interrupt-parent = <&gpio3>;
++ interrupts = <19 0>;
++ //reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
++
++ touchscreen-size-x = <800>;
++ touchscreen-size-y = <480>;
++ //touchscreen-swapped-x-y;
++ };
++};
++
++&{/} {
++ backlight: backlight {
++ status = "okay";
++ compatible = "pwm-backlight";
++ pwms = <&ehrpwm1 0 500000 0>;
++ brightness-levels = <
++ 0 1 2 3 4 5 6 7 8 9
++ 10 11 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27 28 29
++ 30 31 32 33 34 35 36 37 38 39
++ 40 41 42 43 44 45 46 47 48 49
++ 50 51 52 53 54 55 56 57 58 59
++ 60 61 62 63 64 65 66 67 68 69
++ 70 71 72 73 74 75 76 77 78 79
++ 80 81 82 83 84 85 86 87 88 89
++ 90 91 92 93 94 95 96 97 98 99
++ 100
++ >;
++ default-brightness-level = <100>;
++ };
++
++ /* NHD-7.0-800480EF-ATXL# */
++ panel {
++ status = "okay";
++ compatible = "ti,tilcdc,panel";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_lcd_pins>;
++ backlight = <&backlight>;
++ enable-gpios = <&gpio2 1 0>;
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // panel_0: endpoint@0 {
++ // remote-endpoint = <&lcdc_0>;
++ // };
++ //};
++
++ panel-info {
++ ac-bias = <255>;
++ ac-bias-intrpt = <0>;
++ dma-burst-sz = <16>;
++ bpp = <32>;
++ fdd = <0x80>;
++ tft-alt-mode = <0>;
++ stn-565-mode = <0>;
++ mono-8bit-mode = <0>;
++ sync-edge = <0>;
++ sync-ctrl = <0>;
++ raster-order = <0>;
++ fifo-th = <0>;
++ };
++
++ display-timings {
++ native-mode = <&timing0>;
++ timing0: 800x480 {
++ clock-frequency = <45000000>;
++ hactive = <800>;
++ vactive = <480>;
++ hfront-porch = <40>;
++ hback-porch = <40>;
++ hsync-len = <48>;
++ vback-porch = <29>;
++ vfront-porch = <13>;
++ vsync-len = <3>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ };
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-BONE-eMMC1-01-00A0.dts b/arch/arm/boot/dts/overlays/BB-BONE-eMMC1-01-00A0.dts
+new file mode 100644
+index 000000000000..edc70070f278
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-BONE-eMMC1-01-00A0.dts
+@@ -0,0 +1,61 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-BONE-eMMC1-01-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P8_21_pinmux { status = "disabled"; }; /* mmc1_clk */
++ P8_20_pinmux { status = "disabled"; }; /* mmc1_cmd */
++ P8_25_pinmux { status = "disabled"; }; /* mmc1_dat0 */
++ P8_24_pinmux { status = "disabled"; }; /* mmc1_dat1 */
++ P8_05_pinmux { status = "disabled"; }; /* mmc1_dat2 */
++ P8_06_pinmux { status = "disabled"; }; /* mmc1_dat3 */
++ P8_23_pinmux { status = "disabled"; }; /* mmc1_dat4 */
++ P8_22_pinmux { status = "disabled"; }; /* mmc1_dat5 */
++ P8_03_pinmux { status = "disabled"; }; /* mmc1_dat6 */
++ P8_04_pinmux { status = "disabled"; }; /* mmc1_dat7 */
++};
++
++&am33xx_pinmux {
++ emmc_pins: pinmux_emmc_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
++ >;
++ };
++};
+
-+ chosen {
-+ base_dtb = "am335x-sancloud-bbe.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++&mmc2 {
++ vmmc-supply = <&vmmcsd_fixed>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&emmc_pins>;
++ bus-width = <8>;
++ status = "okay";
++ non-removable;
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-CAPE-DISP-CT4-00A0.dts b/arch/arm/boot/dts/overlays/BB-CAPE-DISP-CT4-00A0.dts
+new file mode 100644
+index 000000000000..c47fa0b1f871
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-CAPE-DISP-CT4-00A0.dts
+@@ -0,0 +1,210 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-CAPE-DISP-CT4-00A0.kernel = __TIMESTAMP__;
+ };
- };
-
- &am33xx_pinmux {
-diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
-index f6ec85d58dd1..ba7ebd5ee910 100644
---- a/arch/arm/boot/dts/am33xx.dtsi
-+++ b/arch/arm/boot/dts/am33xx.dtsi
-@@ -633,6 +633,13 @@ target-module@56000000 {
- * Closed source PowerVR driver, no child device
- * binding or driver in mainline
- */
-+ gpu: gpu@0 {
-+ compatible = "ti,am3352-sgx530", "img,sgx530";
-+ reg = <0x0 0x10000>;
-+ interrupts = <37>;
-+ clocks = <&gfx_fck_div_ck>;
-+ clock-names = "fclk";
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P8_45_pinmux { status = "disabled"; }; /* lcd: lcd_data0 */
++ P8_46_pinmux { status = "disabled"; }; /* lcd: lcd_data1 */
++ P8_43_pinmux { status = "disabled"; }; /* lcd: lcd_data2 */
++ P8_44_pinmux { status = "disabled"; }; /* lcd: lcd_data3 */
++ P8_41_pinmux { status = "disabled"; }; /* lcd: lcd_data4 */
++ P8_42_pinmux { status = "disabled"; }; /* lcd: lcd_data5 */
++ P8_39_pinmux { status = "disabled"; }; /* lcd: lcd_data6 */
++ P8_40_pinmux { status = "disabled"; }; /* lcd: lcd_data7 */
++ P8_37_pinmux { status = "disabled"; }; /* lcd: lcd_data8 */
++ P8_38_pinmux { status = "disabled"; }; /* lcd: lcd_data9 */
++ P8_36_pinmux { status = "disabled"; }; /* lcd: lcd_data10 */
++ P8_34_pinmux { status = "disabled"; }; /* lcd: lcd_data11 */
++ P8_35_pinmux { status = "disabled"; }; /* lcd: lcd_data12 */
++ P8_33_pinmux { status = "disabled"; }; /* lcd: lcd_data13 */
++ P8_31_pinmux { status = "disabled"; }; /* lcd: lcd_data14 */
++ P8_32_pinmux { status = "disabled"; }; /* lcd: lcd_data15 */
++
++ P8_27_pinmux { status = "disabled"; }; /* lcd: lcd_vsync */
++ P8_29_pinmux { status = "disabled"; }; /* lcd: lcd_hsync */
++ P8_28_pinmux { status = "disabled"; }; /* lcd: lcd_pclk */
++ P8_30_pinmux { status = "disabled"; }; /* lcd: lcd_ac_bias_en */
++
++ P9_28_pinmux { status = "disabled"; }; /* pwm: eCAP2_in_PWM2_out */
++
++ P9_29_pinmux { status = "disabled"; }; /* ft5336: gpio3_15 */
++ P9_31_pinmux { status = "disabled"; }; /* ft5336: gpio3_14 */
++};
++
++&am33xx_pinmux {
++ bb_lcd_pwm_backlight_pins: pinmux_bb_lcd_pwm_backlight_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* mcasp0_ahclkr.eCAP2_in_PWM2_out */
++ >;
++ };
++
++ bb_lcd_lcd_pins: pinmux_bb_lcd_lcd_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
++
++ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
++ >;
++ };
++
++ edt_ft5336_ts_pins: pinmux_edt_ft5336_ts_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
++ >;
++ };
++};
++
++&epwmss2 {
++ status = "okay";
++};
++
++&ecap2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_pwm_backlight_pins>;
++ status = "okay";
++};
++
++&lcdc {
++ status = "okay";
++
++ blue-and-red-wiring = "straight";
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // lcdc_0: endpoint@0 {
++ // remote-endpoint = <&panel_0>;
++ // };
++ //};
++};
++
++&i2c2 {
++ status = "okay";
++
++ /* this is the configuration part */
++ clock-frequency = <100000>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ edt-ft5336@38 {
++ status = "okay";
++ compatible = "edt,edt-ft5336", "edt,edt-ft5306", "edt,edt-ft5x06";
++ reg = <0x38>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&edt_ft5336_ts_pins>;
++ interrupt-parent = <&gpio3>;
++ interrupts = <15 0>;
++ reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
++
++ touchscreen-size-x = <272>;
++ touchscreen-size-y = <480>;
++ touchscreen-swapped-x-y;
++ };
++};
++
++&{/} {
++ backlight: backlight {
++ status = "okay";
++ compatible = "pwm-backlight";
++ pwms = <&ecap2 0 500000 0>;
++ brightness-levels = <
++ 0 1 2 3 4 5 6 7 8 9
++ 10 11 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27 28 29
++ 30 31 32 33 34 35 36 37 38 39
++ 40 41 42 43 44 45 46 47 48 49
++ 50 51 52 53 54 55 56 57 58 59
++ 60 61 62 63 64 65 66 67 68 69
++ 70 71 72 73 74 75 76 77 78 79
++ 80 81 82 83 84 85 86 87 88 89
++ 90 91 92 93 94 95 96 97 98 99
++ 100
++ >;
++ default-brightness-level = <50>;
++ };
++
++ panel {
++ status = "okay";
++ compatible = "ti,tilcdc,panel";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_lcd_lcd_pins>;
++ backlight = <&backlight>;
++
++ //FIXME - LCD doesn't init...
++ //port {
++ // panel_0: endpoint@0 {
++ // remote-endpoint = <&lcdc_0>;
++ // };
++ //};
++
++ panel-info {
++ ac-bias = <255>;
++ ac-bias-intrpt = <0>;
++ dma-burst-sz = <16>;
++ bpp = <16>;
++ fdd = <0x80>;
++ tft-alt-mode = <0>;
++ stn-565-mode = <0>;
++ mono-8bit-mode = <0>;
++ sync-edge = <0>;
++ sync-ctrl = <1>;
++ raster-order = <0>;
++ fifo-th = <0>;
++ };
++ /* ILI6480 */
++ display-timings {
++ native-mode = <&timing0>;
++ timing0: 480x272 {
++ clock-frequency = <9000000>;
++ hactive = <480>;
++ vactive = <272>;
++ hfront-porch = <5>;
++ hback-porch = <40>;
++ hsync-len = <1>;
++ vback-porch = <8>;
++ vfront-porch = <8>;
++ vsync-len = <1>;
++ hsync-active = <0>;
++ vsync-active = <0>;
+ };
- };
- };
- };
-diff --git a/arch/arm/boot/dts/am5729-beagleboneai.dts b/arch/arm/boot/dts/am5729-beagleboneai.dts
-index 149cfafb90bf..630107b270e7 100644
---- a/arch/arm/boot/dts/am5729-beagleboneai.dts
-+++ b/arch/arm/boot/dts/am5729-beagleboneai.dts
-@@ -26,6 +26,8 @@ aliases {
-
- chosen {
- stdout-path = &uart1;
-+ base_dtb = "am5729-beagleboneai.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
- };
-
- memory@0 {
-@@ -204,6 +206,7 @@ extcon_usb1: extcon_usb1 {
- &i2c1 {
- status = "okay";
- clock-frequency = <400000>;
-+ symlink = "bone/i2c/0";
-
- tps659038: tps659038@58 {
- compatible = "ti,tps659038";
-@@ -486,6 +489,7 @@ &cpu0 {
-
- &uart1 {
- status = "okay";
-+ symlink = "bone/uart/0";
- };
-
- &davinci_mdio_sw {
-@@ -675,6 +679,7 @@ &uart6 {
- &i2c4 {
- status = "okay";
- clock-frequency = <100000>;
-+ symlink = "bone/i2c/2";
- };
-
- &cpu0_opp_table {
-diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
-index 83e174e053c7..0ba920286dfb 100644
---- a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
-+++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
-@@ -7,6 +7,11 @@
-
- / {
- model = "TI AM5728 BeagleBoard-X15 rev B1";
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-HDMI-TDA998x-00A0.dts b/arch/arm/boot/dts/overlays/BB-HDMI-TDA998x-00A0.dts
+new file mode 100644
+index 000000000000..1c0eaa74365e
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-HDMI-TDA998x-00A0.dts
+@@ -0,0 +1,188 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/display/tda998x.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-HDMI-TDA998x-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_25_pinmux { status = "disabled"; }; /* mcasp0_ahclkx */
++ P9_28_pinmux { status = "disabled"; }; /* mcasp0_axr2 */
++ P9_29_pinmux { status = "disabled"; }; /* mcasp0_fsx */
++ P9_31_pinmux { status = "disabled"; }; /* mcasp0_aclkx */
++ P8_45_pinmux { status = "disabled"; }; /* lcd_data0 */
++ P8_46_pinmux { status = "disabled"; }; /* lcd_data1 */
++ P8_43_pinmux { status = "disabled"; }; /* lcd_data2 */
++ P8_44_pinmux { status = "disabled"; }; /* lcd_data3 */
++ P8_41_pinmux { status = "disabled"; }; /* lcd_data4 */
++ P8_42_pinmux { status = "disabled"; }; /* lcd_data5 */
++ P8_39_pinmux { status = "disabled"; }; /* lcd_data6 */
++ P8_40_pinmux { status = "disabled"; }; /* lcd_data7 */
++ P8_37_pinmux { status = "disabled"; }; /* lcd_data8 */
++ P8_38_pinmux { status = "disabled"; }; /* lcd_data9 */
++ P8_36_pinmux { status = "disabled"; }; /* lcd_data10 */
++ P8_34_pinmux { status = "disabled"; }; /* lcd_data11 */
++ P8_35_pinmux { status = "disabled"; }; /* lcd_data12 */
++ P8_33_pinmux { status = "disabled"; }; /* lcd_data13 */
++ P8_31_pinmux { status = "disabled"; }; /* lcd_data14 */
++ P8_32_pinmux { status = "disabled"; }; /* lcd_data15 */
++ P8_27_pinmux { status = "disabled"; }; /* lcd_vsync */
++ P8_29_pinmux { status = "disabled"; }; /* lcd_hsync */
++ P8_28_pinmux { status = "disabled"; }; /* lcd_pclk */
++ P8_30_pinmux { status = "disabled"; }; /* lcd_ac_bias_en */
++};
++
++&am33xx_pinmux {
++ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ >;
++ };
++
++ nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
++ >;
++ };
++
++ mcasp0_pins: mcasp0_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
++ AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
++ >;
++ };
++};
++
++&lcdc {
++ status = "okay";
++
++ /* If you want to get 24 bit RGB and 16 BGR mode instead of
++ * current 16 bit RGB and 24 BGR modes, set the propety
++ * below to "crossed" and uncomment the video-ports -property
++ * in tda19988 node.
++ */
++ blue-and-red-wiring = "straight";
++
++ port {
++ lcdc_0: endpoint@0 {
++ remote-endpoint = <&hdmi_0>;
++ };
++ };
++};
++
++&i2c0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ tda19988: tda19988@70 {
++ compatible = "nxp,tda998x";
++ reg = <0x70>;
++ nxp,calib-gpios = <&gpio1 25 0>;
++ interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
++
++ pinctrl-names = "default", "off";
++ pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
++ pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
++
++ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
++ /* video-ports = <0x234501>; */
++
++ #sound-dai-cells = <0>;
++ audio-ports = < TDA998x_I2S 0x03>;
++
++ ports {
++ port@0 {
++ hdmi_0: endpoint@0 {
++ remote-endpoint = <&lcdc_0>;
++ };
++ };
++ };
++ };
++};
++
++&mcasp0 {
++ #sound-dai-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mcasp0_pins>;
++ status = "okay";
++ op-mode = <0>; /* MCASP_IIS_MODE */
++ tdm-slots = <2>;
++ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
++ 0 0 1 0
++ >;
++ tx-num-evt = <32>;
++ rx-num-evt = <32>;
++};
++
++&{/} {
++ clk_mcasp0_fixed: clk_mcasp0_fixed {
++ #clock-cells = <0>;
++ compatible = "fixed-clock";
++ clock-frequency = <24576000>;
++ };
++
++ clk_mcasp0: clk_mcasp0 {
++ #clock-cells = <0>;
++ compatible = "gpio-gate-clock";
++ clocks = <&clk_mcasp0_fixed>;
++ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
++ };
++
++ sound {
++ compatible = "simple-audio-card";
++ simple-audio-card,name = "TI BeagleBone Black";
++ simple-audio-card,format = "i2s";
++ simple-audio-card,bitclock-master = <&dailink0_master>;
++ simple-audio-card,frame-master = <&dailink0_master>;
++
++ dailink0_master: simple-audio-card,cpu {
++ sound-dai = <&mcasp0>;
++ clocks = <&clk_mcasp0>;
++ };
++
++ simple-audio-card,codec {
++ sound-dai = <&tda19988>;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-SPIDEV0-00A0.dts b/arch/arm/boot/dts/overlays/BB-SPIDEV0-00A0.dts
+new file mode 100644
+index 000000000000..7992c1d5c370
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-SPIDEV0-00A0.dts
+@@ -0,0 +1,81 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2013 CircuitCo
++ * Virtual cape for SPI0 on connector pins P9.22 P9.21 P9.18 P9.17
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-SPIDEV0-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_17_pinmux { status = "disabled"; }; /* P9_17 (A16) spi0_cs0.spi0_cs0 */
++ P9_18_pinmux { status = "disabled"; }; /* P9_18 (B16) spi0_d1.spi0_d1 */
++ P9_21_pinmux { status = "disabled"; }; /* P9_21 (B17) spi0_d0.spi0_d0 */
++ P9_22_pinmux { status = "disabled"; }; /* P9_22 (A17) spi0_sclk.spi0_sclk */
++};
++
++&am33xx_pinmux {
++ bb_spi0_pins: pinmux_bb_spi0_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0) /* P9_22 (A17) spi0_sclk.spi0_sclk */
++ AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0) /* P9_21 (B17) spi0_d0.spi0_d0 */
++ AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0) /* P9_18 (B16) spi0_d1.spi0_d1 */
++ AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0) /* P9_17 (A16) spi0_cs0.spi0_cs0 */
++ >;
++ };
++};
++
++&spi0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_spi0_pins>;
++
++ /*
++ * Select the D0 pin as output and D1 as
++ * input. The default is D0 as input and
++ * D1 as output.
++ */
++ //ti,pindir-d0-out-d1-in;
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/0.0";
++
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/0.1";
++
++ reg = <1>;
++ spi-max-frequency = <16000000>;
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BB-SPIDEV1-00A0.dts b/arch/arm/boot/dts/overlays/BB-SPIDEV1-00A0.dts
+new file mode 100644
+index 000000000000..4fc2a1ed2f56
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BB-SPIDEV1-00A0.dts
+@@ -0,0 +1,81 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2013 CircuitCo
++ * Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BB-SPIDEV1-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_28_pinmux { status = "disabled"; }; /* P9_28 (C12) mcasp0_ahclkr.spi1_cs0 */
++ P9_30_pinmux { status = "disabled"; }; /* P9_30 (D12) mcasp0_axr0.spi1_d1 */
++ P9_29_pinmux { status = "disabled"; }; /* P9_29 (B13) mcasp0_fsx.spi1_d0 */
++ P9_31_pinmux { status = "disabled"; }; /* P9_31 (A13) mcasp0_aclkx.spi1_sclk */
++};
++
++&am33xx_pinmux {
++ bb_spi1_pins: pinmux_bb_spi1_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT, MUX_MODE3) /* P9_31 (A13) mcasp0_aclkx.spi1_sclk */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT, MUX_MODE3) /* P9_29 (B13) mcasp0_fsx.spi1_d0 */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT, MUX_MODE3) /* P9_30 (D12) mcasp0_axr0.spi1_d1 */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT, MUX_MODE3) /* P9_28 (C12) mcasp0_ahclkr.spi1_cs0 */
++ >;
++ };
++};
+
-+ chosen {
-+ base_dtb = "am57xx-beagle-x15-revb1.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++&spi1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_spi1_pins>;
++
++ /*
++ * Select the D0 pin as output and D1 as
++ * input. The default is D0 as input and
++ * D1 as output.
++ */
++ //ti,pindir-d0-out-d1-in;
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/1.0";
++
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
+ };
- };
-
- &tpd12s015 {
-diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts
-index 656dd84460d2..9c721c0308f3 100644
---- a/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts
-+++ b/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts
-@@ -7,6 +7,11 @@
-
- / {
- model = "TI AM5728 BeagleBoard-X15 rev C";
+
-+ chosen {
-+ base_dtb = "am57xx-beagle-x15-revc.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ compatible = "spidev";
++ symlink = "bone/spi/1.1";
++
++ reg = <1>;
++ spi-max-frequency = <16000000>;
+ };
- };
-
- &tpd12s015 {
-diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
-index 0a8b16505ed9..028928f8d43e 100644
---- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
-+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
-@@ -8,6 +8,11 @@
- / {
- /* NOTE: This describes the "original" pre-production A2 revision */
- model = "TI AM5728 BeagleBoard-X15";
++};
+diff --git a/arch/arm/boot/dts/overlays/BBORG_COMMS-00A2.dts b/arch/arm/boot/dts/overlays/BBORG_COMMS-00A2.dts
+new file mode 100644
+index 000000000000..01b7f537ff8c
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BBORG_COMMS-00A2.dts
+@@ -0,0 +1,63 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012,2019 Texas Instruments Incorporated - https://www.ti.com/
++ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
++ * Copyright (C) 2015 Sebastian Jegerås
++ */
+
-+ chosen {
-+ base_dtb = "am57xx-beagle-x15.dts";
-+ base_dtb_timestamp = __TIMESTAMP__;
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/gpio/gpio.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BBORG_COMMS-00A2.kernel = __TIMESTAMP__;
+ };
- };
-
- &tpd12s015 {
-diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
-index 6b485cbed8d5..e322709ff046 100644
---- a/arch/arm/boot/dts/dra7.dtsi
-+++ b/arch/arm/boot/dts/dra7.dtsi
-@@ -853,6 +853,22 @@ target-module@56000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x56000000 0x2000000>;
++};
+
-+ /*
-+ * Closed source PowerVR driver, no child device
-+ * binding or driver in mainline
-+ */
-+ gpu: gpu@0 {
-+ compatible = "ti,dra7-sgx544", "img,sgx544";
-+ reg = <0x0 0x10000>;
-+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&l3_iclk_div>,
-+ <&gpu_core_gclk_mux>,
-+ <&gpu_hyd_gclk_mux>;
-+ clock-names = "iclk",
-+ "fclk1",
-+ "fclk2";
-+ };
- };
-
- crossbar_mpu: crossbar@4a002a48 {
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_24_pinmux { status = "disabled"; }; /* P9_24: uart1_txd.d_can1_rx */
++ P9_26_pinmux { status = "disabled"; }; /* P9_26: uart1_rxd.d_can1_tx */
++ P9_13_pinmux { status = "disabled"; }; /* P9_13: gpmc_wpn.uart4_txd_mux2 */
++ P9_11_pinmux { status = "disabled"; }; /* P9_11: gpmc_wait0.uart4_rxd_mux2 */
++};
++
++&am33xx_pinmux {
++ bborg_comms_can_pins: pinmux_comms_can_pins {
++ pinctrl-single,pins = <
++ 0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* P9_24: uart1_txd.d_can1_rx */
++ 0x180 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* P9_26: uart1_rxd.d_can1_tx */
++ >;
++ };
++
++ bborg_comms_rs485_pins: pinmux_comms_rs485_pins {
++ pinctrl-single,pins = <
++ 0x074 (PIN_OUTPUT | MUX_MODE6) /* P9_13: gpmc_wpn.uart4_txd_mux2 */
++ 0x070 (PIN_INPUT | MUX_MODE6) /* P9_11: gpmc_wait0.uart4_rxd_mux2 */
++ >;
++ };
++};
++
++&dcan1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bborg_comms_can_pins>;
++};
++
++&uart4 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&bborg_comms_rs485_pins>;
++ //rs485-rts-delay = <0 0>;
++ //rts-gpio = <&gpio3 19 1>; /* GPIO_ACTIVE_HIGH>; */
++ //rs485-rts-active-high;
++ //linux,rs485-enabled-at-boot-time;
++};
diff --git a/arch/arm/boot/dts/overlays/BBORG_FAN-A000.dts b/arch/arm/boot/dts/overlays/BBORG_FAN-A000.dts
new file mode 100644
index 000000000000..ab426ff6f6bd
@@ -483,6 +10328,461 @@ index 000000000000..ab426ff6f6bd
+ opp-suspend;
+ };
+};
+diff --git a/arch/arm/boot/dts/overlays/BBORG_RELAY-00A2.dts b/arch/arm/boot/dts/overlays/BBORG_RELAY-00A2.dts
+new file mode 100644
+index 000000000000..75965b9d8112
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BBORG_RELAY-00A2.dts
+@@ -0,0 +1,74 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
++ * Copyright (C) 2019 Amilcar Lucas <amilcar.lucas@iav.de>
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BBORG_RELAY-00A2.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P9_41_pinmux { status = "disabled"; }; /* P9_41: gpmc_a0.gpio0_20 */
++ P9_42_pinmux { status = "disabled"; }; /* P9_42: gpmc_a1.gpio0_07 */
++ P9_30_pinmux { status = "disabled"; }; /* P9_30: gpmc_be1n.gpio3_16 */
++ P9_27_pinmux { status = "disabled"; }; /* P9_27: mcasp0_fsr.gpio3_19 */
++};
++
++&am33xx_pinmux {
++ bb_gpio_relay_pins: pinmux_bb_gpio_relay_pins {
++ pinctrl-single,pins = <
++ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* P9_41: Relay1 */
++ AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* P9_42: Relay2 */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* P9_30: Relay3 */
++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* P9_27: Relay4 */
++ >;
++ };
++};
++
++&{/} {
++ leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&bb_gpio_relay_pins>;
++
++ compatible = "gpio-leds";
++
++ jp@1 {
++ label = "relay-jp1";
++ gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
++ default-state = "keep";
++ };
++
++ jp@2 {
++ label = "relay-jp2";
++ gpios = <&gpio0 07 GPIO_ACTIVE_HIGH>;
++ default-state = "keep";
++ };
++
++ jp@3 {
++ label = "relay-jp3";
++ gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
++ default-state = "keep";
++ };
++
++ jp@4 {
++ label = "relay-jp4";
++ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
++ default-state = "keep";
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/overlays/BONE-ADC.dts b/arch/arm/boot/dts/overlays/BONE-ADC.dts
+new file mode 100644
+index 000000000000..dafd8a26fbe0
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/BONE-ADC.dts
+@@ -0,0 +1,28 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
++ * See Cape Interface Spec page for more info on Bone Buses
++ * https://elinux.org/Beagleboard:BeagleBone_cape_interface_spec
++ *
++ * Virtual cape for Bone ADC
++ */
++
++/dts-v1/;
++/plugin/;
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ BONE-ADC.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * See these files for the phandles (&bone_*) and other bone bus nodes
++ * am335x-bbb-bone-buses.dtsi
++ */
++&bone_adc {
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/overlays/M-BB-BBG-00A0.dts b/arch/arm/boot/dts/overlays/M-BB-BBG-00A0.dts
+new file mode 100644
+index 000000000000..aa938ade2f0c
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/M-BB-BBG-00A0.dts
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ M-BB-BBG-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++&{/} {
++ model = "TI AM335x BeagleBone Green";
++ compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++};
+diff --git a/arch/arm/boot/dts/overlays/M-BB-BBGG-00A0.dts b/arch/arm/boot/dts/overlays/M-BB-BBGG-00A0.dts
+new file mode 100644
+index 000000000000..6dc003082c03
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/M-BB-BBGG-00A0.dts
+@@ -0,0 +1,24 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ M-BB-BBGG-00A0.kernel = __TIMESTAMP__;
++ };
++};
++
++&{/} {
++ model = "SeeedStudio BeagleBone Green Gateway";
++};
+diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
+new file mode 100644
+index 000000000000..eadf164c5f1e
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -0,0 +1,31 @@
++# Overlays for the BeagleBone platform
++
++dtbo-$(CONFIG_ARCH_OMAP2PLUS) += \
++ BB-ADC-00A0.dtbo \
++ BB-BBBW-WL1835-00A0.dtbo \
++ BB-BBGG-WL1835-00A0.dtbo \
++ BB-BBGW-WL1835-00A0.dtbo \
++ BB-BONE-4D5R-01-00A1.dtbo \
++ BB-BONE-eMMC1-01-00A0.dtbo \
++ BB-BONE-LCD4-01-00A1.dtbo \
++ BB-BONE-NH7C-01-A0.dtbo \
++ BB-CAPE-DISP-CT4-00A0.dtbo \
++ BB-HDMI-TDA998x-00A0.dtbo \
++ BB-SPIDEV0-00A0.dtbo \
++ BB-SPIDEV1-00A0.dtbo \
++ BBORG_COMMS-00A2.dtbo \
++ BBORG_FAN-A000.dtbo \
++ BBORG_RELAY-00A2.dtbo \
++ BONE-ADC.dtbo \
++ M-BB-BBG-00A0.dtbo \
++ M-BB-BBGG-00A0.dtbo \
++ PB-MIKROBUS-0.dtbo \
++ PB-MIKROBUS-1.dtbo
++
++
++
++targets += dtbs dtbs_install
++targets += $(dtbo-y)
++
++always-y := $(dtbo-y)
++clean-files := *.dtbo
+diff --git a/arch/arm/boot/dts/overlays/PB-MIKROBUS-0.dts b/arch/arm/boot/dts/overlays/PB-MIKROBUS-0.dts
+new file mode 100644
+index 000000000000..8a63234b005c
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/PB-MIKROBUS-0.dts
+@@ -0,0 +1,112 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright 2020 Vaishnav M A, BeagleBoard.org Foundation.
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ PB-MIKROBUS-0.kernel = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P2_01_pinmux { status = "disabled"; };
++ P2_03_pinmux { status = "disabled"; };
++ P2_05_pinmux { status = "disabled"; };
++ P2_07_pinmux { status = "disabled"; };
++ P2_09_pinmux { status = "disabled"; };
++ P2_11_pinmux { status = "disabled"; };
++ P1_12_pinmux { status = "disabled"; };
++ P1_10_pinmux { status = "disabled"; };
++ P1_08_pinmux { status = "disabled"; };
++ P1_06_pinmux { status = "disabled"; };
++ P1_04_pinmux { status = "disabled"; };
++ P1_02_pinmux { status = "disabled"; };
++};
++
++&{/} {
++ aliases {
++ mikrobus0 = "/mikrobus-0";
++ };
++
++ mikrobus-0 {
++ compatible = "linux,mikrobus";
++ status = "okay";
++ pinctrl-names = "default", "pwm_default", "pwm_gpio",
++ "uart_default", "uart_gpio", "i2c_default",
++ "i2c_gpio", "spi_default", "spi_gpio";
++ pinctrl-0 = <
++ &P2_03_gpio_input_pin
++ &P1_04_gpio_pin
++ &P1_02_gpio_pin
++ >;
++ pinctrl-1 = <&P2_01_pwm_pin>;
++ pinctrl-2 = <&P2_01_gpio_pin>;
++ pinctrl-3 = <
++ &P2_05_uart_pin
++ &P2_07_uart_pin
++ >;
++ pinctrl-4 = <
++ &P2_05_gpio_pin
++ &P2_07_gpio_pin
++ >;
++ pinctrl-5 = <
++ &P2_09_i2c_pin
++ &P2_11_i2c_pin
++ >;
++ pinctrl-6 = <
++ &P2_09_gpio_pin
++ &P2_11_gpio_pin
++ >;
++ pinctrl-7 = <
++ &P1_12_spi_pin
++ &P1_10_spi_pin
++ &P1_08_spi_sclk_pin
++ &P1_06_spi_cs_pin
++ >;
++ pinctrl-8 = <
++ &P1_12_gpio_pin
++ &P1_10_gpio_pin
++ &P1_08_gpio_pin
++ &P1_06_gpio_pin
++ >;
++ i2c-adapter = <&i2c1>;
++ spi-master = <0>;
++ spi-cs = <0 1>;
++ uart = <&uart4>;
++ pwms = <&ehrpwm1 0 500000 0>;
++ mikrobus-gpios = <&gpio1 18 0> , <&gpio0 23 0>,
++ <&gpio0 30 0> , <&gpio0 31 0>,
++ <&gpio0 15 0> , <&gpio0 14 0>,
++ <&gpio0 4 0> , <&gpio0 3 0>,
++ <&gpio0 2 0> , <&gpio0 5 0>,
++ <&gpio2 25 0> , <&gpio2 3 0>;
++ };
++};
++
++&spi0 {
++ status = "okay";
++ channel@0{ status = "disabled"; };
++};
++
++&uart4 {
++ status = "okay";
++ pinctrl-0 = <>;
++ force-empty-serdev-controller;
++};
++
++&ehrpwm1 {
++ pinctrl-0 = <>;
++};
+diff --git a/arch/arm/boot/dts/overlays/PB-MIKROBUS-1.dts b/arch/arm/boot/dts/overlays/PB-MIKROBUS-1.dts
+new file mode 100644
+index 000000000000..23236ee7c938
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/PB-MIKROBUS-1.dts
+@@ -0,0 +1,108 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * Copyright 2020 Vaishnav M A, BeagleBoard.org Foundation.
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/am33xx.h>
++
++/*
++ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
++ */
++&{/chosen} {
++ overlays {
++ PB-MIKROBUS-1 = __TIMESTAMP__;
++ };
++};
++
++/*
++ * Free up the pins used by the cape from the pinmux helpers.
++ */
++&ocp {
++ P1_36_pinmux { status = "disabled"; };
++ P1_34_pinmux { status = "disabled"; };
++ P1_32_pinmux { status = "disabled"; };
++ P1_30_pinmux { status = "disabled"; };
++ P1_28_pinmux { status = "disabled"; };
++ P1_26_pinmux { status = "disabled"; };
++ P2_25_pinmux { status = "disabled"; };
++ P2_27_pinmux { status = "disabled"; };
++ P2_29_pinmux { status = "disabled"; };
++ P2_31_pinmux { status = "disabled"; };
++ P2_33_pinmux { status = "disabled"; };
++ P2_35_pinmux { status = "disabled"; };
++};
++
++&{/} {
++ aliases {
++ mikrobus1 = "/mikrobus-1";
++ };
++
++ mikrobus-1 {
++ compatible = "linux,mikrobus";
++ status = "okay";
++ pinctrl-names = "default", "pwm_default", "pwm_gpio",
++ "uart_default", "uart_gpio", "i2c_default",
++ "i2c_gpio", "spi_default", "spi_gpio";
++ pinctrl-0 = <
++ &P1_34_gpio_input_pin
++ &P2_33_gpio_pin
++ &P2_35_gpio_pin
++ >;
++ pinctrl-1 = <&P1_36_pwm_pin>;
++ pinctrl-2 = <&P1_36_gpio_pin>;
++ pinctrl-3 = <
++ &P1_32_uart_pin
++ &P1_30_uart_pin
++ >;
++ pinctrl-4 = <
++ &P1_32_gpio_pin
++ &P1_30_gpio_pin
++ >;
++ pinctrl-5 = <
++ &P1_26_i2c_pin
++ &P1_28_i2c_pin
++ >;
++ pinctrl-6 = <
++ &P1_26_gpio_pin
++ &P1_28_gpio_pin
++ >;
++ pinctrl-7 = <
++ &P2_25_spi_pin
++ &P2_27_spi_pin
++ &P2_29_spi_sclk_pin
++ &P2_31_spi_cs_pin
++ >;
++ pinctrl-8 = <
++ &P2_25_gpio_pin
++ &P2_27_gpio_pin
++ &P2_29_gpio_pin
++ &P2_31_gpio_pin
++ >;
++ i2c-adapter = <&i2c2>;
++ spi-master = <1>;
++ spi-cs = <1 2>;
++ uart = <&uart0>;
++ pwms = <&ehrpwm0 0 500000 0>;
++ mikrobus-gpios = <&gpio3 14 0> , <&gpio0 26 0>,
++ <&gpio1 10 0> , <&gpio1 11 0>,
++ <&gpio0 13 0> , <&gpio0 12 0>,
++ <&gpio1 9 0> , <&gpio1 8 0>,
++ <&gpio0 7 0> , <&gpio0 19 0>,
++ <&gpio1 13 0> , <&gpio2 22 0>;
++ };
++};
++
++&spi1 {
++ status = "okay";
++ channel@0{ status = "disabled"; };
++ channel@1{ status = "disabled"; };
++};
++
++&uart0 {
++ status = "okay";
++ force-empty-serdev-controller;
++};
+diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
+index f48245ff87e5..625718042413 100644
+--- a/include/dt-bindings/pinctrl/omap.h
++++ b/include/dt-bindings/pinctrl/omap.h
+@@ -64,8 +64,8 @@
+ #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
+ #define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
+ #define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
+-#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0)
+-#define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)
++#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
++#define AM33XX_PADCONF(pa, dir, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) ((dir) | (mux))
+
+ /*
+ * Macros to allow using the offset from the padconf physical address
--
2.30.2
diff --git a/patches/wireless_regdb/0001-Add-wireless-regdb-regulatory-database-file.patch b/patches/wireless_regdb/0001-Add-wireless-regdb-regulatory-database-file.patch
index 8a1fc6df0..233cb57b5 100644
--- a/patches/wireless_regdb/0001-Add-wireless-regdb-regulatory-database-file.patch
+++ b/patches/wireless_regdb/0001-Add-wireless-regdb-regulatory-database-file.patch
@@ -1,6 +1,6 @@
-From 4a63c7fbaaf62f0ce0907320f10a0c90a0461993 Mon Sep 17 00:00:00 2001
+From 2f90f157ffbed232431ca640d1c177d2442abad5 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 29 Nov 2021 11:01:01 -0600
+Date: Tue, 7 Dec 2021 13:28:42 -0600
Subject: [PATCH] Add wireless-regdb regulatory database file
https://git.kernel.org/pub/scm/linux/kernel/git/sforshee/wireless-regdb.git/commit/?id=47007d0169c4c6c855a3fc5333c142489a43e89e
diff --git a/patches/wpanusb/0001-merge-wpanusb-https-github.com-statropy-wpanusb.patch b/patches/wpanusb/0001-merge-wpanusb-https-github.com-statropy-wpanusb.patch
index e5672ea73..e0387fc5e 100644
--- a/patches/wpanusb/0001-merge-wpanusb-https-github.com-statropy-wpanusb.patch
+++ b/patches/wpanusb/0001-merge-wpanusb-https-github.com-statropy-wpanusb.patch
@@ -1,6 +1,6 @@
-From 13fc7e045999d0cfb4575f02a77e75826c4bc59e Mon Sep 17 00:00:00 2001
+From 7e2fc32d08e6af2d20618e56966274072598f7bf Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 29 Nov 2021 11:00:34 -0600
+Date: Tue, 7 Dec 2021 13:26:24 -0600
Subject: [PATCH] merge: wpanusb: https://github.com/statropy/wpanusb
https://github.com/statropy/wpanusb/commit/251f0167545bf2dcaa3cad991a59dbf5ab05490a
diff --git a/version.sh b/version.sh
index 64b2cbd04..c3f33658c 100644
--- a/version.sh
+++ b/version.sh
@@ -38,10 +38,10 @@ toolchain="gcc_11_arm"
#Kernel
KERNEL_REL=5.16
-KERNEL_TAG=${KERNEL_REL}-rc3
+KERNEL_TAG=${KERNEL_REL}-rc4
kernel_rt=".X-rtY"
#Kernel Build
-BUILD=${build_prefix}2
+BUILD=${build_prefix}2.1
#v5.X-rcX + upto SHA
#prev_KERNEL_SHA=""
--
GitLab