From d339738def23e2b2721bf46d9e93761794b0bf8e Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Mon, 6 May 2019 11:37:16 -0500
Subject: [PATCH] 5.1-bone1 release
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
patch.sh | 114 +-
patches/WireGuard/0001-merge-WireGuard.patch | 4 +-
...generated-capes-add-dtbs-to-makefile.patch | 29 -
patches/defconfig | 4 +-
...-port-of-Nathaniel-Lewis-eQEP-driver.patch | 66 +-
...andled-fault-on-eQEP-register-access.patch | 2 +-
...0001-ti-dra7-etnaviv-2d-acceleration.patch | 50 -
.../gpio/0001-BeagleBone-pinmux-helper.patch | 20 +-
.../0002-am33xx-add-gpio-line-names.patch | 176 -
...we-have-drivers-stomping-on-each-ot.patch} | 8 +-
patches/ref_omap2plus_defconfig | 2 +-
...rrow-BeagleBone-Black-Industrial-dts.patch | 188 -
.../soc/ti/am335x/0001-sync-with-ti-4.4.patch | 23 -
...one-common-update-leds-to-match-3.8..patch | 38 -
...35x-bone-common-disable-running-JTAG.patch | 169 -
...335x-bone-common-add-no-capemgr.dtsi.patch | 396 --
...one-common-add-am335x-bbw-bbb-base.h.patch | 123 -
...5x-boneblack-common-remove-CEC-noise.patch | 86 -
...001-Add-BeagleBoard.org-DTBS-v5.1.x.patch} | 4339 ++++++++++++++++-
...1-am335x-boneblue.dts-force-1ghz-opp.patch | 35 -
.../blue/0002-blue-add-pwm-eqep-spi-etc.patch | 550 ---
...0003-am335x-boneblue.dts-fix-rtc-off.patch | 35 -
.../0001-ARM-dts-omap3-beagle-add-i2c2.patch | 28 -
.../0002-ARM-dts-omap3-beagle-xm-spidev.patch | 80 -
...eagle.dts-enable-twl4030-power-reset.patch | 29 -
.../ti/omap3/0004-omap3-beagle-fixes.patch | 63 -
...4-move-emif-so-panda-es-b3-now-boots.patch | 249 -
...ring-back-twl6030-clk32kg-regulator.patch} | 23 +-
...1-am335x-pocketbeagle.dtb-config-pin.patch | 2120 --------
...gle.dts-microSD-mcasp0_aclkr.mmc0_sd.patch | 26 -
.../0001-add-am335x-boneblack-uboot.dts.patch | 57 -
tools/host_det.sh | 52 +-
version.sh | 2 +-
33 files changed, 4433 insertions(+), 4753 deletions(-)
delete mode 100644 patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch
delete mode 100644 patches/drivers/ti/etnaviv/0001-ti-dra7-etnaviv-2d-acceleration.patch
delete mode 100644 patches/drivers/ti/gpio/0002-am33xx-add-gpio-line-names.patch
rename patches/drivers/ti/gpio/{0003-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch => 0002-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch} (76%)
delete mode 100644 patches/soc/ti/abbbi/0001-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
delete mode 100644 patches/soc/ti/am335x/0001-sync-with-ti-4.4.patch
delete mode 100644 patches/soc/ti/am335x/0002-ARM-dts-am335x-bone-common-update-leds-to-match-3.8..patch
delete mode 100644 patches/soc/ti/am335x/0003-ARM-dts-am335x-bone-common-disable-running-JTAG.patch
delete mode 100644 patches/soc/ti/am335x/0004-ARM-dts-am335x-bone-common-add-no-capemgr.dtsi.patch
delete mode 100644 patches/soc/ti/am335x/0005-ARM-dts-am335x-bone-common-add-am335x-bbw-bbb-base.h.patch
delete mode 100644 patches/soc/ti/am335x/0006-ARM-dts-am335x-boneblack-common-remove-CEC-noise.patch
rename patches/soc/ti/{uboot/0002-uboot-cape-universal-enablement.patch => beagleboard_dtbs/0001-Add-BeagleBoard.org-DTBS-v5.1.x.patch} (62%)
delete mode 100644 patches/soc/ti/blue/0001-am335x-boneblue.dts-force-1ghz-opp.patch
delete mode 100644 patches/soc/ti/blue/0002-blue-add-pwm-eqep-spi-etc.patch
delete mode 100644 patches/soc/ti/blue/0003-am335x-boneblue.dts-fix-rtc-off.patch
delete mode 100644 patches/soc/ti/omap3/0001-ARM-dts-omap3-beagle-add-i2c2.patch
delete mode 100644 patches/soc/ti/omap3/0002-ARM-dts-omap3-beagle-xm-spidev.patch
delete mode 100644 patches/soc/ti/omap3/0003-ARM-DTS-omap3-beagle.dts-enable-twl4030-power-reset.patch
delete mode 100644 patches/soc/ti/omap3/0004-omap3-beagle-fixes.patch
delete mode 100644 patches/soc/ti/omap4/0001-arm-dts-omap4-move-emif-so-panda-es-b3-now-boots.patch
rename patches/soc/ti/{omap4/0002-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch => panda/0001-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch} (79%)
delete mode 100644 patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch
delete mode 100644 patches/soc/ti/pocketbeagle/0002-am335x-pocketbeagle.dts-microSD-mcasp0_aclkr.mmc0_sd.patch
delete mode 100644 patches/soc/ti/uboot/0001-add-am335x-boneblack-uboot.dts.patch
diff --git a/patch.sh b/patch.sh
index 1ac7ba12b..c83d48174 100644
--- a/patch.sh
+++ b/patch.sh
@@ -109,7 +109,6 @@ aufs_fail () {
}
aufs () {
- echo "dir: aufs"
aufs_prefix="aufs5-"
#regenerate="enable"
if [ "x${regenerate}" = "xenable" ] ; then
@@ -176,11 +175,7 @@ aufs () {
cleanup
fi
- ${git} "${DIR}/patches/aufs/0001-merge-aufs-kbuild.patch"
- ${git} "${DIR}/patches/aufs/0002-merge-aufs-base.patch"
- ${git} "${DIR}/patches/aufs/0003-merge-aufs-mmap.patch"
- ${git} "${DIR}/patches/aufs/0004-merge-aufs-standalone.patch"
- ${git} "${DIR}/patches/aufs/0005-merge-aufs.patch"
+ dir 'aufs'
}
rt_cleanup () {
@@ -189,7 +184,6 @@ rt_cleanup () {
}
rt () {
- echo "dir: rt"
rt_patch="${KERNEL_REL}${kernel_rt}"
#${git_bin} revert --no-edit xyz
@@ -207,7 +201,7 @@ rt () {
exit 2
fi
- ${git} "${DIR}/patches/rt/0001-merge-CONFIG_PREEMPT_RT-Patch-Set.patch"
+ dir 'rt'
}
wireguard_fail () {
@@ -216,7 +210,6 @@ wireguard_fail () {
}
wireguard () {
- echo "dir: WireGuard"
#regenerate="enable"
if [ "x${regenerate}" = "xenable" ] ; then
cd ../
@@ -226,6 +219,11 @@ wireguard () {
rm -rf ./WireGuard || true
${git_bin} clone https://git.zx2c4.com/WireGuard --depth=1
fi
+
+ #cd ./WireGuard/
+ #${git_bin} revert --no-edit xyz
+ #cd ../
+
cd ./KERNEL/
../WireGuard/contrib/kernel-tree/create-patch.sh | patch -p1 || wireguard_fail
@@ -247,12 +245,11 @@ wireguard () {
cleanup
fi
- ${git} "${DIR}/patches/WireGuard/0001-merge-WireGuard.patch"
+ dir 'WireGuard'
}
ti_pm_firmware () {
#http://git.ti.com/gitweb/?p=processor-firmware/ti-amx3-cm3-pm-firmware.git;a=shortlog;h=refs/heads/ti-v4.1.y-next
- echo "dir: drivers/ti/firmware"
#regenerate="enable"
if [ "x${regenerate}" = "xenable" ] ; then
@@ -285,7 +282,61 @@ ti_pm_firmware () {
cleanup
fi
- ${git} "${DIR}/patches/drivers/ti/firmware/0001-Add-AM335x-CM3-Power-Managment-Firmware.patch"
+ dir 'drivers/ti/firmware'
+}
+dtb_makefile_append_omap4 () {
+ sed -i -e 's:omap4-panda.dtb \\:omap4-panda.dtb \\\n\t'$device' \\:g' arch/arm/boot/dts/Makefile
+}
+
+dtb_makefile_append () {
+ sed -i -e 's:am335x-boneblack.dtb \\:am335x-boneblack.dtb \\\n\t'$device' \\:g' arch/arm/boot/dts/Makefile
+}
+
+beagleboard_dtbs () {
+ bbdtbs="v5.1.x"
+ #regenerate="enable"
+ if [ "x${regenerate}" = "xenable" ] ; then
+ cd ../
+ if [ ! -d ./BeagleBoard-DeviceTrees ] ; then
+ ${git_bin} clone -b ${bbdtbs} https://github.com/beagleboard/BeagleBoard-DeviceTrees --depth=1
+ else
+ rm -rf ./BeagleBoard-DeviceTrees || true
+ ${git_bin} clone -b ${bbdtbs} https://github.com/beagleboard/BeagleBoard-DeviceTrees --depth=1
+ fi
+ cd ./KERNEL/
+
+ cp -vr ../BeagleBoard-DeviceTrees/src/arm/* arch/arm/boot/dts/
+ cp -vr ../BeagleBoard-DeviceTrees/include/dt-bindings/* ./include/dt-bindings/
+
+ device="omap4-panda-es-b3.dtb" ; dtb_makefile_append_omap4
+
+ device="am335x-abbbi.dtb" ; dtb_makefile_append
+
+ device="am335x-boneblack-uboot.dtb" ; dtb_makefile_append
+
+ device="am335x-bone-uboot-univ.dtb" ; dtb_makefile_append
+ device="am335x-boneblack-uboot-univ.dtb" ; dtb_makefile_append
+ device="am335x-bonegreen-wireless-uboot-univ.dtb" ; dtb_makefile_append
+
+ ${git_bin} add -f arch/arm/boot/dts/
+ ${git_bin} add -f include/dt-bindings/
+ ${git_bin} commit -a -m "Add BeagleBoard.org DTBS: $bbdtbs" -m "https://github.com/beagleboard/BeagleBoard-DeviceTrees/tree/${bbdtbs}" -s
+ ${git_bin} format-patch -1 -o ../patches/soc/ti/beagleboard_dtbs/
+
+ rm -rf ../BeagleBoard-DeviceTrees/ || true
+
+ ${git_bin} reset --hard HEAD^
+
+ start_cleanup
+
+ ${git} "${DIR}/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-DTBS-$bbdtbs.patch"
+
+ wdir="soc/ti/beagleboard_dtbs"
+ number=1
+ cleanup
+ fi
+
+ dir 'soc/ti/beagleboard_dtbs'
}
local_patch () {
@@ -298,6 +349,7 @@ local_patch () {
#rt
wireguard
ti_pm_firmware
+beagleboard_dtbs
#local_patch
pre_backports () {
@@ -380,7 +432,6 @@ drivers () {
dir 'drivers/ti/overlays'
dir 'drivers/ti/cpsw'
- dir 'drivers/ti/etnaviv'
dir 'drivers/ti/eqep'
dir 'drivers/ti/rpmsg'
dir 'drivers/ti/serial'
@@ -393,41 +444,7 @@ soc () {
# dir 'soc/imx/wandboard'
# dir 'soc/imx/imx7'
- dir 'soc/ti/omap3'
- dir 'soc/ti/omap4'
- dir 'soc/ti/am335x'
-
- dir 'soc/ti/blue'
- dir 'soc/ti/abbbi'
- dir 'soc/ti/pocketbeagle'
- dir 'soc/ti/uboot'
-}
-
-dtb_makefile_append () {
- sed -i -e 's:am335x-boneblack.dtb \\:am335x-boneblack.dtb \\\n\t'$device' \\:g' arch/arm/boot/dts/Makefile
-}
-
-beaglebone () {
- ####
- #dtb makefile
- echo "dir: beaglebone/generated"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
-
- device="am335x-abbbi.dtb" ; dtb_makefile_append
-
- device="am335x-boneblack-uboot.dtb" ; dtb_makefile_append
-
- device="am335x-bone-uboot-univ.dtb" ; dtb_makefile_append
- device="am335x-boneblack-uboot-univ.dtb" ; dtb_makefile_append
- device="am335x-bonegreen-wireless-uboot-univ.dtb" ; dtb_makefile_append
-
- git commit -a -m 'auto generated: capes: add dtbs to makefile' -s
- git format-patch -1 -o ../patches/beaglebone/generated/
- exit 2
- else
- ${git} "${DIR}/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch"
- fi
+ dir 'soc/ti/panda'
}
###
@@ -435,7 +452,6 @@ beaglebone () {
#reverts
drivers
soc
-beaglebone
packaging () {
echo "dir: packaging"
diff --git a/patches/WireGuard/0001-merge-WireGuard.patch b/patches/WireGuard/0001-merge-WireGuard.patch
index 84e701c3f..6ee5ae025 100644
--- a/patches/WireGuard/0001-merge-WireGuard.patch
+++ b/patches/WireGuard/0001-merge-WireGuard.patch
@@ -1,6 +1,6 @@
-From f549fc87d4b62f38138a8c1929efd666c700ab13 Mon Sep 17 00:00:00 2001
+From c109438cbb6f2bfde2db0cc5def4948ce94c3e9b Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 29 Apr 2019 10:29:36 -0500
+Date: Mon, 6 May 2019 10:43:34 -0500
Subject: [PATCH] merge: WireGuard
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
diff --git a/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch b/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch
deleted file mode 100644
index 59c92fdf5..000000000
--- a/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 23bb33ecc487dbce8393173df17bf562161c7c6e Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Thu, 4 Apr 2019 17:17:03 -0500
-Subject: [PATCH] auto generated: capes: add dtbs to makefile
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/Makefile | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 64d963019453..a225a81cb10a 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -725,6 +725,11 @@ dtb-$(CONFIG_SOC_AM33XX) += \
- am335x-base0033.dtb \
- am335x-bone.dtb \
- am335x-boneblack.dtb \
-+ am335x-bonegreen-wireless-uboot-univ.dtb \
-+ am335x-boneblack-uboot-univ.dtb \
-+ am335x-bone-uboot-univ.dtb \
-+ am335x-boneblack-uboot.dtb \
-+ am335x-abbbi.dtb \
- am335x-boneblack-wireless.dtb \
- am335x-boneblue.dtb \
- am335x-bonegreen.dtb \
---
-2.20.1
-
diff --git a/patches/defconfig b/patches/defconfig
index 1b245f61f..bf18c138d 100644
--- a/patches/defconfig
+++ b/patches/defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm 5.1.0-rc7 Kernel Configuration
+# Linux/arm 5.1.0 Kernel Configuration
#
#
@@ -22,7 +22,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_BUILD_SALT="5.1-rc7-bone1"
+CONFIG_BUILD_SALT="5.1-bone1"
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
diff --git a/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch b/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch
index 679f8381a..1453232f0 100644
--- a/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch
+++ b/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch
@@ -1,72 +1,16 @@
-From 523de078edb45c432770993a37202d0415cec261 Mon Sep 17 00:00:00 2001
+From b87f860187721ba5664ddb4735a09a477304781d Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Sun, 30 Dec 2018 19:37:59 -0600
Subject: [PATCH 1/2] tieqep: forward port of Nathaniel Lewis eQEP driver
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
- arch/arm/boot/dts/am33xx-l4.dtsi | 30 ++
- drivers/misc/Kconfig | 11 +
- drivers/misc/Makefile | 1 +
- drivers/misc/tieqep.c | 738 +++++++++++++++++++++++++++++++
- 4 files changed, 780 insertions(+)
+ drivers/misc/Kconfig | 11 +
+ drivers/misc/Makefile | 1 +
+ drivers/misc/tieqep.c | 738 ++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 750 insertions(+)
create mode 100644 drivers/misc/tieqep.c
-diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
-index f459ec316a22..44c3f33f78a6 100644
---- a/arch/arm/boot/dts/am33xx-l4.dtsi
-+++ b/arch/arm/boot/dts/am33xx-l4.dtsi
-@@ -1912,6 +1912,16 @@
- status = "disabled";
- };
-
-+ eqep0: eqep@180 {
-+ compatible = "ti,am33xx-eqep";
-+ reg = <0x180 0x80>;
-+ clocks = <&l4ls_gclk>;
-+ clock-names = "fck";
-+ interrupts = <79>;
-+ interrupt-names = "eqep0";
-+ status = "disabled";
-+ };
-+
- ehrpwm0: pwm@200 {
- compatible = "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
-@@ -1965,6 +1975,16 @@
- status = "disabled";
- };
-
-+ eqep1: eqep@180 {
-+ compatible = "ti,am33xx-eqep";
-+ reg = <0x180 0x80>;
-+ clocks = <&l4ls_gclk>;
-+ clock-names = "fck";
-+ interrupts = <88>;
-+ interrupt-names = "eqep1";
-+ status = "disabled";
-+ };
-+
- ehrpwm1: pwm@200 {
- compatible = "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
-@@ -2018,6 +2038,16 @@
- status = "disabled";
- };
-
-+ eqep2: eqep@180 {
-+ compatible = "ti,am33xx-eqep";
-+ reg = <0x180 0x80>;
-+ clocks = <&l4ls_gclk>;
-+ clock-names = "fck";
-+ interrupts = <89>;
-+ interrupt-names = "eqep2";
-+ status = "disabled";
-+ };
-+
- ehrpwm2: pwm@200 {
- compatible = "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 42ab8ec92a04..e4290588bed9 100644
--- a/drivers/misc/Kconfig
diff --git a/patches/drivers/ti/eqep/0002-tieqep-fix-unhandled-fault-on-eQEP-register-access.patch b/patches/drivers/ti/eqep/0002-tieqep-fix-unhandled-fault-on-eQEP-register-access.patch
index ccec85f2f..f826eea67 100644
--- a/patches/drivers/ti/eqep/0002-tieqep-fix-unhandled-fault-on-eQEP-register-access.patch
+++ b/patches/drivers/ti/eqep/0002-tieqep-fix-unhandled-fault-on-eQEP-register-access.patch
@@ -1,4 +1,4 @@
-From 8c343fd056216ba03345da5f1ca16ede76f72f6a Mon Sep 17 00:00:00 2001
+From 7800300da7c9bc4baa69768857ae211751df4ecb Mon Sep 17 00:00:00 2001
From: Drew Fustini <drew@pdp7.com>
Date: Thu, 2 Feb 2017 05:19:11 -0600
Subject: [PATCH 2/2] tieqep: fix unhandled fault on eQEP register access
diff --git a/patches/drivers/ti/etnaviv/0001-ti-dra7-etnaviv-2d-acceleration.patch b/patches/drivers/ti/etnaviv/0001-ti-dra7-etnaviv-2d-acceleration.patch
deleted file mode 100644
index 6273ea305..000000000
--- a/patches/drivers/ti/etnaviv/0001-ti-dra7-etnaviv-2d-acceleration.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 954fc84cf778050de4da6ed19566b6dc3673d31a Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Sun, 17 Mar 2019 18:31:07 -0500
-Subject: [PATCH] ti: dra7: etnaviv: 2d acceleration
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 4 ++++
- arch/arm/boot/dts/dra7.dtsi | 10 ++++++++++
- 2 files changed, 14 insertions(+)
-
-diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
-index 1e6620f139dd..5dd7bc1f9bb5 100644
---- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
-+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
-@@ -167,6 +167,10 @@
- };
- };
-
-+&bb2d {
-+ status = "okay";
-+};
-+
- &i2c1 {
- status = "okay";
- clock-frequency = <400000>;
-diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
-index 2bc9add8b7a5..cb71acbc77cb 100644
---- a/arch/arm/boot/dts/dra7.dtsi
-+++ b/arch/arm/boot/dts/dra7.dtsi
-@@ -377,6 +377,16 @@
- ti,hwmods = "dmm";
- };
-
-+ bb2d: bb2d@59000000 {
-+ compatible = "ti,dra7-bb2d","vivante,gc";
-+ reg = <0x59000000 0x0700>;
-+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
-+ ti,hwmods = "bb2d";
-+ clocks = <&dpll_core_h24x2_ck>;
-+ clock-names = "fclk";
-+ status = "disabled";
-+ };
-+
- mmu0_dsp1: mmu@40d01000 {
- compatible = "ti,dra7-dsp-iommu";
- reg = <0x40d01000 0x100>;
---
-2.20.1
-
diff --git a/patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch b/patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch
index 5344903b1..8c66a891c 100644
--- a/patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch
+++ b/patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch
@@ -1,7 +1,7 @@
-From 0080afd9ece3d7f24d46d49d51fe4b503b064f55 Mon Sep 17 00:00:00 2001
+From dca2bc1cdbbe7698f5a40512682779c1bc1a3807 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Mon, 29 Jan 2018 13:43:56 -0600
-Subject: [PATCH 1/3] BeagleBone pinmux helper
+Subject: [PATCH 1/2] BeagleBone pinmux helper
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
@@ -19,7 +19,6 @@ https://github.com/RobertCNelson/linux-dev/tree/35e301ae8436e9f56f65bf1a7440021e
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
- arch/arm/boot/dts/am33xx.dtsi | 2 +-
drivers/gpio/Kconfig | 14 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-of-helper.c | 435 ++++++++++++++++++
@@ -31,7 +30,7 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
drivers/misc/cape/beaglebone/Kconfig | 10 +
drivers/misc/cape/beaglebone/Makefile | 5 +
.../misc/cape/beaglebone/bone-pinmux-helper.c | 242 ++++++++++
- 12 files changed, 752 insertions(+), 4 deletions(-)
+ 11 files changed, 751 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpio/gpio-of-helper.c
create mode 100644 drivers/misc/cape/Kconfig
create mode 100644 drivers/misc/cape/Makefile
@@ -39,19 +38,6 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
create mode 100644 drivers/misc/cape/beaglebone/Makefile
create mode 100644 drivers/misc/cape/beaglebone/bone-pinmux-helper.c
-diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
-index a2eca3f4feac..f9a7e1d48174 100644
---- a/arch/arm/boot/dts/am33xx.dtsi
-+++ b/arch/arm/boot/dts/am33xx.dtsi
-@@ -160,7 +160,7 @@
- * for the moment, just use a fake OCP bus entry to represent
- * the whole bus hierarchy.
- */
-- ocp {
-+ ocp: ocp {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 3f50526a771f..579ecfe34b59 100644
--- a/drivers/gpio/Kconfig
diff --git a/patches/drivers/ti/gpio/0002-am33xx-add-gpio-line-names.patch b/patches/drivers/ti/gpio/0002-am33xx-add-gpio-line-names.patch
deleted file mode 100644
index f1560c796..000000000
--- a/patches/drivers/ti/gpio/0002-am33xx-add-gpio-line-names.patch
+++ /dev/null
@@ -1,176 +0,0 @@
-From ff6d24db1dc8c5abc2eca7858389a9bb5a9d6ebd Mon Sep 17 00:00:00 2001
-From: Jason Kridner <jdk@ti.com>
-Date: Tue, 2 Jan 2018 20:18:02 +0000
-Subject: [PATCH 2/3] am33xx: add gpio line names
-
----
- arch/arm/boot/dts/am33xx-l4.dtsi | 132 +++++++++++++++++++++++++++++++
- 1 file changed, 132 insertions(+)
-
-diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
-index 44c3f33f78a6..3cb07b979da7 100644
---- a/arch/arm/boot/dts/am33xx-l4.dtsi
-+++ b/arch/arm/boot/dts/am33xx-l4.dtsi
-@@ -158,6 +158,39 @@
- #interrupt-cells = <2>;
- reg = <0x0 0x1000>;
- interrupts = <96>;
-+ gpio-line-names =
-+ "MDIO_DATA", // 0
-+ "MDIO_CLK", // 1
-+ "SPI0_SCLK", // 2
-+ "SPI0_D0", // 3
-+ "SPI0_D1", // 4
-+ "SPI0_CS0", // 5
-+ "SPI0_CS1", // 6
-+ "ECAP0_IN_PWM0_OUT", // 7
-+ "LCD_DATA12", // 8
-+ "LCD_DATA13", // 9
-+ "LCD_DATA14", // 10
-+ "LCD_DATA15", // 11
-+ "UART1_CTSN", // 12
-+ "UART1_RTSN", // 13
-+ "UART1_RXD", // 14
-+ "UART1_TXD", // 15
-+ "GMII1_TXD3", // 16
-+ "GMII1_TXD2", // 17
-+ "USB0_DRVVBUS", // 18
-+ "XDMA_EVENT_INTR0", // 19
-+ "XDMA_EVENT_INTR1", // 20
-+ "GMII1_TXD1", // 21
-+ "GPMC_AD8", // 22
-+ "GPMC_AD9", // 23
-+ "NC", // 24
-+ "NC", // 25
-+ "GPMC_AD10", // 26
-+ "GPMC_AD11", // 27
-+ "GMII1_TXD0", // 28
-+ "RMII1_REFCLK", // 29
-+ "GPMC_WAIT0", // 30
-+ "GPMC_WPN"; // 31
- };
- };
-
-@@ -1299,6 +1332,39 @@
- #interrupt-cells = <2>;
- reg = <0x0 0x1000>;
- interrupts = <98>;
-+ gpio-line-names =
-+ "GPMC_AD0", // 0
-+ "GPMC_AD1", // 1
-+ "GPMC_AD2", // 2
-+ "GPMC_AD3", // 3
-+ "GPMC_AD4", // 4
-+ "GPMC_AD5", // 5
-+ "GPMC_AD6", // 6
-+ "GPMC_AD7", // 7
-+ "UART0_CTSN", // 8
-+ "UART0_RTSN", // 9
-+ "UART0_RXD", // 10
-+ "UART0_TXD", // 11
-+ "GPMC_AD12", // 12
-+ "GPMC_AD13", // 13
-+ "GPMC_AD14", // 14
-+ "GPMC_AD15", // 15
-+ "GPMC_A0", // 16
-+ "GPMC_A1", // 17
-+ "GPMC_A2", // 18
-+ "GPMC_A3", // 19
-+ "GPMC_A4", // 20
-+ "GPMC_A5", // 21
-+ "GPMC_A6", // 22
-+ "GPMC_A7", // 23
-+ "GPMC_A8", // 24
-+ "GPMC_A9", // 25
-+ "GPMC_A10", // 26
-+ "GPMC_A11", // 27
-+ "GPMC_BE1N", // 28
-+ "GPMC_CSN0", // 29
-+ "GPMC_CSN1", // 30
-+ "GPMC_CSN2"; // 31
- };
- };
-
-@@ -1711,6 +1777,39 @@
- #interrupt-cells = <2>;
- reg = <0x0 0x1000>;
- interrupts = <32>;
-+ gpio-line-names =
-+ "GPMC_CSN3", // 0
-+ "GPMC_CLK", // 1
-+ "GPMC_ADVN_ALE", // 2
-+ "GPMC_OEN_REN", // 3
-+ "GPMC_WEN", // 4
-+ "GPMC_BE0N_CLE", // 5
-+ "LCD_DATA0", // 6
-+ "LCD_DATA1", // 7
-+ "LCD_DATA2", // 8
-+ "LCD_DATA3", // 9
-+ "LCD_DATA4", // 10
-+ "LCD_DATA5", // 11
-+ "LCD_DATA6", // 12
-+ "LCD_DATA7", // 13
-+ "LCD_DATA8", // 14
-+ "LCD_DATA9", // 15
-+ "LCD_DATA10", // 16
-+ "LCD_DATA11", // 17
-+ "GMII1_RXD3", // 18
-+ "GMII1_RXD2", // 19
-+ "GMII1_RXD1", // 20
-+ "GMII1_RXD0", // 21
-+ "LCD_VSYNC", // 22
-+ "LCD_HSYNC", // 23
-+ "LCD_PCLK", // 24
-+ "LCD_AC_BIAS_EN", // 25
-+ "MMC0_DAT3", // 26
-+ "MMC0_DAT2", // 27
-+ "MMC0_DAT1", // 28
-+ "MMC0_DAT0", // 29
-+ "MMC0_CLK", // 30
-+ "MMC0_CMD"; // 31
- };
- };
-
-@@ -1745,6 +1844,39 @@
- #interrupt-cells = <2>;
- reg = <0x0 0x1000>;
- interrupts = <62>;
-+ gpio-line-names =
-+ "GMII1_COL", // 0
-+ "GMII1_CRS", // 1
-+ "GMII1_RXER", // 2
-+ "GMII1_TXEN", // 3
-+ "GMII1_RXDV", // 4
-+ "I2C0_SDA", // 5
-+ "I2C0_SCL", // 6
-+ "EMU0", // 7
-+ "EMU1", // 8
-+ "GMII1_TXCLK", // 9
-+ "GMII1_RXCLK", // 10
-+ "NC", // 11
-+ "NC", // 12
-+ "USB1_DRVVBUS", // 13
-+ "MCASP0_ACLKX", // 14
-+ "MCASP0_FSX", // 15
-+ "MCASP0_AXR0", // 16
-+ "MCASP0_AHCLKR", // 17
-+ "MCASP0_ACLKR", // 18
-+ "MCASP0_FSR", // 19
-+ "MCASP0_AXR1", // 20
-+ "MCASP0_AHCLKX", // 21
-+ "NC", // 22
-+ "NC", // 23
-+ "NC", // 24
-+ "NC", // 25
-+ "NC", // 26
-+ "NC", // 27
-+ "NC", // 28
-+ "NC", // 29
-+ "NC", // 30
-+ "NC"; // 31
- };
- };
-
---
-2.20.1
-
diff --git a/patches/drivers/ti/gpio/0003-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch b/patches/drivers/ti/gpio/0002-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch
similarity index 76%
rename from patches/drivers/ti/gpio/0003-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch
rename to patches/drivers/ti/gpio/0002-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch
index a6900f4a1..983027d06 100644
--- a/patches/drivers/ti/gpio/0003-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch
+++ b/patches/drivers/ti/gpio/0002-hack-gpiolib-yes-we-have-drivers-stomping-on-each-ot.patch
@@ -1,7 +1,7 @@
-From 74a9234de08135ade696e1391e30caed8495618f Mon Sep 17 00:00:00 2001
+From 88aec6df5236f77caf0fa8520cfa2561e5ffb4dc Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Sun, 30 Dec 2018 19:44:02 -0600
-Subject: [PATCH 3/3] hack: gpiolib: yes we have drivers stomping on each
+Subject: [PATCH 2/2] hack: gpiolib: yes we have drivers stomping on each
other, we need to find a better way to share gpio...
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
@@ -10,10 +10,10 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
-index 0495bf1d480a..bbd7791b2739 100644
+index bca3e7740ef6..71a8af876b4f 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
-@@ -2328,10 +2328,10 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
+@@ -2332,10 +2332,10 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
desc_set_label(desc, label ? : "?");
status = 0;
diff --git a/patches/ref_omap2plus_defconfig b/patches/ref_omap2plus_defconfig
index 9133d9730..2c022fc92 100644
--- a/patches/ref_omap2plus_defconfig
+++ b/patches/ref_omap2plus_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/arm 5.1.0-rc7 Kernel Configuration
+# Linux/arm 5.1.0 Kernel Configuration
#
#
diff --git a/patches/soc/ti/abbbi/0001-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch b/patches/soc/ti/abbbi/0001-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
deleted file mode 100644
index ced4a9971..000000000
--- a/patches/soc/ti/abbbi/0001-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
+++ /dev/null
@@ -1,188 +0,0 @@
-From 6ac30bc189f96064ecb9251a766a093b16dc68c2 Mon Sep 17 00:00:00 2001
-From: Matt Porter <mporter@konsulko.com>
-Date: Tue, 3 Nov 2015 15:37:54 -0500
-Subject: [PATCH] ARM: dts: add Arrow BeagleBone Black Industrial dts
-
-Adds a dts file for the Arrow BeagleBone Black Industrial board.
-This BBB variant differs in that it uses an industrial temp rated
-ADV7511W HDMI encoder rather than the NXP HDMI encoder on the
-tradtional BBB.
-
-Signed-off-by: Matt Porter <mporter@konsulko.com>
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-abbbi.dts | 162 +++++++++++++++++++++++++++++
- 1 file changed, 162 insertions(+)
- create mode 100644 arch/arm/boot/dts/am335x-abbbi.dts
-
-diff --git a/arch/arm/boot/dts/am335x-abbbi.dts b/arch/arm/boot/dts/am335x-abbbi.dts
-new file mode 100644
-index 000000000000..82bf99e47616
---- /dev/null
-+++ b/arch/arm/boot/dts/am335x-abbbi.dts
-@@ -0,0 +1,162 @@
-+/*
-+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
-+ * Copyright 2015 Konsulko Group
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+/dts-v1/;
-+
-+#include "am33xx.dtsi"
-+#include "am335x-bone-common.dtsi"
-+
-+/ {
-+ model = "Arrow BeagleBone Black Industrial";
-+ compatible = "arrow,am335x-abbbi", "ti,am335x-bone", "ti,am33xx";
-+};
-+
-+&ldo3_reg {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-always-on;
-+};
-+
-+&mmc1 {
-+ vmmc-supply = <&vmmcsd_fixed>;
-+};
-+
-+&mmc2 {
-+ vmmc-supply = <&vmmcsd_fixed>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emmc_pins>;
-+ bus-width = <8>;
-+ status = "okay";
-+};
-+
-+&am33xx_pinmux {
-+ adi_hdmi_bbbi_pins: adi_hdmi_bbbi_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
-+ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
-+ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
-+ AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
-+ AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
-+ AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
-+ AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
-+ AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
-+ AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
-+ AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
-+ AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
-+ AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
-+ AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
-+ AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
-+ AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
-+ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
-+ AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
-+ AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
-+ AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
-+ AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
-+ >;
-+ };
-+
-+ mcasp0_pins: mcasp0_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
-+ AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
-+ AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
-+ AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
-+ AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
-+ >;
-+ };
-+};
-+
-+&lcdc {
-+ status = "okay";
-+
-+ /* If you want to get 24 bit RGB and 16 BGR mode instead of
-+ * current 16 bit RGB and 24 BGR modes, set the propety
-+ * below to "crossed" and uncomment the video-ports -property
-+ * in tda19988 node.
-+ */
-+ blue-and-red-wiring = "straight";
-+
-+ port {
-+ lcdc_0: endpoint@0 {
-+ remote-endpoint = <&hdmi_0>;
-+ };
-+ };
-+};
-+
-+&i2c0 {
-+ adv7511: adv7511@39 {
-+ compatible = "adi,adv7511";
-+ reg = <0x39>;
-+
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&adi_hdmi_bbbi_pins>;
-+
-+ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
-+ /* video-ports = <0x234501>; */
-+
-+ #sound-dai-cells = <0>;
-+
-+ ports {
-+ port@0 {
-+ hdmi_0: endpoint@0 {
-+ remote-endpoint = <&lcdc_0>;
-+ };
-+ };
-+ };
-+ };
-+};
-+
-+&rtc {
-+ system-power-controller;
-+};
-+
-+&mcasp0 {
-+ #sound-dai-cells = <0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mcasp0_pins>;
-+ status = "okay";
-+ op-mode = <0>; /* MCASP_IIS_MODE */
-+ tdm-slots = <2>;
-+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
-+ 0 0 1 0
-+ >;
-+ tx-num-evt = <1>;
-+ rx-num-evt = <1>;
-+};
-+
-+/ {
-+ clk_mcasp0_fixed: clk_mcasp0_fixed {
-+ #clock-cells = <0>;
-+ compatible = "fixed-clock";
-+ clock-frequency = <24576000>;
-+ };
-+
-+ clk_mcasp0: clk_mcasp0 {
-+ #clock-cells = <0>;
-+ compatible = "gpio-gate-clock";
-+ clocks = <&clk_mcasp0_fixed>;
-+ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
-+ };
-+
-+ sound {
-+ compatible = "simple-audio-card";
-+ simple-audio-card,name = "TI BeagleBone Black";
-+ simple-audio-card,format = "i2s";
-+ simple-audio-card,bitclock-master = <&dailink0_master>;
-+ simple-audio-card,frame-master = <&dailink0_master>;
-+
-+ dailink0_master: simple-audio-card,cpu {
-+ sound-dai = <&mcasp0>;
-+ clocks = <&clk_mcasp0>;
-+ };
-+
-+ simple-audio-card,codec {
-+ sound-dai = <&adv7511>;
-+ };
-+ };
-+};
---
-2.20.1
-
diff --git a/patches/soc/ti/am335x/0001-sync-with-ti-4.4.patch b/patches/soc/ti/am335x/0001-sync-with-ti-4.4.patch
deleted file mode 100644
index a3b4fe0a3..000000000
--- a/patches/soc/ti/am335x/0001-sync-with-ti-4.4.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 2265d02e53c8c9a2de4f10341e53de0568ab2557 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Tue, 1 Jan 2019 16:45:52 -0600
-Subject: [PATCH 1/6] sync: with ti-4.4
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-bone-common.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
-index 456eef57ef89..3b71862b0eb8 100644
---- a/arch/arm/boot/dts/am335x-bone-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
-@@ -421,4 +421,5 @@
- &rtc {
- clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
- clock-names = "ext-clk", "int-clk";
-+ system-power-controller;
- };
---
-2.20.1
-
diff --git a/patches/soc/ti/am335x/0002-ARM-dts-am335x-bone-common-update-leds-to-match-3.8..patch b/patches/soc/ti/am335x/0002-ARM-dts-am335x-bone-common-update-leds-to-match-3.8..patch
deleted file mode 100644
index 0c5848b50..000000000
--- a/patches/soc/ti/am335x/0002-ARM-dts-am335x-bone-common-update-leds-to-match-3.8..patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 3ca83138401c67a1bff6470aa8293c728a864aa0 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Wed, 27 Aug 2014 13:56:37 -0500
-Subject: [PATCH 2/6] ARM: dts: am335x-bone-common: update leds to match 3.8.13
- kernel
-
-https://groups.google.com/d/msg/beagleboard/634Xm1m3XA8/B028x1FzAyAJ
-
-Reported-by: Mark A. Yoder <mark.a.yoder@gmail.com>
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
-index 3b71862b0eb8..102a70c1dd4b 100644
---- a/arch/arm/boot/dts/am335x-bone-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
-@@ -29,14 +29,14 @@
- compatible = "gpio-leds";
-
- led2 {
-- label = "beaglebone:green:heartbeat";
-+ label = "beaglebone:green:usr0";
- gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
-
- led3 {
-- label = "beaglebone:green:mmc0";
-+ label = "beaglebone:green:usr1";
- gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- default-state = "off";
---
-2.20.1
-
diff --git a/patches/soc/ti/am335x/0003-ARM-dts-am335x-bone-common-disable-running-JTAG.patch b/patches/soc/ti/am335x/0003-ARM-dts-am335x-bone-common-disable-running-JTAG.patch
deleted file mode 100644
index 6c7f4e537..000000000
--- a/patches/soc/ti/am335x/0003-ARM-dts-am335x-bone-common-disable-running-JTAG.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From 067243b870e060708703d43c62d3245caa9b7313 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Tue, 27 Nov 2018 14:35:14 -0600
-Subject: [PATCH 3/6] ARM: dts: am335x-bone-common: disable running JTAG
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-bone-common.dtsi | 9 ---------
- arch/arm/boot/dts/am335x-bone-jtag.dtsi | 20 +++++++++++++++++++
- arch/arm/boot/dts/am335x-bone.dts | 1 +
- .../boot/dts/am335x-boneblack-wireless.dts | 1 +
- arch/arm/boot/dts/am335x-boneblack.dts | 1 +
- .../boot/dts/am335x-bonegreen-wireless.dts | 1 +
- arch/arm/boot/dts/am335x-bonegreen.dts | 1 +
- arch/arm/boot/dts/am335x-osd3358-sm-red.dts | 10 +---------
- 8 files changed, 26 insertions(+), 18 deletions(-)
- create mode 100644 arch/arm/boot/dts/am335x-bone-jtag.dtsi
-
-diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
-index 102a70c1dd4b..27489c9b2dc1 100644
---- a/arch/arm/boot/dts/am335x-bone-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
-@@ -66,9 +66,6 @@
- };
-
- &am33xx_pinmux {
-- pinctrl-names = "default";
-- pinctrl-0 = <&clkout2_pin>;
--
- user_leds_s0: user_leds_s0 {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
-@@ -99,12 +96,6 @@
- >;
- };
-
-- clkout2_pin: pinmux_clkout2_pin {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
-- >;
-- };
--
- cpsw_default: cpsw_default {
- pinctrl-single,pins = <
- /* Slave 1 */
-diff --git a/arch/arm/boot/dts/am335x-bone-jtag.dtsi b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
-new file mode 100644
-index 000000000000..603ef0a4d7b2
---- /dev/null
-+++ b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
-@@ -0,0 +1,20 @@
-+/*
-+ * Device Tree Source for bone jtag
-+ *
-+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+&am33xx_pinmux {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&clkout2_pin>;
-+
-+ clkout2_pin: pinmux_clkout2_pin {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
-+ >;
-+ };
-+};
-diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
-index 6b8493720424..3688fff0a5f0 100644
---- a/arch/arm/boot/dts/am335x-bone.dts
-+++ b/arch/arm/boot/dts/am335x-bone.dts
-@@ -9,6 +9,7 @@
-
- #include "am33xx.dtsi"
- #include "am335x-bone-common.dtsi"
-+/* #include "am335x-bone-jtag.dtsi" */
-
- / {
- model = "TI AM335x BeagleBone";
-diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
-index 83f49f616b19..4664f203b17c 100644
---- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts
-+++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
-@@ -11,6 +11,7 @@
- #include "am335x-bone-common.dtsi"
- #include "am335x-boneblack-common.dtsi"
- #include <dt-bindings/interrupt-controller/irq.h>
-+/* #include "am335x-bone-jtag.dtsi" */
-
- / {
- model = "TI AM335x BeagleBone Black Wireless";
-diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
-index d154d3133c16..e62023252165 100644
---- a/arch/arm/boot/dts/am335x-boneblack.dts
-+++ b/arch/arm/boot/dts/am335x-boneblack.dts
-@@ -10,6 +10,7 @@
- #include "am33xx.dtsi"
- #include "am335x-bone-common.dtsi"
- #include "am335x-boneblack-common.dtsi"
-+/* #include "am335x-bone-jtag.dtsi" */
-
- / {
- model = "TI AM335x BeagleBone Black";
-diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
-index 57731f0daf10..de299ad8ee40 100644
---- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
-+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
-@@ -11,6 +11,7 @@
- #include "am335x-bone-common.dtsi"
- #include "am335x-bonegreen-common.dtsi"
- #include <dt-bindings/interrupt-controller/irq.h>
-+/* #include "am335x-bone-jtag.dtsi" */
-
- / {
- model = "TI AM335x BeagleBone Green Wireless";
-diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
-index a8b4d969ce2a..575a5a93a89e 100644
---- a/arch/arm/boot/dts/am335x-bonegreen.dts
-+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
-@@ -10,6 +10,7 @@
- #include "am33xx.dtsi"
- #include "am335x-bone-common.dtsi"
- #include "am335x-bonegreen-common.dtsi"
-+/* #include "am335x-bone-jtag.dtsi" */
-
- / {
- model = "TI AM335x BeagleBone Green";
-diff --git a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-index 95d54cf3849e..f9bc5255425d 100644
---- a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-+++ b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-@@ -13,6 +13,7 @@
- #include <dt-bindings/interrupt-controller/irq.h>
-
- #include <dt-bindings/display/tda998x.h>
-+/* #include "am335x-bone-jtag.dtsi" */
-
- / {
- model = "Octavo Systems OSD3358-SM-RED";
-@@ -264,9 +265,6 @@
- };
-
- &am33xx_pinmux {
-- pinctrl-names = "default";
-- pinctrl-0 = <&clkout2_pin>;
--
- user_leds_s0: user-leds-s0 {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
-@@ -290,12 +288,6 @@
- >;
- };
-
-- clkout2_pin: pinmux-clkout2-pin {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
-- >;
-- };
--
- cpsw_default: cpsw-default {
- pinctrl-single,pins = <
- /* Slave 1 */
---
-2.20.1
-
diff --git a/patches/soc/ti/am335x/0004-ARM-dts-am335x-bone-common-add-no-capemgr.dtsi.patch b/patches/soc/ti/am335x/0004-ARM-dts-am335x-bone-common-add-no-capemgr.dtsi.patch
deleted file mode 100644
index c411630b6..000000000
--- a/patches/soc/ti/am335x/0004-ARM-dts-am335x-bone-common-add-no-capemgr.dtsi.patch
+++ /dev/null
@@ -1,396 +0,0 @@
-From 853a6cbf8028ebc91cdf357c09368e1623b1badf Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Fri, 5 Apr 2019 10:10:48 -0500
-Subject: [PATCH 4/6] ARM: dts: am335x-bone-common: add no-capemgr.dtsi
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- .../dts/am335x-bone-common-no-capemgr.dtsi | 376 ++++++++++++++++++
- 1 file changed, 376 insertions(+)
- create mode 100644 arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
-
-diff --git a/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
-new file mode 100644
-index 000000000000..94ae0f9fa6dd
---- /dev/null
-+++ b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
-@@ -0,0 +1,376 @@
-+/*
-+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/ {
-+ cpus {
-+ cpu@0 {
-+ cpu0-supply = <&dcdc2_reg>;
-+ };
-+ };
-+
-+ memory@80000000 {
-+ device_type = "memory";
-+ reg = <0x80000000 0x10000000>; /* 256 MB */
-+ };
-+
-+ chosen {
-+ stdout-path = &uart0;
-+ };
-+
-+ leds {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&user_leds_s0>;
-+
-+ compatible = "gpio-leds";
-+
-+ led2 {
-+ label = "beaglebone:green:usr0";
-+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
-+ default-state = "off";
-+ };
-+
-+ led3 {
-+ label = "beaglebone:green:usr1";
-+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "mmc0";
-+ default-state = "off";
-+ };
-+
-+ led4 {
-+ label = "beaglebone:green:usr2";
-+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "cpu0";
-+ default-state = "off";
-+ };
-+
-+ led5 {
-+ label = "beaglebone:green:usr3";
-+ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "mmc1";
-+ default-state = "off";
-+ };
-+ };
-+
-+ vmmcsd_fixed: fixedregulator0 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "vmmcsd_fixed";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+};
-+
-+&am33xx_pinmux {
-+ user_leds_s0: user_leds_s0 {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
-+ AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
-+ AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
-+ AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
-+ >;
-+ };
-+
-+ i2c0_pins: pinmux_i2c0_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
-+ AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
-+ >;
-+ };
-+
-+ i2c2_pins: pinmux_i2c2_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
-+ AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
-+ >;
-+ };
-+
-+ uart0_pins: pinmux_uart0_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
-+ AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
-+ >;
-+ };
-+
-+ cpsw_default: cpsw_default {
-+ pinctrl-single,pins = <
-+ /* Slave 1 */
-+ AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
-+ AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
-+ AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
-+ AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
-+ AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
-+ AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
-+ AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
-+ AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
-+ AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
-+ AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
-+ AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
-+ AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
-+ AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
-+ >;
-+ };
-+
-+ cpsw_sleep: cpsw_sleep {
-+ pinctrl-single,pins = <
-+ /* Slave 1 reset value */
-+ AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ >;
-+ };
-+
-+ davinci_mdio_default: davinci_mdio_default {
-+ pinctrl-single,pins = <
-+ /* MDIO */
-+ AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
-+ AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
-+ >;
-+ };
-+
-+ davinci_mdio_sleep: davinci_mdio_sleep {
-+ pinctrl-single,pins = <
-+ /* MDIO reset value */
-+ AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
-+ >;
-+ };
-+
-+ mmc1_pins: pinmux_mmc1_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spio0_cs1.gpio0_6 */
-+ AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
-+ AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
-+ AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
-+ AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
-+ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
-+ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
-+ >;
-+ };
-+
-+ emmc_pins: pinmux_emmc_pins {
-+ pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
-+ AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
-+ AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
-+ AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
-+ AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
-+ AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
-+ AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
-+ AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
-+ AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
-+ AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
-+ >;
-+ };
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins>;
-+
-+ status = "okay";
-+};
-+
-+&usb {
-+ status = "okay";
-+};
-+
-+&usb_ctrl_mod {
-+ status = "okay";
-+};
-+
-+&usb0_phy {
-+ status = "okay";
-+};
-+
-+&usb1_phy {
-+ status = "okay";
-+};
-+
-+&usb0 {
-+ status = "okay";
-+ dr_mode = "peripheral";
-+ interrupts-extended = <&intc 18 &tps 0>;
-+ interrupt-names = "mc", "vbus";
-+};
-+
-+&usb1 {
-+ status = "okay";
-+ dr_mode = "host";
-+};
-+
-+&cppi41dma {
-+ status = "okay";
-+};
-+
-+&i2c0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c0_pins>;
-+
-+ status = "okay";
-+ clock-frequency = <400000>;
-+
-+ tps: tps@24 {
-+ reg = <0x24>;
-+ };
-+
-+ baseboard_eeprom: baseboard_eeprom@50 {
-+ compatible = "atmel,24c256";
-+ reg = <0x50>;
-+
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ baseboard_data: baseboard_data@0 {
-+ reg = <0 0x100>;
-+ };
-+ };
-+};
-+
-+&i2c2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c2_pins>;
-+
-+ status = "okay";
-+ clock-frequency = <100000>;
-+};
-+
-+
-+/include/ "tps65217.dtsi"
-+
-+&tps {
-+ /*
-+ * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
-+ * mode") at poweroff. Most BeagleBone versions do not support RTC-only
-+ * mode and risk hardware damage if this mode is entered.
-+ *
-+ * For details, see linux-omap mailing list May 2015 thread
-+ * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
-+ * In particular, messages:
-+ * http://www.spinics.net/lists/linux-omap/msg118585.html
-+ * http://www.spinics.net/lists/linux-omap/msg118615.html
-+ *
-+ * You can override this later with
-+ * &tps { /delete-property/ ti,pmic-shutdown-controller; }
-+ * if you want to use RTC-only mode and made sure you are not affected
-+ * by the hardware problems. (Tip: double-check by performing a current
-+ * measurement after shutdown: it should be less than 1 mA.)
-+ */
-+
-+ interrupts = <7>; /* NMI */
-+ interrupt-parent = <&intc>;
-+
-+ ti,pmic-shutdown-controller;
-+
-+ charger {
-+ status = "okay";
-+ };
-+
-+ pwrbutton {
-+ status = "okay";
-+ };
-+
-+ regulators {
-+ dcdc1_reg: regulator@0 {
-+ regulator-name = "vdds_dpr";
-+ regulator-always-on;
-+ };
-+
-+ dcdc2_reg: regulator@1 {
-+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
-+ regulator-name = "vdd_mpu";
-+ regulator-min-microvolt = <925000>;
-+ regulator-max-microvolt = <1351500>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ dcdc3_reg: regulator@2 {
-+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
-+ regulator-name = "vdd_core";
-+ regulator-min-microvolt = <925000>;
-+ regulator-max-microvolt = <1150000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ ldo1_reg: regulator@3 {
-+ regulator-name = "vio,vrtc,vdds";
-+ regulator-always-on;
-+ };
-+
-+ ldo2_reg: regulator@4 {
-+ regulator-name = "vdd_3v3aux";
-+ regulator-always-on;
-+ };
-+
-+ ldo3_reg: regulator@5 {
-+ regulator-name = "vdd_1v8";
-+ regulator-always-on;
-+ };
-+
-+ ldo4_reg: regulator@6 {
-+ regulator-name = "vdd_3v3a";
-+ regulator-always-on;
-+ };
-+ };
-+};
-+
-+&cpsw_emac0 {
-+ phy-handle = <ðphy0>;
-+ phy-mode = "mii";
-+};
-+
-+&mac {
-+ slaves = <1>;
-+ pinctrl-names = "default", "sleep";
-+ pinctrl-0 = <&cpsw_default>;
-+ pinctrl-1 = <&cpsw_sleep>;
-+ status = "okay";
-+};
-+
-+&davinci_mdio {
-+ pinctrl-names = "default", "sleep";
-+ pinctrl-0 = <&davinci_mdio_default>;
-+ pinctrl-1 = <&davinci_mdio_sleep>;
-+ status = "okay";
-+
-+ ethphy0: ethernet-phy@0 {
-+ reg = <0>;
-+ };
-+};
-+
-+&mmc1 {
-+ status = "okay";
-+ bus-width = <0x4>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc1_pins>;
-+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
-+};
-+
-+&aes {
-+ status = "okay";
-+};
-+
-+&sham {
-+ status = "okay";
-+};
-+
-+&rtc {
-+ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
-+ clock-names = "ext-clk", "int-clk";
-+ system-power-controller;
-+};
---
-2.20.1
-
diff --git a/patches/soc/ti/am335x/0005-ARM-dts-am335x-bone-common-add-am335x-bbw-bbb-base.h.patch b/patches/soc/ti/am335x/0005-ARM-dts-am335x-bone-common-add-am335x-bbw-bbb-base.h.patch
deleted file mode 100644
index cda9250d5..000000000
--- a/patches/soc/ti/am335x/0005-ARM-dts-am335x-bone-common-add-am335x-bbw-bbb-base.h.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From d2864773f21abe4603b1b7a7e0d146e63dba887e Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Wed, 1 Mar 2017 12:47:12 -0600
-Subject: [PATCH 5/6] ARM: dts: am335x-bone-common: add am335x-bbw-bbb-base.h
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- .../dt-bindings/board/am335x-bbw-bbb-base.h | 103 ++++++++++++++++++
- 1 file changed, 103 insertions(+)
- create mode 100644 include/dt-bindings/board/am335x-bbw-bbb-base.h
-
-diff --git a/include/dt-bindings/board/am335x-bbw-bbb-base.h b/include/dt-bindings/board/am335x-bbw-bbb-base.h
-new file mode 100644
-index 000000000000..35f6d57ef492
---- /dev/null
-+++ b/include/dt-bindings/board/am335x-bbw-bbb-base.h
-@@ -0,0 +1,103 @@
-+/*
-+ * This header provides constants for bbw/bbb pinctrl bindings.
-+ *
-+ * Copyright (C) 2014 Robert Nelson <robertcnelson@gmail.com>
-+ *
-+ * Numbers Based on: https://github.com/derekmolloy/boneDeviceTree/tree/master/docs
-+ */
-+
-+#ifndef _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
-+#define _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
-+
-+#define BONE_P8_03 0x018
-+#define BONE_P8_04 0x01C
-+
-+#define BONE_P8_05 0x008
-+#define BONE_P8_06 0x00C
-+#define BONE_P8_07 0x090
-+#define BONE_P8_08 0x094
-+
-+#define BONE_P8_09 0x09C
-+#define BONE_P8_10 0x098
-+#define BONE_P8_11 0x034
-+#define BONE_P8_12 0x030
-+
-+#define BONE_P8_13 0x024
-+#define BONE_P8_14 0x028
-+#define BONE_P8_15 0x03C
-+#define BONE_P8_16 0x038
-+
-+#define BONE_P8_17 0x02C
-+#define BONE_P8_18 0x08C
-+#define BONE_P8_19 0x020
-+#define BONE_P8_20 0x084
-+
-+#define BONE_P8_21 0x080
-+#define BONE_P8_22 0x014
-+#define BONE_P8_23 0x010
-+#define BONE_P8_24 0x004
-+
-+#define BONE_P8_25 0x000
-+#define BONE_P8_26 0x07C
-+#define BONE_P8_27 0x0E0
-+#define BONE_P8_28 0x0E8
-+
-+#define BONE_P8_29 0x0E4
-+#define BONE_P8_30 0x0EC
-+#define BONE_P8_31 0x0D8
-+#define BONE_P8_32 0x0DC
-+
-+#define BONE_P8_33 0x0D4
-+#define BONE_P8_34 0x0CC
-+#define BONE_P8_35 0x0D0
-+#define BONE_P8_36 0x0C8
-+
-+#define BONE_P8_37 0x0C0
-+#define BONE_P8_38 0x0C4
-+#define BONE_P8_39 0x0B8
-+#define BONE_P8_40 0x0BC
-+
-+#define BONE_P8_41 0x0B0
-+#define BONE_P8_42 0x0B4
-+#define BONE_P8_43 0x0A8
-+#define BONE_P8_44 0x0AC
-+
-+#define BONE_P8_45 0x0A0
-+#define BONE_P8_46 0x0A4
-+
-+#define BONE_P9_11 0x070
-+#define BONE_P9_12 0x078
-+
-+#define BONE_P9_13 0x074
-+#define BONE_P9_14 0x048
-+#define BONE_P9_15 0x040
-+#define BONE_P9_16 0x04C
-+
-+#define BONE_P9_17 0x15C
-+#define BONE_P9_18 0x158
-+#define BONE_P9_19 0x17C
-+#define BONE_P9_20 0x178
-+
-+#define BONE_P9_21 0x154
-+#define BONE_P9_22 0x150
-+#define BONE_P9_23 0x044
-+#define BONE_P9_24 0x184
-+
-+#define BONE_P9_25 0x1AC
-+#define BONE_P9_26 0x180
-+#define BONE_P9_27 0x1A4
-+#define BONE_P9_28 0x19C
-+
-+#define BONE_P9_29 0x194
-+#define BONE_P9_30 0x198
-+#define BONE_P9_31 0x190
-+
-+/* Shared P21 of P11 */
-+#define BONE_P9_41A 0x1B4
-+#define BONE_P9_41B 0x1A8
-+
-+/* Shared P22 of P11 */
-+#define BONE_P9_42A 0x164
-+#define BONE_P9_42B 0x1A0
-+
-+#endif
---
-2.20.1
-
diff --git a/patches/soc/ti/am335x/0006-ARM-dts-am335x-boneblack-common-remove-CEC-noise.patch b/patches/soc/ti/am335x/0006-ARM-dts-am335x-boneblack-common-remove-CEC-noise.patch
deleted file mode 100644
index 118f5c7b0..000000000
--- a/patches/soc/ti/am335x/0006-ARM-dts-am335x-boneblack-common-remove-CEC-noise.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 78b90be979d6986933fe1daa008a8dad49f1c693 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Tue, 27 Nov 2018 14:43:39 -0600
-Subject: [PATCH 6/6] ARM: dts: am335x-boneblack-common: remove CEC noise
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-boneblack-common.dtsi | 10 +---------
- arch/arm/boot/dts/am335x-osd3358-sm-red.dts | 10 +---------
- 2 files changed, 2 insertions(+), 18 deletions(-)
-
-diff --git a/arch/arm/boot/dts/am335x-boneblack-common.dtsi b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
-index e543c2bee8c2..4413a0afacd6 100644
---- a/arch/arm/boot/dts/am335x-boneblack-common.dtsi
-+++ b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
-@@ -30,7 +30,6 @@
- &am33xx_pinmux {
- nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
- AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
- AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
- AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
-@@ -54,12 +53,6 @@
- >;
- };
-
-- nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
-- >;
-- };
--
- mcasp0_pins: mcasp0_pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
-@@ -95,9 +88,8 @@
- nxp,calib-gpios = <&gpio1 25 0>;
- interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
-
-- pinctrl-names = "default", "off";
-+ pinctrl-names = "default";
- pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
-- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
-
- /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
- /* video-ports = <0x234501>; */
-diff --git a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-index f9bc5255425d..7dc90e986dc2 100644
---- a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-+++ b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
-@@ -41,7 +41,6 @@
- &am33xx_pinmux {
- nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
- AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
- AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
- AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
-@@ -65,12 +64,6 @@
- >;
- };
-
-- nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
-- >;
-- };
--
- mcasp0_pins: mcasp0-pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
-@@ -125,9 +118,8 @@
- compatible = "nxp,tda998x";
- reg = <0x70>;
-
-- pinctrl-names = "default", "off";
-+ pinctrl-names = "default";
- pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
-- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
-
- /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
- /* video-ports = <0x234501>; */
---
-2.20.1
-
diff --git a/patches/soc/ti/uboot/0002-uboot-cape-universal-enablement.patch b/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-DTBS-v5.1.x.patch
similarity index 62%
rename from patches/soc/ti/uboot/0002-uboot-cape-universal-enablement.patch
rename to patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-DTBS-v5.1.x.patch
index d5c5ca25a..643d1a8d9 100644
--- a/patches/soc/ti/uboot/0002-uboot-cape-universal-enablement.patch
+++ b/patches/soc/ti/beagleboard_dtbs/0001-Add-BeagleBoard.org-DTBS-v5.1.x.patch
@@ -1,22 +1,633 @@
-From 1f3ca2d5b0349caedb548198417945c6db9d96c0 Mon Sep 17 00:00:00 2001
+From 74c0042e76b1b856ac6d6926bd854e50a03403e2 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 22 Oct 2018 11:04:45 -0500
-Subject: [PATCH 2/2] uboot: cape-universal enablement
+Date: Mon, 6 May 2019 10:44:15 -0500
+Subject: [PATCH] Add BeagleBoard.org DTBS: v5.1.x
+https://github.com/beagleboard/BeagleBoard-DeviceTrees/tree/v5.1.x
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
+ arch/arm/boot/dts/Makefile | 6 +
+ arch/arm/boot/dts/am335x-abbbi.dts | 162 +
+ .../dts/am335x-bone-common-no-capemgr.dtsi | 376 +++
.../arm/boot/dts/am335x-bone-common-univ.dtsi | 2923 +++++++++++++++++
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 14 +-
+ arch/arm/boot/dts/am335x-bone-jtag.dtsi | 20 +
arch/arm/boot/dts/am335x-bone-uboot-univ.dts | 27 +
+ arch/arm/boot/dts/am335x-bone.dts | 1 +
+ .../arm/boot/dts/am335x-boneblack-common.dtsi | 10 +-
.../boot/dts/am335x-boneblack-uboot-univ.dts | 38 +
+ arch/arm/boot/dts/am335x-boneblack-uboot.dts | 37 +
+ .../boot/dts/am335x-boneblack-wireless.dts | 1 +
+ arch/arm/boot/dts/am335x-boneblack.dts | 1 +
+ arch/arm/boot/dts/am335x-boneblue.dts | 487 ++-
...am335x-bonegreen-wireless-common-univ.dtsi | 2797 ++++++++++++++++
.../am335x-bonegreen-wireless-uboot-univ.dts | 53 +
- 5 files changed, 5838 insertions(+)
+ .../boot/dts/am335x-bonegreen-wireless.dts | 1 +
+ arch/arm/boot/dts/am335x-bonegreen.dts | 1 +
+ arch/arm/boot/dts/am335x-osd3358-sm-red.dts | 20 +-
+ arch/arm/boot/dts/am335x-pocketbeagle.dts | 2040 +++++++++++-
+ arch/arm/boot/dts/am33xx-l4.dtsi | 162 +
+ arch/arm/boot/dts/am33xx.dtsi | 2 +-
+ .../boot/dts/am57xx-beagle-x15-common.dtsi | 4 +
+ arch/arm/boot/dts/dra7.dtsi | 10 +
+ arch/arm/boot/dts/omap3-beagle-xm.dts | 53 +-
+ arch/arm/boot/dts/omap3-beagle.dts | 11 +
+ arch/arm/boot/dts/omap4-panda-a4.dts | 12 +
+ arch/arm/boot/dts/omap4-panda-common.dtsi | 10 -
+ arch/arm/boot/dts/omap4-panda-es-b3.dts | 85 +
+ arch/arm/boot/dts/omap4-panda-es.dts | 12 +
+ arch/arm/boot/dts/omap4-panda.dts | 12 +
+ arch/arm/boot/dts/omap4-sdp.dts | 2 +
+ arch/arm/boot/dts/omap4.dtsi | 2 +
+ arch/arm/boot/dts/twl6030.dtsi | 5 +
+ .../dt-bindings/board/am335x-bbw-bbb-base.h | 103 +
+ 35 files changed, 9381 insertions(+), 119 deletions(-)
+ create mode 100644 arch/arm/boot/dts/am335x-abbbi.dts
+ create mode 100644 arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
create mode 100644 arch/arm/boot/dts/am335x-bone-common-univ.dtsi
+ create mode 100644 arch/arm/boot/dts/am335x-bone-jtag.dtsi
create mode 100644 arch/arm/boot/dts/am335x-bone-uboot-univ.dts
create mode 100644 arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-uboot.dts
create mode 100644 arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
create mode 100644 arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
+ create mode 100644 arch/arm/boot/dts/omap4-panda-es-b3.dts
+ create mode 100644 include/dt-bindings/board/am335x-bbw-bbb-base.h
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index f4f5aeaf3298..deacb51238f4 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -720,6 +720,11 @@ dtb-$(CONFIG_SOC_AM33XX) += \
+ am335x-base0033.dtb \
+ am335x-bone.dtb \
+ am335x-boneblack.dtb \
++ am335x-bonegreen-wireless-uboot-univ.dtb \
++ am335x-boneblack-uboot-univ.dtb \
++ am335x-bone-uboot-univ.dtb \
++ am335x-boneblack-uboot.dtb \
++ am335x-abbbi.dtb \
+ am335x-boneblack-wireless.dtb \
+ am335x-boneblue.dtb \
+ am335x-bonegreen.dtb \
+@@ -749,6 +754,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
+ omap4-duovero-parlor.dtb \
+ omap4-kc1.dtb \
+ omap4-panda.dtb \
++ omap4-panda-es-b3.dtb \
+ omap4-panda-a4.dtb \
+ omap4-panda-es.dtb \
+ omap4-sdp.dtb \
+diff --git a/arch/arm/boot/dts/am335x-abbbi.dts b/arch/arm/boot/dts/am335x-abbbi.dts
+new file mode 100644
+index 000000000000..82bf99e47616
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-abbbi.dts
+@@ -0,0 +1,162 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ * Copyright 2015 Konsulko Group
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++/dts-v1/;
++
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
++
++/ {
++ model = "Arrow BeagleBone Black Industrial";
++ compatible = "arrow,am335x-abbbi", "ti,am335x-bone", "ti,am33xx";
++};
++
++&ldo3_reg {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++};
++
++&mmc1 {
++ vmmc-supply = <&vmmcsd_fixed>;
++};
++
++&mmc2 {
++ vmmc-supply = <&vmmcsd_fixed>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&emmc_pins>;
++ bus-width = <8>;
++ status = "okay";
++};
++
++&am33xx_pinmux {
++ adi_hdmi_bbbi_pins: adi_hdmi_bbbi_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
++ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
++ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
++ AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
++ AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
++ AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
++ AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
++ AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
++ AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
++ AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
++ AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
++ AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
++ AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
++ AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
++ AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
++ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
++ AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
++ AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
++ AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
++ AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
++ >;
++ };
++
++ mcasp0_pins: mcasp0_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
++ AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
++ AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
++ AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
++ AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
++ >;
++ };
++};
++
++&lcdc {
++ status = "okay";
++
++ /* If you want to get 24 bit RGB and 16 BGR mode instead of
++ * current 16 bit RGB and 24 BGR modes, set the propety
++ * below to "crossed" and uncomment the video-ports -property
++ * in tda19988 node.
++ */
++ blue-and-red-wiring = "straight";
++
++ port {
++ lcdc_0: endpoint@0 {
++ remote-endpoint = <&hdmi_0>;
++ };
++ };
++};
++
++&i2c0 {
++ adv7511: adv7511@39 {
++ compatible = "adi,adv7511";
++ reg = <0x39>;
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&adi_hdmi_bbbi_pins>;
++
++ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
++ /* video-ports = <0x234501>; */
++
++ #sound-dai-cells = <0>;
++
++ ports {
++ port@0 {
++ hdmi_0: endpoint@0 {
++ remote-endpoint = <&lcdc_0>;
++ };
++ };
++ };
++ };
++};
++
++&rtc {
++ system-power-controller;
++};
++
++&mcasp0 {
++ #sound-dai-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mcasp0_pins>;
++ status = "okay";
++ op-mode = <0>; /* MCASP_IIS_MODE */
++ tdm-slots = <2>;
++ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
++ 0 0 1 0
++ >;
++ tx-num-evt = <1>;
++ rx-num-evt = <1>;
++};
++
++/ {
++ clk_mcasp0_fixed: clk_mcasp0_fixed {
++ #clock-cells = <0>;
++ compatible = "fixed-clock";
++ clock-frequency = <24576000>;
++ };
++
++ clk_mcasp0: clk_mcasp0 {
++ #clock-cells = <0>;
++ compatible = "gpio-gate-clock";
++ clocks = <&clk_mcasp0_fixed>;
++ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
++ };
++
++ sound {
++ compatible = "simple-audio-card";
++ simple-audio-card,name = "TI BeagleBone Black";
++ simple-audio-card,format = "i2s";
++ simple-audio-card,bitclock-master = <&dailink0_master>;
++ simple-audio-card,frame-master = <&dailink0_master>;
++
++ dailink0_master: simple-audio-card,cpu {
++ sound-dai = <&mcasp0>;
++ clocks = <&clk_mcasp0>;
++ };
++
++ simple-audio-card,codec {
++ sound-dai = <&adv7511>;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
+new file mode 100644
+index 000000000000..94ae0f9fa6dd
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
+@@ -0,0 +1,376 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/ {
++ cpus {
++ cpu@0 {
++ cpu0-supply = <&dcdc2_reg>;
++ };
++ };
++
++ memory@80000000 {
++ device_type = "memory";
++ reg = <0x80000000 0x10000000>; /* 256 MB */
++ };
++
++ chosen {
++ stdout-path = &uart0;
++ };
++
++ leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&user_leds_s0>;
++
++ compatible = "gpio-leds";
++
++ led2 {
++ label = "beaglebone:green:usr0";
++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++
++ led3 {
++ label = "beaglebone:green:usr1";
++ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc0";
++ default-state = "off";
++ };
++
++ led4 {
++ label = "beaglebone:green:usr2";
++ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "cpu0";
++ default-state = "off";
++ };
++
++ led5 {
++ label = "beaglebone:green:usr3";
++ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc1";
++ default-state = "off";
++ };
++ };
++
++ vmmcsd_fixed: fixedregulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "vmmcsd_fixed";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++};
++
++&am33xx_pinmux {
++ user_leds_s0: user_leds_s0 {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
++ AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
++ AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
++ AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
++ >;
++ };
++
++ i2c0_pins: pinmux_i2c0_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
++ AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
++ >;
++ };
++
++ i2c2_pins: pinmux_i2c2_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
++ AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
++ >;
++ };
++
++ uart0_pins: pinmux_uart0_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
++ AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
++ >;
++ };
++
++ cpsw_default: cpsw_default {
++ pinctrl-single,pins = <
++ /* Slave 1 */
++ AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
++ AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
++ AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
++ AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
++ AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
++ AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
++ AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
++ AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
++ AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
++ AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
++ AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
++ AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
++ AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
++ >;
++ };
++
++ cpsw_sleep: cpsw_sleep {
++ pinctrl-single,pins = <
++ /* Slave 1 reset value */
++ AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ >;
++ };
++
++ davinci_mdio_default: davinci_mdio_default {
++ pinctrl-single,pins = <
++ /* MDIO */
++ AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
++ AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
++ >;
++ };
++
++ davinci_mdio_sleep: davinci_mdio_sleep {
++ pinctrl-single,pins = <
++ /* MDIO reset value */
++ AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
++ >;
++ };
++
++ mmc1_pins: pinmux_mmc1_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spio0_cs1.gpio0_6 */
++ AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
++ AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
++ AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
++ AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
++ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
++ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
++ >;
++ };
++
++ emmc_pins: pinmux_emmc_pins {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
++ AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
++ AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
++ AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
++ AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
++ AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
++ AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
++ AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
++ AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
++ AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
++ >;
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++
++ status = "okay";
++};
++
++&usb {
++ status = "okay";
++};
++
++&usb_ctrl_mod {
++ status = "okay";
++};
++
++&usb0_phy {
++ status = "okay";
++};
++
++&usb1_phy {
++ status = "okay";
++};
++
++&usb0 {
++ status = "okay";
++ dr_mode = "peripheral";
++ interrupts-extended = <&intc 18 &tps 0>;
++ interrupt-names = "mc", "vbus";
++};
++
++&usb1 {
++ status = "okay";
++ dr_mode = "host";
++};
++
++&cppi41dma {
++ status = "okay";
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ tps: tps@24 {
++ reg = <0x24>;
++ };
++
++ baseboard_eeprom: baseboard_eeprom@50 {
++ compatible = "atmel,24c256";
++ reg = <0x50>;
++
++ #address-cells = <1>;
++ #size-cells = <1>;
++ baseboard_data: baseboard_data@0 {
++ reg = <0 0x100>;
++ };
++ };
++};
++
++&i2c2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c2_pins>;
++
++ status = "okay";
++ clock-frequency = <100000>;
++};
++
++
++/include/ "tps65217.dtsi"
++
++&tps {
++ /*
++ * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
++ * mode") at poweroff. Most BeagleBone versions do not support RTC-only
++ * mode and risk hardware damage if this mode is entered.
++ *
++ * For details, see linux-omap mailing list May 2015 thread
++ * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
++ * In particular, messages:
++ * http://www.spinics.net/lists/linux-omap/msg118585.html
++ * http://www.spinics.net/lists/linux-omap/msg118615.html
++ *
++ * You can override this later with
++ * &tps { /delete-property/ ti,pmic-shutdown-controller; }
++ * if you want to use RTC-only mode and made sure you are not affected
++ * by the hardware problems. (Tip: double-check by performing a current
++ * measurement after shutdown: it should be less than 1 mA.)
++ */
++
++ interrupts = <7>; /* NMI */
++ interrupt-parent = <&intc>;
++
++ ti,pmic-shutdown-controller;
++
++ charger {
++ status = "okay";
++ };
++
++ pwrbutton {
++ status = "okay";
++ };
++
++ regulators {
++ dcdc1_reg: regulator@0 {
++ regulator-name = "vdds_dpr";
++ regulator-always-on;
++ };
++
++ dcdc2_reg: regulator@1 {
++ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
++ regulator-name = "vdd_mpu";
++ regulator-min-microvolt = <925000>;
++ regulator-max-microvolt = <1351500>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ dcdc3_reg: regulator@2 {
++ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
++ regulator-name = "vdd_core";
++ regulator-min-microvolt = <925000>;
++ regulator-max-microvolt = <1150000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ ldo1_reg: regulator@3 {
++ regulator-name = "vio,vrtc,vdds";
++ regulator-always-on;
++ };
++
++ ldo2_reg: regulator@4 {
++ regulator-name = "vdd_3v3aux";
++ regulator-always-on;
++ };
++
++ ldo3_reg: regulator@5 {
++ regulator-name = "vdd_1v8";
++ regulator-always-on;
++ };
++
++ ldo4_reg: regulator@6 {
++ regulator-name = "vdd_3v3a";
++ regulator-always-on;
++ };
++ };
++};
++
++&cpsw_emac0 {
++ phy-handle = <ðphy0>;
++ phy-mode = "mii";
++};
++
++&mac {
++ slaves = <1>;
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&cpsw_default>;
++ pinctrl-1 = <&cpsw_sleep>;
++ status = "okay";
++};
++
++&davinci_mdio {
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&davinci_mdio_default>;
++ pinctrl-1 = <&davinci_mdio_sleep>;
++ status = "okay";
++
++ ethphy0: ethernet-phy@0 {
++ reg = <0>;
++ };
++};
++
++&mmc1 {
++ status = "okay";
++ bus-width = <0x4>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc1_pins>;
++ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
++};
++
++&aes {
++ status = "okay";
++};
++
++&sham {
++ status = "okay";
++};
++
++&rtc {
++ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
++ clock-names = "ext-clk", "int-clk";
++ system-power-controller;
++};
diff --git a/arch/arm/boot/dts/am335x-bone-common-univ.dtsi b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
new file mode 100644
index 000000000000..037683957292
@@ -2946,6 +3557,82 @@ index 000000000000..037683957292
+
+ };
+};
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index 456eef57ef89..27489c9b2dc1 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -29,14 +29,14 @@
+ compatible = "gpio-leds";
+
+ led2 {
+- label = "beaglebone:green:heartbeat";
++ label = "beaglebone:green:usr0";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led3 {
+- label = "beaglebone:green:mmc0";
++ label = "beaglebone:green:usr1";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+@@ -66,9 +66,6 @@
+ };
+
+ &am33xx_pinmux {
+- pinctrl-names = "default";
+- pinctrl-0 = <&clkout2_pin>;
+-
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
+@@ -99,12 +96,6 @@
+ >;
+ };
+
+- clkout2_pin: pinmux_clkout2_pin {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+- >;
+- };
+-
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+@@ -421,4 +412,5 @@
+ &rtc {
+ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+ clock-names = "ext-clk", "int-clk";
++ system-power-controller;
+ };
+diff --git a/arch/arm/boot/dts/am335x-bone-jtag.dtsi b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
+new file mode 100644
+index 000000000000..603ef0a4d7b2
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
+@@ -0,0 +1,20 @@
++/*
++ * Device Tree Source for bone jtag
++ *
++ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++&am33xx_pinmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&clkout2_pin>;
++
++ clkout2_pin: pinmux_clkout2_pin {
++ pinctrl-single,pins = <
++ AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
++ >;
++ };
++};
diff --git a/arch/arm/boot/dts/am335x-bone-uboot-univ.dts b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
new file mode 100644
index 000000000000..24cc6956ac7c
@@ -2979,6 +3666,54 @@ index 000000000000..24cc6956ac7c
+&mmc1 {
+ vmmc-supply = <&ldo3_reg>;
+};
+diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
+index 6b8493720424..3688fff0a5f0 100644
+--- a/arch/arm/boot/dts/am335x-bone.dts
++++ b/arch/arm/boot/dts/am335x-bone.dts
+@@ -9,6 +9,7 @@
+
+ #include "am33xx.dtsi"
+ #include "am335x-bone-common.dtsi"
++/* #include "am335x-bone-jtag.dtsi" */
+
+ / {
+ model = "TI AM335x BeagleBone";
+diff --git a/arch/arm/boot/dts/am335x-boneblack-common.dtsi b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
+index e543c2bee8c2..4413a0afacd6 100644
+--- a/arch/arm/boot/dts/am335x-boneblack-common.dtsi
++++ b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
+@@ -30,7 +30,6 @@
+ &am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+ pinctrl-single,pins = <
+- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+ AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
+ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
+ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
+@@ -54,12 +53,6 @@
+ >;
+ };
+
+- nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+- >;
+- };
+-
+ mcasp0_pins: mcasp0_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
+@@ -95,9 +88,8 @@
+ nxp,calib-gpios = <&gpio1 25 0>;
+ interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
+
+- pinctrl-names = "default", "off";
++ pinctrl-names = "default";
+ pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+
+ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+ /* video-ports = <0x234501>; */
diff --git a/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
new file mode 100644
index 000000000000..7b4bf9641b26
@@ -3023,12 +3758,12 @@ index 000000000000..7b4bf9641b26
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
-diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
+diff --git a/arch/arm/boot/dts/am335x-boneblack-uboot.dts b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
new file mode 100644
-index 000000000000..455a8fa5f68b
+index 000000000000..738fa396855b
--- /dev/null
-+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
-@@ -0,0 +1,2797 @@
++++ b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
+@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
@@ -3036,23 +3771,649 @@ index 000000000000..455a8fa5f68b
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
++/dts-v1/;
+
-+&am33xx_pinmux {
-+ /************************/
-+ /* P8 Header */
-+ /************************/
++#include "am33xx.dtsi"
++#include "am335x-bone-common.dtsi"
+
-+ /* P8_01 GND */
++/ {
++ model = "TI AM335x BeagleBone Black";
++ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
++};
+
-+ /* P8_02 GND */
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro-1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
+
++&ldo3_reg {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++};
+
-+ /* P8_03 (ZCZ ball R9) emmc */
-+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
-+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
-+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
++&mmc1 {
++ vmmc-supply = <&vmmcsd_fixed>;
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
+index 83f49f616b19..4664f203b17c 100644
+--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts
++++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
+@@ -11,6 +11,7 @@
+ #include "am335x-bone-common.dtsi"
+ #include "am335x-boneblack-common.dtsi"
+ #include <dt-bindings/interrupt-controller/irq.h>
++/* #include "am335x-bone-jtag.dtsi" */
+
+ / {
+ model = "TI AM335x BeagleBone Black Wireless";
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index d154d3133c16..e62023252165 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -10,6 +10,7 @@
+ #include "am33xx.dtsi"
+ #include "am335x-bone-common.dtsi"
+ #include "am335x-boneblack-common.dtsi"
++/* #include "am335x-bone-jtag.dtsi" */
+
+ / {
+ model = "TI AM335x BeagleBone Black";
+diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
+index ccb147e70d17..0d4c361e44a0 100644
+--- a/arch/arm/boot/dts/am335x-boneblue.dts
++++ b/arch/arm/boot/dts/am335x-boneblue.dts
+@@ -125,9 +125,183 @@
+ gpio = <&gpio3 9 0>;
+ enable-active-high;
+ };
++
++ bt_en {
++ pinctrl-names = "default";
++ pinctrl-0 = <&bt_pins>;
++ compatible = "gpio-leds";
++
++ wl18xx_bt_en {
++ label = "wl18xx_bt_en";
++ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
++ default-state = "off";
++ };
++ };
++};
++
++&cpu0_opp_table {
++ /*
++ * Octavo Systems:
++ * The EFUSE_SMA register is not programmed for any of the AM335x wafers
++ * we get and we are not programming them during our production test.
++ * Therefore, from a DEVICE_ID revision point of view, the silicon looks
++ * like it is Revision 2.1. However, from an EFUSE_SMA point of view for
++ * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
++ * EFUSE_SMA register reads as all zeros).
++ */
++ oppnitro-1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
+ };
+
+ &am33xx_pinmux {
++ /***************************************************************************
++ * Static Pinmux
++ ***************************************************************************/
++ mux_helper_pins: pins {
++ pinctrl-single,pins = <
++
++ /* GPIO Inputs */
++ 0x09c 0x37 /*P8.9 Pause BUTTON, input pullup*/
++ 0x098 0x37 /*P8.10 MODE BUTTON input pullup*/
++ 0x1AC 0x37 /*P9.25 MPU-9150 INTERRUPT IN*/
++
++ /* Motor Control GPIO Out*/
++ 0x088 ( PIN_OUTPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] - MDIR_1A different from cape! */
++ 0x074 ( PIN_OUTPUT | MUX_MODE7 ) /* (U17) gpmc_wpn.gpio0[31] - P9.13, MDIR_1B */
++ 0x040 ( PIN_OUTPUT | MUX_MODE7 ) /* (R13) gpmc_a0.gpio1[16] - P9.15, MDIR_2A */
++ 0x0D8 ( PIN_OUTPUT | MUX_MODE7 ) /* (V4) lcd_data14.gpio0[10] - P8.31, MDIR_2B different from cape! */
++ 0x0AC ( PIN_OUTPUT | MUX_MODE7 ) /* (R4) lcd_data3.gpio2[9] - P8.44, MDIR_3A */
++ 0x0A8 ( PIN_OUTPUT | MUX_MODE7 ) /* (R3) lcd_data2.gpio2[8] - P8.43, MDIR_3B */
++ 0x0A0 ( PIN_OUTPUT | MUX_MODE7 ) /* (R1) lcd_data0.gpio2[6] - P8.45, MDIR_4A */
++ 0x0A4 ( PIN_OUTPUT | MUX_MODE7 ) /* (R2) lcd_data1.gpio2[7] - P8.46, MDIR_4B */
++ 0x1B4 ( PIN_OUTPUT | MUX_MODE7 ) /* (D14) xdma_event_intr1.gpio0[20] - P9.41, MOT_STBY */
++
++ /* PRU encoder input */
++ 0x038 0x36 /* P8_16,PRU0_r31_16,MODE6 */
++
++ /* PRU Servo output */
++ 0x0e0 0x05 /*pru1_pru_r30_8, MODE5*/
++ 0x0e8 0x05 /*pru1_pru_r30_10, MODE5 */
++ 0x0e4 0x05 /*pr1_pru1_pru_r30_9, MODE5 */
++ 0x0ec 0x05 /*pru1_pru_r30_11, MODE5 */
++ 0x0b8 0x05 /*pru1_pru_r30_6, MODE5 */
++ 0x0bc 0x05 /*pru1_pru_r30_7, MODE5 */
++ 0x0b0 0x05 /*pru1_pru_r30_4, MODE5 */
++ 0x0b4 0x05 /*pru1_pru_r30_5, MODE5 */
++ 0x0C8 0x0F /*P8.36, SERVO_PWR GPIO OUT*/
++
++ /* WILINK 8 */
++ 0x08c 0x0F /*P8.18 V12 A2DP FSYNC */
++ 0x078 0x0F /*P9.12 A2DP_CLOCK*/
++ >;
++
++ /* D13 BLUE_GP0_PIN_5 gpio 3_20 */
++ D13_default_pin: pinmux_D13_default_pin {
++ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ D13_gpio_pin: pinmux_D13_gpio_pin {
++ pinctrl-single,pins = < 0x1A8 ( PIN_OUTPUT | MUX_MODE7 ) >; };
++ D13_gpio_pu_pin: pinmux_D13_gpio_pu_pin {
++ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ D13_gpio_pd_pin: pinmux_D13_gpio_pd_pin {
++ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
++
++ /* H17 BLUE_GP1_PIN_4 gpio 3_1 */
++ H17_default_pin: pinmux_H17_default_pin {
++ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ H17_gpio_pin: pinmux_H17_gpio_pin {
++ pinctrl-single,pins = < 0x10C ( PIN_OUTPUT | MUX_MODE7 ) >; };
++ H17_gpio_pu_pin: pinmux_H17_gpio_pu_pin {
++ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ H17_gpio_pd_pin: pinmux_H17_gpio_pd_pin {
++ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
++
++ /* J15 BLUE_GP1_PIN_3 gpio 3_2 */
++ J15_default_pin: pinmux_J15_default_pin {
++ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ J15_gpio_pin: pinmux_J15_gpio_pin {
++ pinctrl-single,pins = < 0x110 ( PIN_OUTPUT | MUX_MODE7 ) >; };
++ J15_gpio_pu_pin: pinmux_J15_gpio_pu_pin {
++ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ J15_gpio_pd_pin: pinmux_J15_gpio_pd_pin {
++ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
++
++ /* P8_15 (ZCZ ball U13) */
++ P8_15_default_pin: pinmux_P8_15_default_pin {
++ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_15_gpio_pin: pinmux_P8_15_gpio_pin {
++ pinctrl-single,pins = <0x03c 0x2F>; }; /* Mode 7, RxActive */
++ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin {
++ pinctrl-single,pins = <0x03c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin {
++ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_15_pruin_pin: pinmux_P8_15_pruin_pin {
++ pinctrl-single,pins = <0x03c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_15_qep_pin: pinmux_P8_15_qep_pin {
++ pinctrl-single,pins = <0x03c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ P8_15_pruin_pu_pin: pinmux_P8_15_pruin_pu_pin {
++ pinctrl-single,pins = <0x03c 0x36>; }; /* Mode 6, Pull-Up, RxActive */
++ P8_15_pruecapin_pu_pin: pinmux_P8_15_pruecapin_pu_pin {
++ pinctrl-single,pins = <0x03c 0x35>; }; /* Mode 5, Pull-Up, RxActive */
++
++ /* P9_11 (ZCZ ball T17) */
++ P9_11_default_pin: pinmux_P9_11_default_pin {
++ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_11_gpio_pin: pinmux_P9_11_gpio_pin {
++ pinctrl-single,pins = <0x070 0x2F>; }; /* Mode 7, RxActive */
++ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin {
++ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin {
++ pinctrl-single,pins = <0x070 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_11_uart_pin: pinmux_P9_11_uart_pin {
++ pinctrl-single,pins = <0x070 0x36>; }; /* Mode 6, Pull-Up, RxActive */
++
++ /* P9_23 (ZCZ ball V14) */
++ P9_23_default_pin: pinmux_P9_23_default_pin {
++ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_23_gpio_pin: pinmux_P9_23_gpio_pin {
++ pinctrl-single,pins = <0x044 0x2F>; }; /* Mode 7, RxActive */
++ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin {
++ pinctrl-single,pins = <0x044 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin {
++ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_23_pwm_pin: pinmux_P9_23_pwm_pin {
++ pinctrl-single,pins = <0x044 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_28 (ZCZ ball C12) Audio */
++ P9_28_default_pin: pinmux_P9_28_default_pin {
++ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_28_gpio_pin: pinmux_P9_28_gpio_pin {
++ pinctrl-single,pins = <0x19c 0x2F>; }; /* Mode 7, RxActive */
++ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin {
++ pinctrl-single,pins = <0x19c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin {
++ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_28_pwm_pin: pinmux_P9_28_pwm_pin {
++ pinctrl-single,pins = <0x19c 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_28_spi_pin: pinmux_P9_28_spi_pin {
++ pinctrl-single,pins = <0x19c 0x23>; }; /* Mode 3, Pull-Down, RxActive */
++ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin {
++ pinctrl-single,pins = <0x19c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ P9_28_pruout_pin: pinmux_P9_28_pruout_pin {
++ pinctrl-single,pins = <0x19c 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_28_pruin_pin: pinmux_P9_28_pruin_pin {
++ pinctrl-single,pins = <0x19c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P9_28_audio_pin: pinmux_P9_28_audio_pin {
++ pinctrl-single,pins = <0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)>; }; /* mcasp0_ahclkr.mcasp0_axr2 */
++
++ /* U16 BLUE_GP0_PIN_3 gpio 1_25 */
++ U16_default_pin: pinmux_U16_default_pin {
++ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ U16_gpio_pin: pinmux_U16_gpio_pin {
++ pinctrl-single,pins = < 0x064 ( PIN_OUTPUT | MUX_MODE7 ) >; };
++ U16_gpio_pu_pin: pinmux_U16_gpio_pu_pin {
++ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
++ U16_gpio_pd_pin: pinmux_U16_gpio_pd_pin {
++ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
++
++ };
++
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
+@@ -141,7 +315,6 @@
+ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
+ AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
+ AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
+-
+ >;
+ };
+
+@@ -184,11 +357,11 @@
+ };
+
+ /* DSM2 */
+- uart4_pins: pinmux_uart4_pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+- >;
+- };
++ //uart4_pins: pinmux_uart4_pins {
++ // pinctrl-single,pins = <
++ // AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
++ // >;
++ //};
+
+ /* UT5 */
+ uart5_pins: pinmux_uart5_pins {
+@@ -261,6 +434,51 @@
+ AM33XX_IOPAD(0x940, PIN_OUTPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
+ >;
+ };
++
++ ehrpwm1_pins: pinmux_ehrpwm1_pins {
++ pinctrl-single,pins = <
++ 0x020 0x24 /* P8_19_pwm_pin */
++ 0x024 0x24 /* P8_13_pwm_pin */
++ >;
++ };
++
++ ehrpwm2_pins: pinmux_ehrpwm2_pins {
++ pinctrl-single,pins = <
++ 0x048 0x26 /* P9_14_pwm_pin */
++ 0x04c 0x26 /* P9_16_pwm_pin */
++ >;
++ };
++
++ eqep0_pins: pinmux_eqep0_pins {
++ pinctrl-single,pins = <
++ 0x1a0 0x21 /* P9_92_qep_pin */
++ 0x1a4 0x21 /* P9_27_qep_pin */
++ >;
++ };
++
++ eqep1_pins: pinmux_eqep1_pins {
++ pinctrl-single,pins = <
++ 0x0d4 0x22 /* P8_33_qep_pin */
++ 0x0d0 0x22 /* P8_35_qep_pin */
++ >;
++ };
++
++ eqep2_pins: pinmux_eqep2_pins {
++ pinctrl-single,pins = <
++ 0x030 0x24 /* P8_12_qep_pin */
++ 0x034 0x24 /* P8_11_qep_pin */
++ >;
++ };
++
++ spi1_pins: pinmux_spi1_pins {
++ pinctrl-single,pins = <
++ 0x190 0x23 /* spi1_sclk */
++ 0x194 0x23 /* spi1_d0 */
++ 0x198 0x23 /* spi1_d1 */
++ 0x144 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs0 */
++ 0x164 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs1 */
++ >;
++ };
+ };
+
+ &uart0 {
+@@ -284,12 +502,12 @@
+ status = "okay";
+ };
+
+-&uart4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&uart4_pins>;
+-
+- status = "okay";
+-};
++//&uart4 {
++// pinctrl-names = "default";
++// pinctrl-0 = <&uart4_pins>;
++//
++// status = "okay";
++//};
+
+ &uart5 {
+ pinctrl-names = "default";
+@@ -387,6 +605,8 @@
+ interrupts = <7>; /* NMI */
+ interrupt-parent = <&intc>;
+
++ ti,pmic-shutdown-controller;
++
+ charger {
+ interrupts = <0>, <1>;
+ interrupt-names = "USB", "AC";
+@@ -487,22 +707,23 @@
+ };
+ };
+
+-&tscadc {
+- status = "okay";
+- adc {
+- ti,adc-channels = <0 1 2 3 4 5 6 7>;
+- };
+-};
++//&tscadc {
++// status = "okay";
++// adc {
++// ti,adc-channels = <0 1 2 3 4 5 6 7>;
++// };
++//};
+
+ &uart3 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&uart3_pins &bt_pins>;
++ //pinctrl-0 = <&uart3_pins &bt_pins>;
++ pinctrl-0 = <&uart3_pins>;
+ status = "okay";
+
+- bluetooth {
+- compatible = "ti,wl1835-st";
+- enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+- };
++// bluetooth {
++// compatible = "ti,wl1835-st";
++// enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
++// };
+ };
+
+ &aes {
+@@ -515,8 +736,10 @@
+
+ &rtc {
+ system-power-controller;
+- clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+- clock-names = "ext-clk", "int-clk";
++};
++
++&wkup_m3_ipc {
++ ti,scale-data-fw = "am335x-bone-scale-data.bin";
+ };
+
+ &dcan1 {
+@@ -533,3 +756,217 @@
+ line-name = "LS_BUF_EN";
+ };
+ };
++
++&ocp {
++ /* activate the static pinmux helper list of pin modes above */
++ test_helper: helper {
++ compatible = "bone-pinmux-helper";
++ pinctrl-names = "default";
++ pinctrl-0 = <&mux_helper_pins>;
++
++ status = "okay";
++ };
++
++ /* Encoder 4 (U13) */
++ P8_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "pruin_pu", "gpio", "gpio_pu", "gpio_pd", "pruin", "qep", "pruecapin_pu";
++ pinctrl-0 = <&P8_15_pruin_pu_pin>;
++ pinctrl-1 = <&P8_15_pruin_pu_pin>;
++ pinctrl-2 = <&P8_15_gpio_pin>;
++ pinctrl-3 = <&P8_15_gpio_pu_pin>;
++ pinctrl-4 = <&P8_15_gpio_pd_pin>;
++ pinctrl-5 = <&P8_15_pruin_pin>;
++ pinctrl-6 = <&P8_15_qep_pin>;
++ pinctrl-7 = <&P8_15_pruecapin_pu_pin>;
++ };
++
++ /* UART4 RX DSM */
++ P9_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "uart", "gpio", "gpio_pu", "gpio_pd";
++ pinctrl-0 = <&P9_11_uart_pin>;
++ pinctrl-1 = <&P9_11_uart_pin>;
++ pinctrl-2 = <&P9_11_gpio_pin>;
++ pinctrl-3 = <&P9_11_gpio_pu_pin>;
++ pinctrl-4 = <&P9_11_gpio_pd_pin>;
++ };
++
++ /* U16 BLUE_GP0_PIN_3 gpio 1_25*/
++ U16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
++ pinctrl-0 = <&U16_default_pin>;
++ pinctrl-1 = <&U16_gpio_pin>;
++ pinctrl-2 = <&U16_gpio_pu_pin>;
++ pinctrl-3 = <&U16_gpio_pd_pin>;
++ };
++
++
++ /* BLUE_GP0_PIN_3 gpio1_17*/
++ P9_23_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P9_23_default_pin>;
++ pinctrl-1 = <&P9_23_gpio_pin>;
++ pinctrl-2 = <&P9_23_gpio_pu_pin>;
++ pinctrl-3 = <&P9_23_gpio_pd_pin>;
++ pinctrl-4 = <&P9_23_pwm_pin>;
++ };
++
++ /* BLUE_GP0_PIN_5 gpio3_20 */
++ D13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
++ pinctrl-0 = <&D13_default_pin>;
++ pinctrl-1 = <&D13_gpio_pin>;
++ pinctrl-2 = <&D13_gpio_pu_pin>;
++ pinctrl-3 = <&D13_gpio_pd_pin>;
++ };
++
++ /* BLUE_GP0_PIN_6 gpio3_17 */
++ P9_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin";
++ pinctrl-0 = <&P9_28_default_pin>;
++ pinctrl-1 = <&P9_28_gpio_pin>;
++ pinctrl-2 = <&P9_28_gpio_pu_pin>;
++ pinctrl-3 = <&P9_28_gpio_pd_pin>;
++ pinctrl-4 = <&P9_28_pwm_pin>;
++ pinctrl-5 = <&P9_28_spi_pin>;
++ pinctrl-6 = <&P9_28_pwm2_pin>;
++ pinctrl-7 = <&P9_28_pruout_pin>;
++ pinctrl-8 = <&P9_28_pruin_pin>;
++ };
++
++ /* BLUE_GP1_PIN_3 gpio3_2 */
++ J15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
++ pinctrl-0 = <&J15_default_pin>;
++ pinctrl-1 = <&J15_gpio_pin>;
++ pinctrl-2 = <&J15_gpio_pu_pin>;
++ pinctrl-3 = <&J15_gpio_pd_pin>;
++ };
++
++ /* BLUE_GP1_PIN_4 gpio3_1 */
++ H17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
++ pinctrl-0 = <&H17_default_pin>;
++ pinctrl-1 = <&H17_gpio_pin>;
++ pinctrl-2 = <&H17_gpio_pu_pin>;
++ pinctrl-3 = <&H17_gpio_pd_pin>;
++ };
++};
++
++/*******************************************************************************
++* PWMSS
++*******************************************************************************/
++&epwmss0 {
++ status = "okay";
++};
++
++&epwmss1 {
++ status = "okay";
++};
++
++&epwmss2 {
++ status = "okay";
++};
++
++&ehrpwm0 {
++ status = "okay";
++};
++
++&ehrpwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&ehrpwm1_pins>;
++ status = "okay";
++};
++
++&ehrpwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&ehrpwm2_pins>;
++ status = "okay";
++};
++
++/*******************************************************************************
++* EQEP
++*******************************************************************************/
++&eqep0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&eqep0_pins>;
++
++ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
++ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
++ invert_qa = <1>; /* Should we invert the channel A input? */
++ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
++ invert_qi = <0>; /* Should we invert the index input? */
++ invert_qs = <0>; /* Should we invert the strobe input? */
++ status = "okay";
++};
++
++&eqep1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&eqep1_pins>;
++
++ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
++ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
++ invert_qa = <1>; /* Should we invert the channel A input? */
++ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
++ invert_qi = <0>; /* Should we invert the index input? */
++ invert_qs = <0>; /* Should we invert the strobe input? */
++ status = "okay";
++};
++
++&eqep2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&eqep2_pins>;
++
++ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
++ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
++ invert_qa = <1>; /* Should we invert the channel A input? */
++ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
++ invert_qi = <0>; /* Should we invert the index input? */
++ invert_qs = <0>; /* Should we invert the strobe input? */
++ status = "okay";
++};
++
++/*******************************************************************************
++ SPI
++*******************************************************************************/
++&spi1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "spi/1.0";
++ reg = <0>;
++ spi-max-frequency = <24000000>;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "spi/1.1";
++ reg = <1>;
++ spi-max-frequency = <24000000>;
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
+new file mode 100644
+index 000000000000..455a8fa5f68b
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
+@@ -0,0 +1,2797 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++&am33xx_pinmux {
++ /************************/
++ /* P8 Header */
++ /************************/
++
++ /* P8_01 GND */
++
++ /* P8_02 GND */
++
++
++ /* P8_03 (ZCZ ball R9) emmc */
++ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
++ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
@@ -5885,6 +7246,2944 @@ index 000000000000..5d87c70b45b3
+ line-name = "MCASP0_AHCLKR";
+ };
+};
+diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
+index 57731f0daf10..de299ad8ee40 100644
+--- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
+@@ -11,6 +11,7 @@
+ #include "am335x-bone-common.dtsi"
+ #include "am335x-bonegreen-common.dtsi"
+ #include <dt-bindings/interrupt-controller/irq.h>
++/* #include "am335x-bone-jtag.dtsi" */
+
+ / {
+ model = "TI AM335x BeagleBone Green Wireless";
+diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
+index a8b4d969ce2a..575a5a93a89e 100644
+--- a/arch/arm/boot/dts/am335x-bonegreen.dts
++++ b/arch/arm/boot/dts/am335x-bonegreen.dts
+@@ -10,6 +10,7 @@
+ #include "am33xx.dtsi"
+ #include "am335x-bone-common.dtsi"
+ #include "am335x-bonegreen-common.dtsi"
++/* #include "am335x-bone-jtag.dtsi" */
+
+ / {
+ model = "TI AM335x BeagleBone Green";
+diff --git a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
+index 95d54cf3849e..7dc90e986dc2 100644
+--- a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
++++ b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
+@@ -13,6 +13,7 @@
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ #include <dt-bindings/display/tda998x.h>
++/* #include "am335x-bone-jtag.dtsi" */
+
+ / {
+ model = "Octavo Systems OSD3358-SM-RED";
+@@ -40,7 +41,6 @@
+ &am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
+ pinctrl-single,pins = <
+- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+ AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
+ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
+ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
+@@ -64,12 +64,6 @@
+ >;
+ };
+
+- nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
+- >;
+- };
+-
+ mcasp0_pins: mcasp0-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
+@@ -124,9 +118,8 @@
+ compatible = "nxp,tda998x";
+ reg = <0x70>;
+
+- pinctrl-names = "default", "off";
++ pinctrl-names = "default";
+ pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+
+ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+ /* video-ports = <0x234501>; */
+@@ -264,9 +257,6 @@
+ };
+
+ &am33xx_pinmux {
+- pinctrl-names = "default";
+- pinctrl-0 = <&clkout2_pin>;
+-
+ user_leds_s0: user-leds-s0 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
+@@ -290,12 +280,6 @@
+ >;
+ };
+
+- clkout2_pin: pinmux-clkout2-pin {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+- >;
+- };
+-
+ cpsw_default: cpsw-default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
+index 62fe5cab9fae..9f4142c21ec6 100644
+--- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
++++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
+@@ -60,24 +60,24 @@
+ };
+
+ &am33xx_pinmux {
+- i2c2_pins: pinmux-i2c2-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
+- AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
+- >;
+- };
++// i2c2_pins: pinmux-i2c2-pins {
++// pinctrl-single,pins = <
++// AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
++// AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
++// >;
++// };
+
+- ehrpwm0_pins: pinmux-ehrpwm0-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
+- >;
+- };
++// ehrpwm0_pins: pinmux-ehrpwm0-pins {
++// pinctrl-single,pins = <
++// AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
++// >;
++// };
+
+- ehrpwm1_pins: pinmux-ehrpwm1-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
+- >;
+- };
++// ehrpwm1_pins: pinmux-ehrpwm1-pins {
++// pinctrl-single,pins = <
++// AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
++// >;
++// };
+
+ mmc0_pins: pinmux-mmc0-pins {
+ pinctrl-single,pins = <
+@@ -88,27 +88,26 @@
+ AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
+ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
+ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
+- AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
+ >;
+ };
+
+- spi0_pins: pinmux-spi0-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
+- AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
+- AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
+- AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
+- >;
+- };
++// spi0_pins: pinmux-spi0-pins {
++// pinctrl-single,pins = <
++// AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
++// AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
++// AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
++// AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
++// >;
++// };
+
+- spi1_pins: pinmux-spi1-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
+- AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
+- AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
+- AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
+- >;
+- };
++// spi1_pins: pinmux-spi1-pins {
++// pinctrl-single,pins = <
++// AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
++// AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
++// AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
++// AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
++// >;
++// };
+
+ usr_leds_pins: pinmux-usr-leds-pins {
+ pinctrl-single,pins = <
+@@ -126,12 +125,839 @@
+ >;
+ };
+
+- uart4_pins: pinmux-uart4-pins {
+- pinctrl-single,pins = <
+- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+- AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
+- >;
+- };
++// uart4_pins: pinmux-uart4-pins {
++// pinctrl-single,pins = <
++// AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
++// AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
++// >;
++// };
++
++ /************************/
++ /* P1 Header */
++ /************************/
++
++ /* P1_01 VIN-AC */
++
++ /* P1_02 (ZCZ ball R5) gpio2_23 */
++ P1_02_default_pin: pinmux_P1_02_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_pin: pinmux_P1_02_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_pu_pin: pinmux_P1_02_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_pd_pin: pinmux_P1_02_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_gpio_input_pin: pinmux_P1_02_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
++ P1_02_pruout_pin: pinmux_P1_02_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
++ P1_02_pruin_pin: pinmux_P1_02_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
++
++ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
++
++ /* P1_04 (ZCZ ball R6) gpio2_25 */
++ P1_04_default_pin: pinmux_P1_04_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_pin: pinmux_P1_04_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_pu_pin: pinmux_P1_04_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_pd_pin: pinmux_P1_04_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_gpio_input_pin: pinmux_P1_04_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
++ P1_04_pruout_pin: pinmux_P1_04_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
++ P1_04_pruin_pin: pinmux_P1_04_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
++
++ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
++
++ /* P1_06 (ZCZ ball A16) spi0_cs0 */
++ P1_06_default_pin: pinmux_P1_06_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
++ P1_06_gpio_pin: pinmux_P1_06_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_gpio_pu_pin: pinmux_P1_06_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_gpio_pd_pin: pinmux_P1_06_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_gpio_input_pin: pinmux_P1_06_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
++ P1_06_spi_cs_pin: pinmux_P1_06_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
++ P1_06_i2c_pin: pinmux_P1_06_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
++ P1_06_pwm_pin: pinmux_P1_06_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
++ P1_06_pru_uart_pin: pinmux_P1_06_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
++
++ /* P1_07 VIN-USB */
++
++ /* P1_08 (ZCZ ball A17) spi0_sclk */
++ P1_08_default_pin: pinmux_P1_08_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
++ P1_08_gpio_pin: pinmux_P1_08_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_gpio_pu_pin: pinmux_P1_08_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_gpio_pd_pin: pinmux_P1_08_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_gpio_input_pin: pinmux_P1_08_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
++ P1_08_spi_sclk_pin: pinmux_P1_08_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
++ P1_08_uart_pin: pinmux_P1_08_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
++ P1_08_i2c_pin: pinmux_P1_08_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
++ P1_08_pwm_pin: pinmux_P1_08_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
++ P1_08_pru_uart_pin: pinmux_P1_08_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
++
++ /* P1_09 (ZCZ ball R18) USB1-DN */
++
++ /* P1_10 (ZCZ ball B17) spi0_d0 */
++ P1_10_default_pin: pinmux_P1_10_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
++ P1_10_gpio_pin: pinmux_P1_10_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_gpio_pu_pin: pinmux_P1_10_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_gpio_pd_pin: pinmux_P1_10_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_gpio_input_pin: pinmux_P1_10_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
++ P1_10_spi_pin: pinmux_P1_10_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
++ P1_10_uart_pin: pinmux_P1_10_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
++ P1_10_i2c_pin: pinmux_P1_10_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
++ P1_10_pwm_pin: pinmux_P1_10_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
++ P1_10_pru_uart_pin: pinmux_P1_10_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
++
++ /* P1_11 (ZCZ ball R17) USB1-DP */
++
++ /* P1_12 (ZCZ ball B16) spi0_d1 */
++ P1_12_default_pin: pinmux_P1_12_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
++ P1_12_gpio_pin: pinmux_P1_12_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_gpio_pu_pin: pinmux_P1_12_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_gpio_pd_pin: pinmux_P1_12_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_gpio_input_pin: pinmux_P1_12_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
++ P1_12_spi_pin: pinmux_P1_12_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
++ P1_12_i2c_pin: pinmux_P1_12_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
++ P1_12_pwm_pin: pinmux_P1_12_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
++ P1_12_pru_uart_pin: pinmux_P1_12_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
++
++ /* P1_13 (ZCZ ball P17) USB1-ID */
++
++ /* P1_14 VOUT-3.3V */
++
++ /* P1_15 GND */
++
++ /* P1_16 GND */
++
++ /* P1_17 (ZCZ ball A9) VREFN */
++
++ /* P1_18 (ZCZ ball B9) VREFP */
++
++ /* P1_19 (ZCZ ball B6) AIN0 */
++
++ /* P1_20 (ZCZ ball D14) gpio0_20 */
++ P1_20_default_pin: pinmux_P1_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_pin: pinmux_P1_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_pu_pin: pinmux_P1_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_pd_pin: pinmux_P1_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_gpio_input_pin: pinmux_P1_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
++ P1_20_pruin_pin: pinmux_P1_20_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
++
++ /* P1_21 (ZCZ ball C7) AIN1 */
++
++ /* P1_22 GND */
++
++ /* P1_23 (ZCZ ball B7) AIN2 */
++
++ /* P1_24 VOUT-5V */
++
++ /* P1_25 (ZCZ ball A7) AIN3 */
++
++ /* P1_26 (ZCZ ball D18) i2c2_sda */
++ P1_26_default_pin: pinmux_P1_26_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P1_26_gpio_pin: pinmux_P1_26_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_gpio_pu_pin: pinmux_P1_26_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_gpio_pd_pin: pinmux_P1_26_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_gpio_input_pin: pinmux_P1_26_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
++ P1_26_can_pin: pinmux_P1_26_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
++ P1_26_i2c_pin: pinmux_P1_26_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
++ P1_26_spi_cs_pin: pinmux_P1_26_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
++ P1_26_pru_uart_pin: pinmux_P1_26_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
++
++ /* P1_27 (ZCZ ball C8) AIN4 */
++
++ /* P1_28 (ZCZ ball D17) i2c2_scl */
++ P1_28_default_pin: pinmux_P1_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P1_28_gpio_pin: pinmux_P1_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_gpio_pu_pin: pinmux_P1_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_gpio_pd_pin: pinmux_P1_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_gpio_input_pin: pinmux_P1_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
++ P1_28_can_pin: pinmux_P1_28_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
++ P1_28_i2c_pin: pinmux_P1_28_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
++ P1_28_spi_cs_pin: pinmux_P1_28_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
++ P1_28_pru_uart_pin: pinmux_P1_28_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
++
++ /* P1_29 (ZCZ ball A14) pru0_in7 */
++ P1_29_default_pin: pinmux_P1_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
++ P1_29_gpio_pin: pinmux_P1_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_gpio_pu_pin: pinmux_P1_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_gpio_pd_pin: pinmux_P1_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_gpio_input_pin: pinmux_P1_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
++ P1_29_qep_pin: pinmux_P1_29_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
++ P1_29_pruout_pin: pinmux_P1_29_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
++ P1_29_pruin_pin: pinmux_P1_29_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
++
++ /* P1_30 (ZCZ ball E16) uart0_txd */
++ P1_30_default_pin: pinmux_P1_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
++ P1_30_gpio_pin: pinmux_P1_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_gpio_pu_pin: pinmux_P1_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_gpio_pd_pin: pinmux_P1_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_gpio_input_pin: pinmux_P1_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
++ P1_30_uart_pin: pinmux_P1_30_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
++ P1_30_spi_cs_pin: pinmux_P1_30_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_txd.spi1_cs1 */
++ P1_30_can_pin: pinmux_P1_30_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_txd.dcan0_rx */
++ P1_30_i2c_pin: pinmux_P1_30_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_txd.i2c2_scl */
++ P1_30_pruout_pin: pinmux_P1_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_txd.pru1_out15 */
++ P1_30_pruin_pin: pinmux_P1_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE6) >; }; /* uart0_txd.pru1_in15 */
++
++ /* P1_31 (ZCZ ball B12) pru0_in4 */
++ P1_31_default_pin: pinmux_P1_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
++ P1_31_gpio_pin: pinmux_P1_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_gpio_pu_pin: pinmux_P1_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_gpio_pd_pin: pinmux_P1_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_gpio_input_pin: pinmux_P1_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
++ P1_31_qep_pin: pinmux_P1_31_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
++ P1_31_pruout_pin: pinmux_P1_31_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
++ P1_31_pruin_pin: pinmux_P1_31_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
++
++ /* P1_32 (ZCZ ball E15) uart0_rxd */
++ P1_32_default_pin: pinmux_P1_32_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
++ P1_32_gpio_pin: pinmux_P1_32_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_gpio_pu_pin: pinmux_P1_32_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_gpio_pd_pin: pinmux_P1_32_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_gpio_input_pin: pinmux_P1_32_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
++ P1_32_uart_pin: pinmux_P1_32_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
++ P1_32_spi_cs_pin: pinmux_P1_32_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rxd.spi1_cs0 */
++ P1_32_can_pin: pinmux_P1_32_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rxd.dcan0_tx */
++ P1_32_i2c_pin: pinmux_P1_32_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rxd.i2c2_sda */
++ P1_32_pruout_pin: pinmux_P1_32_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_rxd.pru1_out14 */
++ P1_32_pruin_pin: pinmux_P1_32_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE6) >; }; /* uart0_rxd.pru1_in14 */
++
++ /* P1_33 (ZCZ ball B13) pru0_in1 */
++ P1_33_default_pin: pinmux_P1_33_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
++ P1_33_gpio_pin: pinmux_P1_33_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_gpio_pu_pin: pinmux_P1_33_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_gpio_pd_pin: pinmux_P1_33_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_gpio_input_pin: pinmux_P1_33_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
++ P1_33_pwm_pin: pinmux_P1_33_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
++ P1_33_spi_pin: pinmux_P1_33_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
++ P1_33_pruout_pin: pinmux_P1_33_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
++ P1_33_pruin_pin: pinmux_P1_33_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
++
++ /* P1_34 (ZCZ ball T11) gpio0_26 */
++ P1_34_default_pin: pinmux_P1_34_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_pin: pinmux_P1_34_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_pu_pin: pinmux_P1_34_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_pd_pin: pinmux_P1_34_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_gpio_input_pin: pinmux_P1_34_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
++ P1_34_pwm_pin: pinmux_P1_34_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
++
++ /* P1_35 (ZCZ ball V5) pru1_in10 */
++ P1_35_default_pin: pinmux_P1_35_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
++ P1_35_gpio_pin: pinmux_P1_35_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_gpio_pu_pin: pinmux_P1_35_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_gpio_pd_pin: pinmux_P1_35_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_gpio_input_pin: pinmux_P1_35_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
++ P1_35_pruout_pin: pinmux_P1_35_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
++ P1_35_pruin_pin: pinmux_P1_35_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
++
++ /* P1_36 (ZCZ ball A13) ehrpwm0a */
++ P1_36_default_pin: pinmux_P1_36_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
++ P1_36_gpio_pin: pinmux_P1_36_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_gpio_pu_pin: pinmux_P1_36_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_gpio_pd_pin: pinmux_P1_36_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_gpio_input_pin: pinmux_P1_36_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
++ P1_36_pwm_pin: pinmux_P1_36_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
++ P1_36_spi_sclk_pin: pinmux_P1_36_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
++ P1_36_pruout_pin: pinmux_P1_36_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
++ P1_36_pruin_pin: pinmux_P1_36_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
++
++
++ /************************/
++ /* P2 Header */
++ /************************/
++
++ /* P2_01 (ZCZ ball U14) ehrpwm1a */
++ P2_01_default_pin: pinmux_P2_01_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
++ P2_01_gpio_pin: pinmux_P2_01_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_gpio_pu_pin: pinmux_P2_01_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_gpio_pd_pin: pinmux_P2_01_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_gpio_input_pin: pinmux_P2_01_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
++ P2_01_pwm_pin: pinmux_P2_01_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
++
++ /* P2_02 (ZCZ ball V17) gpio1_27 */
++ P2_02_default_pin: pinmux_P2_02_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_pin: pinmux_P2_02_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_pu_pin: pinmux_P2_02_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_pd_pin: pinmux_P2_02_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++ P2_02_gpio_input_pin: pinmux_P2_02_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x086c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
++
++ /* P2_03 (ZCZ ball T10) gpio0_23 */
++ P2_03_default_pin: pinmux_P2_03_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_pin: pinmux_P2_03_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_pu_pin: pinmux_P2_03_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_pd_pin: pinmux_P2_03_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_gpio_input_pin: pinmux_P2_03_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
++ P2_03_pwm_pin: pinmux_P2_03_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
++
++ /* P2_04 (ZCZ ball T16) gpio1_26 */
++ P2_04_default_pin: pinmux_P2_04_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_pin: pinmux_P2_04_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_pu_pin: pinmux_P2_04_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_pd_pin: pinmux_P2_04_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++ P2_04_gpio_input_pin: pinmux_P2_04_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0868, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
++
++ /* P2_05 (ZCZ ball T17) uart4_rxd */
++ P2_05_default_pin: pinmux_P2_05_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
++ P2_05_gpio_pin: pinmux_P2_05_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_gpio_pu_pin: pinmux_P2_05_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_gpio_pd_pin: pinmux_P2_05_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_gpio_input_pin: pinmux_P2_05_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
++ P2_05_uart_pin: pinmux_P2_05_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
++
++ /* P2_06 (ZCZ ball U16) gpio1_25 */
++ P2_06_default_pin: pinmux_P2_06_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_pin: pinmux_P2_06_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_pu_pin: pinmux_P2_06_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_pd_pin: pinmux_P2_06_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++ P2_06_gpio_input_pin: pinmux_P2_06_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0864, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
++
++ /* P2_07 (ZCZ ball U17) uart4_txd */
++ P2_07_default_pin: pinmux_P2_07_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
++ P2_07_gpio_pin: pinmux_P2_07_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_gpio_pu_pin: pinmux_P2_07_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_gpio_pd_pin: pinmux_P2_07_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_gpio_input_pin: pinmux_P2_07_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
++ P2_07_uart_pin: pinmux_P2_07_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
++
++ /* P2_08 (ZCZ ball U18) gpio1_28 */
++ P2_08_default_pin: pinmux_P2_08_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_pin: pinmux_P2_08_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_pu_pin: pinmux_P2_08_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_pd_pin: pinmux_P2_08_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++ P2_08_gpio_input_pin: pinmux_P2_08_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
++
++ /* P2_09 (ZCZ ball D15) i2c1_scl */
++ P2_09_default_pin: pinmux_P2_09_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
++ P2_09_gpio_pin: pinmux_P2_09_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_gpio_pu_pin: pinmux_P2_09_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_gpio_pd_pin: pinmux_P2_09_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_gpio_input_pin: pinmux_P2_09_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
++ P2_09_uart_pin: pinmux_P2_09_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
++ P2_09_can_pin: pinmux_P2_09_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
++ P2_09_i2c_pin: pinmux_P2_09_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
++ P2_09_pru_uart_pin: pinmux_P2_09_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
++ P2_09_pruin_pin: pinmux_P2_09_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
++
++ /* P2_10 (ZCZ ball R14) gpio1_20 */
++ P2_10_default_pin: pinmux_P2_10_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_pin: pinmux_P2_10_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_pu_pin: pinmux_P2_10_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_pd_pin: pinmux_P2_10_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_gpio_input_pin: pinmux_P2_10_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
++ P2_10_qep_pin: pinmux_P2_10_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a4.eqep1a_in */
++
++ /* P2_11 (ZCZ ball D16) i2c1_sda */
++ P2_11_default_pin: pinmux_P2_11_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
++ P2_11_gpio_pin: pinmux_P2_11_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_gpio_pu_pin: pinmux_P2_11_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_gpio_pd_pin: pinmux_P2_11_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_gpio_input_pin: pinmux_P2_11_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
++ P2_11_uart_pin: pinmux_P2_11_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
++ P2_11_can_pin: pinmux_P2_11_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
++ P2_11_i2c_pin: pinmux_P2_11_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
++ P2_11_pru_uart_pin: pinmux_P2_11_pru_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
++ P2_11_pruin_pin: pinmux_P2_11_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
++
++ /* P2_12 POWER_BUTTON */
++
++ /* P2_13 VOUT-5V */
++
++ /* P2_14 BAT-VIN */
++
++ /* P2_15 GND */
++
++ /* P2_16 BAT-TEMP */
++
++ /* P2_17 (ZCZ ball V12) gpio2_1 */
++ P2_17_default_pin: pinmux_P2_17_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_pin: pinmux_P2_17_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_pu_pin: pinmux_P2_17_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_pd_pin: pinmux_P2_17_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++ P2_17_gpio_input_pin: pinmux_P2_17_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
++
++ /* P2_18 (ZCZ ball U13) gpio1_15 */
++ P2_18_default_pin: pinmux_P2_18_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_pin: pinmux_P2_18_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_pu_pin: pinmux_P2_18_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_pd_pin: pinmux_P2_18_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_gpio_input_pin: pinmux_P2_18_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
++ P2_18_qep_pin: pinmux_P2_18_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
++ P2_18_pru_ecap_pin: pinmux_P2_18_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
++ P2_18_pruin_pin: pinmux_P2_18_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
++
++ /* P2_19 (ZCZ ball U12) gpio0_27 */
++ P2_19_default_pin: pinmux_P2_19_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_pin: pinmux_P2_19_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_pu_pin: pinmux_P2_19_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_pd_pin: pinmux_P2_19_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_gpio_input_pin: pinmux_P2_19_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
++ P2_19_pwm_pin: pinmux_P2_19_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
++
++ /* P2_20 (ZCZ ball T13) gpio2_0 */
++ P2_20_default_pin: pinmux_P2_20_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_pin: pinmux_P2_20_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_pu_pin: pinmux_P2_20_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_pd_pin: pinmux_P2_20_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++ P2_20_gpio_input_pin: pinmux_P2_20_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0888, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
++
++ /* P2_21 GND */
++
++ /* P2_22 (ZCZ ball V13) gpio1_14 */
++ P2_22_default_pin: pinmux_P2_22_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_pin: pinmux_P2_22_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_pu_pin: pinmux_P2_22_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_pd_pin: pinmux_P2_22_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_gpio_input_pin: pinmux_P2_22_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
++ P2_22_qep_pin: pinmux_P2_22_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
++ P2_22_pruin_pin: pinmux_P2_22_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
++
++ /* P2_23 VOUT-3.3V */
++
++ /* P2_24 (ZCZ ball T12) gpio1_12 */
++ P2_24_default_pin: pinmux_P2_24_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_pin: pinmux_P2_24_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_pu_pin: pinmux_P2_24_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_pd_pin: pinmux_P2_24_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_gpio_input_pin: pinmux_P2_24_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
++ P2_24_qep_pin: pinmux_P2_24_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
++ P2_24_pruout_pin: pinmux_P2_24_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
++
++ /* P2_25 (ZCZ ball E17) spi1_d1 */
++ P2_25_default_pin: pinmux_P2_25_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
++ P2_25_gpio_pin: pinmux_P2_25_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_gpio_pu_pin: pinmux_P2_25_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_gpio_pd_pin: pinmux_P2_25_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_gpio_input_pin: pinmux_P2_25_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
++ P2_25_uart_pin: pinmux_P2_25_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rtsn.uart4_txd */
++ P2_25_can_pin: pinmux_P2_25_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rtsn.dcan1_rx */
++ P2_25_i2c_pin: pinmux_P2_25_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rtsn.i2c1_scl */
++ P2_25_spi_pin: pinmux_P2_25_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
++ P2_25_spi_cs_pin: pinmux_P2_25_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart0_rtsn.spi1_cs0 */
++
++ /* P2_26 RESET# */
++
++ /* P2_27 (ZCZ ball E18) spi1_d0 */
++ P2_27_default_pin: pinmux_P2_27_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
++ P2_27_gpio_pin: pinmux_P2_27_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_gpio_pu_pin: pinmux_P2_27_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_gpio_pd_pin: pinmux_P2_27_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_gpio_input_pin: pinmux_P2_27_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_INPUT | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
++ P2_27_uart_pin: pinmux_P2_27_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_ctsn.uart4_rxd */
++ P2_27_can_pin: pinmux_P2_27_can_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_ctsn.dcan1_tx */
++ P2_27_i2c_pin: pinmux_P2_27_i2c_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_ctsn.i2c1_sda */
++ P2_27_spi_pin: pinmux_P2_27_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
++
++ /* P2_28 (ZCZ ball D13) pru0_in6 */
++ P2_28_default_pin: pinmux_P2_28_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
++ P2_28_gpio_pin: pinmux_P2_28_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_gpio_pu_pin: pinmux_P2_28_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_gpio_pd_pin: pinmux_P2_28_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_gpio_input_pin: pinmux_P2_28_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
++ P2_28_qep_pin: pinmux_P2_28_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
++ P2_28_pruout_pin: pinmux_P2_28_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
++ P2_28_pruin_pin: pinmux_P2_28_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
++
++ /* P2_29 (ZCZ ball C18) spi1_sclk */
++ P2_29_default_pin: pinmux_P2_29_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
++ P2_29_gpio_pin: pinmux_P2_29_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_gpio_pu_pin: pinmux_P2_29_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_gpio_pd_pin: pinmux_P2_29_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_gpio_input_pin: pinmux_P2_29_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
++ P2_29_pwm_pin: pinmux_P2_29_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
++ P2_29_uart_pin: pinmux_P2_29_uart_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
++ P2_29_spi_cs_pin: pinmux_P2_29_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
++ P2_29_pru_ecap_pin: pinmux_P2_29_pru_ecap_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
++ P2_29_spi_sclk_pin: pinmux_P2_29_spi_sclk_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
++
++ /* P2_30 (ZCZ ball C12) pru0_in3 */
++ P2_30_default_pin: pinmux_P2_30_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
++ P2_30_gpio_pin: pinmux_P2_30_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_gpio_pu_pin: pinmux_P2_30_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_gpio_pd_pin: pinmux_P2_30_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_gpio_input_pin: pinmux_P2_30_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
++ P2_30_pwm_pin: pinmux_P2_30_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
++ P2_30_spi_cs_pin: pinmux_P2_30_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
++ P2_30_pruout_pin: pinmux_P2_30_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
++ P2_30_pruin_pin: pinmux_P2_30_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
++
++ /* P2_31 (ZCZ ball A15) spi1_cs1 */
++ P2_31_default_pin: pinmux_P2_31_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
++ P2_31_gpio_pin: pinmux_P2_31_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_gpio_pu_pin: pinmux_P2_31_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_gpio_pd_pin: pinmux_P2_31_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_gpio_input_pin: pinmux_P2_31_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
++ P2_31_spi_cs_pin: pinmux_P2_31_spi_cs_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
++ P2_31_pruin_pin: pinmux_P2_31_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr0.pru1_in16 */
++
++ /* P2_32 (ZCZ ball D12) pru0_in2 */
++ P2_32_default_pin: pinmux_P2_32_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
++ P2_32_gpio_pin: pinmux_P2_32_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_gpio_pu_pin: pinmux_P2_32_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_gpio_pd_pin: pinmux_P2_32_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_gpio_input_pin: pinmux_P2_32_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
++ P2_32_pwm_pin: pinmux_P2_32_pwm_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
++ P2_32_spi_pin: pinmux_P2_32_spi_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
++ P2_32_pruout_pin: pinmux_P2_32_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
++ P2_32_pruin_pin: pinmux_P2_32_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
++
++ /* P2_33 (ZCZ ball R12) gpio1_13 */
++ P2_33_default_pin: pinmux_P2_33_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_pin: pinmux_P2_33_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_pu_pin: pinmux_P2_33_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_pd_pin: pinmux_P2_33_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_gpio_input_pin: pinmux_P2_33_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
++ P2_33_qep_pin: pinmux_P2_33_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
++ P2_33_pruout_pin: pinmux_P2_33_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
++
++ /* P2_34 (ZCZ ball C13) pru0_in5 */
++ P2_34_default_pin: pinmux_P2_34_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
++ P2_34_gpio_pin: pinmux_P2_34_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_gpio_pu_pin: pinmux_P2_34_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_gpio_pd_pin: pinmux_P2_34_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_gpio_input_pin: pinmux_P2_34_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
++ P2_34_qep_pin: pinmux_P2_34_qep_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
++ P2_34_pruout_pin: pinmux_P2_34_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
++ P2_34_pruin_pin: pinmux_P2_34_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
++
++ /* P2_35 (ZCZ ball U5) gpio2_22 */
++ P2_35_default_pin: pinmux_P2_35_default_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_pin: pinmux_P2_35_gpio_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_pu_pin: pinmux_P2_35_gpio_pu_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_pd_pin: pinmux_P2_35_gpio_pd_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_gpio_input_pin: pinmux_P2_35_gpio_input_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
++ P2_35_pruout_pin: pinmux_P2_35_pruout_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
++ P2_35_pruin_pin: pinmux_P2_35_pruin_pin { pinctrl-single,pins = <
++ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
++
++ /* P2_36 (ZCZ ball C9) AIN7 */
+ };
+
+ &epwmss0 {
+@@ -141,7 +967,8 @@
+ &ehrpwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+- pinctrl-0 = <&ehrpwm0_pins>;
++ //pinctrl-0 = <&ehrpwm0_pins>;
++ pinctrl-0 = <>;
+ };
+
+ &epwmss1 {
+@@ -151,7 +978,18 @@
+ &ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+- pinctrl-0 = <&ehrpwm1_pins>;
++ //pinctrl-0 = <&ehrpwm1_pins>;
++ pinctrl-0 = <>;
++};
++
++&epwmss2 {
++ status = "okay";
++};
++
++&ehrpwm2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
+ };
+
+ &i2c0 {
+@@ -161,9 +999,18 @@
+ };
+ };
+
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ status = "okay";
++ clock-frequency = <400000>;
++};
++
+ &i2c2 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&i2c2_pins>;
++// pinctrl-0 = <&i2c2_pins>;
++ pinctrl-0 = <>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+@@ -194,14 +1041,30 @@
+
+ &uart0 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&uart0_pins>;
++ //pinctrl-0 = <&uart0_pins>;
++ pinctrl-0 = <>;
++
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ status = "okay";
++};
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
+
+ status = "okay";
+ };
+
+ &uart4 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&uart4_pins>;
++ //pinctrl-0 = <&uart4_pins>;
++ pinctrl-0 = <>;
+
+ status = "okay";
+ };
+@@ -235,3 +1098,1092 @@
+ &cppi41dma {
+ status = "okay";
+ };
++
++&spi0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "spi/0.0";
++ reg = <0>;
++ spi-max-frequency = <24000000>;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "spi/0.1";
++ reg = <1>;
++ spi-max-frequency = <24000000>;
++ status = "disabled";
++ };
++};
++
++&spi1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ channel@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "spi/1.0";
++ reg = <0>;
++ spi-max-frequency = <24000000>;
++ };
++
++ channel@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "spidev";
++ symlink = "spi/1.1";
++ reg = <1>;
++ spi-max-frequency = <24000000>;
++ };
++};
++
++&dcan0 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&dcan1 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++};
++
++&ocp {
++ /************************/
++ /* P1 Header */
++ /************************/
++
++ /* P1_01 VIN-AC */
++
++ /* P1_02 (ZCZ ball R5) gpio_input */
++ P1_02_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P1_02_default_pin>;
++ pinctrl-1 = <&P1_02_gpio_pin>;
++ pinctrl-2 = <&P1_02_gpio_pu_pin>;
++ pinctrl-3 = <&P1_02_gpio_pd_pin>;
++ pinctrl-4 = <&P1_02_gpio_input_pin>;
++ pinctrl-5 = <&P1_02_pruout_pin>;
++ pinctrl-6 = <&P1_02_pruin_pin>;
++ };
++
++ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
++
++ /* P1_04 (ZCZ ball R6) */
++ P1_04_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P1_04_default_pin>;
++ pinctrl-1 = <&P1_04_gpio_pin>;
++ pinctrl-2 = <&P1_04_gpio_pu_pin>;
++ pinctrl-3 = <&P1_04_gpio_pd_pin>;
++ pinctrl-4 = <&P1_04_gpio_input_pin>;
++ pinctrl-5 = <&P1_04_pruout_pin>;
++ pinctrl-6 = <&P1_04_pruin_pin>;
++ };
++
++ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
++
++ /* P1_06 (ZCZ ball A16) spi_cs */
++ P1_06_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P1_06_default_pin>;
++ pinctrl-1 = <&P1_06_gpio_pin>;
++ pinctrl-2 = <&P1_06_gpio_pu_pin>;
++ pinctrl-3 = <&P1_06_gpio_pd_pin>;
++ pinctrl-4 = <&P1_06_gpio_input_pin>;
++ pinctrl-5 = <&P1_06_spi_cs_pin>;
++ pinctrl-6 = <&P1_06_i2c_pin>;
++ pinctrl-7 = <&P1_06_pwm_pin>;
++ pinctrl-8 = <&P1_06_pru_uart_pin>;
++ };
++
++ /* P1_07 VIN-USB */
++
++ /* P1_08 (ZCZ ball A17) spi_sclk */
++ P1_08_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P1_08_default_pin>;
++ pinctrl-1 = <&P1_08_gpio_pin>;
++ pinctrl-2 = <&P1_08_gpio_pu_pin>;
++ pinctrl-3 = <&P1_08_gpio_pd_pin>;
++ pinctrl-4 = <&P1_08_gpio_input_pin>;
++ pinctrl-5 = <&P1_08_spi_sclk_pin>;
++ pinctrl-6 = <&P1_08_uart_pin>;
++ pinctrl-7 = <&P1_08_i2c_pin>;
++ pinctrl-8 = <&P1_08_pwm_pin>;
++ pinctrl-9 = <&P1_08_pru_uart_pin>;
++ };
++
++ /* P1_09 (ZCZ ball R18) USB1-DN */
++
++ /* P1_10 (ZCZ ball B17) spi */
++ P1_10_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P1_10_default_pin>;
++ pinctrl-1 = <&P1_10_gpio_pin>;
++ pinctrl-2 = <&P1_10_gpio_pu_pin>;
++ pinctrl-3 = <&P1_10_gpio_pd_pin>;
++ pinctrl-4 = <&P1_10_gpio_input_pin>;
++ pinctrl-5 = <&P1_10_spi_pin>;
++ pinctrl-6 = <&P1_10_uart_pin>;
++ pinctrl-7 = <&P1_10_i2c_pin>;
++ pinctrl-8 = <&P1_10_pwm_pin>;
++ pinctrl-9 = <&P1_10_pru_uart_pin>;
++ };
++
++ /* P1_11 (ZCZ ball R17) USB1-DP */
++
++ /* P1_12 (ZCZ ball B16) spi */
++ P1_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
++ pinctrl-0 = <&P1_12_default_pin>;
++ pinctrl-1 = <&P1_12_gpio_pin>;
++ pinctrl-2 = <&P1_12_gpio_pu_pin>;
++ pinctrl-3 = <&P1_12_gpio_pd_pin>;
++ pinctrl-4 = <&P1_12_gpio_input_pin>;
++ pinctrl-5 = <&P1_12_spi_pin>;
++ pinctrl-6 = <&P1_12_i2c_pin>;
++ pinctrl-7 = <&P1_12_pwm_pin>;
++ pinctrl-8 = <&P1_12_pru_uart_pin>;
++ };
++
++ /* P1_13 (ZCZ ball P17) USB1-ID */
++
++ /* P1_14 VOUT-3.3V */
++
++ /* P1_15 GND */
++
++ /* P1_16 GND */
++
++ /* P1_17 (ZCZ ball A9) VREFN */
++
++ /* P1_18 (ZCZ ball B9) VREFP */
++
++ /* P1_19 (ZCZ ball B6) AIN0 */
++
++ /* P1_20 (ZCZ ball D14) */
++ P1_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
++ pinctrl-0 = <&P1_20_default_pin>;
++ pinctrl-1 = <&P1_20_gpio_pin>;
++ pinctrl-2 = <&P1_20_gpio_pu_pin>;
++ pinctrl-3 = <&P1_20_gpio_pd_pin>;
++ pinctrl-4 = <&P1_20_gpio_input_pin>;
++ pinctrl-5 = <&P1_20_pruin_pin>;
++ };
++
++ /* P1_21 (ZCZ ball C7) AIN1 */
++
++ /* P1_22 GND */
++
++ /* P1_23 (ZCZ ball B7) AIN2 */
++
++ /* P1_24 VOUT-5V */
++
++ /* P1_25 (ZCZ ball A7) AIN3 */
++
++ /* P1_26 (ZCZ ball D18) i2c */
++ P1_26_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
++ pinctrl-0 = <&P1_26_default_pin>;
++ pinctrl-1 = <&P1_26_gpio_pin>;
++ pinctrl-2 = <&P1_26_gpio_pu_pin>;
++ pinctrl-3 = <&P1_26_gpio_pd_pin>;
++ pinctrl-4 = <&P1_26_gpio_input_pin>;
++ pinctrl-5 = <&P1_26_spi_cs_pin>;
++ pinctrl-6 = <&P1_26_can_pin>;
++ pinctrl-7 = <&P1_26_i2c_pin>;
++ pinctrl-8 = <&P1_26_pru_uart_pin>;
++ };
++
++ /* P1_27 (ZCZ ball C8) AIN4 */
++
++ /* P1_28 (ZCZ ball D17) i2c */
++ P1_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
++ pinctrl-0 = <&P1_28_default_pin>;
++ pinctrl-1 = <&P1_28_gpio_pin>;
++ pinctrl-2 = <&P1_28_gpio_pu_pin>;
++ pinctrl-3 = <&P1_28_gpio_pd_pin>;
++ pinctrl-4 = <&P1_28_gpio_input_pin>;
++ pinctrl-5 = <&P1_28_spi_cs_pin>;
++ pinctrl-6 = <&P1_28_can_pin>;
++ pinctrl-7 = <&P1_28_i2c_pin>;
++ pinctrl-8 = <&P1_28_pru_uart_pin>;
++ };
++
++ /* P1_29 (ZCZ ball A14) pruin */
++ P1_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P1_29_default_pin>;
++ pinctrl-1 = <&P1_29_gpio_pin>;
++ pinctrl-2 = <&P1_29_gpio_pu_pin>;
++ pinctrl-3 = <&P1_29_gpio_pd_pin>;
++ pinctrl-4 = <&P1_29_gpio_input_pin>;
++ pinctrl-5 = <&P1_29_qep_pin>;
++ pinctrl-6 = <&P1_29_pruout_pin>;
++ pinctrl-7 = <&P1_29_pruin_pin>;
++ };
++
++ /* P1_30 (ZCZ ball E16) uart */
++ P1_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
++ pinctrl-0 = <&P1_30_default_pin>;
++ pinctrl-1 = <&P1_30_gpio_pin>;
++ pinctrl-2 = <&P1_30_gpio_pu_pin>;
++ pinctrl-3 = <&P1_30_gpio_pd_pin>;
++ pinctrl-4 = <&P1_30_gpio_input_pin>;
++ pinctrl-5 = <&P1_30_spi_cs_pin>;
++ pinctrl-6 = <&P1_30_uart_pin>;
++ pinctrl-7 = <&P1_30_can_pin>;
++ pinctrl-8 = <&P1_30_i2c_pin>;
++ pinctrl-9 = <&P1_30_pruout_pin>;
++ pinctrl-10 = <&P1_30_pruin_pin>;
++ };
++
++ /* P1_31 (ZCZ ball B12) pruin */
++ P1_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P1_31_default_pin>;
++ pinctrl-1 = <&P1_31_gpio_pin>;
++ pinctrl-2 = <&P1_31_gpio_pu_pin>;
++ pinctrl-3 = <&P1_31_gpio_pd_pin>;
++ pinctrl-4 = <&P1_31_gpio_input_pin>;
++ pinctrl-5 = <&P1_31_qep_pin>;
++ pinctrl-6 = <&P1_31_pruout_pin>;
++ pinctrl-7 = <&P1_31_pruin_pin>;
++ };
++
++ /* P1_32 (ZCZ ball E15) uart */
++ P1_32_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
++ pinctrl-0 = <&P1_32_default_pin>;
++ pinctrl-1 = <&P1_32_gpio_pin>;
++ pinctrl-2 = <&P1_32_gpio_pu_pin>;
++ pinctrl-3 = <&P1_32_gpio_pd_pin>;
++ pinctrl-4 = <&P1_32_gpio_input_pin>;
++ pinctrl-5 = <&P1_32_spi_cs_pin>;
++ pinctrl-6 = <&P1_32_uart_pin>;
++ pinctrl-7 = <&P1_32_can_pin>;
++ pinctrl-8 = <&P1_32_i2c_pin>;
++ pinctrl-9 = <&P1_32_pruout_pin>;
++ pinctrl-10 = <&P1_32_pruin_pin>;
++ };
++
++ /* P1_33 (ZCZ ball B13) pruin */
++ P1_33_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P1_33_default_pin>;
++ pinctrl-1 = <&P1_33_gpio_pin>;
++ pinctrl-2 = <&P1_33_gpio_pu_pin>;
++ pinctrl-3 = <&P1_33_gpio_pd_pin>;
++ pinctrl-4 = <&P1_33_gpio_input_pin>;
++ pinctrl-5 = <&P1_33_spi_pin>;
++ pinctrl-6 = <&P1_33_pwm_pin>;
++ pinctrl-7 = <&P1_33_pruout_pin>;
++ pinctrl-8 = <&P1_33_pruin_pin>;
++ };
++
++ /* P1_34 (ZCZ ball T11) */
++ P1_34_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P1_34_default_pin>;
++ pinctrl-1 = <&P1_34_gpio_pin>;
++ pinctrl-2 = <&P1_34_gpio_pu_pin>;
++ pinctrl-3 = <&P1_34_gpio_pd_pin>;
++ pinctrl-4 = <&P1_34_gpio_input_pin>;
++ pinctrl-5 = <&P1_34_pwm_pin>;
++ };
++
++ /* P1_35 (ZCZ ball V5) pruin */
++ P1_35_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P1_35_default_pin>;
++ pinctrl-1 = <&P1_35_gpio_pin>;
++ pinctrl-2 = <&P1_35_gpio_pu_pin>;
++ pinctrl-3 = <&P1_35_gpio_pd_pin>;
++ pinctrl-4 = <&P1_35_gpio_input_pin>;
++ pinctrl-5 = <&P1_35_pruout_pin>;
++ pinctrl-6 = <&P1_35_pruin_pin>;
++ };
++
++ /* P1_36 (ZCZ ball A13) pwm */
++ P1_36_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P1_36_default_pin>;
++ pinctrl-1 = <&P1_36_gpio_pin>;
++ pinctrl-2 = <&P1_36_gpio_pu_pin>;
++ pinctrl-3 = <&P1_36_gpio_pd_pin>;
++ pinctrl-4 = <&P1_36_gpio_input_pin>;
++ pinctrl-5 = <&P1_36_spi_sclk_pin>;
++ pinctrl-6 = <&P1_36_pwm_pin>;
++ pinctrl-7 = <&P1_36_pruout_pin>;
++ pinctrl-8 = <&P1_36_pruin_pin>;
++ };
++
++
++ /************************/
++ /* P2 Header */
++ /************************/
++
++ /* P2_01 (ZCZ ball U14) pwm */
++ P2_01_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P2_01_default_pin>;
++ pinctrl-1 = <&P2_01_gpio_pin>;
++ pinctrl-2 = <&P2_01_gpio_pu_pin>;
++ pinctrl-3 = <&P2_01_gpio_pd_pin>;
++ pinctrl-4 = <&P2_01_gpio_input_pin>;
++ pinctrl-5 = <&P2_01_pwm_pin>;
++ };
++
++ /* P2_02 (ZCZ ball V17) */
++ P2_02_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P2_02_default_pin>;
++ pinctrl-1 = <&P2_02_gpio_pin>;
++ pinctrl-2 = <&P2_02_gpio_pu_pin>;
++ pinctrl-3 = <&P2_02_gpio_pd_pin>;
++ pinctrl-4 = <&P2_02_gpio_input_pin>;
++ };
++
++ /* P2_03 (ZCZ ball T10) */
++ P2_03_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P2_03_default_pin>;
++ pinctrl-1 = <&P2_03_gpio_pin>;
++ pinctrl-2 = <&P2_03_gpio_pu_pin>;
++ pinctrl-3 = <&P2_03_gpio_pd_pin>;
++ pinctrl-4 = <&P2_03_gpio_input_pin>;
++ pinctrl-5 = <&P2_03_pwm_pin>;
++ };
++
++ /* P2_04 (ZCZ ball T16) */
++ P2_04_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P2_04_default_pin>;
++ pinctrl-1 = <&P2_04_gpio_pin>;
++ pinctrl-2 = <&P2_04_gpio_pu_pin>;
++ pinctrl-3 = <&P2_04_gpio_pd_pin>;
++ pinctrl-4 = <&P2_04_gpio_input_pin>;
++ };
++
++ /* P2_05 (ZCZ ball T17) uart */
++ P2_05_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
++ pinctrl-0 = <&P2_05_default_pin>;
++ pinctrl-1 = <&P2_05_gpio_pin>;
++ pinctrl-2 = <&P2_05_gpio_pu_pin>;
++ pinctrl-3 = <&P2_05_gpio_pd_pin>;
++ pinctrl-4 = <&P2_05_gpio_input_pin>;
++ pinctrl-5 = <&P2_05_uart_pin>;
++ };
++
++ /* P2_06 (ZCZ ball U16) */
++ P2_06_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P2_06_default_pin>;
++ pinctrl-1 = <&P2_06_gpio_pin>;
++ pinctrl-2 = <&P2_06_gpio_pu_pin>;
++ pinctrl-3 = <&P2_06_gpio_pd_pin>;
++ pinctrl-4 = <&P2_06_gpio_input_pin>;
++ };
++
++ /* P2_07 (ZCZ ball U17) uart */
++ P2_07_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
++ pinctrl-0 = <&P2_07_default_pin>;
++ pinctrl-1 = <&P2_07_gpio_pin>;
++ pinctrl-2 = <&P2_07_gpio_pu_pin>;
++ pinctrl-3 = <&P2_07_gpio_pd_pin>;
++ pinctrl-4 = <&P2_07_gpio_input_pin>;
++ pinctrl-5 = <&P2_07_uart_pin>;
++ };
++
++ /* P2_08 (ZCZ ball U18) */
++ P2_08_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P2_08_default_pin>;
++ pinctrl-1 = <&P2_08_gpio_pin>;
++ pinctrl-2 = <&P2_08_gpio_pu_pin>;
++ pinctrl-3 = <&P2_08_gpio_pd_pin>;
++ pinctrl-4 = <&P2_08_gpio_input_pin>;
++ };
++
++ /* P2_09 (ZCZ ball D15) i2c */
++ P2_09_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
++ pinctrl-0 = <&P2_09_default_pin>;
++ pinctrl-1 = <&P2_09_gpio_pin>;
++ pinctrl-2 = <&P2_09_gpio_pu_pin>;
++ pinctrl-3 = <&P2_09_gpio_pd_pin>;
++ pinctrl-4 = <&P2_09_gpio_input_pin>;
++ pinctrl-5 = <&P2_09_uart_pin>;
++ pinctrl-6 = <&P2_09_can_pin>;
++ pinctrl-7 = <&P2_09_i2c_pin>;
++ pinctrl-8 = <&P2_09_pru_uart_pin>;
++ pinctrl-9 = <&P2_09_pruin_pin>;
++ };
++
++ /* P2_10 (ZCZ ball R14) */
++ P2_10_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
++ pinctrl-0 = <&P2_10_default_pin>;
++ pinctrl-1 = <&P2_10_gpio_pin>;
++ pinctrl-2 = <&P2_10_gpio_pu_pin>;
++ pinctrl-3 = <&P2_10_gpio_pd_pin>;
++ pinctrl-4 = <&P2_10_gpio_input_pin>;
++ pinctrl-5 = <&P2_10_qep_pin>;
++ };
++
++ /* P2_11 (ZCZ ball D16) i2c */
++ P2_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
++ pinctrl-0 = <&P2_11_default_pin>;
++ pinctrl-1 = <&P2_11_gpio_pin>;
++ pinctrl-2 = <&P2_11_gpio_pu_pin>;
++ pinctrl-3 = <&P2_11_gpio_pd_pin>;
++ pinctrl-4 = <&P2_11_gpio_input_pin>;
++ pinctrl-5 = <&P2_11_uart_pin>;
++ pinctrl-6 = <&P2_11_can_pin>;
++ pinctrl-7 = <&P2_11_i2c_pin>;
++ pinctrl-8 = <&P2_11_pru_uart_pin>;
++ pinctrl-9 = <&P2_11_pruin_pin>;
++ };
++
++ /* P2_12 POWER_BUTTON */
++
++ /* P2_13 VOUT-5V */
++
++ /* P2_14 BAT-VIN */
++
++ /* P2_15 GND */
++
++ /* P2_16 BAT-TEMP */
++
++ /* P2_17 (ZCZ ball V12) */
++ P2_17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P2_17_default_pin>;
++ pinctrl-1 = <&P2_17_gpio_pin>;
++ pinctrl-2 = <&P2_17_gpio_pu_pin>;
++ pinctrl-3 = <&P2_17_gpio_pd_pin>;
++ pinctrl-4 = <&P2_17_gpio_input_pin>;
++ };
++
++ /* P2_18 (ZCZ ball U13) */
++ P2_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
++ pinctrl-0 = <&P2_18_default_pin>;
++ pinctrl-1 = <&P2_18_gpio_pin>;
++ pinctrl-2 = <&P2_18_gpio_pu_pin>;
++ pinctrl-3 = <&P2_18_gpio_pd_pin>;
++ pinctrl-4 = <&P2_18_gpio_input_pin>;
++ pinctrl-5 = <&P2_18_qep_pin>;
++ pinctrl-6 = <&P2_18_pru_ecap_pin>;
++ pinctrl-7 = <&P2_18_pruin_pin>;
++ };
++
++ /* P2_19 (ZCZ ball U12) */
++ P2_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
++ pinctrl-0 = <&P2_19_default_pin>;
++ pinctrl-1 = <&P2_19_gpio_pin>;
++ pinctrl-2 = <&P2_19_gpio_pu_pin>;
++ pinctrl-3 = <&P2_19_gpio_pd_pin>;
++ pinctrl-4 = <&P2_19_gpio_input_pin>;
++ pinctrl-5 = <&P2_19_pwm_pin>;
++ };
++
++ /* P2_20 (ZCZ ball T13) */
++ P2_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
++ pinctrl-0 = <&P2_20_default_pin>;
++ pinctrl-1 = <&P2_20_gpio_pin>;
++ pinctrl-2 = <&P2_20_gpio_pu_pin>;
++ pinctrl-3 = <&P2_20_gpio_pd_pin>;
++ pinctrl-4 = <&P2_20_gpio_input_pin>;
++ };
++
++ /* P2_21 GND */
++
++ /* P2_22 (ZCZ ball V13) */
++ P2_22_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
++ pinctrl-0 = <&P2_22_default_pin>;
++ pinctrl-1 = <&P2_22_gpio_pin>;
++ pinctrl-2 = <&P2_22_gpio_pu_pin>;
++ pinctrl-3 = <&P2_22_gpio_pd_pin>;
++ pinctrl-4 = <&P2_22_gpio_input_pin>;
++ pinctrl-5 = <&P2_22_qep_pin>;
++ pinctrl-6 = <&P2_22_pruin_pin>;
++ };
++
++ /* P2_23 VOUT-3.3V */
++
++ /* P2_24 (ZCZ ball T12) */
++ P2_24_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
++ pinctrl-0 = <&P2_24_default_pin>;
++ pinctrl-1 = <&P2_24_gpio_pin>;
++ pinctrl-2 = <&P2_24_gpio_pu_pin>;
++ pinctrl-3 = <&P2_24_gpio_pd_pin>;
++ pinctrl-4 = <&P2_24_gpio_input_pin>;
++ pinctrl-5 = <&P2_24_qep_pin>;
++ pinctrl-6 = <&P2_24_pruout_pin>;
++ };
++
++ /* P2_25 (ZCZ ball E17) spi */
++ P2_25_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "spi_cs", "uart", "can", "i2c";
++ pinctrl-0 = <&P2_25_default_pin>;
++ pinctrl-1 = <&P2_25_gpio_pin>;
++ pinctrl-2 = <&P2_25_gpio_pu_pin>;
++ pinctrl-3 = <&P2_25_gpio_pd_pin>;
++ pinctrl-4 = <&P2_25_gpio_input_pin>;
++ pinctrl-5 = <&P2_25_spi_pin>;
++ pinctrl-6 = <&P2_25_spi_cs_pin>;
++ pinctrl-7 = <&P2_25_uart_pin>;
++ pinctrl-8 = <&P2_25_can_pin>;
++ pinctrl-9 = <&P2_25_i2c_pin>;
++ };
++
++ /* P2_26 RESET# */
++
++ /* P2_27 (ZCZ ball E18) spi */
++ P2_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "can", "i2c";
++ pinctrl-0 = <&P2_27_default_pin>;
++ pinctrl-1 = <&P2_27_gpio_pin>;
++ pinctrl-2 = <&P2_27_gpio_pu_pin>;
++ pinctrl-3 = <&P2_27_gpio_pd_pin>;
++ pinctrl-4 = <&P2_27_gpio_input_pin>;
++ pinctrl-5 = <&P2_27_spi_pin>;
++ pinctrl-6 = <&P2_27_uart_pin>;
++ pinctrl-7 = <&P2_27_can_pin>;
++ pinctrl-8 = <&P2_27_i2c_pin>;
++ };
++
++ /* P2_28 (ZCZ ball D13) pruin */
++ P2_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P2_28_default_pin>;
++ pinctrl-1 = <&P2_28_gpio_pin>;
++ pinctrl-2 = <&P2_28_gpio_pu_pin>;
++ pinctrl-3 = <&P2_28_gpio_pd_pin>;
++ pinctrl-4 = <&P2_28_gpio_input_pin>;
++ pinctrl-5 = <&P2_28_qep_pin>;
++ pinctrl-6 = <&P2_28_pruout_pin>;
++ pinctrl-7 = <&P2_28_pruin_pin>;
++ };
++
++ /* P2_29 (ZCZ ball C18) spi_sclk */
++ P2_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
++ pinctrl-0 = <&P2_29_default_pin>;
++ pinctrl-1 = <&P2_29_gpio_pin>;
++ pinctrl-2 = <&P2_29_gpio_pu_pin>;
++ pinctrl-3 = <&P2_29_gpio_pd_pin>;
++ pinctrl-4 = <&P2_29_gpio_input_pin>;
++ pinctrl-5 = <&P2_29_spi_cs_pin>;
++ pinctrl-6 = <&P2_29_spi_sclk_pin>;
++ pinctrl-7 = <&P2_29_uart_pin>;
++ pinctrl-8 = <&P2_29_pwm_pin>;
++ pinctrl-9 = <&P2_29_pru_ecap_pin>;
++ };
++
++ /* P2_30 (ZCZ ball C12) pruin */
++ P2_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P2_30_default_pin>;
++ pinctrl-1 = <&P2_30_gpio_pin>;
++ pinctrl-2 = <&P2_30_gpio_pu_pin>;
++ pinctrl-3 = <&P2_30_gpio_pd_pin>;
++ pinctrl-4 = <&P2_30_gpio_input_pin>;
++ pinctrl-5 = <&P2_30_spi_cs_pin>;
++ pinctrl-6 = <&P2_30_pwm_pin>;
++ pinctrl-7 = <&P2_30_pruout_pin>;
++ pinctrl-8 = <&P2_30_pruin_pin>;
++ };
++
++ /* P2_31 (ZCZ ball A15) spi_cs */
++ P2_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pruin";
++ pinctrl-0 = <&P2_31_default_pin>;
++ pinctrl-1 = <&P2_31_gpio_pin>;
++ pinctrl-2 = <&P2_31_gpio_pu_pin>;
++ pinctrl-3 = <&P2_31_gpio_pd_pin>;
++ pinctrl-4 = <&P2_31_gpio_input_pin>;
++ pinctrl-5 = <&P2_31_spi_cs_pin>;
++ pinctrl-6 = <&P2_31_pruin_pin>;
++ };
++
++ /* P2_32 (ZCZ ball D12) pruin */
++ P2_32_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
++ pinctrl-0 = <&P2_32_default_pin>;
++ pinctrl-1 = <&P2_32_gpio_pin>;
++ pinctrl-2 = <&P2_32_gpio_pu_pin>;
++ pinctrl-3 = <&P2_32_gpio_pd_pin>;
++ pinctrl-4 = <&P2_32_gpio_input_pin>;
++ pinctrl-5 = <&P2_32_spi_pin>;
++ pinctrl-6 = <&P2_32_pwm_pin>;
++ pinctrl-7 = <&P2_32_pruout_pin>;
++ pinctrl-8 = <&P2_32_pruin_pin>;
++ };
++
++ /* P2_33 (ZCZ ball R12) */
++ P2_33_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
++ pinctrl-0 = <&P2_33_default_pin>;
++ pinctrl-1 = <&P2_33_gpio_pin>;
++ pinctrl-2 = <&P2_33_gpio_pu_pin>;
++ pinctrl-3 = <&P2_33_gpio_pd_pin>;
++ pinctrl-4 = <&P2_33_gpio_input_pin>;
++ pinctrl-5 = <&P2_33_qep_pin>;
++ pinctrl-6 = <&P2_33_pruout_pin>;
++ };
++
++ /* P2_34 (ZCZ ball C13) pruin */
++ P2_34_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P2_34_default_pin>;
++ pinctrl-1 = <&P2_34_gpio_pin>;
++ pinctrl-2 = <&P2_34_gpio_pu_pin>;
++ pinctrl-3 = <&P2_34_gpio_pd_pin>;
++ pinctrl-4 = <&P2_34_gpio_input_pin>;
++ pinctrl-5 = <&P2_34_qep_pin>;
++ pinctrl-6 = <&P2_34_pruout_pin>;
++ pinctrl-7 = <&P2_34_pruin_pin>;
++ };
++
++ /* P2_35 (ZCZ ball U5) gpio_input */
++ P2_35_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
++ pinctrl-0 = <&P2_35_default_pin>;
++ pinctrl-1 = <&P2_35_gpio_pin>;
++ pinctrl-2 = <&P2_35_gpio_pu_pin>;
++ pinctrl-3 = <&P2_35_gpio_pd_pin>;
++ pinctrl-4 = <&P2_35_gpio_input_pin>;
++ pinctrl-5 = <&P2_35_pruout_pin>;
++ pinctrl-6 = <&P2_35_pruin_pin>;
++ };
++
++ /* P2_36 (ZCZ ball C9) AIN7 */
++
++ cape-universal {
++ compatible = "gpio-of-helper";
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ P1_02 {
++ gpio-name = "P1_02";
++ gpio = <&gpio2 23 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_04 {
++ gpio-name = "P1_04";
++ gpio = <&gpio2 25 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_06 {
++ gpio-name = "P1_06";
++ gpio = <&gpio0 5 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_08 {
++ gpio-name = "P1_08";
++ gpio = <&gpio0 2 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_10 {
++ gpio-name = "P1_10";
++ gpio = <&gpio0 3 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_12 {
++ gpio-name = "P1_12";
++ gpio = <&gpio0 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_20 {
++ gpio-name = "P1_20";
++ gpio = <&gpio0 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_26 {
++ gpio-name = "P1_26";
++ gpio = <&gpio0 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_28 {
++ gpio-name = "P1_28";
++ gpio = <&gpio0 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_29 {
++ gpio-name = "P1_29";
++ gpio = <&gpio3 21 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_30 {
++ gpio-name = "P1_30";
++ gpio = <&gpio1 11 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_31 {
++ gpio-name = "P1_31";
++ gpio = <&gpio3 18 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_32 {
++ gpio-name = "P1_32";
++ gpio = <&gpio1 10 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_33 {
++ gpio-name = "P1_33";
++ gpio = <&gpio3 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_34 {
++ gpio-name = "P1_34";
++ gpio = <&gpio0 26 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_35 {
++ gpio-name = "P1_35";
++ gpio = <&gpio2 24 0>;
++ input;
++ dir-changeable;
++ };
++
++ P1_36 {
++ gpio-name = "P1_36";
++ gpio = <&gpio3 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_01 {
++ gpio-name = "P2_01";
++ gpio = <&gpio1 18 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_02 {
++ gpio-name = "P2_02";
++ gpio = <&gpio1 27 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_03 {
++ gpio-name = "P2_03";
++ gpio = <&gpio0 23 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_04 {
++ gpio-name = "P2_04";
++ gpio = <&gpio1 26 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_05 {
++ gpio-name = "P2_05";
++ gpio = <&gpio0 30 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_06 {
++ gpio-name = "P2_06";
++ gpio = <&gpio1 25 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_07 {
++ gpio-name = "P2_07";
++ gpio = <&gpio0 31 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_08 {
++ gpio-name = "P2_08";
++ gpio = <&gpio1 28 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_09 {
++ gpio-name = "P2_09";
++ gpio = <&gpio0 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_10 {
++ gpio-name = "P2_10";
++ gpio = <&gpio1 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_11 {
++ gpio-name = "P2_11";
++ gpio = <&gpio0 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_17 {
++ gpio-name = "P2_17";
++ gpio = <&gpio2 1 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_18 {
++ gpio-name = "P2_18";
++ gpio = <&gpio1 15 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_19 {
++ gpio-name = "P2_19";
++ gpio = <&gpio0 27 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_20 {
++ gpio-name = "P2_20";
++ gpio = <&gpio2 0 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_22 {
++ gpio-name = "P2_22";
++ gpio = <&gpio1 14 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_24 {
++ gpio-name = "P2_24";
++ gpio = <&gpio1 12 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_25 {
++ gpio-name = "P2_25";
++ gpio = <&gpio1 9 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_27 {
++ gpio-name = "P2_27";
++ gpio = <&gpio1 8 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_28 {
++ gpio-name = "P2_28";
++ gpio = <&gpio3 20 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_29 {
++ gpio-name = "P2_29";
++ gpio = <&gpio0 7 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_30 {
++ gpio-name = "P2_30";
++ gpio = <&gpio3 17 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_31 {
++ gpio-name = "P2_31";
++ gpio = <&gpio0 19 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_32 {
++ gpio-name = "P2_32";
++ gpio = <&gpio3 16 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_33 {
++ gpio-name = "P2_33";
++ gpio = <&gpio1 13 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_34 {
++ gpio-name = "P2_34";
++ gpio = <&gpio3 19 0>;
++ input;
++ dir-changeable;
++ };
++
++ P2_35 {
++ gpio-name = "P2_35";
++ gpio = <&gpio2 22 0>;
++ input;
++ dir-changeable;
++ };
++
++ };
++};
+diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
+index ca6d9f02a800..90ab82dd74d0 100644
+--- a/arch/arm/boot/dts/am33xx-l4.dtsi
++++ b/arch/arm/boot/dts/am33xx-l4.dtsi
+@@ -158,6 +158,39 @@
+ #interrupt-cells = <2>;
+ reg = <0x0 0x1000>;
+ interrupts = <96>;
++ gpio-line-names =
++ "MDIO_DATA", // 0
++ "MDIO_CLK", // 1
++ "SPI0_SCLK", // 2
++ "SPI0_D0", // 3
++ "SPI0_D1", // 4
++ "SPI0_CS0", // 5
++ "SPI0_CS1", // 6
++ "ECAP0_IN_PWM0_OUT", // 7
++ "LCD_DATA12", // 8
++ "LCD_DATA13", // 9
++ "LCD_DATA14", // 10
++ "LCD_DATA15", // 11
++ "UART1_CTSN", // 12
++ "UART1_RTSN", // 13
++ "UART1_RXD", // 14
++ "UART1_TXD", // 15
++ "GMII1_TXD3", // 16
++ "GMII1_TXD2", // 17
++ "USB0_DRVVBUS", // 18
++ "XDMA_EVENT_INTR0", // 19
++ "XDMA_EVENT_INTR1", // 20
++ "GMII1_TXD1", // 21
++ "GPMC_AD8", // 22
++ "GPMC_AD9", // 23
++ "NC", // 24
++ "NC", // 25
++ "GPMC_AD10", // 26
++ "GPMC_AD11", // 27
++ "GMII1_TXD0", // 28
++ "RMII1_REFCLK", // 29
++ "GPMC_WAIT0", // 30
++ "GPMC_WPN"; // 31
+ };
+ };
+
+@@ -1299,6 +1332,39 @@
+ #interrupt-cells = <2>;
+ reg = <0x0 0x1000>;
+ interrupts = <98>;
++ gpio-line-names =
++ "GPMC_AD0", // 0
++ "GPMC_AD1", // 1
++ "GPMC_AD2", // 2
++ "GPMC_AD3", // 3
++ "GPMC_AD4", // 4
++ "GPMC_AD5", // 5
++ "GPMC_AD6", // 6
++ "GPMC_AD7", // 7
++ "UART0_CTSN", // 8
++ "UART0_RTSN", // 9
++ "UART0_RXD", // 10
++ "UART0_TXD", // 11
++ "GPMC_AD12", // 12
++ "GPMC_AD13", // 13
++ "GPMC_AD14", // 14
++ "GPMC_AD15", // 15
++ "GPMC_A0", // 16
++ "GPMC_A1", // 17
++ "GPMC_A2", // 18
++ "GPMC_A3", // 19
++ "GPMC_A4", // 20
++ "GPMC_A5", // 21
++ "GPMC_A6", // 22
++ "GPMC_A7", // 23
++ "GPMC_A8", // 24
++ "GPMC_A9", // 25
++ "GPMC_A10", // 26
++ "GPMC_A11", // 27
++ "GPMC_BE1N", // 28
++ "GPMC_CSN0", // 29
++ "GPMC_CSN1", // 30
++ "GPMC_CSN2"; // 31
+ };
+ };
+
+@@ -1711,6 +1777,39 @@
+ #interrupt-cells = <2>;
+ reg = <0x0 0x1000>;
+ interrupts = <32>;
++ gpio-line-names =
++ "GPMC_CSN3", // 0
++ "GPMC_CLK", // 1
++ "GPMC_ADVN_ALE", // 2
++ "GPMC_OEN_REN", // 3
++ "GPMC_WEN", // 4
++ "GPMC_BE0N_CLE", // 5
++ "LCD_DATA0", // 6
++ "LCD_DATA1", // 7
++ "LCD_DATA2", // 8
++ "LCD_DATA3", // 9
++ "LCD_DATA4", // 10
++ "LCD_DATA5", // 11
++ "LCD_DATA6", // 12
++ "LCD_DATA7", // 13
++ "LCD_DATA8", // 14
++ "LCD_DATA9", // 15
++ "LCD_DATA10", // 16
++ "LCD_DATA11", // 17
++ "GMII1_RXD3", // 18
++ "GMII1_RXD2", // 19
++ "GMII1_RXD1", // 20
++ "GMII1_RXD0", // 21
++ "LCD_VSYNC", // 22
++ "LCD_HSYNC", // 23
++ "LCD_PCLK", // 24
++ "LCD_AC_BIAS_EN", // 25
++ "MMC0_DAT3", // 26
++ "MMC0_DAT2", // 27
++ "MMC0_DAT1", // 28
++ "MMC0_DAT0", // 29
++ "MMC0_CLK", // 30
++ "MMC0_CMD"; // 31
+ };
+ };
+
+@@ -1745,6 +1844,39 @@
+ #interrupt-cells = <2>;
+ reg = <0x0 0x1000>;
+ interrupts = <62>;
++ gpio-line-names =
++ "GMII1_COL", // 0
++ "GMII1_CRS", // 1
++ "GMII1_RXER", // 2
++ "GMII1_TXEN", // 3
++ "GMII1_RXDV", // 4
++ "I2C0_SDA", // 5
++ "I2C0_SCL", // 6
++ "EMU0", // 7
++ "EMU1", // 8
++ "GMII1_TXCLK", // 9
++ "GMII1_RXCLK", // 10
++ "NC", // 11
++ "NC", // 12
++ "USB1_DRVVBUS", // 13
++ "MCASP0_ACLKX", // 14
++ "MCASP0_FSX", // 15
++ "MCASP0_AXR0", // 16
++ "MCASP0_AHCLKR", // 17
++ "MCASP0_ACLKR", // 18
++ "MCASP0_FSR", // 19
++ "MCASP0_AXR1", // 20
++ "MCASP0_AHCLKX", // 21
++ "NC", // 22
++ "NC", // 23
++ "NC", // 24
++ "NC", // 25
++ "NC", // 26
++ "NC", // 27
++ "NC", // 28
++ "NC", // 29
++ "NC", // 30
++ "NC"; // 31
+ };
+ };
+
+@@ -1912,6 +2044,16 @@
+ status = "disabled";
+ };
+
++ eqep0: eqep@180 {
++ compatible = "ti,am33xx-eqep";
++ reg = <0x180 0x80>;
++ clocks = <&l4ls_gclk>;
++ clock-names = "fck";
++ interrupts = <79>;
++ interrupt-names = "eqep0";
++ status = "disabled";
++ };
++
+ ehrpwm0: pwm@200 {
+ compatible = "ti,am3352-ehrpwm",
+ "ti,am33xx-ehrpwm";
+@@ -1965,6 +2107,16 @@
+ status = "disabled";
+ };
+
++ eqep1: eqep@180 {
++ compatible = "ti,am33xx-eqep";
++ reg = <0x180 0x80>;
++ clocks = <&l4ls_gclk>;
++ clock-names = "fck";
++ interrupts = <88>;
++ interrupt-names = "eqep1";
++ status = "disabled";
++ };
++
+ ehrpwm1: pwm@200 {
+ compatible = "ti,am3352-ehrpwm",
+ "ti,am33xx-ehrpwm";
+@@ -2018,6 +2170,16 @@
+ status = "disabled";
+ };
+
++ eqep2: eqep@180 {
++ compatible = "ti,am33xx-eqep";
++ reg = <0x180 0x80>;
++ clocks = <&l4ls_gclk>;
++ clock-names = "fck";
++ interrupts = <89>;
++ interrupt-names = "eqep2";
++ status = "disabled";
++ };
++
+ ehrpwm2: pwm@200 {
+ compatible = "ti,am3352-ehrpwm",
+ "ti,am33xx-ehrpwm";
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index e5c2f71a7c77..267fe366665b 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -160,7 +160,7 @@
+ * for the moment, just use a fake OCP bus entry to represent
+ * the whole bus hierarchy.
+ */
+- ocp {
++ ocp: ocp {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+index 1e6620f139dd..5dd7bc1f9bb5 100644
+--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
++++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+@@ -167,6 +167,10 @@
+ };
+ };
+
++&bb2d {
++ status = "okay";
++};
++
+ &i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
+index 2bc9add8b7a5..cb71acbc77cb 100644
+--- a/arch/arm/boot/dts/dra7.dtsi
++++ b/arch/arm/boot/dts/dra7.dtsi
+@@ -377,6 +377,16 @@
+ ti,hwmods = "dmm";
+ };
+
++ bb2d: bb2d@59000000 {
++ compatible = "ti,dra7-bb2d","vivante,gc";
++ reg = <0x59000000 0x0700>;
++ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
++ ti,hwmods = "bb2d";
++ clocks = <&dpll_core_h24x2_ck>;
++ clock-names = "fclk";
++ status = "disabled";
++ };
++
+ mmu0_dsp1: mmu@40d01000 {
+ compatible = "ti,dra7-dsp-iommu";
+ reg = <0x40d01000 0x100>;
+diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
+index 9985ee2aae0c..ffdecab54480 100644
+--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
++++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
+@@ -155,6 +155,7 @@
+ };
+
+ etb@5401b000 {
++ status = "disabled";
+ compatible = "arm,coresight-etb10", "arm,primecell";
+ reg = <0x5401b000 0x1000>;
+
+@@ -170,6 +171,7 @@
+ };
+
+ etm@54010000 {
++ status = "disabled";
+ compatible = "arm,coresight-etm3x", "arm,primecell";
+ reg = <0x54010000 0x1000>;
+
+@@ -217,6 +219,25 @@
+ >;
+ };
+
++ spi3_pins: pinmux_spi3_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE1) /* sdmmc2_clk.mcspi3_clk gpio_130 */
++ OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_cmd.mcspi3_simo gpio_131 */
++ OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat0.mcspi3_somi gpio_132 */
++ OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat2.mcspi3_cs1 gpio_134 */
++ OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat3.mcspi3_cs0 gpio_135 */
++ >;
++ };
++
++ spi4_pins: pinmux_spi4_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE1) /* mcbsp1_clkr.mcspi4_clk gpio_156 */
++ OMAP3_CORE1_IOPAD(0x2160, PIN_OUTPUT | MUX_MODE1) /* mcbsp1_dx.mcspi4_simo gpio_158 */
++ OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE1) /* mcbsp1_dr.mcspi4_somi gpio_159 */
++ OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mcbsp1_fsx.mcspi4_cs0 gpio_161 */
++ >;
++ };
++
+ hsusb2_pins: pinmux_hsusb2_pins {
+ pinctrl-single,pins = <
+ OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
+@@ -294,7 +315,7 @@
+ };
+
+ twl_power: power {
+- compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
++ compatible = "ti,twl4030-power-reset";
+ ti,use_poweroff;
+ };
+ };
+@@ -325,6 +346,36 @@
+ status = "disabled";
+ };
+
++&mcspi3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi3_pins>;
++ status = "okay";
++
++ spidev0: spi@0 {
++ compatible = "spidev";
++ reg = <0>;
++ spi-max-frequency = <48000000>;
++ };
++
++ spidev1: spi@1 {
++ compatible = "spidev";
++ reg = <1>;
++ spi-max-frequency = <48000000>;
++ };
++};
++
++&mcspi4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi4_pins>;
++ status = "okay";
++
++ spidev2: spi@0 {
++ compatible = "spidev";
++ reg = <0>;
++ spi-max-frequency = <48000000>;
++ };
++};
++
+ &twl_gpio {
+ ti,use-leds;
+ /* pullups: BIT(1) */
+diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
+index 91bb50ad9a4f..80ebdfb782bd 100644
+--- a/arch/arm/boot/dts/omap3-beagle.dts
++++ b/arch/arm/boot/dts/omap3-beagle.dts
+@@ -142,6 +142,7 @@
+ };
+
+ etb@540000000 {
++ status = "disabled";
+ compatible = "arm,coresight-etb10", "arm,primecell";
+ reg = <0x5401b000 0x1000>;
+
+@@ -157,6 +158,7 @@
+ };
+
+ etm@54010000 {
++ status = "disabled";
+ compatible = "arm,coresight-etm3x", "arm,primecell";
+ reg = <0x54010000 0x1000>;
+
+@@ -275,9 +277,18 @@
+ codec {
+ };
+ };
++
++ twl_power: power {
++ compatible = "ti,twl4030-power-reset";
++ ti,use_poweroff;
++ };
+ };
+ };
+
++&i2c2 {
++ clock-frequency = <400000>;
++};
++
+ #include "twl4030.dtsi"
+ #include "twl4030_omap3.dtsi"
+
+diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
+index f1a6476af371..63b895b85eda 100644
+--- a/arch/arm/boot/dts/omap4-panda-a4.dts
++++ b/arch/arm/boot/dts/omap4-panda-a4.dts
+@@ -10,6 +10,18 @@
+ #include "omap443x.dtsi"
+ #include "omap4-panda-common.dtsi"
+
++&emif1 {
++ cs1-used;
++ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
++};
++
++&emif2 {
++ cs1-used;
++ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
++};
++
+ /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
+ &dss_hdmi_pins {
+ pinctrl-single,pins = <
+diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
+index 926f018823a4..785d18a426a4 100644
+--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
++++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
+@@ -493,16 +493,6 @@
+ };
+ };
+
+-&emif1 {
+- cs1-used;
+- device-handle = <&elpida_ECB240ABACN>;
+-};
+-
+-&emif2 {
+- cs1-used;
+- device-handle = <&elpida_ECB240ABACN>;
+-};
+-
+ &mcbsp1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcbsp1_pins>;
+diff --git a/arch/arm/boot/dts/omap4-panda-es-b3.dts b/arch/arm/boot/dts/omap4-panda-es-b3.dts
+new file mode 100644
+index 000000000000..19d02df8d8a5
+--- /dev/null
++++ b/arch/arm/boot/dts/omap4-panda-es-b3.dts
+@@ -0,0 +1,85 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++/dts-v1/;
++
++#include "omap4460.dtsi"
++#include "omap4-panda-common.dtsi"
++
++/ {
++ model = "TI OMAP4 PandaBoard-ES";
++ compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
++};
++
++/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
++&sound {
++ ti,model = "PandaBoardES";
++
++ /* Audio routing */
++ ti,audio-routing =
++ "Headset Stereophone", "HSOL",
++ "Headset Stereophone", "HSOR",
++ "Ext Spk", "HFL",
++ "Ext Spk", "HFR",
++ "Line Out", "AUXL",
++ "Line Out", "AUXR",
++ "AFML", "Line In",
++ "AFMR", "Line In";
++};
++
++/* PandaboardES has external pullups on SCL & SDA */
++&dss_hdmi_pins {
++ pinctrl-single,pins = <
++ OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
++ OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
++ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
++ >;
++};
++
++&omap4_pmx_core {
++ led_gpio_pins: gpio_led_pmx {
++ pinctrl-single,pins = <
++ OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
++ >;
++ };
++
++ button_pins: pinmux_button_pins {
++ pinctrl-single,pins = <
++ OMAP4_IOPAD(0x11b, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */
++ >;
++ };
++};
++
++&led_wkgpio_pins {
++ pinctrl-single,pins = <
++ OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
++ >;
++};
++
++&leds {
++ pinctrl-0 = <
++ &led_gpio_pins
++ &led_wkgpio_pins
++ >;
++
++ heartbeat {
++ gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
++ };
++ mmc {
++ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&gpio_keys {
++ buttonS2 {
++ gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* gpio_113 */
++ };
++};
++
++&gpio1_target {
++ ti,no-reset-on-init;
++};
+diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts
+index 19d02df8d8a5..027b587eeecf 100644
+--- a/arch/arm/boot/dts/omap4-panda-es.dts
++++ b/arch/arm/boot/dts/omap4-panda-es.dts
+@@ -15,6 +15,18 @@
+ compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
+ };
+
++&emif1 {
++ cs1-used;
++ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
++};
++
++&emif2 {
++ cs1-used;
++ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
++};
++
+ /* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
+ &sound {
+ ti,model = "PandaBoardES";
+diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
+index a0e28b2e254e..3ee41ef824c0 100644
+--- a/arch/arm/boot/dts/omap4-panda.dts
++++ b/arch/arm/boot/dts/omap4-panda.dts
+@@ -14,3 +14,15 @@
+ model = "TI OMAP4 PandaBoard";
+ compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
+ };
++
++&emif1 {
++ cs1-used;
++ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
++};
++
++&emif2 {
++ cs1-used;
++ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
++};
+diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
+index c88817bdcc56..03ce4888a955 100644
+--- a/arch/arm/boot/dts/omap4-sdp.dts
++++ b/arch/arm/boot/dts/omap4-sdp.dts
+@@ -533,11 +533,13 @@
+ &emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
+ };
+
+ &emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
++ status = "ok";
+ };
+
+ &keypad {
+diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
+index 1a96d4317c97..142ba6bf38a3 100644
+--- a/arch/arm/boot/dts/omap4.dtsi
++++ b/arch/arm/boot/dts/omap4.dtsi
+@@ -403,6 +403,7 @@
+ hw-caps-read-idle-ctrl;
+ hw-caps-ll-interface;
+ hw-caps-temp-alert;
++ status = "disabled";
+ };
+
+ emif2: emif@4d000000 {
+@@ -415,6 +416,7 @@
+ hw-caps-read-idle-ctrl;
+ hw-caps-ll-interface;
+ hw-caps-temp-alert;
++ status = "disabled";
+ };
+
+ timer5: timer@40138000 {
+diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
+index c45f97f37563..5ad5f8b993a3 100644
+--- a/arch/arm/boot/dts/twl6030.dtsi
++++ b/arch/arm/boot/dts/twl6030.dtsi
+@@ -83,6 +83,11 @@
+ regulator-always-on;
+ };
+
++ clk32kg: regulator-clk32kg {
++ compatible = "ti,twl6030-clk32kg";
++ regulator-always-on;
++ };
++
+ twl_usb_comparator: usb-comparator {
+ compatible = "ti,twl6030-usb";
+ interrupts = <4>, <10>;
+diff --git a/include/dt-bindings/board/am335x-bbw-bbb-base.h b/include/dt-bindings/board/am335x-bbw-bbb-base.h
+new file mode 100644
+index 000000000000..35f6d57ef492
+--- /dev/null
++++ b/include/dt-bindings/board/am335x-bbw-bbb-base.h
+@@ -0,0 +1,103 @@
++/*
++ * This header provides constants for bbw/bbb pinctrl bindings.
++ *
++ * Copyright (C) 2014 Robert Nelson <robertcnelson@gmail.com>
++ *
++ * Numbers Based on: https://github.com/derekmolloy/boneDeviceTree/tree/master/docs
++ */
++
++#ifndef _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
++#define _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
++
++#define BONE_P8_03 0x018
++#define BONE_P8_04 0x01C
++
++#define BONE_P8_05 0x008
++#define BONE_P8_06 0x00C
++#define BONE_P8_07 0x090
++#define BONE_P8_08 0x094
++
++#define BONE_P8_09 0x09C
++#define BONE_P8_10 0x098
++#define BONE_P8_11 0x034
++#define BONE_P8_12 0x030
++
++#define BONE_P8_13 0x024
++#define BONE_P8_14 0x028
++#define BONE_P8_15 0x03C
++#define BONE_P8_16 0x038
++
++#define BONE_P8_17 0x02C
++#define BONE_P8_18 0x08C
++#define BONE_P8_19 0x020
++#define BONE_P8_20 0x084
++
++#define BONE_P8_21 0x080
++#define BONE_P8_22 0x014
++#define BONE_P8_23 0x010
++#define BONE_P8_24 0x004
++
++#define BONE_P8_25 0x000
++#define BONE_P8_26 0x07C
++#define BONE_P8_27 0x0E0
++#define BONE_P8_28 0x0E8
++
++#define BONE_P8_29 0x0E4
++#define BONE_P8_30 0x0EC
++#define BONE_P8_31 0x0D8
++#define BONE_P8_32 0x0DC
++
++#define BONE_P8_33 0x0D4
++#define BONE_P8_34 0x0CC
++#define BONE_P8_35 0x0D0
++#define BONE_P8_36 0x0C8
++
++#define BONE_P8_37 0x0C0
++#define BONE_P8_38 0x0C4
++#define BONE_P8_39 0x0B8
++#define BONE_P8_40 0x0BC
++
++#define BONE_P8_41 0x0B0
++#define BONE_P8_42 0x0B4
++#define BONE_P8_43 0x0A8
++#define BONE_P8_44 0x0AC
++
++#define BONE_P8_45 0x0A0
++#define BONE_P8_46 0x0A4
++
++#define BONE_P9_11 0x070
++#define BONE_P9_12 0x078
++
++#define BONE_P9_13 0x074
++#define BONE_P9_14 0x048
++#define BONE_P9_15 0x040
++#define BONE_P9_16 0x04C
++
++#define BONE_P9_17 0x15C
++#define BONE_P9_18 0x158
++#define BONE_P9_19 0x17C
++#define BONE_P9_20 0x178
++
++#define BONE_P9_21 0x154
++#define BONE_P9_22 0x150
++#define BONE_P9_23 0x044
++#define BONE_P9_24 0x184
++
++#define BONE_P9_25 0x1AC
++#define BONE_P9_26 0x180
++#define BONE_P9_27 0x1A4
++#define BONE_P9_28 0x19C
++
++#define BONE_P9_29 0x194
++#define BONE_P9_30 0x198
++#define BONE_P9_31 0x190
++
++/* Shared P21 of P11 */
++#define BONE_P9_41A 0x1B4
++#define BONE_P9_41B 0x1A8
++
++/* Shared P22 of P11 */
++#define BONE_P9_42A 0x164
++#define BONE_P9_42B 0x1A0
++
++#endif
--
2.20.1
diff --git a/patches/soc/ti/blue/0001-am335x-boneblue.dts-force-1ghz-opp.patch b/patches/soc/ti/blue/0001-am335x-boneblue.dts-force-1ghz-opp.patch
deleted file mode 100644
index 068e4dc04..000000000
--- a/patches/soc/ti/blue/0001-am335x-boneblue.dts-force-1ghz-opp.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 046bb1ccda71c9abcdc505a259cce1b2deed6e40 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Thu, 15 Feb 2018 11:09:45 -0600
-Subject: [PATCH 1/3] am335x-boneblue.dts: force 1ghz opp
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-boneblue.dts | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
-index ccb147e70d17..1e5f43953f46 100644
---- a/arch/arm/boot/dts/am335x-boneblue.dts
-+++ b/arch/arm/boot/dts/am335x-boneblue.dts
-@@ -127,6 +127,17 @@
- };
- };
-
-+&cpu0_opp_table {
-+ /*
-+ * All PG 2.0 silicon may not support 1GHz but some of the early
-+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
-+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
-+ */
-+ oppnitro-1000000000 {
-+ opp-supported-hw = <0x06 0x0100>;
-+ };
-+};
-+
- &am33xx_pinmux {
- user_leds_s0: user_leds_s0 {
- pinctrl-single,pins = <
---
-2.20.1
-
diff --git a/patches/soc/ti/blue/0002-blue-add-pwm-eqep-spi-etc.patch b/patches/soc/ti/blue/0002-blue-add-pwm-eqep-spi-etc.patch
deleted file mode 100644
index 4cd177739..000000000
--- a/patches/soc/ti/blue/0002-blue-add-pwm-eqep-spi-etc.patch
+++ /dev/null
@@ -1,550 +0,0 @@
-From 472b4695af3448929c3e1cceff6ab98318e2f66a Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Fri, 5 Apr 2019 10:30:21 -0500
-Subject: [PATCH 2/3] blue: add pwm/eqep/spi/etc
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-boneblue.dts | 468 ++++++++++++++++++++++++--
- 1 file changed, 445 insertions(+), 23 deletions(-)
-
-diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
-index 1e5f43953f46..2a089c47a3a9 100644
---- a/arch/arm/boot/dts/am335x-boneblue.dts
-+++ b/arch/arm/boot/dts/am335x-boneblue.dts
-@@ -125,6 +125,18 @@
- gpio = <&gpio3 9 0>;
- enable-active-high;
- };
-+
-+ bt_en {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&bt_pins>;
-+ compatible = "gpio-leds";
-+
-+ wl18xx_bt_en {
-+ label = "wl18xx_bt_en";
-+ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-+ default-state = "off";
-+ };
-+ };
- };
-
- &cpu0_opp_table {
-@@ -139,6 +151,153 @@
- };
-
- &am33xx_pinmux {
-+ /***************************************************************************
-+ * Static Pinmux
-+ ***************************************************************************/
-+ mux_helper_pins: pins {
-+ pinctrl-single,pins = <
-+
-+ /* GPIO Inputs */
-+ 0x09c 0x37 /*P8.9 Pause BUTTON, input pullup*/
-+ 0x098 0x37 /*P8.10 MODE BUTTON input pullup*/
-+ 0x1AC 0x37 /*P9.25 MPU-9150 INTERRUPT IN*/
-+
-+ /* Motor Control GPIO Out*/
-+ 0x088 ( PIN_OUTPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] - MDIR_1A different from cape! */
-+ 0x074 ( PIN_OUTPUT | MUX_MODE7 ) /* (U17) gpmc_wpn.gpio0[31] - P9.13, MDIR_1B */
-+ 0x040 ( PIN_OUTPUT | MUX_MODE7 ) /* (R13) gpmc_a0.gpio1[16] - P9.15, MDIR_2A */
-+ 0x0D8 ( PIN_OUTPUT | MUX_MODE7 ) /* (V4) lcd_data14.gpio0[10] - P8.31, MDIR_2B different from cape! */
-+ 0x0AC ( PIN_OUTPUT | MUX_MODE7 ) /* (R4) lcd_data3.gpio2[9] - P8.44, MDIR_3A */
-+ 0x0A8 ( PIN_OUTPUT | MUX_MODE7 ) /* (R3) lcd_data2.gpio2[8] - P8.43, MDIR_3B */
-+ 0x0A0 ( PIN_OUTPUT | MUX_MODE7 ) /* (R1) lcd_data0.gpio2[6] - P8.45, MDIR_4A */
-+ 0x0A4 ( PIN_OUTPUT | MUX_MODE7 ) /* (R2) lcd_data1.gpio2[7] - P8.46, MDIR_4B */
-+ 0x1B4 ( PIN_OUTPUT | MUX_MODE7 ) /* (D14) xdma_event_intr1.gpio0[20] - P9.41, MOT_STBY */
-+
-+ /* PRU encoder input */
-+ 0x038 0x36 /* P8_16,PRU0_r31_16,MODE6 */
-+
-+ /* PRU Servo output */
-+ 0x0e0 0x05 /*pru1_pru_r30_8, MODE5*/
-+ 0x0e8 0x05 /*pru1_pru_r30_10, MODE5 */
-+ 0x0e4 0x05 /*pr1_pru1_pru_r30_9, MODE5 */
-+ 0x0ec 0x05 /*pru1_pru_r30_11, MODE5 */
-+ 0x0b8 0x05 /*pru1_pru_r30_6, MODE5 */
-+ 0x0bc 0x05 /*pru1_pru_r30_7, MODE5 */
-+ 0x0b0 0x05 /*pru1_pru_r30_4, MODE5 */
-+ 0x0b4 0x05 /*pru1_pru_r30_5, MODE5 */
-+ 0x0C8 0x0F /*P8.36, SERVO_PWR GPIO OUT*/
-+
-+ /* WILINK 8 */
-+ 0x08c 0x0F /*P8.18 V12 A2DP FSYNC */
-+ 0x078 0x0F /*P9.12 A2DP_CLOCK*/
-+ >;
-+
-+ /* D13 BLUE_GP0_PIN_5 gpio 3_20 */
-+ D13_default_pin: pinmux_D13_default_pin {
-+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ D13_gpio_pin: pinmux_D13_gpio_pin {
-+ pinctrl-single,pins = < 0x1A8 ( PIN_OUTPUT | MUX_MODE7 ) >; };
-+ D13_gpio_pu_pin: pinmux_D13_gpio_pu_pin {
-+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ D13_gpio_pd_pin: pinmux_D13_gpio_pd_pin {
-+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
-+
-+ /* H17 BLUE_GP1_PIN_4 gpio 3_1 */
-+ H17_default_pin: pinmux_H17_default_pin {
-+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ H17_gpio_pin: pinmux_H17_gpio_pin {
-+ pinctrl-single,pins = < 0x10C ( PIN_OUTPUT | MUX_MODE7 ) >; };
-+ H17_gpio_pu_pin: pinmux_H17_gpio_pu_pin {
-+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ H17_gpio_pd_pin: pinmux_H17_gpio_pd_pin {
-+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
-+
-+ /* J15 BLUE_GP1_PIN_3 gpio 3_2 */
-+ J15_default_pin: pinmux_J15_default_pin {
-+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ J15_gpio_pin: pinmux_J15_gpio_pin {
-+ pinctrl-single,pins = < 0x110 ( PIN_OUTPUT | MUX_MODE7 ) >; };
-+ J15_gpio_pu_pin: pinmux_J15_gpio_pu_pin {
-+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ J15_gpio_pd_pin: pinmux_J15_gpio_pd_pin {
-+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
-+
-+ /* P8_15 (ZCZ ball U13) */
-+ P8_15_default_pin: pinmux_P8_15_default_pin {
-+ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin {
-+ pinctrl-single,pins = <0x03c 0x2F>; }; /* Mode 7, RxActive */
-+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin {
-+ pinctrl-single,pins = <0x03c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
-+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin {
-+ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin {
-+ pinctrl-single,pins = <0x03c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
-+ P8_15_qep_pin: pinmux_P8_15_qep_pin {
-+ pinctrl-single,pins = <0x03c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
-+ P8_15_pruin_pu_pin: pinmux_P8_15_pruin_pu_pin {
-+ pinctrl-single,pins = <0x03c 0x36>; }; /* Mode 6, Pull-Up, RxActive */
-+ P8_15_pruecapin_pu_pin: pinmux_P8_15_pruecapin_pu_pin {
-+ pinctrl-single,pins = <0x03c 0x35>; }; /* Mode 5, Pull-Up, RxActive */
-+
-+ /* P9_11 (ZCZ ball T17) */
-+ P9_11_default_pin: pinmux_P9_11_default_pin {
-+ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
-+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin {
-+ pinctrl-single,pins = <0x070 0x2F>; }; /* Mode 7, RxActive */
-+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin {
-+ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
-+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin {
-+ pinctrl-single,pins = <0x070 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P9_11_uart_pin: pinmux_P9_11_uart_pin {
-+ pinctrl-single,pins = <0x070 0x36>; }; /* Mode 6, Pull-Up, RxActive */
-+
-+ /* P9_23 (ZCZ ball V14) */
-+ P9_23_default_pin: pinmux_P9_23_default_pin {
-+ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin {
-+ pinctrl-single,pins = <0x044 0x2F>; }; /* Mode 7, RxActive */
-+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin {
-+ pinctrl-single,pins = <0x044 0x37>; }; /* Mode 7, Pull-Up, RxActive */
-+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin {
-+ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin {
-+ pinctrl-single,pins = <0x044 0x26>; }; /* Mode 6, Pull-Down, RxActive */
-+
-+ /* P9_28 (ZCZ ball C12) Audio */
-+ P9_28_default_pin: pinmux_P9_28_default_pin {
-+ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin {
-+ pinctrl-single,pins = <0x19c 0x2F>; }; /* Mode 7, RxActive */
-+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin {
-+ pinctrl-single,pins = <0x19c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
-+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin {
-+ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
-+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin {
-+ pinctrl-single,pins = <0x19c 0x21>; }; /* Mode 1, Pull-Down, RxActive */
-+ P9_28_spi_pin: pinmux_P9_28_spi_pin {
-+ pinctrl-single,pins = <0x19c 0x23>; }; /* Mode 3, Pull-Down, RxActive */
-+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin {
-+ pinctrl-single,pins = <0x19c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
-+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin {
-+ pinctrl-single,pins = <0x19c 0x25>; }; /* Mode 5, Pull-Down, RxActive */
-+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin {
-+ pinctrl-single,pins = <0x19c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
-+ P9_28_audio_pin: pinmux_P9_28_audio_pin {
-+ pinctrl-single,pins = <0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)>; }; /* mcasp0_ahclkr.mcasp0_axr2 */
-+
-+ /* U16 BLUE_GP0_PIN_3 gpio 1_25 */
-+ U16_default_pin: pinmux_U16_default_pin {
-+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ U16_gpio_pin: pinmux_U16_gpio_pin {
-+ pinctrl-single,pins = < 0x064 ( PIN_OUTPUT | MUX_MODE7 ) >; };
-+ U16_gpio_pu_pin: pinmux_U16_gpio_pu_pin {
-+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
-+ U16_gpio_pd_pin: pinmux_U16_gpio_pd_pin {
-+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
-+
-+ };
-+
- user_leds_s0: user_leds_s0 {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
-@@ -152,7 +311,6 @@
- AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
- AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
- AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
--
- >;
- };
-
-@@ -195,11 +353,11 @@
- };
-
- /* DSM2 */
-- uart4_pins: pinmux_uart4_pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
-- >;
-- };
-+ //uart4_pins: pinmux_uart4_pins {
-+ // pinctrl-single,pins = <
-+ // AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
-+ // >;
-+ //};
-
- /* UT5 */
- uart5_pins: pinmux_uart5_pins {
-@@ -272,6 +430,51 @@
- AM33XX_IOPAD(0x940, PIN_OUTPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
- >;
- };
-+
-+ ehrpwm1_pins: pinmux_ehrpwm1_pins {
-+ pinctrl-single,pins = <
-+ 0x020 0x24 /* P8_19_pwm_pin */
-+ 0x024 0x24 /* P8_13_pwm_pin */
-+ >;
-+ };
-+
-+ ehrpwm2_pins: pinmux_ehrpwm2_pins {
-+ pinctrl-single,pins = <
-+ 0x048 0x26 /* P9_14_pwm_pin */
-+ 0x04c 0x26 /* P9_16_pwm_pin */
-+ >;
-+ };
-+
-+ eqep0_pins: pinmux_eqep0_pins {
-+ pinctrl-single,pins = <
-+ 0x1a0 0x21 /* P9_92_qep_pin */
-+ 0x1a4 0x21 /* P9_27_qep_pin */
-+ >;
-+ };
-+
-+ eqep1_pins: pinmux_eqep1_pins {
-+ pinctrl-single,pins = <
-+ 0x0d4 0x22 /* P8_33_qep_pin */
-+ 0x0d0 0x22 /* P8_35_qep_pin */
-+ >;
-+ };
-+
-+ eqep2_pins: pinmux_eqep2_pins {
-+ pinctrl-single,pins = <
-+ 0x030 0x24 /* P8_12_qep_pin */
-+ 0x034 0x24 /* P8_11_qep_pin */
-+ >;
-+ };
-+
-+ spi1_pins: pinmux_spi1_pins {
-+ pinctrl-single,pins = <
-+ 0x190 0x23 /* spi1_sclk */
-+ 0x194 0x23 /* spi1_d0 */
-+ 0x198 0x23 /* spi1_d1 */
-+ 0x144 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs0 */
-+ 0x164 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs1 */
-+ >;
-+ };
- };
-
- &uart0 {
-@@ -295,12 +498,12 @@
- status = "okay";
- };
-
--&uart4 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&uart4_pins>;
--
-- status = "okay";
--};
-+//&uart4 {
-+// pinctrl-names = "default";
-+// pinctrl-0 = <&uart4_pins>;
-+//
-+// status = "okay";
-+//};
-
- &uart5 {
- pinctrl-names = "default";
-@@ -498,22 +701,23 @@
- };
- };
-
--&tscadc {
-- status = "okay";
-- adc {
-- ti,adc-channels = <0 1 2 3 4 5 6 7>;
-- };
--};
-+//&tscadc {
-+// status = "okay";
-+// adc {
-+// ti,adc-channels = <0 1 2 3 4 5 6 7>;
-+// };
-+//};
-
- &uart3 {
- pinctrl-names = "default";
-- pinctrl-0 = <&uart3_pins &bt_pins>;
-+ //pinctrl-0 = <&uart3_pins &bt_pins>;
-+ pinctrl-0 = <&uart3_pins>;
- status = "okay";
-
-- bluetooth {
-- compatible = "ti,wl1835-st";
-- enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-- };
-+// bluetooth {
-+// compatible = "ti,wl1835-st";
-+// enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-+// };
- };
-
- &aes {
-@@ -530,6 +734,10 @@
- clock-names = "ext-clk", "int-clk";
- };
-
-+&wkup_m3_ipc {
-+ ti,scale-data-fw = "am335x-bone-scale-data.bin";
-+};
-+
- &dcan1 {
- pinctrl-names = "default";
- pinctrl-0 = <&dcan1_pins>;
-@@ -544,3 +752,217 @@
- line-name = "LS_BUF_EN";
- };
- };
-+
-+&ocp {
-+ /* activate the static pinmux helper list of pin modes above */
-+ test_helper: helper {
-+ compatible = "bone-pinmux-helper";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mux_helper_pins>;
-+
-+ status = "okay";
-+ };
-+
-+ /* Encoder 4 (U13) */
-+ P8_15_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "pruin_pu", "gpio", "gpio_pu", "gpio_pd", "pruin", "qep", "pruecapin_pu";
-+ pinctrl-0 = <&P8_15_pruin_pu_pin>;
-+ pinctrl-1 = <&P8_15_pruin_pu_pin>;
-+ pinctrl-2 = <&P8_15_gpio_pin>;
-+ pinctrl-3 = <&P8_15_gpio_pu_pin>;
-+ pinctrl-4 = <&P8_15_gpio_pd_pin>;
-+ pinctrl-5 = <&P8_15_pruin_pin>;
-+ pinctrl-6 = <&P8_15_qep_pin>;
-+ pinctrl-7 = <&P8_15_pruecapin_pu_pin>;
-+ };
-+
-+ /* UART4 RX DSM */
-+ P9_11_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "uart", "gpio", "gpio_pu", "gpio_pd";
-+ pinctrl-0 = <&P9_11_uart_pin>;
-+ pinctrl-1 = <&P9_11_uart_pin>;
-+ pinctrl-2 = <&P9_11_gpio_pin>;
-+ pinctrl-3 = <&P9_11_gpio_pu_pin>;
-+ pinctrl-4 = <&P9_11_gpio_pd_pin>;
-+ };
-+
-+ /* U16 BLUE_GP0_PIN_3 gpio 1_25*/
-+ U16_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
-+ pinctrl-0 = <&U16_default_pin>;
-+ pinctrl-1 = <&U16_gpio_pin>;
-+ pinctrl-2 = <&U16_gpio_pu_pin>;
-+ pinctrl-3 = <&U16_gpio_pd_pin>;
-+ };
-+
-+
-+ /* BLUE_GP0_PIN_3 gpio1_17*/
-+ P9_23_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
-+ pinctrl-0 = <&P9_23_default_pin>;
-+ pinctrl-1 = <&P9_23_gpio_pin>;
-+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
-+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
-+ pinctrl-4 = <&P9_23_pwm_pin>;
-+ };
-+
-+ /* BLUE_GP0_PIN_5 gpio3_20 */
-+ D13_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
-+ pinctrl-0 = <&D13_default_pin>;
-+ pinctrl-1 = <&D13_gpio_pin>;
-+ pinctrl-2 = <&D13_gpio_pu_pin>;
-+ pinctrl-3 = <&D13_gpio_pd_pin>;
-+ };
-+
-+ /* BLUE_GP0_PIN_6 gpio3_17 */
-+ P9_28_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin";
-+ pinctrl-0 = <&P9_28_default_pin>;
-+ pinctrl-1 = <&P9_28_gpio_pin>;
-+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
-+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
-+ pinctrl-4 = <&P9_28_pwm_pin>;
-+ pinctrl-5 = <&P9_28_spi_pin>;
-+ pinctrl-6 = <&P9_28_pwm2_pin>;
-+ pinctrl-7 = <&P9_28_pruout_pin>;
-+ pinctrl-8 = <&P9_28_pruin_pin>;
-+ };
-+
-+ /* BLUE_GP1_PIN_3 gpio3_2 */
-+ J15_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
-+ pinctrl-0 = <&J15_default_pin>;
-+ pinctrl-1 = <&J15_gpio_pin>;
-+ pinctrl-2 = <&J15_gpio_pu_pin>;
-+ pinctrl-3 = <&J15_gpio_pd_pin>;
-+ };
-+
-+ /* BLUE_GP1_PIN_4 gpio3_1 */
-+ H17_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
-+ pinctrl-0 = <&H17_default_pin>;
-+ pinctrl-1 = <&H17_gpio_pin>;
-+ pinctrl-2 = <&H17_gpio_pu_pin>;
-+ pinctrl-3 = <&H17_gpio_pd_pin>;
-+ };
-+};
-+
-+/*******************************************************************************
-+* PWMSS
-+*******************************************************************************/
-+&epwmss0 {
-+ status = "okay";
-+};
-+
-+&epwmss1 {
-+ status = "okay";
-+};
-+
-+&epwmss2 {
-+ status = "okay";
-+};
-+
-+&ehrpwm0 {
-+ status = "okay";
-+};
-+
-+&ehrpwm1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&ehrpwm1_pins>;
-+ status = "okay";
-+};
-+
-+&ehrpwm2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&ehrpwm2_pins>;
-+ status = "okay";
-+};
-+
-+/*******************************************************************************
-+* EQEP
-+*******************************************************************************/
-+&eqep0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&eqep0_pins>;
-+
-+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
-+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
-+ invert_qa = <1>; /* Should we invert the channel A input? */
-+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
-+ invert_qi = <0>; /* Should we invert the index input? */
-+ invert_qs = <0>; /* Should we invert the strobe input? */
-+ status = "okay";
-+};
-+
-+&eqep1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&eqep1_pins>;
-+
-+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
-+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
-+ invert_qa = <1>; /* Should we invert the channel A input? */
-+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
-+ invert_qi = <0>; /* Should we invert the index input? */
-+ invert_qs = <0>; /* Should we invert the strobe input? */
-+ status = "okay";
-+};
-+
-+&eqep2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&eqep2_pins>;
-+
-+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
-+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
-+ invert_qa = <1>; /* Should we invert the channel A input? */
-+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
-+ invert_qi = <0>; /* Should we invert the index input? */
-+ invert_qs = <0>; /* Should we invert the strobe input? */
-+ status = "okay";
-+};
-+
-+/*******************************************************************************
-+ SPI
-+*******************************************************************************/
-+&spi1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi1_pins>;
-+
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ channel@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "spidev";
-+ symlink = "spi/1.0";
-+ reg = <0>;
-+ spi-max-frequency = <24000000>;
-+ };
-+
-+ channel@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "spidev";
-+ symlink = "spi/1.1";
-+ reg = <1>;
-+ spi-max-frequency = <24000000>;
-+ };
-+};
---
-2.20.1
-
diff --git a/patches/soc/ti/blue/0003-am335x-boneblue.dts-fix-rtc-off.patch b/patches/soc/ti/blue/0003-am335x-boneblue.dts-fix-rtc-off.patch
deleted file mode 100644
index c45d4dfc1..000000000
--- a/patches/soc/ti/blue/0003-am335x-boneblue.dts-fix-rtc-off.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 660711bab04b5fd4a4081b62bed92a16fe59c4fa Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Thu, 5 Apr 2018 11:49:17 -0500
-Subject: [PATCH 3/3] am335x-boneblue.dts: fix rtc off
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-boneblue.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
-index 2a089c47a3a9..1a24efdd1fc8 100644
---- a/arch/arm/boot/dts/am335x-boneblue.dts
-+++ b/arch/arm/boot/dts/am335x-boneblue.dts
-@@ -601,6 +601,8 @@
- interrupts = <7>; /* NMI */
- interrupt-parent = <&intc>;
-
-+ ti,pmic-shutdown-controller;
-+
- charger {
- interrupts = <0>, <1>;
- interrupt-names = "USB", "AC";
-@@ -730,8 +732,6 @@
-
- &rtc {
- system-power-controller;
-- clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
-- clock-names = "ext-clk", "int-clk";
- };
-
- &wkup_m3_ipc {
---
-2.20.1
-
diff --git a/patches/soc/ti/omap3/0001-ARM-dts-omap3-beagle-add-i2c2.patch b/patches/soc/ti/omap3/0001-ARM-dts-omap3-beagle-add-i2c2.patch
deleted file mode 100644
index 9fc82d833..000000000
--- a/patches/soc/ti/omap3/0001-ARM-dts-omap3-beagle-add-i2c2.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 9ea607ee480b855f34d28f70fac647fb3ab886fe Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Thu, 13 Feb 2014 10:03:57 -0600
-Subject: [PATCH 1/4] ARM: dts: omap3-beagle: add i2c2
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/omap3-beagle.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
-index 91bb50ad9a4f..611c614899dc 100644
---- a/arch/arm/boot/dts/omap3-beagle.dts
-+++ b/arch/arm/boot/dts/omap3-beagle.dts
-@@ -278,6 +278,10 @@
- };
- };
-
-+&i2c2 {
-+ clock-frequency = <400000>;
-+};
-+
- #include "twl4030.dtsi"
- #include "twl4030_omap3.dtsi"
-
---
-2.20.1
-
diff --git a/patches/soc/ti/omap3/0002-ARM-dts-omap3-beagle-xm-spidev.patch b/patches/soc/ti/omap3/0002-ARM-dts-omap3-beagle-xm-spidev.patch
deleted file mode 100644
index 6ae37748f..000000000
--- a/patches/soc/ti/omap3/0002-ARM-dts-omap3-beagle-xm-spidev.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 86d00a8f825fc8202ecb6716d68b6da7a8df4a79 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Wed, 19 Feb 2014 09:29:54 -0600
-Subject: [PATCH 2/4] ARM: dts: omap3-beagle-xm: spidev
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/omap3-beagle-xm.dts | 49 +++++++++++++++++++++++++++
- 1 file changed, 49 insertions(+)
-
-diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
-index 9985ee2aae0c..e52577089d01 100644
---- a/arch/arm/boot/dts/omap3-beagle-xm.dts
-+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
-@@ -217,6 +217,25 @@
- >;
- };
-
-+ spi3_pins: pinmux_spi3_pins {
-+ pinctrl-single,pins = <
-+ 0x128 (PIN_INPUT | MUX_MODE1) /* sdmmc2_clk.mcspi3_clk gpio_130 */
-+ 0x12a (PIN_OUTPUT | MUX_MODE1) /* sdmmc2_cmd.mcspi3_simo gpio_131 */
-+ 0x12c (PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat0.mcspi3_somi gpio_132 */
-+ 0x130 (PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat2.mcspi3_cs1 gpio_134 */
-+ 0x132 (PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat3.mcspi3_cs0 gpio_135 */
-+ >;
-+ };
-+
-+ spi4_pins: pinmux_spi4_pins {
-+ pinctrl-single,pins = <
-+ 0x15c (PIN_INPUT | MUX_MODE1) /* mcbsp1_clkr.mcspi4_clk gpio_156 */
-+ 0x160 (PIN_OUTPUT | MUX_MODE1) /* mcbsp1_dx.mcspi4_simo gpio_158 */
-+ 0x162 (PIN_INPUT_PULLUP | MUX_MODE1) /* mcbsp1_dr.mcspi4_somi gpio_159 */
-+ 0x166 (PIN_OUTPUT | MUX_MODE1) /* mcbsp1_fsx.mcspi4_cs0 gpio_161 */
-+ >;
-+ };
-+
- hsusb2_pins: pinmux_hsusb2_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
-@@ -325,6 +344,36 @@
- status = "disabled";
- };
-
-+&mcspi3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi3_pins>;
-+ status = "okay";
-+
-+ spidev0: spi@0 {
-+ compatible = "spidev";
-+ reg = <0>;
-+ spi-max-frequency = <48000000>;
-+ };
-+
-+ spidev1: spi@1 {
-+ compatible = "spidev";
-+ reg = <1>;
-+ spi-max-frequency = <48000000>;
-+ };
-+};
-+
-+&mcspi4 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi4_pins>;
-+ status = "okay";
-+
-+ spidev2: spi@0 {
-+ compatible = "spidev";
-+ reg = <0>;
-+ spi-max-frequency = <48000000>;
-+ };
-+};
-+
- &twl_gpio {
- ti,use-leds;
- /* pullups: BIT(1) */
---
-2.20.1
-
diff --git a/patches/soc/ti/omap3/0003-ARM-DTS-omap3-beagle.dts-enable-twl4030-power-reset.patch b/patches/soc/ti/omap3/0003-ARM-DTS-omap3-beagle.dts-enable-twl4030-power-reset.patch
deleted file mode 100644
index 366e41d17..000000000
--- a/patches/soc/ti/omap3/0003-ARM-DTS-omap3-beagle.dts-enable-twl4030-power-reset.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From b951d9b51137bc1f1aabd5b251f3f3ddc153c2fe Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Fri, 2 May 2014 15:30:02 -0500
-Subject: [PATCH 3/4] ARM: DTS: omap3-beagle.dts: enable twl4030-power-reset
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/omap3-beagle.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
-index 611c614899dc..cd018468b7a5 100644
---- a/arch/arm/boot/dts/omap3-beagle.dts
-+++ b/arch/arm/boot/dts/omap3-beagle.dts
-@@ -275,6 +275,11 @@
- codec {
- };
- };
-+
-+ twl_power: power {
-+ compatible = "ti,twl4030-power-reset";
-+ ti,use_poweroff;
-+ };
- };
- };
-
---
-2.20.1
-
diff --git a/patches/soc/ti/omap3/0004-omap3-beagle-fixes.patch b/patches/soc/ti/omap3/0004-omap3-beagle-fixes.patch
deleted file mode 100644
index 59169d84e..000000000
--- a/patches/soc/ti/omap3/0004-omap3-beagle-fixes.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 5fa544e0b537ed08955b3dc31ffd82d8b7ad25b9 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Tue, 13 Sep 2016 20:57:04 -0500
-Subject: [PATCH 4/4] omap3-beagle: fixes
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/omap3-beagle-xm.dts | 4 +++-
- arch/arm/boot/dts/omap3-beagle.dts | 2 ++
- 2 files changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
-index e52577089d01..7c6f73fb0cf6 100644
---- a/arch/arm/boot/dts/omap3-beagle-xm.dts
-+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
-@@ -155,6 +155,7 @@
- };
-
- etb@5401b000 {
-+ status = "disabled";
- compatible = "arm,coresight-etb10", "arm,primecell";
- reg = <0x5401b000 0x1000>;
-
-@@ -170,6 +171,7 @@
- };
-
- etm@54010000 {
-+ status = "disabled";
- compatible = "arm,coresight-etm3x", "arm,primecell";
- reg = <0x54010000 0x1000>;
-
-@@ -313,7 +315,7 @@
- };
-
- twl_power: power {
-- compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
-+ compatible = "ti,twl4030-power-reset";
- ti,use_poweroff;
- };
- };
-diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
-index cd018468b7a5..80ebdfb782bd 100644
---- a/arch/arm/boot/dts/omap3-beagle.dts
-+++ b/arch/arm/boot/dts/omap3-beagle.dts
-@@ -142,6 +142,7 @@
- };
-
- etb@540000000 {
-+ status = "disabled";
- compatible = "arm,coresight-etb10", "arm,primecell";
- reg = <0x5401b000 0x1000>;
-
-@@ -157,6 +158,7 @@
- };
-
- etm@54010000 {
-+ status = "disabled";
- compatible = "arm,coresight-etm3x", "arm,primecell";
- reg = <0x54010000 0x1000>;
-
---
-2.20.1
-
diff --git a/patches/soc/ti/omap4/0001-arm-dts-omap4-move-emif-so-panda-es-b3-now-boots.patch b/patches/soc/ti/omap4/0001-arm-dts-omap4-move-emif-so-panda-es-b3-now-boots.patch
deleted file mode 100644
index f5b7c95d5..000000000
--- a/patches/soc/ti/omap4/0001-arm-dts-omap4-move-emif-so-panda-es-b3-now-boots.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From 68fb9177e3c890cffbb687292c11222c4f17da9e Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Thu, 23 Aug 2018 17:22:01 -0500
-Subject: [PATCH 1/2] arm: dts: omap4: move emif so panda-es-b3 now boots
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/omap4-panda-a4.dts | 12 ++++
- arch/arm/boot/dts/omap4-panda-common.dtsi | 10 ---
- arch/arm/boot/dts/omap4-panda-es-b3.dts | 85 +++++++++++++++++++++++
- arch/arm/boot/dts/omap4-panda-es.dts | 12 ++++
- arch/arm/boot/dts/omap4-panda.dts | 12 ++++
- arch/arm/boot/dts/omap4-sdp.dts | 2 +
- arch/arm/boot/dts/omap4.dtsi | 2 +
- 8 files changed, 126 insertions(+), 10 deletions(-)
- create mode 100644 arch/arm/boot/dts/omap4-panda-es-b3.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index e71ea32fc787..8c528da71d45 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -758,6 +758,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
- omap4-panda.dtb \
- omap4-panda-a4.dtb \
- omap4-panda-es.dtb \
-+ omap4-panda-es-b3.dtb \
- omap4-sdp.dtb \
- omap4-sdp-es23plus.dtb \
- omap4-var-dvk-om44.dtb \
-diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
-index f1a6476af371..63b895b85eda 100644
---- a/arch/arm/boot/dts/omap4-panda-a4.dts
-+++ b/arch/arm/boot/dts/omap4-panda-a4.dts
-@@ -10,6 +10,18 @@
- #include "omap443x.dtsi"
- #include "omap4-panda-common.dtsi"
-
-+&emif1 {
-+ cs1-used;
-+ device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
-+};
-+
-+&emif2 {
-+ cs1-used;
-+ device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
-+};
-+
- /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
- &dss_hdmi_pins {
- pinctrl-single,pins = <
-diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
-index 926f018823a4..785d18a426a4 100644
---- a/arch/arm/boot/dts/omap4-panda-common.dtsi
-+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
-@@ -493,16 +493,6 @@
- };
- };
-
--&emif1 {
-- cs1-used;
-- device-handle = <&elpida_ECB240ABACN>;
--};
--
--&emif2 {
-- cs1-used;
-- device-handle = <&elpida_ECB240ABACN>;
--};
--
- &mcbsp1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mcbsp1_pins>;
-diff --git a/arch/arm/boot/dts/omap4-panda-es-b3.dts b/arch/arm/boot/dts/omap4-panda-es-b3.dts
-new file mode 100644
-index 000000000000..19d02df8d8a5
---- /dev/null
-+++ b/arch/arm/boot/dts/omap4-panda-es-b3.dts
-@@ -0,0 +1,85 @@
-+/*
-+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+/dts-v1/;
-+
-+#include "omap4460.dtsi"
-+#include "omap4-panda-common.dtsi"
-+
-+/ {
-+ model = "TI OMAP4 PandaBoard-ES";
-+ compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
-+};
-+
-+/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
-+&sound {
-+ ti,model = "PandaBoardES";
-+
-+ /* Audio routing */
-+ ti,audio-routing =
-+ "Headset Stereophone", "HSOL",
-+ "Headset Stereophone", "HSOR",
-+ "Ext Spk", "HFL",
-+ "Ext Spk", "HFR",
-+ "Line Out", "AUXL",
-+ "Line Out", "AUXR",
-+ "AFML", "Line In",
-+ "AFMR", "Line In";
-+};
-+
-+/* PandaboardES has external pullups on SCL & SDA */
-+&dss_hdmi_pins {
-+ pinctrl-single,pins = <
-+ OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
-+ OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
-+ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
-+ >;
-+};
-+
-+&omap4_pmx_core {
-+ led_gpio_pins: gpio_led_pmx {
-+ pinctrl-single,pins = <
-+ OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
-+ >;
-+ };
-+
-+ button_pins: pinmux_button_pins {
-+ pinctrl-single,pins = <
-+ OMAP4_IOPAD(0x11b, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */
-+ >;
-+ };
-+};
-+
-+&led_wkgpio_pins {
-+ pinctrl-single,pins = <
-+ OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
-+ >;
-+};
-+
-+&leds {
-+ pinctrl-0 = <
-+ &led_gpio_pins
-+ &led_wkgpio_pins
-+ >;
-+
-+ heartbeat {
-+ gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
-+ };
-+ mmc {
-+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
-+ };
-+};
-+
-+&gpio_keys {
-+ buttonS2 {
-+ gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* gpio_113 */
-+ };
-+};
-+
-+&gpio1_target {
-+ ti,no-reset-on-init;
-+};
-diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts
-index 19d02df8d8a5..027b587eeecf 100644
---- a/arch/arm/boot/dts/omap4-panda-es.dts
-+++ b/arch/arm/boot/dts/omap4-panda-es.dts
-@@ -15,6 +15,18 @@
- compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
- };
-
-+&emif1 {
-+ cs1-used;
-+ device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
-+};
-+
-+&emif2 {
-+ cs1-used;
-+ device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
-+};
-+
- /* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
- &sound {
- ti,model = "PandaBoardES";
-diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
-index a0e28b2e254e..3ee41ef824c0 100644
---- a/arch/arm/boot/dts/omap4-panda.dts
-+++ b/arch/arm/boot/dts/omap4-panda.dts
-@@ -14,3 +14,15 @@
- model = "TI OMAP4 PandaBoard";
- compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
- };
-+
-+&emif1 {
-+ cs1-used;
-+ device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
-+};
-+
-+&emif2 {
-+ cs1-used;
-+ device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
-+};
-diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
-index c88817bdcc56..03ce4888a955 100644
---- a/arch/arm/boot/dts/omap4-sdp.dts
-+++ b/arch/arm/boot/dts/omap4-sdp.dts
-@@ -533,11 +533,13 @@
- &emif1 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
- };
-
- &emif2 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-+ status = "ok";
- };
-
- &keypad {
-diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
-index 1a96d4317c97..142ba6bf38a3 100644
---- a/arch/arm/boot/dts/omap4.dtsi
-+++ b/arch/arm/boot/dts/omap4.dtsi
-@@ -403,6 +403,7 @@
- hw-caps-read-idle-ctrl;
- hw-caps-ll-interface;
- hw-caps-temp-alert;
-+ status = "disabled";
- };
-
- emif2: emif@4d000000 {
-@@ -415,6 +416,7 @@
- hw-caps-read-idle-ctrl;
- hw-caps-ll-interface;
- hw-caps-temp-alert;
-+ status = "disabled";
- };
-
- timer5: timer@40138000 {
---
-2.20.1
-
diff --git a/patches/soc/ti/omap4/0002-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch b/patches/soc/ti/panda/0001-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch
similarity index 79%
rename from patches/soc/ti/omap4/0002-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch
rename to patches/soc/ti/panda/0001-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch
index 8b1d528d4..fce00ba16 100644
--- a/patches/soc/ti/omap4/0002-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch
+++ b/patches/soc/ti/panda/0001-HACK-PandaBoard-Bring-back-twl6030-clk32kg-regulator.patch
@@ -1,30 +1,13 @@
-From 8db8c4b6f9ef45c415aa8989e38b728922213e90 Mon Sep 17 00:00:00 2001
+From 9ca2b469f03fa2b051f6680e805c19d32db9183e Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 26 Feb 2019 12:38:20 -0600
-Subject: [PATCH 2/2] HACK: PandaBoard: Bring back twl6030-clk32kg regulator
+Subject: [PATCH] HACK: PandaBoard: Bring back twl6030-clk32kg regulator
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
- arch/arm/boot/dts/twl6030.dtsi | 5 +++++
drivers/regulator/twl6030-regulator.c | 23 +++++++++++++++++++++++
- 2 files changed, 28 insertions(+)
+ 1 file changed, 23 insertions(+)
-diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
-index c45f97f37563..5ad5f8b993a3 100644
---- a/arch/arm/boot/dts/twl6030.dtsi
-+++ b/arch/arm/boot/dts/twl6030.dtsi
-@@ -83,6 +83,11 @@
- regulator-always-on;
- };
-
-+ clk32kg: regulator-clk32kg {
-+ compatible = "ti,twl6030-clk32kg";
-+ regulator-always-on;
-+ };
-+
- twl_usb_comparator: usb-comparator {
- compatible = "ti,twl6030-usb";
- interrupts = <4>, <10>;
diff --git a/drivers/regulator/twl6030-regulator.c b/drivers/regulator/twl6030-regulator.c
index 15f19df6bc5d..97c7788279a5 100644
--- a/drivers/regulator/twl6030-regulator.c
diff --git a/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch b/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch
deleted file mode 100644
index f16b1519f..000000000
--- a/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch
+++ /dev/null
@@ -1,2120 +0,0 @@
-From 6a7227e9ffe0cc12cef219ed8e60fe602b4772a3 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 22 Oct 2018 11:00:23 -0500
-Subject: [PATCH 1/2] am335x-pocketbeagle.dtb: config-pin
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-pocketbeagle.dts | 2039 ++++++++++++++++++++-
- 1 file changed, 1996 insertions(+), 43 deletions(-)
-
-diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-index 62fe5cab9fae..8f4163cc1a07 100644
---- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
-+++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-@@ -60,24 +60,24 @@
- };
-
- &am33xx_pinmux {
-- i2c2_pins: pinmux-i2c2-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
-- AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
-- >;
-- };
-+// i2c2_pins: pinmux-i2c2-pins {
-+// pinctrl-single,pins = <
-+// AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
-+// AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
-+// >;
-+// };
-
-- ehrpwm0_pins: pinmux-ehrpwm0-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
-- >;
-- };
-+// ehrpwm0_pins: pinmux-ehrpwm0-pins {
-+// pinctrl-single,pins = <
-+// AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
-+// >;
-+// };
-
-- ehrpwm1_pins: pinmux-ehrpwm1-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
-- >;
-- };
-+// ehrpwm1_pins: pinmux-ehrpwm1-pins {
-+// pinctrl-single,pins = <
-+// AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
-+// >;
-+// };
-
- mmc0_pins: pinmux-mmc0-pins {
- pinctrl-single,pins = <
-@@ -92,23 +92,23 @@
- >;
- };
-
-- spi0_pins: pinmux-spi0-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
-- AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
-- AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
-- AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
-- >;
-- };
-+// spi0_pins: pinmux-spi0-pins {
-+// pinctrl-single,pins = <
-+// AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
-+// AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
-+// AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
-+// AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
-+// >;
-+// };
-
-- spi1_pins: pinmux-spi1-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
-- AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
-- AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
-- AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
-- >;
-- };
-+// spi1_pins: pinmux-spi1-pins {
-+// pinctrl-single,pins = <
-+// AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
-+// AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
-+// AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
-+// AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
-+// >;
-+// };
-
- usr_leds_pins: pinmux-usr-leds-pins {
- pinctrl-single,pins = <
-@@ -126,12 +126,839 @@
- >;
- };
-
-- uart4_pins: pinmux-uart4-pins {
-- pinctrl-single,pins = <
-- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
-- AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
-- >;
-- };
-+// uart4_pins: pinmux-uart4-pins {
-+// pinctrl-single,pins = <
-+// AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
-+// AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
-+// >;
-+// };
-+
-+ /************************/
-+ /* P1 Header */
-+ /************************/
-+
-+ /* P1_01 VIN-AC */
-+
-+ /* P1_02 (ZCZ ball R5) gpio2_23 */
-+ P1_02_default_pin: pinmux_P1_02_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
-+ P1_02_gpio_pin: pinmux_P1_02_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
-+ P1_02_gpio_pu_pin: pinmux_P1_02_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
-+ P1_02_gpio_pd_pin: pinmux_P1_02_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
-+ P1_02_gpio_input_pin: pinmux_P1_02_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
-+ P1_02_pruout_pin: pinmux_P1_02_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
-+ P1_02_pruin_pin: pinmux_P1_02_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
-+
-+ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
-+
-+ /* P1_04 (ZCZ ball R6) gpio2_25 */
-+ P1_04_default_pin: pinmux_P1_04_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
-+ P1_04_gpio_pin: pinmux_P1_04_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
-+ P1_04_gpio_pu_pin: pinmux_P1_04_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
-+ P1_04_gpio_pd_pin: pinmux_P1_04_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
-+ P1_04_gpio_input_pin: pinmux_P1_04_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
-+ P1_04_pruout_pin: pinmux_P1_04_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
-+ P1_04_pruin_pin: pinmux_P1_04_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
-+
-+ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
-+
-+ /* P1_06 (ZCZ ball A16) spi0_cs0 */
-+ P1_06_default_pin: pinmux_P1_06_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
-+ P1_06_gpio_pin: pinmux_P1_06_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
-+ P1_06_gpio_pu_pin: pinmux_P1_06_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
-+ P1_06_gpio_pd_pin: pinmux_P1_06_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
-+ P1_06_gpio_input_pin: pinmux_P1_06_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
-+ P1_06_spi_cs_pin: pinmux_P1_06_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
-+ P1_06_i2c_pin: pinmux_P1_06_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
-+ P1_06_pwm_pin: pinmux_P1_06_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
-+ P1_06_pru_uart_pin: pinmux_P1_06_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
-+
-+ /* P1_07 VIN-USB */
-+
-+ /* P1_08 (ZCZ ball A17) spi0_sclk */
-+ P1_08_default_pin: pinmux_P1_08_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
-+ P1_08_gpio_pin: pinmux_P1_08_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
-+ P1_08_gpio_pu_pin: pinmux_P1_08_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
-+ P1_08_gpio_pd_pin: pinmux_P1_08_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
-+ P1_08_gpio_input_pin: pinmux_P1_08_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
-+ P1_08_spi_sclk_pin: pinmux_P1_08_spi_sclk_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
-+ P1_08_uart_pin: pinmux_P1_08_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
-+ P1_08_i2c_pin: pinmux_P1_08_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
-+ P1_08_pwm_pin: pinmux_P1_08_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
-+ P1_08_pru_uart_pin: pinmux_P1_08_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
-+
-+ /* P1_09 (ZCZ ball R18) USB1-DN */
-+
-+ /* P1_10 (ZCZ ball B17) spi0_d0 */
-+ P1_10_default_pin: pinmux_P1_10_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
-+ P1_10_gpio_pin: pinmux_P1_10_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
-+ P1_10_gpio_pu_pin: pinmux_P1_10_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
-+ P1_10_gpio_pd_pin: pinmux_P1_10_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
-+ P1_10_gpio_input_pin: pinmux_P1_10_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
-+ P1_10_spi_pin: pinmux_P1_10_spi_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
-+ P1_10_uart_pin: pinmux_P1_10_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
-+ P1_10_i2c_pin: pinmux_P1_10_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
-+ P1_10_pwm_pin: pinmux_P1_10_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
-+ P1_10_pru_uart_pin: pinmux_P1_10_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
-+
-+ /* P1_11 (ZCZ ball R17) USB1-DP */
-+
-+ /* P1_12 (ZCZ ball B16) spi0_d1 */
-+ P1_12_default_pin: pinmux_P1_12_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
-+ P1_12_gpio_pin: pinmux_P1_12_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
-+ P1_12_gpio_pu_pin: pinmux_P1_12_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
-+ P1_12_gpio_pd_pin: pinmux_P1_12_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
-+ P1_12_gpio_input_pin: pinmux_P1_12_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
-+ P1_12_spi_pin: pinmux_P1_12_spi_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
-+ P1_12_i2c_pin: pinmux_P1_12_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
-+ P1_12_pwm_pin: pinmux_P1_12_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
-+ P1_12_pru_uart_pin: pinmux_P1_12_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
-+
-+ /* P1_13 (ZCZ ball P17) USB1-ID */
-+
-+ /* P1_14 VOUT-3.3V */
-+
-+ /* P1_15 GND */
-+
-+ /* P1_16 GND */
-+
-+ /* P1_17 (ZCZ ball A9) VREFN */
-+
-+ /* P1_18 (ZCZ ball B9) VREFP */
-+
-+ /* P1_19 (ZCZ ball B6) AIN0 */
-+
-+ /* P1_20 (ZCZ ball D14) gpio0_20 */
-+ P1_20_default_pin: pinmux_P1_20_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
-+ P1_20_gpio_pin: pinmux_P1_20_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
-+ P1_20_gpio_pu_pin: pinmux_P1_20_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
-+ P1_20_gpio_pd_pin: pinmux_P1_20_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
-+ P1_20_gpio_input_pin: pinmux_P1_20_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
-+ P1_20_pruin_pin: pinmux_P1_20_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
-+
-+ /* P1_21 (ZCZ ball C7) AIN1 */
-+
-+ /* P1_22 GND */
-+
-+ /* P1_23 (ZCZ ball B7) AIN2 */
-+
-+ /* P1_24 VOUT-5V */
-+
-+ /* P1_25 (ZCZ ball A7) AIN3 */
-+
-+ /* P1_26 (ZCZ ball D18) i2c2_sda */
-+ P1_26_default_pin: pinmux_P1_26_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
-+ P1_26_gpio_pin: pinmux_P1_26_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
-+ P1_26_gpio_pu_pin: pinmux_P1_26_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
-+ P1_26_gpio_pd_pin: pinmux_P1_26_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
-+ P1_26_gpio_input_pin: pinmux_P1_26_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
-+ P1_26_can_pin: pinmux_P1_26_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
-+ P1_26_i2c_pin: pinmux_P1_26_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
-+ P1_26_spi_cs_pin: pinmux_P1_26_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
-+ P1_26_pru_uart_pin: pinmux_P1_26_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
-+
-+ /* P1_27 (ZCZ ball C8) AIN4 */
-+
-+ /* P1_28 (ZCZ ball D17) i2c2_scl */
-+ P1_28_default_pin: pinmux_P1_28_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
-+ P1_28_gpio_pin: pinmux_P1_28_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
-+ P1_28_gpio_pu_pin: pinmux_P1_28_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
-+ P1_28_gpio_pd_pin: pinmux_P1_28_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
-+ P1_28_gpio_input_pin: pinmux_P1_28_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
-+ P1_28_can_pin: pinmux_P1_28_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
-+ P1_28_i2c_pin: pinmux_P1_28_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
-+ P1_28_spi_cs_pin: pinmux_P1_28_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
-+ P1_28_pru_uart_pin: pinmux_P1_28_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
-+
-+ /* P1_29 (ZCZ ball A14) pru0_in7 */
-+ P1_29_default_pin: pinmux_P1_29_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
-+ P1_29_gpio_pin: pinmux_P1_29_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
-+ P1_29_gpio_pu_pin: pinmux_P1_29_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
-+ P1_29_gpio_pd_pin: pinmux_P1_29_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
-+ P1_29_gpio_input_pin: pinmux_P1_29_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
-+ P1_29_qep_pin: pinmux_P1_29_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
-+ P1_29_pruout_pin: pinmux_P1_29_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
-+ P1_29_pruin_pin: pinmux_P1_29_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
-+
-+ /* P1_30 (ZCZ ball E16) uart0_txd */
-+ P1_30_default_pin: pinmux_P1_30_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
-+ P1_30_gpio_pin: pinmux_P1_30_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
-+ P1_30_gpio_pu_pin: pinmux_P1_30_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
-+ P1_30_gpio_pd_pin: pinmux_P1_30_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
-+ P1_30_gpio_input_pin: pinmux_P1_30_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
-+ P1_30_uart_pin: pinmux_P1_30_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
-+ P1_30_spi_cs_pin: pinmux_P1_30_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_txd.spi1_cs1 */
-+ P1_30_can_pin: pinmux_P1_30_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_txd.dcan0_rx */
-+ P1_30_i2c_pin: pinmux_P1_30_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_txd.i2c2_scl */
-+ P1_30_pruout_pin: pinmux_P1_30_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_txd.pru1_out15 */
-+ P1_30_pruin_pin: pinmux_P1_30_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE6) >; }; /* uart0_txd.pru1_in15 */
-+
-+ /* P1_31 (ZCZ ball B12) pru0_in4 */
-+ P1_31_default_pin: pinmux_P1_31_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
-+ P1_31_gpio_pin: pinmux_P1_31_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
-+ P1_31_gpio_pu_pin: pinmux_P1_31_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
-+ P1_31_gpio_pd_pin: pinmux_P1_31_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
-+ P1_31_gpio_input_pin: pinmux_P1_31_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
-+ P1_31_qep_pin: pinmux_P1_31_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
-+ P1_31_pruout_pin: pinmux_P1_31_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
-+ P1_31_pruin_pin: pinmux_P1_31_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
-+
-+ /* P1_32 (ZCZ ball E15) uart0_rxd */
-+ P1_32_default_pin: pinmux_P1_32_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
-+ P1_32_gpio_pin: pinmux_P1_32_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
-+ P1_32_gpio_pu_pin: pinmux_P1_32_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
-+ P1_32_gpio_pd_pin: pinmux_P1_32_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
-+ P1_32_gpio_input_pin: pinmux_P1_32_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
-+ P1_32_uart_pin: pinmux_P1_32_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
-+ P1_32_spi_cs_pin: pinmux_P1_32_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rxd.spi1_cs0 */
-+ P1_32_can_pin: pinmux_P1_32_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rxd.dcan0_tx */
-+ P1_32_i2c_pin: pinmux_P1_32_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rxd.i2c2_sda */
-+ P1_32_pruout_pin: pinmux_P1_32_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_rxd.pru1_out14 */
-+ P1_32_pruin_pin: pinmux_P1_32_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE6) >; }; /* uart0_rxd.pru1_in14 */
-+
-+ /* P1_33 (ZCZ ball B13) pru0_in1 */
-+ P1_33_default_pin: pinmux_P1_33_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
-+ P1_33_gpio_pin: pinmux_P1_33_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
-+ P1_33_gpio_pu_pin: pinmux_P1_33_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
-+ P1_33_gpio_pd_pin: pinmux_P1_33_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
-+ P1_33_gpio_input_pin: pinmux_P1_33_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
-+ P1_33_pwm_pin: pinmux_P1_33_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
-+ P1_33_spi_pin: pinmux_P1_33_spi_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
-+ P1_33_pruout_pin: pinmux_P1_33_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
-+ P1_33_pruin_pin: pinmux_P1_33_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
-+
-+ /* P1_34 (ZCZ ball T11) gpio0_26 */
-+ P1_34_default_pin: pinmux_P1_34_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
-+ P1_34_gpio_pin: pinmux_P1_34_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
-+ P1_34_gpio_pu_pin: pinmux_P1_34_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
-+ P1_34_gpio_pd_pin: pinmux_P1_34_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
-+ P1_34_gpio_input_pin: pinmux_P1_34_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
-+ P1_34_pwm_pin: pinmux_P1_34_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
-+
-+ /* P1_35 (ZCZ ball V5) pru1_in10 */
-+ P1_35_default_pin: pinmux_P1_35_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
-+ P1_35_gpio_pin: pinmux_P1_35_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
-+ P1_35_gpio_pu_pin: pinmux_P1_35_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
-+ P1_35_gpio_pd_pin: pinmux_P1_35_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
-+ P1_35_gpio_input_pin: pinmux_P1_35_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
-+ P1_35_pruout_pin: pinmux_P1_35_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
-+ P1_35_pruin_pin: pinmux_P1_35_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
-+
-+ /* P1_36 (ZCZ ball A13) ehrpwm0a */
-+ P1_36_default_pin: pinmux_P1_36_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
-+ P1_36_gpio_pin: pinmux_P1_36_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
-+ P1_36_gpio_pu_pin: pinmux_P1_36_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
-+ P1_36_gpio_pd_pin: pinmux_P1_36_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
-+ P1_36_gpio_input_pin: pinmux_P1_36_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
-+ P1_36_pwm_pin: pinmux_P1_36_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
-+ P1_36_spi_sclk_pin: pinmux_P1_36_spi_sclk_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
-+ P1_36_pruout_pin: pinmux_P1_36_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
-+ P1_36_pruin_pin: pinmux_P1_36_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
-+
-+
-+ /************************/
-+ /* P2 Header */
-+ /************************/
-+
-+ /* P2_01 (ZCZ ball U14) ehrpwm1a */
-+ P2_01_default_pin: pinmux_P2_01_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
-+ P2_01_gpio_pin: pinmux_P2_01_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
-+ P2_01_gpio_pu_pin: pinmux_P2_01_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
-+ P2_01_gpio_pd_pin: pinmux_P2_01_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
-+ P2_01_gpio_input_pin: pinmux_P2_01_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
-+ P2_01_pwm_pin: pinmux_P2_01_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
-+
-+ /* P2_02 (ZCZ ball V17) gpio1_27 */
-+ P2_02_default_pin: pinmux_P2_02_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
-+ P2_02_gpio_pin: pinmux_P2_02_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x086c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
-+ P2_02_gpio_pu_pin: pinmux_P2_02_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
-+ P2_02_gpio_pd_pin: pinmux_P2_02_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
-+ P2_02_gpio_input_pin: pinmux_P2_02_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x086c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
-+
-+ /* P2_03 (ZCZ ball T10) gpio0_23 */
-+ P2_03_default_pin: pinmux_P2_03_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
-+ P2_03_gpio_pin: pinmux_P2_03_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
-+ P2_03_gpio_pu_pin: pinmux_P2_03_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
-+ P2_03_gpio_pd_pin: pinmux_P2_03_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
-+ P2_03_gpio_input_pin: pinmux_P2_03_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
-+ P2_03_pwm_pin: pinmux_P2_03_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
-+
-+ /* P2_04 (ZCZ ball T16) gpio1_26 */
-+ P2_04_default_pin: pinmux_P2_04_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
-+ P2_04_gpio_pin: pinmux_P2_04_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0868, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
-+ P2_04_gpio_pu_pin: pinmux_P2_04_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
-+ P2_04_gpio_pd_pin: pinmux_P2_04_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
-+ P2_04_gpio_input_pin: pinmux_P2_04_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0868, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
-+
-+ /* P2_05 (ZCZ ball T17) uart4_rxd */
-+ P2_05_default_pin: pinmux_P2_05_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
-+ P2_05_gpio_pin: pinmux_P2_05_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
-+ P2_05_gpio_pu_pin: pinmux_P2_05_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
-+ P2_05_gpio_pd_pin: pinmux_P2_05_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
-+ P2_05_gpio_input_pin: pinmux_P2_05_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
-+ P2_05_uart_pin: pinmux_P2_05_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
-+
-+ /* P2_06 (ZCZ ball U16) gpio1_25 */
-+ P2_06_default_pin: pinmux_P2_06_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
-+ P2_06_gpio_pin: pinmux_P2_06_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0864, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
-+ P2_06_gpio_pu_pin: pinmux_P2_06_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
-+ P2_06_gpio_pd_pin: pinmux_P2_06_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
-+ P2_06_gpio_input_pin: pinmux_P2_06_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0864, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
-+
-+ /* P2_07 (ZCZ ball U17) uart4_txd */
-+ P2_07_default_pin: pinmux_P2_07_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
-+ P2_07_gpio_pin: pinmux_P2_07_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
-+ P2_07_gpio_pu_pin: pinmux_P2_07_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
-+ P2_07_gpio_pd_pin: pinmux_P2_07_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
-+ P2_07_gpio_input_pin: pinmux_P2_07_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
-+ P2_07_uart_pin: pinmux_P2_07_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
-+
-+ /* P2_08 (ZCZ ball U18) gpio1_28 */
-+ P2_08_default_pin: pinmux_P2_08_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
-+ P2_08_gpio_pin: pinmux_P2_08_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
-+ P2_08_gpio_pu_pin: pinmux_P2_08_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
-+ P2_08_gpio_pd_pin: pinmux_P2_08_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
-+ P2_08_gpio_input_pin: pinmux_P2_08_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
-+
-+ /* P2_09 (ZCZ ball D15) i2c1_scl */
-+ P2_09_default_pin: pinmux_P2_09_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
-+ P2_09_gpio_pin: pinmux_P2_09_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
-+ P2_09_gpio_pu_pin: pinmux_P2_09_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
-+ P2_09_gpio_pd_pin: pinmux_P2_09_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
-+ P2_09_gpio_input_pin: pinmux_P2_09_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
-+ P2_09_uart_pin: pinmux_P2_09_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
-+ P2_09_can_pin: pinmux_P2_09_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
-+ P2_09_i2c_pin: pinmux_P2_09_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
-+ P2_09_pru_uart_pin: pinmux_P2_09_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
-+ P2_09_pruin_pin: pinmux_P2_09_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
-+
-+ /* P2_10 (ZCZ ball R14) gpio1_20 */
-+ P2_10_default_pin: pinmux_P2_10_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
-+ P2_10_gpio_pin: pinmux_P2_10_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0850, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
-+ P2_10_gpio_pu_pin: pinmux_P2_10_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
-+ P2_10_gpio_pd_pin: pinmux_P2_10_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
-+ P2_10_gpio_input_pin: pinmux_P2_10_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0850, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
-+ P2_10_qep_pin: pinmux_P2_10_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a4.eqep1a_in */
-+
-+ /* P2_11 (ZCZ ball D16) i2c1_sda */
-+ P2_11_default_pin: pinmux_P2_11_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
-+ P2_11_gpio_pin: pinmux_P2_11_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
-+ P2_11_gpio_pu_pin: pinmux_P2_11_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
-+ P2_11_gpio_pd_pin: pinmux_P2_11_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
-+ P2_11_gpio_input_pin: pinmux_P2_11_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
-+ P2_11_uart_pin: pinmux_P2_11_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
-+ P2_11_can_pin: pinmux_P2_11_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
-+ P2_11_i2c_pin: pinmux_P2_11_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
-+ P2_11_pru_uart_pin: pinmux_P2_11_pru_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
-+ P2_11_pruin_pin: pinmux_P2_11_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
-+
-+ /* P2_12 POWER_BUTTON */
-+
-+ /* P2_13 VOUT-5V */
-+
-+ /* P2_14 BAT-VIN */
-+
-+ /* P2_15 GND */
-+
-+ /* P2_16 BAT-TEMP */
-+
-+ /* P2_17 (ZCZ ball V12) gpio2_1 */
-+ P2_17_default_pin: pinmux_P2_17_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
-+ P2_17_gpio_pin: pinmux_P2_17_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
-+ P2_17_gpio_pu_pin: pinmux_P2_17_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
-+ P2_17_gpio_pd_pin: pinmux_P2_17_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
-+ P2_17_gpio_input_pin: pinmux_P2_17_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
-+
-+ /* P2_18 (ZCZ ball U13) gpio1_15 */
-+ P2_18_default_pin: pinmux_P2_18_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
-+ P2_18_gpio_pin: pinmux_P2_18_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
-+ P2_18_gpio_pu_pin: pinmux_P2_18_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
-+ P2_18_gpio_pd_pin: pinmux_P2_18_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
-+ P2_18_gpio_input_pin: pinmux_P2_18_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
-+ P2_18_qep_pin: pinmux_P2_18_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
-+ P2_18_pru_ecap_pin: pinmux_P2_18_pru_ecap_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
-+ P2_18_pruin_pin: pinmux_P2_18_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
-+
-+ /* P2_19 (ZCZ ball U12) gpio0_27 */
-+ P2_19_default_pin: pinmux_P2_19_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
-+ P2_19_gpio_pin: pinmux_P2_19_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
-+ P2_19_gpio_pu_pin: pinmux_P2_19_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
-+ P2_19_gpio_pd_pin: pinmux_P2_19_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
-+ P2_19_gpio_input_pin: pinmux_P2_19_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
-+ P2_19_pwm_pin: pinmux_P2_19_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
-+
-+ /* P2_20 (ZCZ ball T13) gpio2_0 */
-+ P2_20_default_pin: pinmux_P2_20_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
-+ P2_20_gpio_pin: pinmux_P2_20_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0888, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
-+ P2_20_gpio_pu_pin: pinmux_P2_20_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
-+ P2_20_gpio_pd_pin: pinmux_P2_20_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
-+ P2_20_gpio_input_pin: pinmux_P2_20_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0888, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
-+
-+ /* P2_21 GND */
-+
-+ /* P2_22 (ZCZ ball V13) gpio1_14 */
-+ P2_22_default_pin: pinmux_P2_22_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
-+ P2_22_gpio_pin: pinmux_P2_22_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
-+ P2_22_gpio_pu_pin: pinmux_P2_22_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
-+ P2_22_gpio_pd_pin: pinmux_P2_22_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
-+ P2_22_gpio_input_pin: pinmux_P2_22_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
-+ P2_22_qep_pin: pinmux_P2_22_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
-+ P2_22_pruin_pin: pinmux_P2_22_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
-+
-+ /* P2_23 VOUT-3.3V */
-+
-+ /* P2_24 (ZCZ ball T12) gpio1_12 */
-+ P2_24_default_pin: pinmux_P2_24_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
-+ P2_24_gpio_pin: pinmux_P2_24_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
-+ P2_24_gpio_pu_pin: pinmux_P2_24_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
-+ P2_24_gpio_pd_pin: pinmux_P2_24_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
-+ P2_24_gpio_input_pin: pinmux_P2_24_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
-+ P2_24_qep_pin: pinmux_P2_24_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
-+ P2_24_pruout_pin: pinmux_P2_24_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
-+
-+ /* P2_25 (ZCZ ball E17) spi1_d1 */
-+ P2_25_default_pin: pinmux_P2_25_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
-+ P2_25_gpio_pin: pinmux_P2_25_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
-+ P2_25_gpio_pu_pin: pinmux_P2_25_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
-+ P2_25_gpio_pd_pin: pinmux_P2_25_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
-+ P2_25_gpio_input_pin: pinmux_P2_25_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
-+ P2_25_uart_pin: pinmux_P2_25_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rtsn.uart4_txd */
-+ P2_25_can_pin: pinmux_P2_25_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rtsn.dcan1_rx */
-+ P2_25_i2c_pin: pinmux_P2_25_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rtsn.i2c1_scl */
-+ P2_25_spi_pin: pinmux_P2_25_spi_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
-+ P2_25_spi_cs_pin: pinmux_P2_25_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart0_rtsn.spi1_cs0 */
-+
-+ /* P2_26 RESET# */
-+
-+ /* P2_27 (ZCZ ball E18) spi1_d0 */
-+ P2_27_default_pin: pinmux_P2_27_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
-+ P2_27_gpio_pin: pinmux_P2_27_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
-+ P2_27_gpio_pu_pin: pinmux_P2_27_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
-+ P2_27_gpio_pd_pin: pinmux_P2_27_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
-+ P2_27_gpio_input_pin: pinmux_P2_27_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_INPUT | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
-+ P2_27_uart_pin: pinmux_P2_27_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_ctsn.uart4_rxd */
-+ P2_27_can_pin: pinmux_P2_27_can_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_ctsn.dcan1_tx */
-+ P2_27_i2c_pin: pinmux_P2_27_i2c_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_ctsn.i2c1_sda */
-+ P2_27_spi_pin: pinmux_P2_27_spi_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
-+
-+ /* P2_28 (ZCZ ball D13) pru0_in6 */
-+ P2_28_default_pin: pinmux_P2_28_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
-+ P2_28_gpio_pin: pinmux_P2_28_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
-+ P2_28_gpio_pu_pin: pinmux_P2_28_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
-+ P2_28_gpio_pd_pin: pinmux_P2_28_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
-+ P2_28_gpio_input_pin: pinmux_P2_28_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
-+ P2_28_qep_pin: pinmux_P2_28_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
-+ P2_28_pruout_pin: pinmux_P2_28_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
-+ P2_28_pruin_pin: pinmux_P2_28_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
-+
-+ /* P2_29 (ZCZ ball C18) spi1_sclk */
-+ P2_29_default_pin: pinmux_P2_29_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
-+ P2_29_gpio_pin: pinmux_P2_29_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
-+ P2_29_gpio_pu_pin: pinmux_P2_29_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
-+ P2_29_gpio_pd_pin: pinmux_P2_29_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
-+ P2_29_gpio_input_pin: pinmux_P2_29_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
-+ P2_29_pwm_pin: pinmux_P2_29_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
-+ P2_29_uart_pin: pinmux_P2_29_uart_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
-+ P2_29_spi_cs_pin: pinmux_P2_29_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
-+ P2_29_pru_ecap_pin: pinmux_P2_29_pru_ecap_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
-+ P2_29_spi_sclk_pin: pinmux_P2_29_spi_sclk_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
-+
-+ /* P2_30 (ZCZ ball C12) pru0_in3 */
-+ P2_30_default_pin: pinmux_P2_30_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
-+ P2_30_gpio_pin: pinmux_P2_30_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
-+ P2_30_gpio_pu_pin: pinmux_P2_30_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
-+ P2_30_gpio_pd_pin: pinmux_P2_30_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
-+ P2_30_gpio_input_pin: pinmux_P2_30_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
-+ P2_30_pwm_pin: pinmux_P2_30_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
-+ P2_30_spi_cs_pin: pinmux_P2_30_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
-+ P2_30_pruout_pin: pinmux_P2_30_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
-+ P2_30_pruin_pin: pinmux_P2_30_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
-+
-+ /* P2_31 (ZCZ ball A15) spi1_cs1 */
-+ P2_31_default_pin: pinmux_P2_31_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
-+ P2_31_gpio_pin: pinmux_P2_31_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
-+ P2_31_gpio_pu_pin: pinmux_P2_31_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
-+ P2_31_gpio_pd_pin: pinmux_P2_31_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
-+ P2_31_gpio_input_pin: pinmux_P2_31_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
-+ P2_31_spi_cs_pin: pinmux_P2_31_spi_cs_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
-+ P2_31_pruin_pin: pinmux_P2_31_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr0.pru1_in16 */
-+
-+ /* P2_32 (ZCZ ball D12) pru0_in2 */
-+ P2_32_default_pin: pinmux_P2_32_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
-+ P2_32_gpio_pin: pinmux_P2_32_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
-+ P2_32_gpio_pu_pin: pinmux_P2_32_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
-+ P2_32_gpio_pd_pin: pinmux_P2_32_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
-+ P2_32_gpio_input_pin: pinmux_P2_32_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
-+ P2_32_pwm_pin: pinmux_P2_32_pwm_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
-+ P2_32_spi_pin: pinmux_P2_32_spi_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
-+ P2_32_pruout_pin: pinmux_P2_32_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
-+ P2_32_pruin_pin: pinmux_P2_32_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
-+
-+ /* P2_33 (ZCZ ball R12) gpio1_13 */
-+ P2_33_default_pin: pinmux_P2_33_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
-+ P2_33_gpio_pin: pinmux_P2_33_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
-+ P2_33_gpio_pu_pin: pinmux_P2_33_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
-+ P2_33_gpio_pd_pin: pinmux_P2_33_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
-+ P2_33_gpio_input_pin: pinmux_P2_33_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
-+ P2_33_qep_pin: pinmux_P2_33_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
-+ P2_33_pruout_pin: pinmux_P2_33_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
-+
-+ /* P2_34 (ZCZ ball C13) pru0_in5 */
-+ P2_34_default_pin: pinmux_P2_34_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
-+ P2_34_gpio_pin: pinmux_P2_34_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
-+ P2_34_gpio_pu_pin: pinmux_P2_34_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
-+ P2_34_gpio_pd_pin: pinmux_P2_34_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
-+ P2_34_gpio_input_pin: pinmux_P2_34_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
-+ P2_34_qep_pin: pinmux_P2_34_qep_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
-+ P2_34_pruout_pin: pinmux_P2_34_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
-+ P2_34_pruin_pin: pinmux_P2_34_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
-+
-+ /* P2_35 (ZCZ ball U5) gpio2_22 */
-+ P2_35_default_pin: pinmux_P2_35_default_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
-+ P2_35_gpio_pin: pinmux_P2_35_gpio_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
-+ P2_35_gpio_pu_pin: pinmux_P2_35_gpio_pu_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
-+ P2_35_gpio_pd_pin: pinmux_P2_35_gpio_pd_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
-+ P2_35_gpio_input_pin: pinmux_P2_35_gpio_input_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
-+ P2_35_pruout_pin: pinmux_P2_35_pruout_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
-+ P2_35_pruin_pin: pinmux_P2_35_pruin_pin { pinctrl-single,pins = <
-+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
-+
-+ /* P2_36 (ZCZ ball C9) AIN7 */
- };
-
- &epwmss0 {
-@@ -141,7 +968,8 @@
- &ehrpwm0 {
- status = "okay";
- pinctrl-names = "default";
-- pinctrl-0 = <&ehrpwm0_pins>;
-+ //pinctrl-0 = <&ehrpwm0_pins>;
-+ pinctrl-0 = <>;
- };
-
- &epwmss1 {
-@@ -151,7 +979,18 @@
- &ehrpwm1 {
- status = "okay";
- pinctrl-names = "default";
-- pinctrl-0 = <&ehrpwm1_pins>;
-+ //pinctrl-0 = <&ehrpwm1_pins>;
-+ pinctrl-0 = <>;
-+};
-+
-+&epwmss2 {
-+ status = "okay";
-+};
-+
-+&ehrpwm2 {
-+ status = "okay";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
- };
-
- &i2c0 {
-@@ -161,9 +1000,18 @@
- };
- };
-
-+&i2c1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
-+
-+ status = "okay";
-+ clock-frequency = <400000>;
-+};
-+
- &i2c2 {
- pinctrl-names = "default";
-- pinctrl-0 = <&i2c2_pins>;
-+// pinctrl-0 = <&i2c2_pins>;
-+ pinctrl-0 = <>;
-
- status = "okay";
- clock-frequency = <400000>;
-@@ -194,14 +1042,30 @@
-
- &uart0 {
- pinctrl-names = "default";
-- pinctrl-0 = <&uart0_pins>;
-+ //pinctrl-0 = <&uart0_pins>;
-+ pinctrl-0 = <>;
-+
-+ status = "okay";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
-+
-+ status = "okay";
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
-
- status = "okay";
- };
-
- &uart4 {
- pinctrl-names = "default";
-- pinctrl-0 = <&uart4_pins>;
-+ //pinctrl-0 = <&uart4_pins>;
-+ pinctrl-0 = <>;
-
- status = "okay";
- };
-@@ -235,3 +1099,1092 @@
- &cppi41dma {
- status = "okay";
- };
-+
-+&spi0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ channel@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "spidev";
-+ symlink = "spi/0.0";
-+ reg = <0>;
-+ spi-max-frequency = <24000000>;
-+ };
-+
-+ channel@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "spidev";
-+ symlink = "spi/0.1";
-+ reg = <1>;
-+ spi-max-frequency = <24000000>;
-+ status = "disabled";
-+ };
-+};
-+
-+&spi1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ channel@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "spidev";
-+ symlink = "spi/1.0";
-+ reg = <0>;
-+ spi-max-frequency = <24000000>;
-+ };
-+
-+ channel@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "spidev";
-+ symlink = "spi/1.1";
-+ reg = <1>;
-+ spi-max-frequency = <24000000>;
-+ };
-+};
-+
-+&dcan0 {
-+ status = "okay";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
-+};
-+
-+&dcan1 {
-+ status = "okay";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
-+};
-+
-+&ocp {
-+ /************************/
-+ /* P1 Header */
-+ /************************/
-+
-+ /* P1_01 VIN-AC */
-+
-+ /* P1_02 (ZCZ ball R5) gpio_input */
-+ P1_02_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
-+ pinctrl-0 = <&P1_02_default_pin>;
-+ pinctrl-1 = <&P1_02_gpio_pin>;
-+ pinctrl-2 = <&P1_02_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_02_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_02_gpio_input_pin>;
-+ pinctrl-5 = <&P1_02_pruout_pin>;
-+ pinctrl-6 = <&P1_02_pruin_pin>;
-+ };
-+
-+ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
-+
-+ /* P1_04 (ZCZ ball R6) */
-+ P1_04_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
-+ pinctrl-0 = <&P1_04_default_pin>;
-+ pinctrl-1 = <&P1_04_gpio_pin>;
-+ pinctrl-2 = <&P1_04_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_04_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_04_gpio_input_pin>;
-+ pinctrl-5 = <&P1_04_pruout_pin>;
-+ pinctrl-6 = <&P1_04_pruin_pin>;
-+ };
-+
-+ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
-+
-+ /* P1_06 (ZCZ ball A16) spi_cs */
-+ P1_06_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
-+ pinctrl-0 = <&P1_06_default_pin>;
-+ pinctrl-1 = <&P1_06_gpio_pin>;
-+ pinctrl-2 = <&P1_06_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_06_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_06_gpio_input_pin>;
-+ pinctrl-5 = <&P1_06_spi_cs_pin>;
-+ pinctrl-6 = <&P1_06_i2c_pin>;
-+ pinctrl-7 = <&P1_06_pwm_pin>;
-+ pinctrl-8 = <&P1_06_pru_uart_pin>;
-+ };
-+
-+ /* P1_07 VIN-USB */
-+
-+ /* P1_08 (ZCZ ball A17) spi_sclk */
-+ P1_08_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
-+ pinctrl-0 = <&P1_08_default_pin>;
-+ pinctrl-1 = <&P1_08_gpio_pin>;
-+ pinctrl-2 = <&P1_08_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_08_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_08_gpio_input_pin>;
-+ pinctrl-5 = <&P1_08_spi_sclk_pin>;
-+ pinctrl-6 = <&P1_08_uart_pin>;
-+ pinctrl-7 = <&P1_08_i2c_pin>;
-+ pinctrl-8 = <&P1_08_pwm_pin>;
-+ pinctrl-9 = <&P1_08_pru_uart_pin>;
-+ };
-+
-+ /* P1_09 (ZCZ ball R18) USB1-DN */
-+
-+ /* P1_10 (ZCZ ball B17) spi */
-+ P1_10_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
-+ pinctrl-0 = <&P1_10_default_pin>;
-+ pinctrl-1 = <&P1_10_gpio_pin>;
-+ pinctrl-2 = <&P1_10_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_10_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_10_gpio_input_pin>;
-+ pinctrl-5 = <&P1_10_spi_pin>;
-+ pinctrl-6 = <&P1_10_uart_pin>;
-+ pinctrl-7 = <&P1_10_i2c_pin>;
-+ pinctrl-8 = <&P1_10_pwm_pin>;
-+ pinctrl-9 = <&P1_10_pru_uart_pin>;
-+ };
-+
-+ /* P1_11 (ZCZ ball R17) USB1-DP */
-+
-+ /* P1_12 (ZCZ ball B16) spi */
-+ P1_12_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
-+ pinctrl-0 = <&P1_12_default_pin>;
-+ pinctrl-1 = <&P1_12_gpio_pin>;
-+ pinctrl-2 = <&P1_12_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_12_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_12_gpio_input_pin>;
-+ pinctrl-5 = <&P1_12_spi_pin>;
-+ pinctrl-6 = <&P1_12_i2c_pin>;
-+ pinctrl-7 = <&P1_12_pwm_pin>;
-+ pinctrl-8 = <&P1_12_pru_uart_pin>;
-+ };
-+
-+ /* P1_13 (ZCZ ball P17) USB1-ID */
-+
-+ /* P1_14 VOUT-3.3V */
-+
-+ /* P1_15 GND */
-+
-+ /* P1_16 GND */
-+
-+ /* P1_17 (ZCZ ball A9) VREFN */
-+
-+ /* P1_18 (ZCZ ball B9) VREFP */
-+
-+ /* P1_19 (ZCZ ball B6) AIN0 */
-+
-+ /* P1_20 (ZCZ ball D14) */
-+ P1_20_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
-+ pinctrl-0 = <&P1_20_default_pin>;
-+ pinctrl-1 = <&P1_20_gpio_pin>;
-+ pinctrl-2 = <&P1_20_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_20_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_20_gpio_input_pin>;
-+ pinctrl-5 = <&P1_20_pruin_pin>;
-+ };
-+
-+ /* P1_21 (ZCZ ball C7) AIN1 */
-+
-+ /* P1_22 GND */
-+
-+ /* P1_23 (ZCZ ball B7) AIN2 */
-+
-+ /* P1_24 VOUT-5V */
-+
-+ /* P1_25 (ZCZ ball A7) AIN3 */
-+
-+ /* P1_26 (ZCZ ball D18) i2c */
-+ P1_26_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
-+ pinctrl-0 = <&P1_26_default_pin>;
-+ pinctrl-1 = <&P1_26_gpio_pin>;
-+ pinctrl-2 = <&P1_26_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_26_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_26_gpio_input_pin>;
-+ pinctrl-5 = <&P1_26_spi_cs_pin>;
-+ pinctrl-6 = <&P1_26_can_pin>;
-+ pinctrl-7 = <&P1_26_i2c_pin>;
-+ pinctrl-8 = <&P1_26_pru_uart_pin>;
-+ };
-+
-+ /* P1_27 (ZCZ ball C8) AIN4 */
-+
-+ /* P1_28 (ZCZ ball D17) i2c */
-+ P1_28_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
-+ pinctrl-0 = <&P1_28_default_pin>;
-+ pinctrl-1 = <&P1_28_gpio_pin>;
-+ pinctrl-2 = <&P1_28_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_28_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_28_gpio_input_pin>;
-+ pinctrl-5 = <&P1_28_spi_cs_pin>;
-+ pinctrl-6 = <&P1_28_can_pin>;
-+ pinctrl-7 = <&P1_28_i2c_pin>;
-+ pinctrl-8 = <&P1_28_pru_uart_pin>;
-+ };
-+
-+ /* P1_29 (ZCZ ball A14) pruin */
-+ P1_29_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
-+ pinctrl-0 = <&P1_29_default_pin>;
-+ pinctrl-1 = <&P1_29_gpio_pin>;
-+ pinctrl-2 = <&P1_29_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_29_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_29_gpio_input_pin>;
-+ pinctrl-5 = <&P1_29_qep_pin>;
-+ pinctrl-6 = <&P1_29_pruout_pin>;
-+ pinctrl-7 = <&P1_29_pruin_pin>;
-+ };
-+
-+ /* P1_30 (ZCZ ball E16) uart */
-+ P1_30_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
-+ pinctrl-0 = <&P1_30_default_pin>;
-+ pinctrl-1 = <&P1_30_gpio_pin>;
-+ pinctrl-2 = <&P1_30_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_30_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_30_gpio_input_pin>;
-+ pinctrl-5 = <&P1_30_spi_cs_pin>;
-+ pinctrl-6 = <&P1_30_uart_pin>;
-+ pinctrl-7 = <&P1_30_can_pin>;
-+ pinctrl-8 = <&P1_30_i2c_pin>;
-+ pinctrl-9 = <&P1_30_pruout_pin>;
-+ pinctrl-10 = <&P1_30_pruin_pin>;
-+ };
-+
-+ /* P1_31 (ZCZ ball B12) pruin */
-+ P1_31_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
-+ pinctrl-0 = <&P1_31_default_pin>;
-+ pinctrl-1 = <&P1_31_gpio_pin>;
-+ pinctrl-2 = <&P1_31_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_31_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_31_gpio_input_pin>;
-+ pinctrl-5 = <&P1_31_qep_pin>;
-+ pinctrl-6 = <&P1_31_pruout_pin>;
-+ pinctrl-7 = <&P1_31_pruin_pin>;
-+ };
-+
-+ /* P1_32 (ZCZ ball E15) uart */
-+ P1_32_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
-+ pinctrl-0 = <&P1_32_default_pin>;
-+ pinctrl-1 = <&P1_32_gpio_pin>;
-+ pinctrl-2 = <&P1_32_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_32_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_32_gpio_input_pin>;
-+ pinctrl-5 = <&P1_32_spi_cs_pin>;
-+ pinctrl-6 = <&P1_32_uart_pin>;
-+ pinctrl-7 = <&P1_32_can_pin>;
-+ pinctrl-8 = <&P1_32_i2c_pin>;
-+ pinctrl-9 = <&P1_32_pruout_pin>;
-+ pinctrl-10 = <&P1_32_pruin_pin>;
-+ };
-+
-+ /* P1_33 (ZCZ ball B13) pruin */
-+ P1_33_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
-+ pinctrl-0 = <&P1_33_default_pin>;
-+ pinctrl-1 = <&P1_33_gpio_pin>;
-+ pinctrl-2 = <&P1_33_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_33_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_33_gpio_input_pin>;
-+ pinctrl-5 = <&P1_33_spi_pin>;
-+ pinctrl-6 = <&P1_33_pwm_pin>;
-+ pinctrl-7 = <&P1_33_pruout_pin>;
-+ pinctrl-8 = <&P1_33_pruin_pin>;
-+ };
-+
-+ /* P1_34 (ZCZ ball T11) */
-+ P1_34_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
-+ pinctrl-0 = <&P1_34_default_pin>;
-+ pinctrl-1 = <&P1_34_gpio_pin>;
-+ pinctrl-2 = <&P1_34_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_34_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_34_gpio_input_pin>;
-+ pinctrl-5 = <&P1_34_pwm_pin>;
-+ };
-+
-+ /* P1_35 (ZCZ ball V5) pruin */
-+ P1_35_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
-+ pinctrl-0 = <&P1_35_default_pin>;
-+ pinctrl-1 = <&P1_35_gpio_pin>;
-+ pinctrl-2 = <&P1_35_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_35_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_35_gpio_input_pin>;
-+ pinctrl-5 = <&P1_35_pruout_pin>;
-+ pinctrl-6 = <&P1_35_pruin_pin>;
-+ };
-+
-+ /* P1_36 (ZCZ ball A13) pwm */
-+ P1_36_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
-+ pinctrl-0 = <&P1_36_default_pin>;
-+ pinctrl-1 = <&P1_36_gpio_pin>;
-+ pinctrl-2 = <&P1_36_gpio_pu_pin>;
-+ pinctrl-3 = <&P1_36_gpio_pd_pin>;
-+ pinctrl-4 = <&P1_36_gpio_input_pin>;
-+ pinctrl-5 = <&P1_36_spi_sclk_pin>;
-+ pinctrl-6 = <&P1_36_pwm_pin>;
-+ pinctrl-7 = <&P1_36_pruout_pin>;
-+ pinctrl-8 = <&P1_36_pruin_pin>;
-+ };
-+
-+
-+ /************************/
-+ /* P2 Header */
-+ /************************/
-+
-+ /* P2_01 (ZCZ ball U14) pwm */
-+ P2_01_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
-+ pinctrl-0 = <&P2_01_default_pin>;
-+ pinctrl-1 = <&P2_01_gpio_pin>;
-+ pinctrl-2 = <&P2_01_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_01_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_01_gpio_input_pin>;
-+ pinctrl-5 = <&P2_01_pwm_pin>;
-+ };
-+
-+ /* P2_02 (ZCZ ball V17) */
-+ P2_02_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
-+ pinctrl-0 = <&P2_02_default_pin>;
-+ pinctrl-1 = <&P2_02_gpio_pin>;
-+ pinctrl-2 = <&P2_02_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_02_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_02_gpio_input_pin>;
-+ };
-+
-+ /* P2_03 (ZCZ ball T10) */
-+ P2_03_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
-+ pinctrl-0 = <&P2_03_default_pin>;
-+ pinctrl-1 = <&P2_03_gpio_pin>;
-+ pinctrl-2 = <&P2_03_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_03_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_03_gpio_input_pin>;
-+ pinctrl-5 = <&P2_03_pwm_pin>;
-+ };
-+
-+ /* P2_04 (ZCZ ball T16) */
-+ P2_04_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
-+ pinctrl-0 = <&P2_04_default_pin>;
-+ pinctrl-1 = <&P2_04_gpio_pin>;
-+ pinctrl-2 = <&P2_04_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_04_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_04_gpio_input_pin>;
-+ };
-+
-+ /* P2_05 (ZCZ ball T17) uart */
-+ P2_05_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
-+ pinctrl-0 = <&P2_05_default_pin>;
-+ pinctrl-1 = <&P2_05_gpio_pin>;
-+ pinctrl-2 = <&P2_05_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_05_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_05_gpio_input_pin>;
-+ pinctrl-5 = <&P2_05_uart_pin>;
-+ };
-+
-+ /* P2_06 (ZCZ ball U16) */
-+ P2_06_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
-+ pinctrl-0 = <&P2_06_default_pin>;
-+ pinctrl-1 = <&P2_06_gpio_pin>;
-+ pinctrl-2 = <&P2_06_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_06_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_06_gpio_input_pin>;
-+ };
-+
-+ /* P2_07 (ZCZ ball U17) uart */
-+ P2_07_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
-+ pinctrl-0 = <&P2_07_default_pin>;
-+ pinctrl-1 = <&P2_07_gpio_pin>;
-+ pinctrl-2 = <&P2_07_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_07_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_07_gpio_input_pin>;
-+ pinctrl-5 = <&P2_07_uart_pin>;
-+ };
-+
-+ /* P2_08 (ZCZ ball U18) */
-+ P2_08_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
-+ pinctrl-0 = <&P2_08_default_pin>;
-+ pinctrl-1 = <&P2_08_gpio_pin>;
-+ pinctrl-2 = <&P2_08_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_08_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_08_gpio_input_pin>;
-+ };
-+
-+ /* P2_09 (ZCZ ball D15) i2c */
-+ P2_09_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
-+ pinctrl-0 = <&P2_09_default_pin>;
-+ pinctrl-1 = <&P2_09_gpio_pin>;
-+ pinctrl-2 = <&P2_09_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_09_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_09_gpio_input_pin>;
-+ pinctrl-5 = <&P2_09_uart_pin>;
-+ pinctrl-6 = <&P2_09_can_pin>;
-+ pinctrl-7 = <&P2_09_i2c_pin>;
-+ pinctrl-8 = <&P2_09_pru_uart_pin>;
-+ pinctrl-9 = <&P2_09_pruin_pin>;
-+ };
-+
-+ /* P2_10 (ZCZ ball R14) */
-+ P2_10_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
-+ pinctrl-0 = <&P2_10_default_pin>;
-+ pinctrl-1 = <&P2_10_gpio_pin>;
-+ pinctrl-2 = <&P2_10_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_10_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_10_gpio_input_pin>;
-+ pinctrl-5 = <&P2_10_qep_pin>;
-+ };
-+
-+ /* P2_11 (ZCZ ball D16) i2c */
-+ P2_11_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
-+ pinctrl-0 = <&P2_11_default_pin>;
-+ pinctrl-1 = <&P2_11_gpio_pin>;
-+ pinctrl-2 = <&P2_11_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_11_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_11_gpio_input_pin>;
-+ pinctrl-5 = <&P2_11_uart_pin>;
-+ pinctrl-6 = <&P2_11_can_pin>;
-+ pinctrl-7 = <&P2_11_i2c_pin>;
-+ pinctrl-8 = <&P2_11_pru_uart_pin>;
-+ pinctrl-9 = <&P2_11_pruin_pin>;
-+ };
-+
-+ /* P2_12 POWER_BUTTON */
-+
-+ /* P2_13 VOUT-5V */
-+
-+ /* P2_14 BAT-VIN */
-+
-+ /* P2_15 GND */
-+
-+ /* P2_16 BAT-TEMP */
-+
-+ /* P2_17 (ZCZ ball V12) */
-+ P2_17_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
-+ pinctrl-0 = <&P2_17_default_pin>;
-+ pinctrl-1 = <&P2_17_gpio_pin>;
-+ pinctrl-2 = <&P2_17_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_17_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_17_gpio_input_pin>;
-+ };
-+
-+ /* P2_18 (ZCZ ball U13) */
-+ P2_18_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
-+ pinctrl-0 = <&P2_18_default_pin>;
-+ pinctrl-1 = <&P2_18_gpio_pin>;
-+ pinctrl-2 = <&P2_18_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_18_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_18_gpio_input_pin>;
-+ pinctrl-5 = <&P2_18_qep_pin>;
-+ pinctrl-6 = <&P2_18_pru_ecap_pin>;
-+ pinctrl-7 = <&P2_18_pruin_pin>;
-+ };
-+
-+ /* P2_19 (ZCZ ball U12) */
-+ P2_19_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
-+ pinctrl-0 = <&P2_19_default_pin>;
-+ pinctrl-1 = <&P2_19_gpio_pin>;
-+ pinctrl-2 = <&P2_19_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_19_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_19_gpio_input_pin>;
-+ pinctrl-5 = <&P2_19_pwm_pin>;
-+ };
-+
-+ /* P2_20 (ZCZ ball T13) */
-+ P2_20_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
-+ pinctrl-0 = <&P2_20_default_pin>;
-+ pinctrl-1 = <&P2_20_gpio_pin>;
-+ pinctrl-2 = <&P2_20_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_20_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_20_gpio_input_pin>;
-+ };
-+
-+ /* P2_21 GND */
-+
-+ /* P2_22 (ZCZ ball V13) */
-+ P2_22_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
-+ pinctrl-0 = <&P2_22_default_pin>;
-+ pinctrl-1 = <&P2_22_gpio_pin>;
-+ pinctrl-2 = <&P2_22_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_22_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_22_gpio_input_pin>;
-+ pinctrl-5 = <&P2_22_qep_pin>;
-+ pinctrl-6 = <&P2_22_pruin_pin>;
-+ };
-+
-+ /* P2_23 VOUT-3.3V */
-+
-+ /* P2_24 (ZCZ ball T12) */
-+ P2_24_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
-+ pinctrl-0 = <&P2_24_default_pin>;
-+ pinctrl-1 = <&P2_24_gpio_pin>;
-+ pinctrl-2 = <&P2_24_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_24_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_24_gpio_input_pin>;
-+ pinctrl-5 = <&P2_24_qep_pin>;
-+ pinctrl-6 = <&P2_24_pruout_pin>;
-+ };
-+
-+ /* P2_25 (ZCZ ball E17) spi */
-+ P2_25_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "spi_cs", "uart", "can", "i2c";
-+ pinctrl-0 = <&P2_25_default_pin>;
-+ pinctrl-1 = <&P2_25_gpio_pin>;
-+ pinctrl-2 = <&P2_25_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_25_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_25_gpio_input_pin>;
-+ pinctrl-5 = <&P2_25_spi_pin>;
-+ pinctrl-6 = <&P2_25_spi_cs_pin>;
-+ pinctrl-7 = <&P2_25_uart_pin>;
-+ pinctrl-8 = <&P2_25_can_pin>;
-+ pinctrl-9 = <&P2_25_i2c_pin>;
-+ };
-+
-+ /* P2_26 RESET# */
-+
-+ /* P2_27 (ZCZ ball E18) spi */
-+ P2_27_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "can", "i2c";
-+ pinctrl-0 = <&P2_27_default_pin>;
-+ pinctrl-1 = <&P2_27_gpio_pin>;
-+ pinctrl-2 = <&P2_27_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_27_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_27_gpio_input_pin>;
-+ pinctrl-5 = <&P2_27_spi_pin>;
-+ pinctrl-6 = <&P2_27_uart_pin>;
-+ pinctrl-7 = <&P2_27_can_pin>;
-+ pinctrl-8 = <&P2_27_i2c_pin>;
-+ };
-+
-+ /* P2_28 (ZCZ ball D13) pruin */
-+ P2_28_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
-+ pinctrl-0 = <&P2_28_default_pin>;
-+ pinctrl-1 = <&P2_28_gpio_pin>;
-+ pinctrl-2 = <&P2_28_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_28_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_28_gpio_input_pin>;
-+ pinctrl-5 = <&P2_28_qep_pin>;
-+ pinctrl-6 = <&P2_28_pruout_pin>;
-+ pinctrl-7 = <&P2_28_pruin_pin>;
-+ };
-+
-+ /* P2_29 (ZCZ ball C18) spi_sclk */
-+ P2_29_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
-+ pinctrl-0 = <&P2_29_default_pin>;
-+ pinctrl-1 = <&P2_29_gpio_pin>;
-+ pinctrl-2 = <&P2_29_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_29_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_29_gpio_input_pin>;
-+ pinctrl-5 = <&P2_29_spi_cs_pin>;
-+ pinctrl-6 = <&P2_29_spi_sclk_pin>;
-+ pinctrl-7 = <&P2_29_uart_pin>;
-+ pinctrl-8 = <&P2_29_pwm_pin>;
-+ pinctrl-9 = <&P2_29_pru_ecap_pin>;
-+ };
-+
-+ /* P2_30 (ZCZ ball C12) pruin */
-+ P2_30_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pruout", "pruin";
-+ pinctrl-0 = <&P2_30_default_pin>;
-+ pinctrl-1 = <&P2_30_gpio_pin>;
-+ pinctrl-2 = <&P2_30_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_30_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_30_gpio_input_pin>;
-+ pinctrl-5 = <&P2_30_spi_cs_pin>;
-+ pinctrl-6 = <&P2_30_pwm_pin>;
-+ pinctrl-7 = <&P2_30_pruout_pin>;
-+ pinctrl-8 = <&P2_30_pruin_pin>;
-+ };
-+
-+ /* P2_31 (ZCZ ball A15) spi_cs */
-+ P2_31_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pruin";
-+ pinctrl-0 = <&P2_31_default_pin>;
-+ pinctrl-1 = <&P2_31_gpio_pin>;
-+ pinctrl-2 = <&P2_31_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_31_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_31_gpio_input_pin>;
-+ pinctrl-5 = <&P2_31_spi_cs_pin>;
-+ pinctrl-6 = <&P2_31_pruin_pin>;
-+ };
-+
-+ /* P2_32 (ZCZ ball D12) pruin */
-+ P2_32_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
-+ pinctrl-0 = <&P2_32_default_pin>;
-+ pinctrl-1 = <&P2_32_gpio_pin>;
-+ pinctrl-2 = <&P2_32_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_32_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_32_gpio_input_pin>;
-+ pinctrl-5 = <&P2_32_spi_pin>;
-+ pinctrl-6 = <&P2_32_pwm_pin>;
-+ pinctrl-7 = <&P2_32_pruout_pin>;
-+ pinctrl-8 = <&P2_32_pruin_pin>;
-+ };
-+
-+ /* P2_33 (ZCZ ball R12) */
-+ P2_33_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
-+ pinctrl-0 = <&P2_33_default_pin>;
-+ pinctrl-1 = <&P2_33_gpio_pin>;
-+ pinctrl-2 = <&P2_33_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_33_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_33_gpio_input_pin>;
-+ pinctrl-5 = <&P2_33_qep_pin>;
-+ pinctrl-6 = <&P2_33_pruout_pin>;
-+ };
-+
-+ /* P2_34 (ZCZ ball C13) pruin */
-+ P2_34_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
-+ pinctrl-0 = <&P2_34_default_pin>;
-+ pinctrl-1 = <&P2_34_gpio_pin>;
-+ pinctrl-2 = <&P2_34_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_34_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_34_gpio_input_pin>;
-+ pinctrl-5 = <&P2_34_qep_pin>;
-+ pinctrl-6 = <&P2_34_pruout_pin>;
-+ pinctrl-7 = <&P2_34_pruin_pin>;
-+ };
-+
-+ /* P2_35 (ZCZ ball U5) gpio_input */
-+ P2_35_pinmux {
-+ compatible = "bone-pinmux-helper";
-+ status = "okay";
-+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
-+ pinctrl-0 = <&P2_35_default_pin>;
-+ pinctrl-1 = <&P2_35_gpio_pin>;
-+ pinctrl-2 = <&P2_35_gpio_pu_pin>;
-+ pinctrl-3 = <&P2_35_gpio_pd_pin>;
-+ pinctrl-4 = <&P2_35_gpio_input_pin>;
-+ pinctrl-5 = <&P2_35_pruout_pin>;
-+ pinctrl-6 = <&P2_35_pruin_pin>;
-+ };
-+
-+ /* P2_36 (ZCZ ball C9) AIN7 */
-+
-+ cape-universal {
-+ compatible = "gpio-of-helper";
-+ status = "okay";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <>;
-+
-+ P1_02 {
-+ gpio-name = "P1_02";
-+ gpio = <&gpio2 23 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_04 {
-+ gpio-name = "P1_04";
-+ gpio = <&gpio2 25 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_06 {
-+ gpio-name = "P1_06";
-+ gpio = <&gpio0 5 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_08 {
-+ gpio-name = "P1_08";
-+ gpio = <&gpio0 2 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_10 {
-+ gpio-name = "P1_10";
-+ gpio = <&gpio0 3 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_12 {
-+ gpio-name = "P1_12";
-+ gpio = <&gpio0 4 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_20 {
-+ gpio-name = "P1_20";
-+ gpio = <&gpio0 20 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_26 {
-+ gpio-name = "P1_26";
-+ gpio = <&gpio0 12 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_28 {
-+ gpio-name = "P1_28";
-+ gpio = <&gpio0 13 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_29 {
-+ gpio-name = "P1_29";
-+ gpio = <&gpio3 21 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_30 {
-+ gpio-name = "P1_30";
-+ gpio = <&gpio1 11 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_31 {
-+ gpio-name = "P1_31";
-+ gpio = <&gpio3 18 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_32 {
-+ gpio-name = "P1_32";
-+ gpio = <&gpio1 10 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_33 {
-+ gpio-name = "P1_33";
-+ gpio = <&gpio3 15 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_34 {
-+ gpio-name = "P1_34";
-+ gpio = <&gpio0 26 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_35 {
-+ gpio-name = "P1_35";
-+ gpio = <&gpio2 24 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P1_36 {
-+ gpio-name = "P1_36";
-+ gpio = <&gpio3 14 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_01 {
-+ gpio-name = "P2_01";
-+ gpio = <&gpio1 18 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_02 {
-+ gpio-name = "P2_02";
-+ gpio = <&gpio1 27 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_03 {
-+ gpio-name = "P2_03";
-+ gpio = <&gpio0 23 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_04 {
-+ gpio-name = "P2_04";
-+ gpio = <&gpio1 26 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_05 {
-+ gpio-name = "P2_05";
-+ gpio = <&gpio0 30 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_06 {
-+ gpio-name = "P2_06";
-+ gpio = <&gpio1 25 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_07 {
-+ gpio-name = "P2_07";
-+ gpio = <&gpio0 31 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_08 {
-+ gpio-name = "P2_08";
-+ gpio = <&gpio1 28 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_09 {
-+ gpio-name = "P2_09";
-+ gpio = <&gpio0 15 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_10 {
-+ gpio-name = "P2_10";
-+ gpio = <&gpio1 20 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_11 {
-+ gpio-name = "P2_11";
-+ gpio = <&gpio0 14 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_17 {
-+ gpio-name = "P2_17";
-+ gpio = <&gpio2 1 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_18 {
-+ gpio-name = "P2_18";
-+ gpio = <&gpio1 15 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_19 {
-+ gpio-name = "P2_19";
-+ gpio = <&gpio0 27 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_20 {
-+ gpio-name = "P2_20";
-+ gpio = <&gpio2 0 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_22 {
-+ gpio-name = "P2_22";
-+ gpio = <&gpio1 14 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_24 {
-+ gpio-name = "P2_24";
-+ gpio = <&gpio1 12 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_25 {
-+ gpio-name = "P2_25";
-+ gpio = <&gpio1 9 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_27 {
-+ gpio-name = "P2_27";
-+ gpio = <&gpio1 8 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_28 {
-+ gpio-name = "P2_28";
-+ gpio = <&gpio3 20 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_29 {
-+ gpio-name = "P2_29";
-+ gpio = <&gpio0 7 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_30 {
-+ gpio-name = "P2_30";
-+ gpio = <&gpio3 17 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_31 {
-+ gpio-name = "P2_31";
-+ gpio = <&gpio0 19 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_32 {
-+ gpio-name = "P2_32";
-+ gpio = <&gpio3 16 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_33 {
-+ gpio-name = "P2_33";
-+ gpio = <&gpio1 13 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_34 {
-+ gpio-name = "P2_34";
-+ gpio = <&gpio3 19 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ P2_35 {
-+ gpio-name = "P2_35";
-+ gpio = <&gpio2 22 0>;
-+ input;
-+ dir-changeable;
-+ };
-+
-+ };
-+};
---
-2.20.1
-
diff --git a/patches/soc/ti/pocketbeagle/0002-am335x-pocketbeagle.dts-microSD-mcasp0_aclkr.mmc0_sd.patch b/patches/soc/ti/pocketbeagle/0002-am335x-pocketbeagle.dts-microSD-mcasp0_aclkr.mmc0_sd.patch
deleted file mode 100644
index 3118f5cf3..000000000
--- a/patches/soc/ti/pocketbeagle/0002-am335x-pocketbeagle.dts-microSD-mcasp0_aclkr.mmc0_sd.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From ada22f105592794ab69dc899293d5d6e8d30276c Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 18 Jun 2018 16:22:29 -0500
-Subject: [PATCH 2/2] am335x-pocketbeagle.dts: microSD: mcasp0_aclkr.mmc0_sdwp
- isnt utilized
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-pocketbeagle.dts | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-index 8f4163cc1a07..9f4142c21ec6 100644
---- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
-+++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-@@ -88,7 +88,6 @@
- AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
- AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
- AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
-- AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
- >;
- };
-
---
-2.20.1
-
diff --git a/patches/soc/ti/uboot/0001-add-am335x-boneblack-uboot.dts.patch b/patches/soc/ti/uboot/0001-add-am335x-boneblack-uboot.dts.patch
deleted file mode 100644
index 110c44373..000000000
--- a/patches/soc/ti/uboot/0001-add-am335x-boneblack-uboot.dts.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 83bd5aa634cb5ee51e9b7d21e7aaa7e57d81d765 Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Wed, 20 Sep 2017 11:40:43 -0500
-Subject: [PATCH 1/2] add: am335x-boneblack-uboot.dts
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/am335x-boneblack-uboot.dts | 37 ++++++++++++++++++++
- 1 file changed, 37 insertions(+)
- create mode 100644 arch/arm/boot/dts/am335x-boneblack-uboot.dts
-
-diff --git a/arch/arm/boot/dts/am335x-boneblack-uboot.dts b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
-new file mode 100644
-index 000000000000..738fa396855b
---- /dev/null
-+++ b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
-@@ -0,0 +1,37 @@
-+/*
-+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+/dts-v1/;
-+
-+#include "am33xx.dtsi"
-+#include "am335x-bone-common.dtsi"
-+
-+/ {
-+ model = "TI AM335x BeagleBone Black";
-+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
-+};
-+
-+&cpu0_opp_table {
-+ /*
-+ * All PG 2.0 silicon may not support 1GHz but some of the early
-+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
-+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
-+ */
-+ oppnitro-1000000000 {
-+ opp-supported-hw = <0x06 0x0100>;
-+ };
-+};
-+
-+&ldo3_reg {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
-+ regulator-always-on;
-+};
-+
-+&mmc1 {
-+ vmmc-supply = <&vmmcsd_fixed>;
-+};
---
-2.20.1
-
diff --git a/tools/host_det.sh b/tools/host_det.sh
index 882482fd7..66e011315 100755
--- a/tools/host_det.sh
+++ b/tools/host_det.sh
@@ -39,7 +39,7 @@ check_rpm () {
}
redhat_reqs () {
- pkgtool="yum"
+ pkgtool="dnf"
#https://fedoraproject.org/wiki/Releases
unset rpm_pkgs
@@ -53,14 +53,32 @@ redhat_reqs () {
check_rpm
pkg="wget"
check_rpm
+ pkg="fakeroot"
+ check_rpm
+ pkg="xz"
+ check_rpm
+ pkg="lzop"
+ check_rpm
+ pkg="bison"
+ check_rpm
+ pkg="flex"
+ check_rpm
+ pkg="uboot-tools"
+ check_rpm
+ pkg="openssl-devel"
+ check_rpm
arch=$(uname -m)
if [ "x${arch}" = "xx86_64" ] ; then
pkg="ncurses-devel.x86_64"
check_rpm
+ pkg="libmpc-devel.x86_64"
+ check_rpm
if [ "x${ignore_32bit}" = "xfalse" ] ; then
pkg="ncurses-devel.i686"
check_rpm
+ pkg="libmpc-devel.i686"
+ check_rpm
pkg="libstdc++.i686"
check_rpm
pkg="zlib.i686"
@@ -68,17 +86,6 @@ redhat_reqs () {
fi
fi
- if [ "$(which lsb_release)" ] ; then
- rpm_distro=$(lsb_release -rs)
- echo "RPM distro version: [${rpm_distro}]"
-
- case "${rpm_distro}" in
- 22|23|24|25)
- pkgtool="dnf"
- ;;
- esac
- fi
-
if [ "${rpm_pkgs}" ] ; then
echo "Red Hat, or derivatives: missing dependencies, please install:"
echo "-----------------------------"
@@ -429,9 +436,11 @@ debian_regs () {
warn_eol_distro=1
stop_pkg_search=1
;;
- bionic|cosmic)
+ bionic|cosmic|disco|eoan)
#18.04 bionic: (EOL: April 2023) lts: bionic -> xyz
#18.10 cosmic: (EOL: July 2019)
+ #19.04 disco: (EOL: )
+ #19.10 eoan: (EOL: )
unset warn_eol_distro
;;
yakkety|zesty|artful)
@@ -445,18 +454,7 @@ debian_regs () {
#16.04 xenial: (EOL: April 2021) lts: xenial -> bionic
unset warn_eol_distro
;;
- utopic|vivid|wily)
- #14.10 utopic: (EOL: July 23, 2015)
- #15.04 vivid: (EOL: February 4, 2016)
- #15.10 wily: (EOL: July 28, 2016)
- warn_eol_distro=1
- stop_pkg_search=1
- ;;
- trusty)
- #14.04 trusty: (EOL: April 2019) lts: trusty -> xenial
- unset warn_eol_distro
- ;;
- hardy|lucid|maverick|natty|oneiric|precise|quantal|raring|saucy)
+ hardy|lucid|maverick|natty|oneiric|precise|quantal|raring|saucy|trusty|utopic|vivid|wily)
#8.04 hardy: (EOL: May 2013) lts: hardy -> lucid
#10.04 lucid: (EOL: April 2015) lts: lucid -> precise
#10.10 maverick: (EOL: April 10, 2012)
@@ -466,6 +464,10 @@ debian_regs () {
#12.10 quantal: (EOL: May 16, 2014)
#13.04 raring: (EOL: January 27, 2014)
#13.10 saucy: (EOL: July 17, 2014)
+ #14.04 trusty: (EOL: April 25, 2019) lts: trusty -> xenial
+ #14.10 utopic: (EOL: July 23, 2015)
+ #15.04 vivid: (EOL: February 4, 2016)
+ #15.10 wily: (EOL: July 28, 2016)
warn_eol_distro=1
stop_pkg_search=1
;;
diff --git a/version.sh b/version.sh
index e4e1274f6..f223d5ec6 100644
--- a/version.sh
+++ b/version.sh
@@ -32,7 +32,7 @@ toolchain="gcc_arm_gnueabihf_8"
#Kernel
KERNEL_REL=5.1
-KERNEL_TAG=${KERNEL_REL}-rc7
+KERNEL_TAG=${KERNEL_REL}
kernel_rt=".X-rtY"
#Kernel Build
BUILD=${build_prefix}1
--
GitLab