From 96dd437297bb336f19d6d6db0b060793e83f032c Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 2 Jun 2015 13:18:16 -0500
Subject: [PATCH] add: CONFIG_BEAGLEBONE_PINMUX_HELPER & CONFIG_GPIO_OF_HELPER
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
patch.sh | 26 +
.../0001-BeagleBone-pinmux-helper.patch | 205 +++
...Add-runtime-configuration-capability.patch | 175 +++
...inmux-helper-Switch-to-using-kmalloc.patch | 68 +
.../0004-gpio-Introduce-GPIO-OF-helper.patch | 474 ++++++
...hangeable-property-to-gpio-of-helper.patch | 26 +
.../0006-am33xx.dtsi-add-ocp-label.patch | 26 +
...lebone-added-expansion-header-to-dtb.patch | 1351 +++++++++++++++++
...er-Add-support-for-mode-device-tree-.patch | 117 ++
...helper-add-P8_37_pinmux-P8_38_pinmux.patch | 82 +
.../0010-pinmux-helper-hdmi.patch | 858 +++++++++++
.../0011-pinmux-helper-can1.patch | 27 +
...PERIMENTAL-dependency-on-CONFIG_GPIO.patch | 32 +
...helper-add-P9_19_pinmux-P9_20_pinmux.patch | 111 ++
.../0014-gpio-of-helper-idr_alloc.patch | 76 +
patches/defconfig | 2 +
patches/ref_omap2plus_defconfig | 2 +
version.sh | 2 +-
18 files changed, 3659 insertions(+), 1 deletion(-)
create mode 100644 patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch
create mode 100644 patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch
create mode 100644 patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch
create mode 100644 patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch
create mode 100644 patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
create mode 100644 patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch
create mode 100644 patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch
create mode 100644 patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
create mode 100644 patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
create mode 100644 patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch
create mode 100644 patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch
create mode 100644 patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
create mode 100644 patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
create mode 100644 patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch
diff --git a/patch.sh b/patch.sh
index 0df4cd0e6..e9bdf92a5 100644
--- a/patch.sh
+++ b/patch.sh
@@ -256,6 +256,32 @@ beaglebone () {
cleanup
fi
+ echo "dir: beaglebone/pinmux-helper"
+ #regenerate="enable"
+ if [ "x${regenerate}" = "xenable" ] ; then
+ start_cleanup
+ fi
+
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch"
+ ${git} "${DIR}/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch"
+
+ if [ "x${regenerate}" = "xenable" ] ; then
+ number=14
+ cleanup
+ fi
+
#This has to be last...
echo "dir: beaglebone/dtbs"
#regenerate="enable"
diff --git a/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch b/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch
new file mode 100644
index 000000000..39e64a137
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch
@@ -0,0 +1,205 @@
+From 86e46b765424456527a68ab540087c92f8684984 Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Fri, 28 Dec 2012 20:56:48 +0200
+Subject: [PATCH 01/13] BeagleBone pinmux helper
+
+This patch was derived from 2 commits, but I removed the non-pinmux-helper portions
+and added the helper to the bb.org_defconfig:
+
+capemgr: Capemgr makefiles and Kconfig fragments.
+
+Introduce a cape loader using DT overlays and dynamic
+DT objects.
+
+Makefile and Kconfig fragments.
+
+Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
+
+Conflicts:
+ arch/arm/mach-omap2/Kconfig
+ drivers/misc/Kconfig
+ drivers/misc/Makefile
+
+And:
+
+Pinmux helper driver.
+
+ That's just a hack to get a pinmux helper driver working.
+
+ Define in the DT
+
+ helper {
+ compatible = "bone-pinmux-helper";
+ pinctrl-names = "default";
+ pinctrl-0 = <&helper_pins>;
+ status = "okay";
+ };
+---
+ drivers/misc/Kconfig | 1 +
+ drivers/misc/Makefile | 1 +
+ drivers/misc/cape/Kconfig | 5 ++
+ drivers/misc/cape/Makefile | 5 ++
+ drivers/misc/cape/beaglebone/Kconfig | 10 ++++
+ drivers/misc/cape/beaglebone/Makefile | 5 ++
+ drivers/misc/cape/beaglebone/bone-pinmux-helper.c | 72 +++++++++++++++++++++++
+ 7 files changed, 99 insertions(+)
+ create mode 100644 drivers/misc/cape/Kconfig
+ create mode 100644 drivers/misc/cape/Makefile
+ create mode 100644 drivers/misc/cape/beaglebone/Kconfig
+ create mode 100644 drivers/misc/cape/beaglebone/Makefile
+ create mode 100644 drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 85a5cf2..49381a8 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -535,6 +535,7 @@ source "drivers/misc/vmw_vmci/Kconfig"
+ source "drivers/misc/mic/Kconfig"
+ source "drivers/misc/cape_bone_argus/Kconfig"
+ source "drivers/misc/genwqe/Kconfig"
++source "drivers/misc/cape/Kconfig"
+ source "drivers/misc/echo/Kconfig"
+ source "drivers/misc/cxl/Kconfig"
+ endmenu
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index 475df8a..bef8bf4 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -54,6 +54,7 @@ obj-$(CONFIG_SRAM) += sram.o
+ obj-y += mic/
+ obj-y += cape_bone_argus/
+ obj-$(CONFIG_GENWQE) += genwqe/
++obj-y += cape/
+ obj-$(CONFIG_ECHO) += echo/
+ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
+ obj-$(CONFIG_CXL_BASE) += cxl/
+diff --git a/drivers/misc/cape/Kconfig b/drivers/misc/cape/Kconfig
+new file mode 100644
+index 0000000..a2ef85e
+--- /dev/null
++++ b/drivers/misc/cape/Kconfig
+@@ -0,0 +1,5 @@
++#
++# Capes
++#
++
++source "drivers/misc/cape/beaglebone/Kconfig"
+diff --git a/drivers/misc/cape/Makefile b/drivers/misc/cape/Makefile
+new file mode 100644
+index 0000000..7c4eb96
+--- /dev/null
++++ b/drivers/misc/cape/Makefile
+@@ -0,0 +1,5 @@
++#
++# Makefile for cape like devices
++#
++
++obj-y += beaglebone/
+diff --git a/drivers/misc/cape/beaglebone/Kconfig b/drivers/misc/cape/beaglebone/Kconfig
+new file mode 100644
+index 0000000..eeb6782
+--- /dev/null
++++ b/drivers/misc/cape/beaglebone/Kconfig
+@@ -0,0 +1,10 @@
++#
++# Beaglebone capes
++#
++
++config BEAGLEBONE_PINMUX_HELPER
++ tristate "Beaglebone Pinmux Helper"
++ depends on ARCH_OMAP2PLUS && OF
++ default n
++ help
++ Say Y here to include support for the pinmux helper
+diff --git a/drivers/misc/cape/beaglebone/Makefile b/drivers/misc/cape/beaglebone/Makefile
+new file mode 100644
+index 0000000..7f4617a
+--- /dev/null
++++ b/drivers/misc/cape/beaglebone/Makefile
+@@ -0,0 +1,5 @@
++#
++# Makefile for beaglebone capes
++#
++
++obj-$(CONFIG_BEAGLEBONE_PINMUX_HELPER) += bone-pinmux-helper.o
+diff --git a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+new file mode 100644
+index 0000000..ba3922d
+--- /dev/null
++++ b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+@@ -0,0 +1,72 @@
++/*
++ * Pinmux helper driver
++ *
++ * Copyright (C) 2013 Pantelis Antoniou <panto@antoniou-consulting.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/of_gpio.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/consumer.h>
++
++static const struct of_device_id bone_pinmux_helper_of_match[] = {
++ {
++ .compatible = "bone-pinmux-helper",
++ },
++ { },
++};
++MODULE_DEVICE_TABLE(of, bone_pinmux_helper_of_match);
++
++static int bone_pinmux_helper_probe(struct platform_device *pdev)
++{
++ struct pinctrl *pinctrl;
++
++ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
++
++ /* don't bother with anything */
++ return PTR_RET(pinctrl);
++}
++
++static int bone_pinmux_helper_remove(struct platform_device *pdev)
++{
++ /* nothing more is needed */
++ return 0;
++}
++
++struct platform_driver bone_pinmux_helper_driver = {
++ .probe = bone_pinmux_helper_probe,
++ .remove = bone_pinmux_helper_remove,
++ .driver = {
++ .name = "bone-pinmux-helper",
++ .owner = THIS_MODULE,
++ .of_match_table = bone_pinmux_helper_of_match,
++ },
++};
++
++module_platform_driver(bone_pinmux_helper_driver);
++
++MODULE_AUTHOR("Pantelis Antoniou");
++MODULE_DESCRIPTION("Beaglebone pinmux helper driver");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("platform:bone-pinmux-helper");
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch b/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch
new file mode 100644
index 000000000..14e3712f2
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch
@@ -0,0 +1,175 @@
+From f6febc6d21143b7cd0d1d30b710ec1fe1f41a8bf Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Wed, 6 Mar 2013 19:37:53 +0200
+Subject: [PATCH 02/13] pinmux-helper: Add runtime configuration capability
+
+Pinctrl already supports multiple states. Just make them visible.
+---
+ drivers/misc/cape/beaglebone/bone-pinmux-helper.c | 143 +++++++++++++++++++++-
+ 1 file changed, 138 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+index ba3922d..84058e1 100644
+--- a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
++++ b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+@@ -38,19 +38,152 @@ static const struct of_device_id bone_pinmux_helper_of_match[] = {
+ };
+ MODULE_DEVICE_TABLE(of, bone_pinmux_helper_of_match);
+
++struct pinmux_helper_data {
++ struct pinctrl *pinctrl;
++ char *selected_state_name;
++};
++
++static ssize_t pinmux_helper_show_state(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
++ const char *name;
++ int len;
++
++ name = data->selected_state_name;
++ if (name == NULL || strlen(name) == 0)
++ name = "none";
++ return sprintf(buf, "%s\n", name);
++}
++
++static ssize_t pinmux_helper_store_state(struct device *dev,
++ struct device_attribute *attr, const char *buf, size_t count)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
++ struct pinctrl_state *state;
++ char *state_name;
++ char *s;
++ int err;
++
++ /* duplicate (as a null terminated string) */
++ state_name = devm_kzalloc(dev, count + 1, GFP_KERNEL);
++ if (state_name == NULL)
++ return -ENOMEM;
++ memcpy(state_name, buf, count);
++ state_name[count] = '\0';
++
++ /* and chop off newline */
++ s = strchr(state_name, '\n');
++ if (s != NULL)
++ *s = '\0';
++
++ /* try to select default state at first (if it exists) */
++ state = pinctrl_lookup_state(data->pinctrl, state_name);
++ if (!IS_ERR(state)) {
++ err = pinctrl_select_state(data->pinctrl, state);
++ if (err != 0)
++ dev_err(dev, "Failed to select state %s\n",
++ state_name);
++ } else {
++ dev_err(dev, "Failed to find state %s\n", state_name);
++ err = PTR_RET(state);
++ }
++
++ if (err == 0) {
++ devm_kfree(dev, data->selected_state_name);
++ data->selected_state_name = state_name;
++ }
++
++ return err ? err : count;
++}
++
++static DEVICE_ATTR(state, S_IWUSR | S_IRUGO,
++ pinmux_helper_show_state, pinmux_helper_store_state);
++
++static struct attribute *pinmux_helper_attributes[] = {
++ &dev_attr_state.attr,
++ NULL
++};
++
++static const struct attribute_group pinmux_helper_attr_group = {
++ .attrs = pinmux_helper_attributes,
++};
++
+ static int bone_pinmux_helper_probe(struct platform_device *pdev)
+ {
+- struct pinctrl *pinctrl;
++ struct device *dev = &pdev->dev;
++ struct pinmux_helper_data *data;
++ struct pinctrl_state *state;
++ char *state_name;
++ int err;
++
++ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
++ if (data == NULL) {
++ dev_err(dev, "Failed to allocate data\n");
++ err = -ENOMEM;
++ goto err_no_mem;
++ }
++ state_name = devm_kzalloc(dev, strlen(PINCTRL_STATE_DEFAULT) + 1,
++ GFP_KERNEL);
++ if (state_name == NULL) {
++ dev_err(dev, "Failed to allocate state name\n");
++ err = -ENOMEM;
++ goto err_no_mem;
++ }
++ data->selected_state_name = state_name;
++ strcpy(data->selected_state_name, PINCTRL_STATE_DEFAULT);
+
+- pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
++ platform_set_drvdata(pdev, data);
+
+- /* don't bother with anything */
+- return PTR_RET(pinctrl);
++ data->pinctrl = devm_pinctrl_get(dev);
++ if (IS_ERR(data->pinctrl)) {
++ dev_err(dev, "Failed to get pinctrl\n");
++ err = PTR_RET(data->pinctrl);
++ goto err_no_pinctrl;
++ }
++
++ /* try to select default state at first (if it exists) */
++ state = pinctrl_lookup_state(data->pinctrl,
++ data->selected_state_name);
++ if (!IS_ERR(state)) {
++ err = pinctrl_select_state(data->pinctrl, state);
++ if (err != 0) {
++ dev_err(dev, "Failed to select default state\n");
++ goto err_no_state;
++ }
++ } else {
++ data->selected_state_name = '\0';
++ }
++
++ /* Register sysfs hooks */
++ err = sysfs_create_group(&dev->kobj, &pinmux_helper_attr_group);
++ if (err) {
++ dev_err(dev, "Failed to create sysfs group\n");
++ goto err_no_sysfs;
++ }
++
++ return 0;
++
++err_no_sysfs:
++err_no_state:
++ devm_pinctrl_put(data->pinctrl);
++err_no_pinctrl:
++ devm_kfree(dev, data);
++err_no_mem:
++ return err;
+ }
+
+ static int bone_pinmux_helper_remove(struct platform_device *pdev)
+ {
+- /* nothing more is needed */
++ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
++ struct device *dev = &pdev->dev;
++
++ sysfs_remove_group(&dev->kobj, &pinmux_helper_attr_group);
++ devm_pinctrl_put(data->pinctrl);
++ devm_kfree(dev, data);
++
+ return 0;
+ }
+
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch b/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch
new file mode 100644
index 000000000..2a1f5b73f
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch
@@ -0,0 +1,68 @@
+From 2cdb42d1b22ea345b515b9305fb5f3fef5b5393a Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Thu, 7 Mar 2013 09:54:38 +0200
+Subject: [PATCH 03/13] pinmux-helper: Switch to using kmalloc
+
+devm_kfree warned out... why? no idea.
+---
+ drivers/misc/cape/beaglebone/bone-pinmux-helper.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+index 84058e1..5074365 100644
+--- a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
++++ b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+@@ -26,6 +26,7 @@
+ #include <linux/of.h>
+ #include <linux/of_device.h>
+ #include <linux/of_gpio.h>
++#include <linux/slab.h>
+ #include <linux/pinctrl/pinctrl.h>
+ #include <linux/pinctrl/pinmux.h>
+ #include <linux/pinctrl/consumer.h>
+@@ -49,7 +50,6 @@ static ssize_t pinmux_helper_show_state(struct device *dev,
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ const char *name;
+- int len;
+
+ name = data->selected_state_name;
+ if (name == NULL || strlen(name) == 0)
+@@ -68,7 +68,7 @@ static ssize_t pinmux_helper_store_state(struct device *dev,
+ int err;
+
+ /* duplicate (as a null terminated string) */
+- state_name = devm_kzalloc(dev, count + 1, GFP_KERNEL);
++ state_name = kmalloc(count + 1, GFP_KERNEL);
+ if (state_name == NULL)
+ return -ENOMEM;
+ memcpy(state_name, buf, count);
+@@ -92,7 +92,7 @@ static ssize_t pinmux_helper_store_state(struct device *dev,
+ }
+
+ if (err == 0) {
+- devm_kfree(dev, data->selected_state_name);
++ kfree(data->selected_state_name);
+ data->selected_state_name = state_name;
+ }
+
+@@ -125,7 +125,7 @@ static int bone_pinmux_helper_probe(struct platform_device *pdev)
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+- state_name = devm_kzalloc(dev, strlen(PINCTRL_STATE_DEFAULT) + 1,
++ state_name = kmalloc(strlen(PINCTRL_STATE_DEFAULT) + 1,
+ GFP_KERNEL);
+ if (state_name == NULL) {
+ dev_err(dev, "Failed to allocate state name\n");
+@@ -181,6 +181,7 @@ static int bone_pinmux_helper_remove(struct platform_device *pdev)
+ struct device *dev = &pdev->dev;
+
+ sysfs_remove_group(&dev->kobj, &pinmux_helper_attr_group);
++ kfree(data->selected_state_name);
+ devm_pinctrl_put(data->pinctrl);
+ devm_kfree(dev, data);
+
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch b/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch
new file mode 100644
index 000000000..d51dfa3c6
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch
@@ -0,0 +1,474 @@
+From 26e5a4e7da7ee4906ffca50b01fe9d4221757079 Mon Sep 17 00:00:00 2001
+From: Pantelis Antoniou <panto@antoniou-consulting.com>
+Date: Tue, 4 Jun 2013 16:23:59 +0300
+Subject: [PATCH 04/13] gpio: Introduce GPIO OF helper
+
+A gpio OF helper driver that allows configuration to be done via
+DT.
+---
+ drivers/gpio/Kconfig | 14 ++
+ drivers/gpio/Makefile | 1 +
+ drivers/gpio/gpio-of-helper.c | 414 ++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 429 insertions(+)
+ create mode 100644 drivers/gpio/gpio-of-helper.c
+
+diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
+index caefe80..9cab8f6 100644
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -85,6 +85,20 @@ config GPIO_SYSFS
+ Kernel drivers may also request that a particular GPIO be
+ exported to userspace; this can be useful when debugging.
+
++config GPIO_OF_HELPER
++ bool "GPIO OF helper device"
++ depends on OF_GPIO && EXPERIMENTAL
++ help
++ Say Y here to add an GPIO OF helper driver
++
++ Allows you specify a GPIO helper based on OF
++ which allows simple export of GPIO functionality
++ in user-space.
++
++ Features include, value set/get, direction control,
++ interrupt/value change poll support, event counting
++ and others.
++
+ config GPIO_GENERIC
+ tristate
+
+diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
+index f71bb97..a527a82 100644
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -8,6 +8,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
+ obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
+ obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
+ obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
++obj-$(CONFIG_GPIO_OF_HELPER) += gpio-of-helper.o
+
+ # Device drivers. Generally keep list sorted alphabetically
+ obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
+diff --git a/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
+new file mode 100644
+index 0000000..16a607f
+--- /dev/null
++++ b/drivers/gpio/gpio-of-helper.c
+@@ -0,0 +1,414 @@
++/*
++ * GPIO OF based helper
++ *
++ * A simple DT based driver to provide access to GPIO functionality
++ * to user-space via sysfs.
++ *
++ * Copyright (C) 2013 Pantelis Antoniou <panto@antoniou-consulting.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/timer.h>
++#include <linux/errno.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/bitops.h>
++#include <linux/err.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/of_gpio.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/consumer.h>
++#include <linux/atomic.h>
++#include <linux/clk.h>
++#include <linux/interrupt.h>
++#include <linux/math64.h>
++#include <linux/atomic.h>
++#include <linux/idr.h>
++
++/* fwd decl. */
++struct gpio_of_helper_info;
++
++enum gpio_type {
++ GPIO_TYPE_INPUT = 0,
++ GPIO_TYPE_OUTPUT = 1,
++};
++
++struct gpio_of_entry {
++ int id;
++ struct gpio_of_helper_info *info;
++ struct device_node *node;
++ enum gpio_type type;
++ int gpio;
++ enum of_gpio_flags gpio_flags;
++ int irq;
++ const char *name;
++ atomic64_t counter;
++ unsigned int count_flags;
++#define COUNT_RISING_EDGE (1 << 0)
++#define COUNT_FALLING_EDGE (1 << 1)
++};
++
++struct gpio_of_helper_info {
++ struct platform_device *pdev;
++ struct idr idr;
++};
++
++static const struct of_device_id gpio_of_helper_of_match[] = {
++ {
++ .compatible = "gpio-of-helper",
++ },
++ { },
++};
++MODULE_DEVICE_TABLE(of, gpio_of_helper_of_match);
++
++static ssize_t gpio_of_helper_show_status(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct gpio_of_helper_info *info = platform_get_drvdata(pdev);
++ struct gpio_of_entry *entry;
++ char *p, *e;
++ int id, n;
++
++ p = buf;
++ e = p + PAGE_SIZE;
++ n = 0;
++ idr_for_each_entry(&info->idr, entry, id) {
++ switch (entry->type) {
++ case GPIO_TYPE_INPUT:
++ n = snprintf(p, e - p, "%2d %-24s %3d %-3s %llu\n",
++ entry->id, entry->name, entry->gpio, "IN",
++ (unsigned long long)
++ atomic64_read(&entry->counter));
++ break;
++ case GPIO_TYPE_OUTPUT:
++ n = snprintf(p, e - p, "%2d %-24s %3d %-3s\n",
++ entry->id, entry->name, entry->gpio, "OUT");
++ break;
++ }
++ p += n;
++ }
++
++ return p - buf;
++}
++
++static DEVICE_ATTR(status, S_IRUGO,
++ gpio_of_helper_show_status, NULL);
++
++static irqreturn_t gpio_of_helper_handler(int irq, void *ptr)
++{
++ struct gpio_of_entry *entry = ptr;
++
++ /* caution - low speed interfaces only! */
++ atomic64_inc(&entry->counter);
++
++ return IRQ_HANDLED;
++}
++
++static struct gpio_of_entry *
++gpio_of_entry_create(struct gpio_of_helper_info *info,
++ struct device_node *node)
++{
++ struct platform_device *pdev = info->pdev;
++ struct device *dev = &pdev->dev;
++ struct gpio_of_entry *entry;
++ int err, gpio, irq;
++ unsigned int req_flags, count_flags, irq_flags;
++ enum gpio_type type;
++ enum of_gpio_flags gpio_flags;
++ const char *name;
++
++ /* get the type of the node first */
++ if (of_property_read_bool(node, "input"))
++ type = GPIO_TYPE_INPUT;
++ else if (of_property_read_bool(node, "output"))
++ type = GPIO_TYPE_OUTPUT;
++ else {
++ dev_err(dev, "Not valid gpio node type\n");
++ err = -EINVAL;
++ goto err_bad_node;
++ }
++
++ /* get the name */
++ err = of_property_read_string(node, "gpio-name", &name);
++ if (err != 0) {
++ dev_err(dev, "Failed to get name property\n");
++ goto err_bad_node;
++ }
++
++ err = of_get_named_gpio_flags(node, "gpio", 0, &gpio_flags);
++ if (IS_ERR_VALUE(err)) {
++ dev_err(dev, "Failed to get gpio property of '%s'\n", name);
++ goto err_bad_node;
++ }
++ gpio = err;
++
++ req_flags = 0;
++ count_flags = 0;
++
++ /* set the request flags */
++ switch (type) {
++ case GPIO_TYPE_INPUT:
++ req_flags = GPIOF_DIR_IN | GPIOF_EXPORT;
++ if (of_property_read_bool(node, "count-falling-edge"))
++ count_flags |= COUNT_FALLING_EDGE;
++ if (of_property_read_bool(node, "count-rising-edge"))
++ count_flags |= COUNT_RISING_EDGE;
++ break;
++ case GPIO_TYPE_OUTPUT:
++ req_flags = GPIOF_DIR_OUT | GPIOF_EXPORT;
++ if (of_property_read_bool(node, "init-high"))
++ req_flags |= GPIOF_OUT_INIT_HIGH;
++ else if (of_property_read_bool(node, "init-low"))
++ req_flags |= GPIOF_OUT_INIT_LOW;
++ break;
++ }
++
++ /* request the gpio */
++ err = devm_gpio_request_one(dev, gpio, req_flags, name);
++ if (err != 0) {
++ dev_err(dev, "Failed to request gpio '%s'\n", name);
++ goto err_bad_node;
++ }
++
++ irq = -1;
++ irq_flags = 0;
++
++ /* counter mode requested - need an interrupt */
++ if (count_flags != 0) {
++ irq = gpio_to_irq(gpio);
++ if (IS_ERR_VALUE(irq)) {
++ dev_err(dev, "Failed to request gpio '%s'\n", name);
++ goto err_bad_node;
++ }
++
++ if (count_flags & COUNT_RISING_EDGE)
++ irq_flags |= IRQF_TRIGGER_RISING;
++ if (count_flags & COUNT_FALLING_EDGE)
++ irq_flags |= IRQF_TRIGGER_FALLING;
++ }
++
++ if (!idr_pre_get(&info->idr, GFP_KERNEL)) {
++ dev_err(dev, "Failed on idr_pre_get of '%s'\n", name);
++ err = -ENOMEM;
++ goto err_no_mem;
++ }
++
++ entry = devm_kzalloc(dev, sizeof(*entry), GFP_KERNEL);
++ if (entry == NULL) {
++ dev_err(dev, "Failed to allocate gpio entry of '%s'\n", name);
++ err = -ENOMEM;
++ goto err_no_mem;
++ }
++
++ entry->id = -1;
++ entry->info = info;
++ entry->node = of_node_get(node); /* get node reference */
++ entry->type = type;
++ entry->gpio = gpio;
++ entry->gpio_flags = gpio_flags;
++ entry->irq = irq;
++ entry->name = name;
++
++ /* interrupt enable is last thing done */
++ if (irq >= 0) {
++ atomic64_set(&entry->counter, 0);
++ entry->count_flags = count_flags;
++ err = devm_request_irq(dev, irq, gpio_of_helper_handler,
++ irq_flags, name, entry);
++ if (err != 0) {
++ dev_err(dev, "Failed to request irq of '%s'\n", name);
++ goto err_no_irq;
++ }
++ }
++
++ /* all done; insert */
++ err = idr_get_new(&info->idr, entry, &entry->id);
++ if (IS_ERR_VALUE(err)) {
++ dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
++ goto err_fail_idr;
++ }
++
++ dev_info(dev, "Allocated GPIO id=%d\n", entry->id);
++
++ return entry;
++
++err_fail_idr:
++ /* nothing to do */
++err_no_irq:
++ /* release node ref */
++ of_node_put(node);
++ /* nothing else needs to be done, devres handles it */
++err_no_mem:
++err_bad_node:
++ return ERR_PTR(err);
++}
++
++static int gpio_of_entry_destroy(struct gpio_of_entry *entry)
++{
++ struct gpio_of_helper_info *info = entry->info;
++ struct platform_device *pdev = info->pdev;
++ struct device *dev = &pdev->dev;
++
++ dev_info(dev, "Destroying GPIO id=%d\n", entry->id);
++
++ /* remove from the IDR */
++ idr_remove(&info->idr, entry->id);
++
++ /* remove node ref */
++ of_node_put(entry->node);
++
++ /* free gpio */
++ devm_gpio_free(dev, entry->gpio);
++
++ /* gree irq */
++ if (entry->irq >= 0)
++ devm_free_irq(dev, entry->irq, entry);
++
++ /* and free */
++ devm_kfree(dev, entry);
++
++ return 0;
++}
++
++static int gpio_of_helper_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct gpio_of_helper_info *info;
++ struct gpio_of_entry *entry;
++ struct device_node *pnode = pdev->dev.of_node;
++ struct device_node *cnode;
++ struct pinctrl *pinctrl;
++ int err;
++
++ /* we only support OF */
++ if (pnode == NULL) {
++ dev_err(&pdev->dev, "No platform of_node!\n");
++ return -ENODEV;
++ }
++
++ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
++ if (IS_ERR(pinctrl)) {
++ /* special handling for probe defer */
++ if (PTR_ERR(pinctrl) == -EPROBE_DEFER)
++ return -EPROBE_DEFER;
++
++ dev_warn(&pdev->dev,
++ "pins are not configured from the driver\n");
++ }
++
++ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
++ if (info == NULL) {
++ dev_err(&pdev->dev, "Failed to allocate info\n");
++ err = -ENOMEM;
++ goto err_no_mem;
++ }
++ platform_set_drvdata(pdev, info);
++ info->pdev = pdev;
++
++ idr_init(&info->idr);
++
++ err = device_create_file(dev, &dev_attr_status);
++ if (err != 0) {
++ dev_err(dev, "Failed to create status sysfs attribute\n");
++ goto err_no_sysfs;
++ }
++
++ for_each_child_of_node(pnode, cnode) {
++
++ entry = gpio_of_entry_create(info, cnode);
++ if (IS_ERR_OR_NULL(entry)) {
++ dev_err(dev, "Failed to create gpio entry\n");
++ err = PTR_ERR(entry);
++ goto err_fail_entry;
++ }
++ }
++
++ dev_info(&pdev->dev, "ready\n");
++
++ return 0;
++err_fail_entry:
++ device_remove_file(&pdev->dev, &dev_attr_status);
++err_no_sysfs:
++err_no_mem:
++ return err;
++}
++
++static int gpio_of_helper_remove(struct platform_device *pdev)
++{
++ struct gpio_of_helper_info *info = platform_get_drvdata(pdev);
++ struct gpio_of_entry *entry;
++ int id;
++
++ dev_info(&pdev->dev, "removing\n");
++
++ device_remove_file(&pdev->dev, &dev_attr_status);
++
++ id = 0;
++ idr_for_each_entry(&info->idr, entry, id) {
++ /* destroy each and every one */
++ gpio_of_entry_destroy(entry);
++ }
++
++ return 0;
++}
++
++#ifdef CONFIG_PM
++#ifdef CONFIG_PM_RUNTIME
++static int gpio_of_helper_runtime_suspend(struct device *dev)
++{
++ /* place holder */
++ return 0;
++}
++
++static int gpio_of_helper_runtime_resume(struct device *dev)
++{
++ /* place holder */
++ return 0;
++}
++#endif /* CONFIG_PM_RUNTIME */
++
++static struct dev_pm_ops gpio_of_helper_pm_ops = {
++ SET_RUNTIME_PM_OPS(gpio_of_helper_runtime_suspend,
++ gpio_of_helper_runtime_resume, NULL)
++};
++#define GPIO_OF_HELPER_PM_OPS (&gpio_of_helper_pm_ops)
++#else
++#define GPIO_OF_HELPER_PM_OPS NULL
++#endif /* CONFIG_PM */
++
++struct platform_driver gpio_of_helper_driver = {
++ .probe = gpio_of_helper_probe,
++ .remove = gpio_of_helper_remove,
++ .driver = {
++ .name = "gpio-of-helper",
++ .owner = THIS_MODULE,
++ .pm = GPIO_OF_HELPER_PM_OPS,
++ .of_match_table = gpio_of_helper_of_match,
++ },
++};
++
++module_platform_driver(gpio_of_helper_driver);
++
++MODULE_AUTHOR("Pantelis Antoniou <panto@antoniou-consulting.com>");
++MODULE_DESCRIPTION("GPIO OF Helper driver");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("platform:gpio-of-helper");
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch b/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
new file mode 100644
index 000000000..f023f7146
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
@@ -0,0 +1,26 @@
+From acafdaad814acbe53763663ae01b6029c418f25e Mon Sep 17 00:00:00 2001
+From: Charles Steinkuehler <charles@steinkuehler.net>
+Date: Sun, 26 Jan 2014 16:17:09 +0100
+Subject: [PATCH 05/13] Add dir-changeable property to gpio-of-helper
+
+Signed-off-by: Charles Steinkuehler <charles@steinkuehler.net>
+---
+ drivers/gpio/gpio-of-helper.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
+index 16a607f..1c289b2 100644
+--- a/drivers/gpio/gpio-of-helper.c
++++ b/drivers/gpio/gpio-of-helper.c
+@@ -181,6 +181,8 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ req_flags |= GPIOF_OUT_INIT_LOW;
+ break;
+ }
++ if (of_property_read_bool(node, "dir-changeable"))
++ req_flags |= GPIOF_EXPORT_CHANGEABLE;
+
+ /* request the gpio */
+ err = devm_gpio_request_one(dev, gpio, req_flags, name);
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch b/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch
new file mode 100644
index 000000000..823156dc0
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch
@@ -0,0 +1,26 @@
+From c09f160a730c04b910021185336499e1a3e21b38 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jdk@ti.com>
+Date: Thu, 4 Sep 2014 18:45:39 +0000
+Subject: [PATCH 06/13] am33xx.dtsi: add ocp label
+
+Signed-off-by: Jason Kridner <jdk@ti.com>
+---
+ arch/arm/boot/dts/am33xx.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index ebc3168..208bb9b 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -90,7 +90,7 @@
+ * for the moment, just use a fake OCP bus entry to represent
+ * the whole bus hierarchy.
+ */
+- ocp {
++ ocp: ocp {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch b/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch
new file mode 100644
index 000000000..6e04469f2
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch
@@ -0,0 +1,1351 @@
+From d543a5ca914b5c2d196332baf44c46f394278458 Mon Sep 17 00:00:00 2001
+From: Jason Kridner <jdk@ti.com>
+Date: Thu, 4 Sep 2014 18:53:16 +0000
+Subject: [PATCH 07/13] beaglebone: added expansion header to dtb
+
+This adds gpio and pinmux helpers to the majority of available expansion header pins
+based on the cape-universal work from Charles Steinkuehler making them userspace
+configurable. This is not a substitute for Capemgr as it doesn't perform the
+configuration based on cape detection, nor does it enable dynamic configuration of
+all types of peripherals that could be on a cape. It does, however, enable many
+developers to rapidly experiment with a lesser degree of complexity.
+
+Derived from:
+https://github.com/cdsteinkuehler/beaglebone-universal-io/blob/52461b52ef3203e648399c16c7e160c848a04b5c$
+
+Signed-off-by: Jason Kridner <jdk@ti.com>
+Cc: Charles Steinkuehler <charles@steinkuehler.net>
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ .../arm/boot/dts/am335x-bone-common-universal.dtsi | 1319 ++++++++++++++++++++
+ 1 file changed, 1319 insertions(+)
+ create mode 100644 arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+new file mode 100644
+index 0000000..8bddcd2
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+@@ -0,0 +1,1319 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++&am33xx_pinmux {
++ /************************/
++ /* P8 Header */
++ /************************/
++
++ /* P8_01 GND */
++ /* P8_02 GND */
++ /* P8_03 (ZCZ ball R9 ) emmc */
++ /* P8_04 (ZCZ ball T9 ) emmc */
++ /* P8_05 (ZCZ ball R8 ) emmc */
++ /* P8_06 (ZCZ ball T8 ) emmc */
++
++ /* P8_07 (ZCZ ball R7 ) */
++ P8_07_default_pin: pinmux_P8_07_default_pin {
++ pinctrl-single,pins = <0x090 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_07_gpio_pin: pinmux_P8_07_gpio_pin {
++ pinctrl-single,pins = <0x090 0x2F>; }; /* Mode 7, RxActive */
++ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin {
++ pinctrl-single,pins = <0x090 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin {
++ pinctrl-single,pins = <0x090 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_07_timer_pin: pinmux_P8_07_timer_pin {
++ pinctrl-single,pins = <0x090 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++
++ /* P8_08 (ZCZ ball T7 ) */
++ P8_08_default_pin: pinmux_P8_08_default_pin {
++ pinctrl-single,pins = <0x094 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_08_gpio_pin: pinmux_P8_08_gpio_pin {
++ pinctrl-single,pins = <0x094 0x2F>; }; /* Mode 7, RxActive */
++ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin {
++ pinctrl-single,pins = <0x094 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin {
++ pinctrl-single,pins = <0x094 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_08_timer_pin: pinmux_P8_08_timer_pin {
++ pinctrl-single,pins = <0x094 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++
++ /* P8_09 (ZCZ ball T6 ) */
++ P8_09_default_pin: pinmux_P8_09_default_pin {
++ pinctrl-single,pins = <0x09c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_09_gpio_pin: pinmux_P8_09_gpio_pin {
++ pinctrl-single,pins = <0x09c 0x2F>; }; /* Mode 7, RxActive */
++ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin {
++ pinctrl-single,pins = <0x09c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin {
++ pinctrl-single,pins = <0x09c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_09_timer_pin: pinmux_P8_09_timer_pin {
++ pinctrl-single,pins = <0x09c 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++
++ /* P8_10 (ZCZ ball U6 ) */
++ P8_10_default_pin: pinmux_P8_10_default_pin {
++ pinctrl-single,pins = <0x098 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_10_gpio_pin: pinmux_P8_10_gpio_pin {
++ pinctrl-single,pins = <0x098 0x2F>; }; /* Mode 7, RxActive */
++ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin {
++ pinctrl-single,pins = <0x098 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin {
++ pinctrl-single,pins = <0x098 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_10_timer_pin: pinmux_P8_10_timer_pin {
++ pinctrl-single,pins = <0x098 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++
++ /* P8_11 (ZCZ ball R12) */
++ P8_11_default_pin: pinmux_P8_11_default_pin {
++ pinctrl-single,pins = <0x034 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_11_gpio_pin: pinmux_P8_11_gpio_pin {
++ pinctrl-single,pins = <0x034 0x2F>; }; /* Mode 7, RxActive */
++ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin {
++ pinctrl-single,pins = <0x034 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin {
++ pinctrl-single,pins = <0x034 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_11_pruout_pin: pinmux_P8_11_pruout_pin {
++ pinctrl-single,pins = <0x034 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_11_qep_pin: pinmux_P8_11_qep_pin {
++ pinctrl-single,pins = <0x034 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_12 (ZCZ ball T12) */
++ P8_12_default_pin: pinmux_P8_12_default_pin {
++ pinctrl-single,pins = <0x030 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_12_gpio_pin: pinmux_P8_12_gpio_pin {
++ pinctrl-single,pins = <0x030 0x2F>; }; /* Mode 7, RxActive */
++ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin {
++ pinctrl-single,pins = <0x030 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin {
++ pinctrl-single,pins = <0x030 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_12_pruout_pin: pinmux_P8_12_pruout_pin {
++ pinctrl-single,pins = <0x030 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_12_qep_pin: pinmux_P8_12_qep_pin {
++ pinctrl-single,pins = <0x030 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_13 (ZCZ ball T10) */
++ P8_13_default_pin: pinmux_P8_13_default_pin {
++ pinctrl-single,pins = <0x024 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_13_gpio_pin: pinmux_P8_13_gpio_pin {
++ pinctrl-single,pins = <0x024 0x2F>; }; /* Mode 7, RxActive */
++ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin {
++ pinctrl-single,pins = <0x024 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin {
++ pinctrl-single,pins = <0x024 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_13_pwm_pin: pinmux_P8_13_pwm_pin {
++ pinctrl-single,pins = <0x024 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_14 (ZCZ ball T11) */
++ P8_14_default_pin: pinmux_P8_14_default_pin {
++ pinctrl-single,pins = <0x028 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_14_gpio_pin: pinmux_P8_14_gpio_pin {
++ pinctrl-single,pins = <0x028 0x2F>; }; /* Mode 7, RxActive */
++ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin {
++ pinctrl-single,pins = <0x028 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin {
++ pinctrl-single,pins = <0x028 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_14_pwm_pin: pinmux_P8_14_pwm_pin {
++ pinctrl-single,pins = <0x028 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_15 (ZCZ ball U13) */
++ P8_15_default_pin: pinmux_P8_15_default_pin {
++ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_15_gpio_pin: pinmux_P8_15_gpio_pin {
++ pinctrl-single,pins = <0x03c 0x2F>; }; /* Mode 7, RxActive */
++ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin {
++ pinctrl-single,pins = <0x03c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin {
++ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_15_pruin_pin: pinmux_P8_15_pruin_pin {
++ pinctrl-single,pins = <0x03c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_15_qep_pin: pinmux_P8_15_qep_pin {
++ pinctrl-single,pins = <0x03c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_16 (ZCZ ball V13) */
++ P8_16_default_pin: pinmux_P8_16_default_pin {
++ pinctrl-single,pins = <0x038 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_16_gpio_pin: pinmux_P8_16_gpio_pin {
++ pinctrl-single,pins = <0x038 0x2F>; }; /* Mode 7, RxActive */
++ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin {
++ pinctrl-single,pins = <0x038 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin {
++ pinctrl-single,pins = <0x038 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_16_pruin_pin: pinmux_P8_16_pruin_pin {
++ pinctrl-single,pins = <0x038 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_16_qep_pin: pinmux_P8_16_qep_pin {
++ pinctrl-single,pins = <0x038 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_17 (ZCZ ball U12) */
++ P8_17_default_pin: pinmux_P8_17_default_pin {
++ pinctrl-single,pins = <0x02c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_17_gpio_pin: pinmux_P8_17_gpio_pin {
++ pinctrl-single,pins = <0x02c 0x2F>; }; /* Mode 7, RxActive */
++ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin {
++ pinctrl-single,pins = <0x02c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin {
++ pinctrl-single,pins = <0x02c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_17_pwm_pin: pinmux_P8_17_pwm_pin {
++ pinctrl-single,pins = <0x02c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_18 (ZCZ ball V12) */
++ P8_18_default_pin: pinmux_P8_18_default_pin {
++ pinctrl-single,pins = <0x08c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_18_gpio_pin: pinmux_P8_18_gpio_pin {
++ pinctrl-single,pins = <0x08c 0x2F>; }; /* Mode 7, RxActive */
++ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin {
++ pinctrl-single,pins = <0x08c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin {
++ pinctrl-single,pins = <0x08c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++
++ /* P8_19 (ZCZ ball U10) */
++ P8_19_default_pin: pinmux_P8_19_default_pin {
++ pinctrl-single,pins = <0x020 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_19_gpio_pin: pinmux_P8_19_gpio_pin {
++ pinctrl-single,pins = <0x020 0x2F>; }; /* Mode 7, RxActive */
++ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin {
++ pinctrl-single,pins = <0x020 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin {
++ pinctrl-single,pins = <0x020 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_19_pwm_pin: pinmux_P8_19_pwm_pin {
++ pinctrl-single,pins = <0x020 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P8_20 (ZCZ ball V9 ) emmc */
++ /* P8_21 (ZCZ ball U9 ) emmc */
++ /* P8_22 (ZCZ ball V8 ) emmc */
++ /* P8_23 (ZCZ ball U8 ) emmc */
++ /* P8_24 (ZCZ ball V7 ) emmc */
++ /* P8_25 (ZCZ ball U7 ) emmc */
++
++ /* P8_26 (ZCZ ball V6 ) */
++ P8_26_default_pin: pinmux_P8_26_default_pin {
++ pinctrl-single,pins = <0x07c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_26_gpio_pin: pinmux_P8_26_gpio_pin {
++ pinctrl-single,pins = <0x07c 0x2F>; }; /* Mode 7, RxActive */
++ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin {
++ pinctrl-single,pins = <0x07c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin {
++ pinctrl-single,pins = <0x07c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++
++ /* P8_27 (ZCZ ball U5 ) hdmi */
++ /* P8_28 (ZCZ ball V5 ) hdmi */
++ /* P8_29 (ZCZ ball R5 ) hdmi */
++ /* P8_30 (ZCZ ball R6 ) hdmi */
++ /* P8_31 (ZCZ ball V4 ) hdmi */
++ /* P8_32 (ZCZ ball T5 ) hdmi */
++ /* P8_33 (ZCZ ball V3 ) hdmi */
++ /* P8_34 (ZCZ ball U4 ) hdmi */
++ /* P8_35 (ZCZ ball V2 ) hdmi */
++ /* P8_36 (ZCZ ball U3 ) hdmi */
++ /* P8_37 (ZCZ ball U1 ) hdmi */
++ /* P8_38 (ZCZ ball U2 ) hdmi */
++ /* P8_39 (ZCZ ball T3 ) hdmi */
++ /* P8_40 (ZCZ ball T4 ) hdmi */
++ /* P8_41 (ZCZ ball T1 ) hdmi */
++ /* P8_42 (ZCZ ball T2 ) hdmi */
++ /* P8_43 (ZCZ ball R3 ) hdmi */
++ /* P8_44 (ZCZ ball R4 ) hdmi */
++ /* P8_45 (ZCZ ball R1 ) hdmi */
++ /* P8_46 (ZCZ ball R2 ) hdmi */
++
++ /************************/
++ /* P9 Header */
++ /************************/
++
++ /* P9_01 GND */
++ /* P9_02 GND */
++ /* P9_03 3.3V */
++ /* P9_04 3.3V */
++ /* P9_05 VDD_5V */
++ /* P9_06 VDD_5V */
++ /* P9_07 SYS_5V */
++ /* P9_08 SYS_5V */
++ /* P9_09 PWR_BUT */
++ /* P9_10 (ZCZ ball A10) RESETn */
++
++ /* P9_11 (ZCZ ball T17) */
++ P9_11_default_pin: pinmux_P9_11_default_pin {
++ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_11_gpio_pin: pinmux_P9_11_gpio_pin {
++ pinctrl-single,pins = <0x070 0x2F>; }; /* Mode 7, RxActive */
++ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin {
++ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin {
++ pinctrl-single,pins = <0x070 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_11_uart_pin: pinmux_P9_11_uart_pin {
++ pinctrl-single,pins = <0x070 0x36>; }; /* Mode 6, Pull-Up, RxActive */
++
++ /* P9_12 (ZCZ ball U18) */
++ P9_12_default_pin: pinmux_P9_12_default_pin {
++ pinctrl-single,pins = <0x078 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_12_gpio_pin: pinmux_P9_12_gpio_pin {
++ pinctrl-single,pins = <0x078 0x2F>; }; /* Mode 7, RxActive */
++ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin {
++ pinctrl-single,pins = <0x078 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin {
++ pinctrl-single,pins = <0x078 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++
++ /* P9_13 (ZCZ ball U17) */
++ P9_13_default_pin: pinmux_P9_13_default_pin {
++ pinctrl-single,pins = <0x074 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_13_gpio_pin: pinmux_P9_13_gpio_pin {
++ pinctrl-single,pins = <0x074 0x2F>; }; /* Mode 7, RxActive */
++ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin {
++ pinctrl-single,pins = <0x074 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin {
++ pinctrl-single,pins = <0x074 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_13_uart_pin: pinmux_P9_13_uart_pin {
++ pinctrl-single,pins = <0x074 0x36>; }; /* Mode 6, Pull-Up, RxActive */
++
++ /* P9_14 (ZCZ ball U14) */
++ P9_14_default_pin: pinmux_P9_14_default_pin {
++ pinctrl-single,pins = <0x048 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_14_gpio_pin: pinmux_P9_14_gpio_pin {
++ pinctrl-single,pins = <0x048 0x2F>; }; /* Mode 7, RxActive */
++ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin {
++ pinctrl-single,pins = <0x048 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin {
++ pinctrl-single,pins = <0x048 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_14_pwm_pin: pinmux_P9_14_pwm_pin {
++ pinctrl-single,pins = <0x048 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_15 (ZCZ ball R13) */
++ P9_15_default_pin: pinmux_P9_15_default_pin {
++ pinctrl-single,pins = <0x040 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_15_gpio_pin: pinmux_P9_15_gpio_pin {
++ pinctrl-single,pins = <0x040 0x2F>; }; /* Mode 7, RxActive */
++ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin {
++ pinctrl-single,pins = <0x040 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin {
++ pinctrl-single,pins = <0x040 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_15_pwm_pin: pinmux_P9_15_pwm_pin {
++ pinctrl-single,pins = <0x040 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_16 (ZCZ ball T14) */
++ P9_16_default_pin: pinmux_P9_16_default_pin {
++ pinctrl-single,pins = <0x04c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_16_gpio_pin: pinmux_P9_16_gpio_pin {
++ pinctrl-single,pins = <0x04c 0x2F>; }; /* Mode 7, RxActive */
++ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin {
++ pinctrl-single,pins = <0x04c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin {
++ pinctrl-single,pins = <0x04c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_16_pwm_pin: pinmux_P9_16_pwm_pin {
++ pinctrl-single,pins = <0x04c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_17 (ZCZ ball A16) */
++ P9_17_default_pin: pinmux_P9_17_default_pin {
++ pinctrl-single,pins = <0x15c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_17_gpio_pin: pinmux_P9_17_gpio_pin {
++ pinctrl-single,pins = <0x15c 0x2F>; }; /* Mode 7, RxActive */
++ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin {
++ pinctrl-single,pins = <0x15c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin {
++ pinctrl-single,pins = <0x15c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_17_spi_pin: pinmux_P9_17_spi_pin {
++ pinctrl-single,pins = <0x15c 0x30>; }; /* Mode 0, Pull-Up, RxActive */
++ P9_17_i2c_pin: pinmux_P9_17_i2c_pin {
++ pinctrl-single,pins = <0x15c 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_17_pwm_pin: pinmux_P9_17_pwm_pin {
++ pinctrl-single,pins = <0x15c 0x33>; }; /* Mode 3, Pull-Up, RxActive */
++
++ /* P9_18 (ZCZ ball B16) */
++ P9_18_default_pin: pinmux_P9_18_default_pin {
++ pinctrl-single,pins = <0x158 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_18_gpio_pin: pinmux_P9_18_gpio_pin {
++ pinctrl-single,pins = <0x158 0x2F>; }; /* Mode 7, RxActive */
++ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin {
++ pinctrl-single,pins = <0x158 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin {
++ pinctrl-single,pins = <0x158 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_18_spi_pin: pinmux_P9_18_spi_pin {
++ pinctrl-single,pins = <0x158 0x30>; }; /* Mode 0, Pull-Up, RxActive */
++ P9_18_i2c_pin: pinmux_P9_18_i2c_pin {
++ pinctrl-single,pins = <0x158 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_18_pwm_pin: pinmux_P9_18_pwm_pin {
++ pinctrl-single,pins = <0x158 0x33>; }; /* Mode 3, Pull-Up, RxActive */
++
++ // Leave the cape I2C EEPROM bus alone
++ /* P9_19 (ZCZ ball D17) I2C */
++ /* P9_20 (ZCZ ball D18) I2C */
++
++ /* P9_21 (ZCZ ball B17) */
++ P9_21_default_pin: pinmux_P9_21_default_pin {
++ pinctrl-single,pins = <0x154 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_21_gpio_pin: pinmux_P9_21_gpio_pin {
++ pinctrl-single,pins = <0x154 0x2F>; }; /* Mode 7, RxActive */
++ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin {
++ pinctrl-single,pins = <0x154 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin {
++ pinctrl-single,pins = <0x154 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_21_spi_pin: pinmux_P9_21_spi_pin {
++ pinctrl-single,pins = <0x154 0x30>; }; /* Mode 0, Pull-Up, RxActive */
++ P9_21_uart_pin: pinmux_P9_21_uart_pin {
++ pinctrl-single,pins = <0x154 0x31>; }; /* Mode 1, Pull-Up, RxActive */
++ P9_21_i2c_pin: pinmux_P9_21_i2c_pin {
++ pinctrl-single,pins = <0x154 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_21_pwm_pin: pinmux_P9_21_pwm_pin {
++ pinctrl-single,pins = <0x154 0x33>; }; /* Mode 3, Pull-Up, RxActive */
++
++ /* P9_22 (ZCZ ball A17) */
++ P9_22_default_pin: pinmux_P9_22_default_pin {
++ pinctrl-single,pins = <0x150 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_22_gpio_pin: pinmux_P9_22_gpio_pin {
++ pinctrl-single,pins = <0x150 0x2F>; }; /* Mode 7, RxActive */
++ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin {
++ pinctrl-single,pins = <0x150 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin {
++ pinctrl-single,pins = <0x150 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_22_spi_pin: pinmux_P9_22_spi_pin {
++ pinctrl-single,pins = <0x150 0x30>; }; /* Mode 0, Pull-Up, RxActive */
++ P9_22_uart_pin: pinmux_P9_22_uart_pin {
++ pinctrl-single,pins = <0x150 0x31>; }; /* Mode 1, Pull-Up, RxActive */
++ P9_22_i2c_pin: pinmux_P9_22_i2c_pin {
++ pinctrl-single,pins = <0x150 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_22_pwm_pin: pinmux_P9_22_pwm_pin {
++ pinctrl-single,pins = <0x150 0x33>; }; /* Mode 3, Pull-Up, RxActive */
++
++ /* P9_23 (ZCZ ball V14) */
++ P9_23_default_pin: pinmux_P9_23_default_pin {
++ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_23_gpio_pin: pinmux_P9_23_gpio_pin {
++ pinctrl-single,pins = <0x044 0x2F>; }; /* Mode 7, RxActive */
++ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin {
++ pinctrl-single,pins = <0x044 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin {
++ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_23_pwm_pin: pinmux_P9_23_pwm_pin {
++ pinctrl-single,pins = <0x044 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_24 (ZCZ ball D15) */
++ P9_24_default_pin: pinmux_P9_24_default_pin {
++ pinctrl-single,pins = <0x184 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_24_gpio_pin: pinmux_P9_24_gpio_pin {
++ pinctrl-single,pins = <0x184 0x2F>; }; /* Mode 7, RxActive */
++ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin {
++ pinctrl-single,pins = <0x184 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin {
++ pinctrl-single,pins = <0x184 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_24_uart_pin: pinmux_P9_24_uart_pin {
++ pinctrl-single,pins = <0x184 0x30>; }; /* Mode 0, Pull-Up, RxActive */
++ P9_24_can_pin: pinmux_P9_24_can_pin {
++ pinctrl-single,pins = <0x184 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_24_i2c_pin: pinmux_P9_24_i2c_pin {
++ pinctrl-single,pins = <0x184 0x33>; }; /* Mode 3, Pull-Up, RxActive */
++ P9_24_pruin_pin: pinmux_P9_24_pruin_pin {
++ pinctrl-single,pins = <0x184 0x36>; }; /* Mode 6, Pull-Up, RxActive */
++
++ /* P9_25 (ZCZ ball A14) Audio */
++ P9_25_default_pin: pinmux_P9_25_default_pin {
++ pinctrl-single,pins = <0x1ac 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_25_gpio_pin: pinmux_P9_25_gpio_pin {
++ pinctrl-single,pins = <0x1ac 0x2F>; }; /* Mode 7, RxActive */
++ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin {
++ pinctrl-single,pins = <0x1ac 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin {
++ pinctrl-single,pins = <0x1ac 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_25_qep_pin: pinmux_P9_25_qep_pin {
++ pinctrl-single,pins = <0x1ac 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_25_pruout_pin: pinmux_P9_25_pruout_pin {
++ pinctrl-single,pins = <0x1ac 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_25_pruin_pin: pinmux_P9_25_pruin_pin {
++ pinctrl-single,pins = <0x1ac 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_26 (ZCZ ball D16) */
++ P9_26_default_pin: pinmux_P9_26_default_pin {
++ pinctrl-single,pins = <0x180 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_26_gpio_pin: pinmux_P9_26_gpio_pin {
++ pinctrl-single,pins = <0x180 0x2F>; }; /* Mode 7, RxActive */
++ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin {
++ pinctrl-single,pins = <0x180 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin {
++ pinctrl-single,pins = <0x180 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_26_uart_pin: pinmux_P9_26_uart_pin {
++ pinctrl-single,pins = <0x180 0x30>; }; /* Mode 0, Pull-Up, RxActive */
++ P9_26_can_pin: pinmux_P9_26_can_pin {
++ pinctrl-single,pins = <0x180 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_26_i2c_pin: pinmux_P9_26_i2c_pin {
++ pinctrl-single,pins = <0x180 0x33>; }; /* Mode 3, Pull-Up, RxActive */
++ P9_26_pruin_pin: pinmux_P9_26_pruin_pin {
++ pinctrl-single,pins = <0x180 0x36>; }; /* Mode 6, Pull-Up, RxActive */
++
++ /* P9_27 (ZCZ ball C13) */
++ P9_27_default_pin: pinmux_P9_27_default_pin {
++ pinctrl-single,pins = <0x1a4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_27_gpio_pin: pinmux_P9_27_gpio_pin {
++ pinctrl-single,pins = <0x1a4 0x2F>; }; /* Mode 7, RxActive */
++ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin {
++ pinctrl-single,pins = <0x1a4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin {
++ pinctrl-single,pins = <0x1a4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_27_qep_pin: pinmux_P9_27_qep_pin {
++ pinctrl-single,pins = <0x1a4 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_27_pruout_pin: pinmux_P9_27_pruout_pin {
++ pinctrl-single,pins = <0x1a4 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_27_pruin_pin: pinmux_P9_27_pruin_pin {
++ pinctrl-single,pins = <0x1a4 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_28 (ZCZ ball C12) Audio */
++ P9_28_default_pin: pinmux_P9_28_default_pin {
++ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_28_gpio_pin: pinmux_P9_28_gpio_pin {
++ pinctrl-single,pins = <0x19c 0x2F>; }; /* Mode 7, RxActive */
++ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin {
++ pinctrl-single,pins = <0x19c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin {
++ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_28_pwm_pin: pinmux_P9_28_pwm_pin {
++ pinctrl-single,pins = <0x19c 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_28_spi_pin: pinmux_P9_28_spi_pin {
++ pinctrl-single,pins = <0x19c 0x23>; }; /* Mode 3, Pull-Down, RxActive */
++ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin {
++ pinctrl-single,pins = <0x19c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ P9_28_pruout_pin: pinmux_P9_28_pruout_pin {
++ pinctrl-single,pins = <0x19c 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_28_pruin_pin: pinmux_P9_28_pruin_pin {
++ pinctrl-single,pins = <0x19c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_29 (ZCZ ball B13) Audio */
++ P9_29_default_pin: pinmux_P9_29_default_pin {
++ pinctrl-single,pins = <0x194 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_29_gpio_pin: pinmux_P9_29_gpio_pin {
++ pinctrl-single,pins = <0x194 0x2F>; }; /* Mode 7, RxActive */
++ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin {
++ pinctrl-single,pins = <0x194 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin {
++ pinctrl-single,pins = <0x194 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_29_pwm_pin: pinmux_P9_29_pwm_pin {
++ pinctrl-single,pins = <0x194 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_29_spi_pin: pinmux_P9_29_spi_pin {
++ pinctrl-single,pins = <0x194 0x23>; }; /* Mode 3, Pull-Down, RxActive */
++ P9_29_pruout_pin: pinmux_P9_29_pruout_pin {
++ pinctrl-single,pins = <0x194 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_29_pruin_pin: pinmux_P9_29_pruin_pin {
++ pinctrl-single,pins = <0x194 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_30 (ZCZ ball D12) */
++ P9_30_default_pin: pinmux_P9_30_default_pin {
++ pinctrl-single,pins = <0x198 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_30_gpio_pin: pinmux_P9_30_gpio_pin {
++ pinctrl-single,pins = <0x198 0x2F>; }; /* Mode 7, RxActive */
++ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin {
++ pinctrl-single,pins = <0x198 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin {
++ pinctrl-single,pins = <0x198 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_30_pwm_pin: pinmux_P9_30_pwm_pin {
++ pinctrl-single,pins = <0x198 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_30_spi_pin: pinmux_P9_30_spi_pin {
++ pinctrl-single,pins = <0x198 0x23>; }; /* Mode 3, Pull-Down, RxActive */
++ P9_30_pruout_pin: pinmux_P9_30_pruout_pin {
++ pinctrl-single,pins = <0x198 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_30_pruin_pin: pinmux_P9_30_pruin_pin {
++ pinctrl-single,pins = <0x198 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_31 (ZCZ ball A13) Audio */
++ P9_31_default_pin: pinmux_P9_31_default_pin {
++ pinctrl-single,pins = <0x190 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_31_gpio_pin: pinmux_P9_31_gpio_pin {
++ pinctrl-single,pins = <0x190 0x2F>; }; /* Mode 7, RxActive */
++ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin {
++ pinctrl-single,pins = <0x190 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin {
++ pinctrl-single,pins = <0x190 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_31_pwm_pin: pinmux_P9_31_pwm_pin {
++ pinctrl-single,pins = <0x190 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_31_spi_pin: pinmux_P9_31_spi_pin {
++ pinctrl-single,pins = <0x190 0x23>; }; /* Mode 3, Pull-Down, RxActive */
++ P9_31_pruout_pin: pinmux_P9_31_pruout_pin {
++ pinctrl-single,pins = <0x190 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_31_pruin_pin: pinmux_P9_31_pruin_pin {
++ pinctrl-single,pins = <0x190 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_32 VADC */
++ /* P9_33 (ZCZ ball C8 ) AIN4 */
++ /* P9_34 AGND */
++ /* P9_35 (ZCZ ball A8 ) AIN6 */
++ /* P9_36 (ZCZ ball B8 ) AIN5 */
++ /* P9_37 (ZCZ ball B7 ) AIN2 */
++ /* P9_38 (ZCZ ball A7 ) AIN3 */
++ /* P9_39 (ZCZ ball B6 ) AIN0 */
++ /* P9_40 (ZCZ ball C7 ) AIN1 */
++
++ /* P9_41 (ZCZ ball D14) */
++ P9_41_default_pin: pinmux_P9_41_default_pin {
++ pinctrl-single,pins = <0x1b4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_41_gpio_pin: pinmux_P9_41_gpio_pin {
++ pinctrl-single,pins = <0x1b4 0x2F>; }; /* Mode 7, RxActive */
++ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin {
++ pinctrl-single,pins = <0x1b4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin {
++ pinctrl-single,pins = <0x1b4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_41_timer_pin: pinmux_P9_41_timer_pin {
++ pinctrl-single,pins = <0x1b4 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ P9_41_pruin_pin: pinmux_P9_41_pruin_pin {
++ pinctrl-single,pins = <0x1b4 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++
++ /* P9_41.1 */
++ /* P9_91 (ZCZ ball D13) */
++ P9_91_default_pin: pinmux_P9_91_default_pin {
++ pinctrl-single,pins = <0x1a8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_91_gpio_pin: pinmux_P9_91_gpio_pin {
++ pinctrl-single,pins = <0x1a8 0x2F>; }; /* Mode 7, RxActive */
++ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin {
++ pinctrl-single,pins = <0x1a8 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin {
++ pinctrl-single,pins = <0x1a8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_91_qep_pin: pinmux_P9_91_qep_pin {
++ pinctrl-single,pins = <0x1a8 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_91_pruout_pin: pinmux_P9_91_pruout_pin {
++ pinctrl-single,pins = <0x1a8 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_91_pruin_pin: pinmux_P9_91_pruin_pin {
++ pinctrl-single,pins = <0x1a8 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_42 (ZCZ ball C18) */
++ P9_42_default_pin: pinmux_P9_42_default_pin {
++ pinctrl-single,pins = <0x164 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_42_gpio_pin: pinmux_P9_42_gpio_pin {
++ pinctrl-single,pins = <0x164 0x2F>; }; /* Mode 7, RxActive */
++ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin {
++ pinctrl-single,pins = <0x164 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin {
++ pinctrl-single,pins = <0x164 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_42_pwm_pin: pinmux_P9_42_pwm_pin {
++ pinctrl-single,pins = <0x164 0x20>; }; /* Mode 0, Pull-Down, RxActive */
++ P9_42_uart_pin: pinmux_P9_42_uart_pin {
++ pinctrl-single,pins = <0x164 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_42_spics_pin: pinmux_P9_42_spics_pin {
++ pinctrl-single,pins = <0x164 0x22>; }; /* Mode 2, Pull-Down, RxActive */
++ P9_42_spiclk_pin: pinmux_P9_42_spiclk_pin {
++ pinctrl-single,pins = <0x164 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++
++ /* P9_42.1 */
++ /* P9_92 (ZCZ ball B12) */
++ P9_92_default_pin: pinmux_P9_92_default_pin {
++ pinctrl-single,pins = <0x1a0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_92_gpio_pin: pinmux_P9_92_gpio_pin {
++ pinctrl-single,pins = <0x1a0 0x2F>; }; /* Mode 7, RxActive */
++ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin {
++ pinctrl-single,pins = <0x1a0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin {
++ pinctrl-single,pins = <0x1a0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_92_qep_pin: pinmux_P9_92_qep_pin {
++ pinctrl-single,pins = <0x1a0 0x21>; }; /* Mode 1, Pull-Down, RxActive */
++ P9_92_pruout_pin: pinmux_P9_92_pruout_pin {
++ pinctrl-single,pins = <0x1a0 0x25>; }; /* Mode 5, Pull-Down, RxActive */
++ P9_92_pruin_pin: pinmux_P9_92_pruin_pin {
++ pinctrl-single,pins = <0x1a0 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++
++ /* P9_43 GND */
++ /* P9_44 GND */
++ /* P9_45 GND */
++ /* P9_46 GND */
++};
++
++/**********************************************************************/
++/* Pin Multiplex Helpers */
++/* */
++/* These provide userspace runtime pin configuration for the */
++/* BeagleBone cape expansion headers */
++/**********************************************************************/
++
++&ocp {
++ /************************/
++ /* P8 Header */
++ /************************/
++
++ P8_07_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "timer";
++ pinctrl-0 = <&P8_07_default_pin>;
++ pinctrl-1 = <&P8_07_gpio_pin>;
++ pinctrl-2 = <&P8_07_gpio_pu_pin>;
++ pinctrl-3 = <&P8_07_gpio_pd_pin>;
++ pinctrl-4 = <&P8_07_timer_pin>;
++ };
++
++ P8_08_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "timer";
++ pinctrl-0 = <&P8_08_default_pin>;
++ pinctrl-1 = <&P8_08_gpio_pin>;
++ pinctrl-2 = <&P8_08_gpio_pu_pin>;
++ pinctrl-3 = <&P8_08_gpio_pd_pin>;
++ pinctrl-4 = <&P8_08_timer_pin>;
++ };
++
++ P8_09_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "timer";
++ pinctrl-0 = <&P8_09_default_pin>;
++ pinctrl-1 = <&P8_09_gpio_pin>;
++ pinctrl-2 = <&P8_09_gpio_pu_pin>;
++ pinctrl-3 = <&P8_09_gpio_pd_pin>;
++ pinctrl-4 = <&P8_09_timer_pin>;
++ };
++
++ P8_10_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "timer";
++ pinctrl-0 = <&P8_10_default_pin>;
++ pinctrl-1 = <&P8_10_gpio_pin>;
++ pinctrl-2 = <&P8_10_gpio_pu_pin>;
++ pinctrl-3 = <&P8_10_gpio_pd_pin>;
++ pinctrl-4 = <&P8_10_timer_pin>;
++ };
++
++ P8_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "qep";
++ pinctrl-0 = <&P8_11_default_pin>;
++ pinctrl-1 = <&P8_11_gpio_pin>;
++ pinctrl-2 = <&P8_11_gpio_pu_pin>;
++ pinctrl-3 = <&P8_11_gpio_pd_pin>;
++ pinctrl-4 = <&P8_11_pruout_pin>;
++ pinctrl-5 = <&P8_11_qep_pin>;
++ };
++
++ P8_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "qep";
++ pinctrl-0 = <&P8_12_default_pin>;
++ pinctrl-1 = <&P8_12_gpio_pin>;
++ pinctrl-2 = <&P8_12_gpio_pu_pin>;
++ pinctrl-3 = <&P8_12_gpio_pd_pin>;
++ pinctrl-4 = <&P8_12_pruout_pin>;
++ pinctrl-5 = <&P8_12_qep_pin>;
++ };
++
++ P8_13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P8_13_default_pin>;
++ pinctrl-1 = <&P8_13_gpio_pin>;
++ pinctrl-2 = <&P8_13_gpio_pu_pin>;
++ pinctrl-3 = <&P8_13_gpio_pd_pin>;
++ pinctrl-4 = <&P8_13_pwm_pin>;
++ };
++
++ P8_14_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P8_14_default_pin>;
++ pinctrl-1 = <&P8_14_gpio_pin>;
++ pinctrl-2 = <&P8_14_gpio_pu_pin>;
++ pinctrl-3 = <&P8_14_gpio_pd_pin>;
++ pinctrl-4 = <&P8_14_pwm_pin>;
++ };
++
++ P8_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruin", "qep";
++ pinctrl-0 = <&P8_15_default_pin>;
++ pinctrl-1 = <&P8_15_gpio_pin>;
++ pinctrl-2 = <&P8_15_gpio_pu_pin>;
++ pinctrl-3 = <&P8_15_gpio_pd_pin>;
++ pinctrl-4 = <&P8_15_pruin_pin>;
++ pinctrl-5 = <&P8_15_qep_pin>;
++ };
++
++ P8_16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruin", "qep";
++ pinctrl-0 = <&P8_16_default_pin>;
++ pinctrl-1 = <&P8_16_gpio_pin>;
++ pinctrl-2 = <&P8_16_gpio_pu_pin>;
++ pinctrl-3 = <&P8_16_gpio_pd_pin>;
++ pinctrl-4 = <&P8_16_pruin_pin>;
++ pinctrl-5 = <&P8_16_qep_pin>;
++ };
++
++ P8_17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P8_17_default_pin>;
++ pinctrl-1 = <&P8_17_gpio_pin>;
++ pinctrl-2 = <&P8_17_gpio_pu_pin>;
++ pinctrl-3 = <&P8_17_gpio_pd_pin>;
++ pinctrl-4 = <&P8_17_pwm_pin>;
++ };
++
++ P8_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio";
++ pinctrl-0 = <&P8_18_default_pin>;
++ pinctrl-1 = <&P8_18_gpio_pin>;
++ pinctrl-2 = <&P8_18_gpio_pu_pin>;
++ pinctrl-3 = <&P8_18_gpio_pd_pin>;
++ };
++
++ P8_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P8_19_default_pin>;
++ pinctrl-1 = <&P8_19_gpio_pin>;
++ pinctrl-2 = <&P8_19_gpio_pu_pin>;
++ pinctrl-3 = <&P8_19_gpio_pd_pin>;
++ pinctrl-4 = <&P8_19_pwm_pin>;
++ };
++
++ P8_26_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio";
++ pinctrl-0 = <&P8_26_default_pin>;
++ pinctrl-1 = <&P8_26_gpio_pin>;
++ pinctrl-2 = <&P8_26_gpio_pu_pin>;
++ pinctrl-3 = <&P8_26_gpio_pd_pin>;
++ };
++
++ /************************/
++ /* P9 Header */
++ /************************/
++
++ P9_11_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart";
++ pinctrl-0 = <&P9_11_default_pin>;
++ pinctrl-1 = <&P9_11_gpio_pin>;
++ pinctrl-2 = <&P9_11_gpio_pu_pin>;
++ pinctrl-3 = <&P9_11_gpio_pd_pin>;
++ pinctrl-4 = <&P9_11_uart_pin>;
++ };
++
++ P9_12_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio";
++ pinctrl-0 = <&P9_12_default_pin>;
++ pinctrl-1 = <&P9_12_gpio_pin>;
++ pinctrl-2 = <&P9_12_gpio_pu_pin>;
++ pinctrl-3 = <&P9_12_gpio_pd_pin>;
++ };
++
++ P9_13_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart";
++ pinctrl-0 = <&P9_13_default_pin>;
++ pinctrl-1 = <&P9_13_gpio_pin>;
++ pinctrl-2 = <&P9_13_gpio_pu_pin>;
++ pinctrl-3 = <&P9_13_gpio_pd_pin>;
++ pinctrl-4 = <&P9_13_uart_pin>;
++ };
++
++ P9_14_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P9_14_default_pin>;
++ pinctrl-1 = <&P9_14_gpio_pin>;
++ pinctrl-2 = <&P9_14_gpio_pu_pin>;
++ pinctrl-3 = <&P9_14_gpio_pd_pin>;
++ pinctrl-4 = <&P9_14_pwm_pin>;
++ };
++
++ P9_15_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P9_15_default_pin>;
++ pinctrl-1 = <&P9_15_gpio_pin>;
++ pinctrl-2 = <&P9_15_gpio_pu_pin>;
++ pinctrl-3 = <&P9_15_gpio_pd_pin>;
++ pinctrl-4 = <&P9_15_pwm_pin>;
++ };
++
++ P9_16_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P9_16_default_pin>;
++ pinctrl-1 = <&P9_16_gpio_pin>;
++ pinctrl-2 = <&P9_16_gpio_pu_pin>;
++ pinctrl-3 = <&P9_16_gpio_pd_pin>;
++ pinctrl-4 = <&P9_16_pwm_pin>;
++ };
++
++ P9_17_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi", "i2c", "pwm";
++ pinctrl-0 = <&P9_17_default_pin>;
++ pinctrl-1 = <&P9_17_gpio_pin>;
++ pinctrl-2 = <&P9_17_gpio_pu_pin>;
++ pinctrl-3 = <&P9_17_gpio_pd_pin>;
++ pinctrl-4 = <&P9_17_spi_pin>;
++ pinctrl-5 = <&P9_17_i2c_pin>;
++ pinctrl-6 = <&P9_17_pwm_pin>;
++ };
++
++ P9_18_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi", "i2c", "pwm";
++ pinctrl-0 = <&P9_18_default_pin>;
++ pinctrl-1 = <&P9_18_gpio_pin>;
++ pinctrl-2 = <&P9_18_gpio_pu_pin>;
++ pinctrl-3 = <&P9_18_gpio_pd_pin>;
++ pinctrl-4 = <&P9_18_spi_pin>;
++ pinctrl-5 = <&P9_18_i2c_pin>;
++ pinctrl-6 = <&P9_18_pwm_pin>;
++ };
++
++ // I2C Pins
++ // P9_19_pinmux
++ // P9_20_pinmux
++
++ P9_21_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi", "uart", "i2c", "pwm";
++ pinctrl-0 = <&P9_21_default_pin>;
++ pinctrl-1 = <&P9_21_gpio_pin>;
++ pinctrl-2 = <&P9_21_gpio_pu_pin>;
++ pinctrl-3 = <&P9_21_gpio_pd_pin>;
++ pinctrl-4 = <&P9_21_spi_pin>;
++ pinctrl-5 = <&P9_21_uart_pin>;
++ pinctrl-6 = <&P9_21_i2c_pin>;
++ pinctrl-7 = <&P9_21_pwm_pin>;
++ };
++
++ P9_22_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi", "uart", "i2c", "pwm";
++ pinctrl-0 = <&P9_22_default_pin>;
++ pinctrl-1 = <&P9_22_gpio_pin>;
++ pinctrl-2 = <&P9_22_gpio_pu_pin>;
++ pinctrl-3 = <&P9_22_gpio_pd_pin>;
++ pinctrl-4 = <&P9_22_spi_pin>;
++ pinctrl-5 = <&P9_22_uart_pin>;
++ pinctrl-6 = <&P9_22_i2c_pin>;
++ pinctrl-7 = <&P9_22_pwm_pin>;
++ };
++
++ P9_23_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
++ pinctrl-0 = <&P9_23_default_pin>;
++ pinctrl-1 = <&P9_23_gpio_pin>;
++ pinctrl-2 = <&P9_23_gpio_pu_pin>;
++ pinctrl-3 = <&P9_23_gpio_pd_pin>;
++ pinctrl-4 = <&P9_23_pwm_pin>;
++ };
++
++ P9_24_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart", "can", "i2c", "pruin";
++ pinctrl-0 = <&P9_24_default_pin>;
++ pinctrl-1 = <&P9_24_gpio_pin>;
++ pinctrl-2 = <&P9_24_gpio_pu_pin>;
++ pinctrl-3 = <&P9_24_gpio_pd_pin>;
++ pinctrl-4 = <&P9_24_uart_pin>;
++ pinctrl-5 = <&P9_24_can_pin>;
++ pinctrl-6 = <&P9_24_i2c_pin>;
++ pinctrl-7 = <&P9_24_pruin_pin>;
++ };
++
++ P9_25_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_25_default_pin>;
++ pinctrl-1 = <&P9_25_gpio_pin>;
++ pinctrl-2 = <&P9_25_gpio_pu_pin>;
++ pinctrl-3 = <&P9_25_gpio_pd_pin>;
++ pinctrl-4 = <&P9_25_qep_pin>;
++ pinctrl-5 = <&P9_25_pruout_pin>;
++ pinctrl-6 = <&P9_25_pruin_pin>;
++ };
++
++ P9_26_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart", "can", "i2c", "pruin";
++ pinctrl-0 = <&P9_26_default_pin>;
++ pinctrl-1 = <&P9_26_gpio_pin>;
++ pinctrl-2 = <&P9_26_gpio_pu_pin>;
++ pinctrl-3 = <&P9_26_gpio_pd_pin>;
++ pinctrl-4 = <&P9_26_uart_pin>;
++ pinctrl-5 = <&P9_26_can_pin>;
++ pinctrl-6 = <&P9_26_i2c_pin>;
++ pinctrl-7 = <&P9_26_pruin_pin>;
++ };
++
++ P9_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_27_default_pin>;
++ pinctrl-1 = <&P9_27_gpio_pin>;
++ pinctrl-2 = <&P9_27_gpio_pu_pin>;
++ pinctrl-3 = <&P9_27_gpio_pd_pin>;
++ pinctrl-4 = <&P9_27_qep_pin>;
++ pinctrl-5 = <&P9_27_pruout_pin>;
++ pinctrl-6 = <&P9_27_pruin_pin>;
++ };
++
++ P9_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin";
++ pinctrl-0 = <&P9_28_default_pin>;
++ pinctrl-1 = <&P9_28_gpio_pin>;
++ pinctrl-2 = <&P9_28_gpio_pu_pin>;
++ pinctrl-3 = <&P9_28_gpio_pd_pin>;
++ pinctrl-4 = <&P9_28_pwm_pin>;
++ pinctrl-5 = <&P9_28_spi_pin>;
++ pinctrl-6 = <&P9_28_pwm2_pin>;
++ pinctrl-7 = <&P9_28_pruout_pin>;
++ pinctrl-8 = <&P9_28_pruin_pin>;
++ };
++
++ P9_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin";
++ pinctrl-0 = <&P9_29_default_pin>;
++ pinctrl-1 = <&P9_29_gpio_pin>;
++ pinctrl-2 = <&P9_29_gpio_pu_pin>;
++ pinctrl-3 = <&P9_29_gpio_pd_pin>;
++ pinctrl-4 = <&P9_29_pwm_pin>;
++ pinctrl-5 = <&P9_29_spi_pin>;
++ pinctrl-6 = <&P9_29_pruout_pin>;
++ pinctrl-7 = <&P9_29_pruin_pin>;
++ };
++
++ P9_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin";
++ pinctrl-0 = <&P9_30_default_pin>;
++ pinctrl-1 = <&P9_30_gpio_pin>;
++ pinctrl-2 = <&P9_30_gpio_pu_pin>;
++ pinctrl-3 = <&P9_30_gpio_pd_pin>;
++ pinctrl-4 = <&P9_30_pwm_pin>;
++ pinctrl-5 = <&P9_30_spi_pin>;
++ pinctrl-6 = <&P9_30_pruout_pin>;
++ pinctrl-7 = <&P9_30_pruin_pin>;
++ };
++
++ P9_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin";
++ pinctrl-0 = <&P9_31_default_pin>;
++ pinctrl-1 = <&P9_31_gpio_pin>;
++ pinctrl-2 = <&P9_31_gpio_pu_pin>;
++ pinctrl-3 = <&P9_31_gpio_pd_pin>;
++ pinctrl-4 = <&P9_31_pwm_pin>;
++ pinctrl-5 = <&P9_31_spi_pin>;
++ pinctrl-6 = <&P9_31_pruout_pin>;
++ pinctrl-7 = <&P9_31_pruin_pin>;
++ };
++
++ P9_41_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "timer", "pruin";
++ pinctrl-0 = <&P9_41_default_pin>;
++ pinctrl-1 = <&P9_41_gpio_pin>;
++ pinctrl-2 = <&P9_41_gpio_pu_pin>;
++ pinctrl-3 = <&P9_41_gpio_pd_pin>;
++ pinctrl-4 = <&P9_41_timer_pin>;
++ pinctrl-5 = <&P9_41_pruin_pin>;
++ };
++
++ P9_91_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_91_default_pin>;
++ pinctrl-1 = <&P9_91_gpio_pin>;
++ pinctrl-2 = <&P9_91_gpio_pu_pin>;
++ pinctrl-3 = <&P9_91_gpio_pd_pin>;
++ pinctrl-4 = <&P9_91_qep_pin>;
++ pinctrl-5 = <&P9_91_pruout_pin>;
++ pinctrl-6 = <&P9_91_pruin_pin>;
++ };
++
++ P9_42_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "uart", "spics", "spiclk";
++ pinctrl-0 = <&P9_42_default_pin>;
++ pinctrl-1 = <&P9_42_gpio_pin>;
++ pinctrl-2 = <&P9_42_gpio_pu_pin>;
++ pinctrl-3 = <&P9_42_gpio_pd_pin>;
++ pinctrl-4 = <&P9_42_pwm_pin>;
++ pinctrl-5 = <&P9_42_uart_pin>;
++ pinctrl-6 = <&P9_42_spics_pin>;
++ pinctrl-7 = <&P9_42_spiclk_pin>;
++ };
++
++ P9_92_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "qep", "pruout", "pruin";
++ pinctrl-0 = <&P9_92_default_pin>;
++ pinctrl-1 = <&P9_92_gpio_pin>;
++ pinctrl-2 = <&P9_92_gpio_pu_pin>;
++ pinctrl-3 = <&P9_92_gpio_pd_pin>;
++ pinctrl-4 = <&P9_92_qep_pin>;
++ pinctrl-5 = <&P9_92_pruout_pin>;
++ pinctrl-6 = <&P9_92_pruin_pin>;
++ };
++
++ cape-universal {
++ compatible = "gpio-of-helper";
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <>;
++
++ P8_07 {
++ gpio-name = "P8_07";
++ gpio = <&gpio2 2 0>;
++ input;
++ dir-changeable;
++ };
++ P8_08 {
++ gpio-name = "P8_08";
++ gpio = <&gpio2 3 0>;
++ input;
++ dir-changeable;
++ };
++ P8_09 {
++ gpio-name = "P8_09";
++ gpio = <&gpio2 5 0>;
++ input;
++ dir-changeable;
++ };
++ P8_10 {
++ gpio-name = "P8_10";
++ gpio = <&gpio2 4 0>;
++ input;
++ dir-changeable;
++ };
++ P8_11 {
++ gpio-name = "P8_11";
++ gpio = <&gpio1 13 0>;
++ input;
++ dir-changeable;
++ };
++ P8_12 {
++ gpio-name = "P8_12";
++ gpio = <&gpio1 12 0>;
++ input;
++ dir-changeable;
++ };
++ P8_13 {
++ gpio-name = "P8_13";
++ gpio = <&gpio0 23 0>;
++ input;
++ dir-changeable;
++ };
++ P8_14 {
++ gpio-name = "P8_14";
++ gpio = <&gpio0 26 0>;
++ input;
++ dir-changeable;
++ };
++ P8_15 {
++ gpio-name = "P8_15";
++ gpio = <&gpio1 15 0>;
++ input;
++ dir-changeable;
++ };
++ P8_16 {
++ gpio-name = "P8_16";
++ gpio = <&gpio1 14 0>;
++ input;
++ dir-changeable;
++ };
++ P8_17 {
++ gpio-name = "P8_17";
++ gpio = <&gpio0 27 0>;
++ input;
++ dir-changeable;
++ };
++ P8_18 {
++ gpio-name = "P8_18";
++ gpio = <&gpio2 1 0>;
++ input;
++ dir-changeable;
++ };
++ P8_19 {
++ gpio-name = "P8_19";
++ gpio = <&gpio0 22 0>;
++ input;
++ dir-changeable;
++ };
++ P8_26 {
++ gpio-name = "P8_26";
++ gpio = <&gpio1 29 0>;
++ input;
++ dir-changeable;
++ };
++
++ P9_11 {
++ gpio-name = "P9_11";
++ gpio = <&gpio0 30 0>;
++ input;
++ dir-changeable;
++ };
++ P9_12 {
++ gpio-name = "P9_12";
++ gpio = <&gpio1 28 0>;
++ input;
++ dir-changeable;
++ };
++ P9_13 {
++ gpio-name = "P9_13";
++ gpio = <&gpio0 31 0>;
++ input;
++ dir-changeable;
++ };
++ P9_14 {
++ gpio-name = "P9_14";
++ gpio = <&gpio1 18 0>;
++ input;
++ dir-changeable;
++ };
++ P9_15 {
++ gpio-name = "P9_15";
++ gpio = <&gpio1 16 0>;
++ input;
++ dir-changeable;
++ };
++ P9_16 {
++ gpio-name = "P9_16";
++ gpio = <&gpio1 19 0>;
++ input;
++ dir-changeable;
++ };
++ P9_17 {
++ gpio-name = "P9_17";
++ gpio = <&gpio0 5 0>;
++ input;
++ dir-changeable;
++ };
++ P9_18 {
++ gpio-name = "P9_18";
++ gpio = <&gpio0 4 0>;
++ input;
++ dir-changeable;
++ };
++
++ // I2C pins
++ // P9_19
++ // P9_20
++
++ P9_21 {
++ gpio-name = "P9_21";
++ gpio = <&gpio0 3 0>;
++ input;
++ dir-changeable;
++ };
++ P9_22 {
++ gpio-name = "P9_22";
++ gpio = <&gpio0 2 0>;
++ input;
++ dir-changeable;
++ };
++ P9_23 {
++ gpio-name = "P9_23";
++ gpio = <&gpio1 17 0>;
++ input;
++ dir-changeable;
++ };
++ P9_24 {
++ gpio-name = "P9_24";
++ gpio = <&gpio0 15 0>;
++ input;
++ dir-changeable;
++ };
++ P9_25 {
++ gpio-name = "P9_25";
++ gpio = <&gpio3 21 0>;
++ input;
++ dir-changeable;
++ };
++ P9_26 {
++ gpio-name = "P9_26";
++ gpio = <&gpio0 14 0>;
++ input;
++ dir-changeable;
++ };
++ P9_27 {
++ gpio-name = "P9_27";
++ gpio = <&gpio3 19 0>;
++ input;
++ dir-changeable;
++ };
++ P9_28 {
++ gpio-name = "P9_28";
++ gpio = <&gpio3 17 0>;
++ input;
++ dir-changeable;
++ };
++ P9_29 {
++ gpio-name = "P9_29";
++ gpio = <&gpio3 15 0>;
++ input;
++ dir-changeable;
++ };
++ P9_30 {
++ gpio-name = "P9_30";
++ gpio = <&gpio3 16 0>;
++ input;
++ dir-changeable;
++ };
++ P9_31 {
++ gpio-name = "P9_31";
++ gpio = <&gpio3 14 0>;
++ input;
++ dir-changeable;
++ };
++ P9_41 {
++ gpio-name = "P9_41";
++ gpio = <&gpio0 20 0>;
++ input;
++ dir-changeable;
++ };
++ P9_91 {
++ gpio-name = "P9_91";
++ gpio = <&gpio3 20 0>;
++ input;
++ dir-changeable;
++ };
++ P9_42 {
++ gpio-name = "P9_42";
++ gpio = <&gpio0 7 0>;
++ input;
++ dir-changeable;
++ };
++ P9_92 {
++ gpio-name = "P9_92";
++ gpio = <&gpio3 18 0>;
++ input;
++ dir-changeable;
++ };
++ };
++};
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch b/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
new file mode 100644
index 000000000..9a878c48c
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
@@ -0,0 +1,117 @@
+From f1cac6a3c4d4c1dec7d3e7fae0f5a1523c77771f Mon Sep 17 00:00:00 2001
+From: Charles Steinkuehler <charles@steinkuehler.net>
+Date: Tue, 16 Sep 2014 20:42:56 +0000
+Subject: [PATCH 08/13] bone-pinmux-helper: Add support for "mode" device-tree
+ parameter The new mode parameter is used to set the initial pinmux mode to
+ something other than "default" or NULL, which is what happens currently. This
+ allows enabling SoC hardware via device-tree which requires specific pinmux
+ settings to function on boot, but still leaves the pinmux register under
+ control of the bone-pinmux- helper driver meaning the pinmux setting can be
+ changed at run time via user-mode access to sysfs.
+
+Signed-off-by: Charles Steinkuehler <charles@steinkuehler.net>
+---
+ drivers/misc/cape/beaglebone/bone-pinmux-helper.c | 58 ++++++++++++++++++-----
+ 1 file changed, 47 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+index 5074365..d81363a 100644
+--- a/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
++++ b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
+@@ -117,6 +117,8 @@ static int bone_pinmux_helper_probe(struct platform_device *pdev)
+ struct pinmux_helper_data *data;
+ struct pinctrl_state *state;
+ char *state_name;
++ const char *mode_name;
++ int mode_len;
+ int err;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+@@ -125,12 +127,13 @@ static int bone_pinmux_helper_probe(struct platform_device *pdev)
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
++
+ state_name = kmalloc(strlen(PINCTRL_STATE_DEFAULT) + 1,
+ GFP_KERNEL);
+ if (state_name == NULL) {
+ dev_err(dev, "Failed to allocate state name\n");
+ err = -ENOMEM;
+- goto err_no_mem;
++ goto err_no_state_mem;
+ }
+ data->selected_state_name = state_name;
+ strcpy(data->selected_state_name, PINCTRL_STATE_DEFAULT);
+@@ -144,17 +147,47 @@ static int bone_pinmux_helper_probe(struct platform_device *pdev)
+ goto err_no_pinctrl;
+ }
+
+- /* try to select default state at first (if it exists) */
+- state = pinctrl_lookup_state(data->pinctrl,
+- data->selected_state_name);
+- if (!IS_ERR(state)) {
+- err = pinctrl_select_state(data->pinctrl, state);
+- if (err != 0) {
+- dev_err(dev, "Failed to select default state\n");
+- goto err_no_state;
++ /* See if an initial mode is specified in the device tree */
++ mode_name = of_get_property(dev->of_node, "mode", &mode_len);
++
++ err = -1;
++ if (mode_name != NULL ) {
++ state_name = kmalloc(mode_len + 1, GFP_KERNEL);
++ if (state_name == NULL) {
++ dev_err(dev, "Failed to allocate state name\n");
++ err = -ENOMEM;
++ goto err_no_mode_mem;
++ }
++ strncpy(state_name, mode_name, mode_len);
++
++ /* try to select requested mode */
++ state = pinctrl_lookup_state(data->pinctrl, state_name);
++ if (!IS_ERR(state)) {
++ err = pinctrl_select_state(data->pinctrl, state);
++ if (err != 0) {
++ dev_warn(dev, "Unable to select requested mode %s\n", state_name);
++ kfree(state_name);
++ } else {
++ kfree(data->selected_state_name);
++ data->selected_state_name = state_name;
++ dev_notice(dev, "Set initial pinmux mode to %s\n", state_name);
++ }
++ }
++ }
++
++ /* try to select default state if mode_name failed */
++ if ( err != 0) {
++ state = pinctrl_lookup_state(data->pinctrl,
++ data->selected_state_name);
++ if (!IS_ERR(state)) {
++ err = pinctrl_select_state(data->pinctrl, state);
++ if (err != 0) {
++ dev_err(dev, "Failed to select default state\n");
++ goto err_no_state;
++ }
++ } else {
++ data->selected_state_name = '\0';
+ }
+- } else {
+- data->selected_state_name = '\0';
+ }
+
+ /* Register sysfs hooks */
+@@ -168,8 +201,11 @@ static int bone_pinmux_helper_probe(struct platform_device *pdev)
+
+ err_no_sysfs:
+ err_no_state:
++err_no_mode_mem:
+ devm_pinctrl_put(data->pinctrl);
+ err_no_pinctrl:
++ devm_kfree(dev, data->selected_state_name);
++err_no_state_mem:
+ devm_kfree(dev, data);
+ err_no_mem:
+ return err;
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch b/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
new file mode 100644
index 000000000..6f37e9eda
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
@@ -0,0 +1,82 @@
+From a9463777f20872146a4fd1f8374ebc7ed78b9045 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Fri, 19 Sep 2014 08:49:29 -0500
+Subject: [PATCH 09/13] pinmux-helper: add P8_37_pinmux & P8_38_pinmux
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ .../arm/boot/dts/am335x-bone-common-universal.dtsi | 50 ++++++++++++++++++++++
+ 1 file changed, 50 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+index 8bddcd2..e00bab9 100644
+--- a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+@@ -208,7 +208,33 @@
+ /* P8_35 (ZCZ ball V2 ) hdmi */
+ /* P8_36 (ZCZ ball U3 ) hdmi */
+ /* P8_37 (ZCZ ball U1 ) hdmi */
++ P8_37_default_pin: pinmux_P8_37_default_pin {
++ pinctrl-single,pins = <0x0C0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_37_gpio_pin: pinmux_P8_37_gpio_pin {
++ pinctrl-single,pins = <0x0C0 0x2F>; }; /* Mode 7, RxActive */
++ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin {
++ pinctrl-single,pins = <0x0C0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin {
++ pinctrl-single,pins = <0x0C0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_37_uart_pin: pinmux_P8_37_uart_pin {
++ pinctrl-single,pins = <0x0C0 0x04>; }; /* Mode 4, Pull-Down*/
++ P8_37_pwm_pin: pinmux_P8_37_pwm_pin {
++ pinctrl-single,pins = <0x0C0 0x02>; }; /* Mode 2, Pull-Down*/
++
+ /* P8_38 (ZCZ ball U2 ) hdmi */
++ P8_38_default_pin: pinmux_P8_38_default_pin {
++ pinctrl-single,pins = <0x0C4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_38_gpio_pin: pinmux_P8_38_gpio_pin {
++ pinctrl-single,pins = <0x0C4 0x2F>; }; /* Mode 7, RxActive */
++ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin {
++ pinctrl-single,pins = <0x0C4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin {
++ pinctrl-single,pins = <0x0C4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_38_uart_pin: pinmux_P8_38_uart_pin {
++ pinctrl-single,pins = <0x0C4 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ P8_38_pwm_pin: pinmux_P8_38_pwm_pin {
++ pinctrl-single,pins = <0x0C4 0x22>; }; /* Mode 2, Pull-Down, RxActive */
++
+ /* P8_39 (ZCZ ball T3 ) hdmi */
+ /* P8_40 (ZCZ ball T4 ) hdmi */
+ /* P8_41 (ZCZ ball T1 ) hdmi */
+@@ -780,6 +806,30 @@
+ pinctrl-3 = <&P8_26_gpio_pd_pin>;
+ };
+
++ P8_37_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart","pwm";
++ pinctrl-0 = <&P8_37_default_pin>;
++ pinctrl-1 = <&P8_37_gpio_pin>;
++ pinctrl-2 = <&P8_37_gpio_pu_pin>;
++ pinctrl-3 = <&P8_37_gpio_pd_pin>;
++ pinctrl-4 = <&P8_37_uart_pin>;
++ pinctrl-5 = <&P8_37_pwm_pin>;
++ };
++
++ P8_38_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart","pwm";
++ pinctrl-0 = <&P8_38_default_pin>;
++ pinctrl-1 = <&P8_38_gpio_pin>;
++ pinctrl-2 = <&P8_38_gpio_pu_pin>;
++ pinctrl-3 = <&P8_38_gpio_pd_pin>;
++ pinctrl-4 = <&P8_38_uart_pin>;
++ pinctrl-5 = <&P8_38_pwm_pin>;
++ };
++
+ /************************/
+ /* P9 Header */
+ /************************/
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch b/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch
new file mode 100644
index 000000000..ec4d9bf4c
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch
@@ -0,0 +1,858 @@
+From 1fd30cb1249aa2e2b3b2212c467f96c21da9dd41 Mon Sep 17 00:00:00 2001
+From: Charles Steinkuehler <charles@steinkuehler.net>
+Date: Sun, 28 Sep 2014 12:16:16 +0000
+Subject: [PATCH 10/13] pinmux-helper: hdmi
+
+BeagleBone DTS : Enable run-time pinmux for HDMI Add cape-universal-hdmi pin
+info to am335x-bone-common-universal.dtsi Edit hdmi dtsi include files to use
+new mode= setting to set HDMI mode at startup, leaving pinmux configurable at
+runtime.
+
+Signed-off-by: Charles Steinkuehler <charles@steinkuehler.net>
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ .../arm/boot/dts/am335x-bone-common-universal.dtsi | 670 ++++++++++++++++++++-
+ 1 file changed, 651 insertions(+), 19 deletions(-)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+index e00bab9..46028cd 100644
+--- a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+@@ -198,51 +198,318 @@
+ pinctrl-single,pins = <0x07c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+
+ /* P8_27 (ZCZ ball U5 ) hdmi */
++ P8_27_default_pin: pinmux_P8_27_default_pin {
++ pinctrl-single,pins = <0x0e0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_27_gpio_pin: pinmux_P8_27_gpio_pin {
++ pinctrl-single,pins = <0x0e0 0x2F>; }; /* Mode 7, RxActive */
++ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin {
++ pinctrl-single,pins = <0x0e0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin {
++ pinctrl-single,pins = <0x0e0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_27_pruout_pin: pinmux_P8_27_pruout_pin {
++ pinctrl-single,pins = <0x0e0 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_27_pruin_pin: pinmux_P8_27_pruin_pin {
++ pinctrl-single,pins = <0x0e0 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_27_hdmi_pin: pinmux_P8_27_hdmi_pin {
++ pinctrl-single,pins = <0x0e0 0x00>; }; /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
++
+ /* P8_28 (ZCZ ball V5 ) hdmi */
++ P8_28_default_pin: pinmux_P8_28_default_pin {
++ pinctrl-single,pins = <0x0e8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_28_gpio_pin: pinmux_P8_28_gpio_pin {
++ pinctrl-single,pins = <0x0e8 0x2F>; }; /* Mode 7, RxActive */
++ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin {
++ pinctrl-single,pins = <0x0e8 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin {
++ pinctrl-single,pins = <0x0e8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_28_pruout_pin: pinmux_P8_28_pruout_pin {
++ pinctrl-single,pins = <0x0e8 0x05>; }; /* Mode 5, Pull-Down */
++ P8_28_pruin_pin: pinmux_P8_28_pruin_pin {
++ pinctrl-single,pins = <0x0e8 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_28_hdmi_pin: pinmux_P8_28_hdmi_pin {
++ pinctrl-single,pins = <0x0e8 0x00>; }; /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
++
+ /* P8_29 (ZCZ ball R5 ) hdmi */
++ P8_29_default_pin: pinmux_P8_29_default_pin {
++ pinctrl-single,pins = <0x0e4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_29_gpio_pin: pinmux_P8_29_gpio_pin {
++ pinctrl-single,pins = <0x0e4 0x2F>; }; /* Mode 7, RxActive */
++ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin {
++ pinctrl-single,pins = <0x0e4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin {
++ pinctrl-single,pins = <0x0e4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_29_pruout_pin: pinmux_P8_29_pruout_pin {
++ pinctrl-single,pins = <0x0e4 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_29_pruin_pin: pinmux_P8_29_pruin_pin {
++ pinctrl-single,pins = <0x0e4 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_29_hdmi_pin: pinmux_P8_29_hdmi_pin {
++ pinctrl-single,pins = <0x0e4 0x00>; }; /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
++
+ /* P8_30 (ZCZ ball R6 ) hdmi */
++ P8_30_default_pin: pinmux_P8_30_default_pin {
++ pinctrl-single,pins = <0x0ec 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_30_gpio_pin: pinmux_P8_30_gpio_pin {
++ pinctrl-single,pins = <0x0ec 0x2F>; }; /* Mode 7, RxActive */
++ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin {
++ pinctrl-single,pins = <0x0ec 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin {
++ pinctrl-single,pins = <0x0ec 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_30_pruout_pin: pinmux_P8_30_pruout_pin {
++ pinctrl-single,pins = <0x0ec 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_30_pruin_pin: pinmux_P8_30_pruin_pin {
++ pinctrl-single,pins = <0x0ec 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_30_hdmi_pin: pinmux_P8_30_hdmi_pin {
++ pinctrl-single,pins = <0x0ec 0x00>; }; /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
++
+ /* P8_31 (ZCZ ball V4 ) hdmi */
++ P8_31_default_pin: pinmux_P8_31_default_pin {
++ pinctrl-single,pins = <0x0d8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_31_gpio_pin: pinmux_P8_31_gpio_pin {
++ pinctrl-single,pins = <0x0d8 0x2F>; }; /* Mode 7, RxActive */
++ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin {
++ pinctrl-single,pins = <0x0d8 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin {
++ pinctrl-single,pins = <0x0d8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_31_uart_pin: pinmux_P8_31_uart_pin {
++ pinctrl-single,pins = <0x0d8 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ P8_31_hdmi_pin: pinmux_P8_31_hdmi_pin {
++ pinctrl-single,pins = <0x0d8 0x08>; }; /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_32 (ZCZ ball T5 ) hdmi */
++ P8_32_default_pin: pinmux_P8_32_default_pin {
++ pinctrl-single,pins = <0x0dc 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_32_gpio_pin: pinmux_P8_32_gpio_pin {
++ pinctrl-single,pins = <0x0dc 0x2F>; }; /* Mode 7, RxActive */
++ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin {
++ pinctrl-single,pins = <0x0dc 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin {
++ pinctrl-single,pins = <0x0dc 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_32_uart_pin: pinmux_P8_32_uart_pin {
++ pinctrl-single,pins = <0x0dc 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_32_hdmi_pin: pinmux_P8_32_hdmi_pin {
++ pinctrl-single,pins = <0x0dc 0x08>; }; /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_33 (ZCZ ball V3 ) hdmi */
++ P8_33_default_pin: pinmux_P8_33_default_pin {
++ pinctrl-single,pins = <0x0d4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_33_gpio_pin: pinmux_P8_33_gpio_pin {
++ pinctrl-single,pins = <0x0d4 0x2F>; }; /* Mode 7, RxActive */
++ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin {
++ pinctrl-single,pins = <0x0d4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin {
++ pinctrl-single,pins = <0x0d4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_33_hdmi_pin: pinmux_P8_33_hdmi_pin {
++ pinctrl-single,pins = <0x0d4 0x08>; }; /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_34 (ZCZ ball U4 ) hdmi */
++ P8_34_default_pin: pinmux_P8_34_default_pin {
++ pinctrl-single,pins = <0x0cc 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_34_gpio_pin: pinmux_P8_34_gpio_pin {
++ pinctrl-single,pins = <0x0cc 0x2F>; }; /* Mode 7, RxActive */
++ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin {
++ pinctrl-single,pins = <0x0cc 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin {
++ pinctrl-single,pins = <0x0cc 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_34_pwm_pin: pinmux_P8_34_pwm_pin {
++ pinctrl-single,pins = <0x0cc 0x22>; }; /* Mode 2, Pull-Down, RxActive */
++ P8_34_hdmi_pin: pinmux_P8_34_hdmi_pin {
++ pinctrl-single,pins = <0x0cc 0x08>; }; /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_35 (ZCZ ball V2 ) hdmi */
++ P8_35_default_pin: pinmux_P8_35_default_pin {
++ pinctrl-single,pins = <0x0d0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_35_gpio_pin: pinmux_P8_35_gpio_pin {
++ pinctrl-single,pins = <0x0d0 0x2F>; }; /* Mode 7, RxActive */
++ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin {
++ pinctrl-single,pins = <0x0d0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin {
++ pinctrl-single,pins = <0x0d0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_35_hdmi_pin: pinmux_P8_35_hdmi_pin {
++ pinctrl-single,pins = <0x0d0 0x08>; }; /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_36 (ZCZ ball U3 ) hdmi */
++ P8_36_default_pin: pinmux_P8_36_default_pin {
++ pinctrl-single,pins = <0x0c8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_36_gpio_pin: pinmux_P8_36_gpio_pin {
++ pinctrl-single,pins = <0x0c8 0x2F>; }; /* Mode 7, RxActive */
++ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin {
++ pinctrl-single,pins = <0x0c8 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin {
++ pinctrl-single,pins = <0x0c8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_36_pwm_pin: pinmux_P8_36_pwm_pin {
++ pinctrl-single,pins = <0x0c8 0x22>; }; /* Mode 2, Pull-Down, RxActive */
++ P8_36_hdmi_pin: pinmux_P8_36_hdmi_pin {
++ pinctrl-single,pins = <0x0c8 0x08>; }; /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_37 (ZCZ ball U1 ) hdmi */
+ P8_37_default_pin: pinmux_P8_37_default_pin {
+- pinctrl-single,pins = <0x0C0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ pinctrl-single,pins = <0x0c0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin {
+- pinctrl-single,pins = <0x0C0 0x2F>; }; /* Mode 7, RxActive */
++ pinctrl-single,pins = <0x0c0 0x2F>; }; /* Mode 7, RxActive */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin {
+- pinctrl-single,pins = <0x0C0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ pinctrl-single,pins = <0x0c0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin {
+- pinctrl-single,pins = <0x0C0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ pinctrl-single,pins = <0x0c0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin {
+- pinctrl-single,pins = <0x0C0 0x04>; }; /* Mode 4, Pull-Down*/
++ pinctrl-single,pins = <0x0c0 0x04>; }; /* Mode 4, Pull-Down*/
+ P8_37_pwm_pin: pinmux_P8_37_pwm_pin {
+- pinctrl-single,pins = <0x0C0 0x02>; }; /* Mode 2, Pull-Down*/
++ pinctrl-single,pins = <0x0c0 0x02>; }; /* Mode 2, Pull-Down*/
++ P8_37_hdmi_pin: pinmux_P8_37_hdmi_pin {
++ pinctrl-single,pins = <0x0c0 0x08>; }; /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+
+ /* P8_38 (ZCZ ball U2 ) hdmi */
+ P8_38_default_pin: pinmux_P8_38_default_pin {
+- pinctrl-single,pins = <0x0C4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ pinctrl-single,pins = <0x0c4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin {
+- pinctrl-single,pins = <0x0C4 0x2F>; }; /* Mode 7, RxActive */
++ pinctrl-single,pins = <0x0c4 0x2F>; }; /* Mode 7, RxActive */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin {
+- pinctrl-single,pins = <0x0C4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ pinctrl-single,pins = <0x0c4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin {
+- pinctrl-single,pins = <0x0C4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ pinctrl-single,pins = <0x0c4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin {
+- pinctrl-single,pins = <0x0C4 0x24>; }; /* Mode 4, Pull-Down, RxActive */
++ pinctrl-single,pins = <0x0c4 0x24>; }; /* Mode 4, Pull-Down, RxActive */
+ P8_38_pwm_pin: pinmux_P8_38_pwm_pin {
+- pinctrl-single,pins = <0x0C4 0x22>; }; /* Mode 2, Pull-Down, RxActive */
++ pinctrl-single,pins = <0x0c4 0x22>; }; /* Mode 2, Pull-Down, RxActive */
++ P8_38_hdmi_pin: pinmux_P8_38_hdmi_pin {
++ pinctrl-single,pins = <0x0c4 0x08>; }; /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+
+ /* P8_39 (ZCZ ball T3 ) hdmi */
++ P8_39_default_pin: pinmux_P8_39_default_pin {
++ pinctrl-single,pins = <0x0b8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_39_gpio_pin: pinmux_P8_39_gpio_pin {
++ pinctrl-single,pins = <0x0b8 0x2F>; }; /* Mode 7, RxActive */
++ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin {
++ pinctrl-single,pins = <0x0b8 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin {
++ pinctrl-single,pins = <0x0b8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_39_pruout_pin: pinmux_P8_39_pruout_pin {
++ pinctrl-single,pins = <0x0b8 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_39_pruin_pin: pinmux_P8_39_pruin_pin {
++ pinctrl-single,pins = <0x0b8 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_39_hdmi_pin: pinmux_P8_39_hdmi_pin {
++ pinctrl-single,pins = <0x0b8 0x08>; }; /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_40 (ZCZ ball T4 ) hdmi */
++ P8_40_default_pin: pinmux_P8_40_default_pin {
++ pinctrl-single,pins = <0x0bc 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_40_gpio_pin: pinmux_P8_40_gpio_pin {
++ pinctrl-single,pins = <0x0bc 0x2F>; }; /* Mode 7, RxActive */
++ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin {
++ pinctrl-single,pins = <0x0bc 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin {
++ pinctrl-single,pins = <0x0bc 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_40_pruout_pin: pinmux_P8_40_pruout_pin {
++ pinctrl-single,pins = <0x0bc 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_40_pruin_pin: pinmux_P8_40_pruin_pin {
++ pinctrl-single,pins = <0x0bc 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_40_hdmi_pin: pinmux_P8_40_hdmi_pin {
++ pinctrl-single,pins = <0x0bc 0x08>; }; /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_41 (ZCZ ball T1 ) hdmi */
++ P8_41_default_pin: pinmux_P8_41_default_pin {
++ pinctrl-single,pins = <0x0b0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_41_gpio_pin: pinmux_P8_41_gpio_pin {
++ pinctrl-single,pins = <0x0b0 0x2F>; }; /* Mode 7, RxActive */
++ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin {
++ pinctrl-single,pins = <0x0b0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin {
++ pinctrl-single,pins = <0x0b0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_41_pruout_pin: pinmux_P8_41_pruout_pin {
++ pinctrl-single,pins = <0x0b0 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_41_pruin_pin: pinmux_P8_41_pruin_pin {
++ pinctrl-single,pins = <0x0b0 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_41_hdmi_pin: pinmux_P8_41_hdmi_pin {
++ pinctrl-single,pins = <0x0b0 0x08>; }; /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_42 (ZCZ ball T2 ) hdmi */
++ P8_42_default_pin: pinmux_P8_42_default_pin {
++ pinctrl-single,pins = <0x0b4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_42_gpio_pin: pinmux_P8_42_gpio_pin {
++ pinctrl-single,pins = <0x0b4 0x2F>; }; /* Mode 7, RxActive */
++ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin {
++ pinctrl-single,pins = <0x0b4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin {
++ pinctrl-single,pins = <0x0b4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_42_pruout_pin: pinmux_P8_42_pruout_pin {
++ pinctrl-single,pins = <0x0b4 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_42_pruin_pin: pinmux_P8_42_pruin_pin {
++ pinctrl-single,pins = <0x0b4 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_42_hdmi_pin: pinmux_P8_42_hdmi_pin {
++ pinctrl-single,pins = <0x0b4 0x08>; }; /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_43 (ZCZ ball R3 ) hdmi */
++ P8_43_default_pin: pinmux_P8_43_default_pin {
++ pinctrl-single,pins = <0x0a8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_43_gpio_pin: pinmux_P8_43_gpio_pin {
++ pinctrl-single,pins = <0x0a8 0x2F>; }; /* Mode 7, RxActive */
++ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin {
++ pinctrl-single,pins = <0x0a8 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin {
++ pinctrl-single,pins = <0x0a8 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_43_pruout_pin: pinmux_P8_43_pruout_pin {
++ pinctrl-single,pins = <0x0a8 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_43_pruin_pin: pinmux_P8_43_pruin_pin {
++ pinctrl-single,pins = <0x0a8 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_43_pwm_pin: pinmux_P8_43_pwm_pin {
++ pinctrl-single,pins = <0x0a8 0x03>; }; /* Mode 3, Pull-Down */
++ P8_43_hdmi_pin: pinmux_P8_43_hdmi_pin {
++ pinctrl-single,pins = <0x0a8 0x08>; }; /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_44 (ZCZ ball R4 ) hdmi */
++ P8_44_default_pin: pinmux_P8_44_default_pin {
++ pinctrl-single,pins = <0x0ac 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_44_gpio_pin: pinmux_P8_44_gpio_pin {
++ pinctrl-single,pins = <0x0ac 0x2F>; }; /* Mode 7, RxActive */
++ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin {
++ pinctrl-single,pins = <0x0ac 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin {
++ pinctrl-single,pins = <0x0ac 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_44_pruout_pin: pinmux_P8_44_pruout_pin {
++ pinctrl-single,pins = <0x0ac 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_44_pruin_pin: pinmux_P8_44_pruin_pin {
++ pinctrl-single,pins = <0x0ac 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_44_pwm_pin: pinmux_P8_44_pwm_pin {
++ pinctrl-single,pins = <0x0ac 0x23>; }; /* Mode 3, Pull-Down, RxActive */
++ P8_44_hdmi_pin: pinmux_P8_44_hdmi_pin {
++ pinctrl-single,pins = <0x0ac 0x08>; }; /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_45 (ZCZ ball R1 ) hdmi */
++ P8_45_default_pin: pinmux_P8_45_default_pin {
++ pinctrl-single,pins = <0x0a0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_45_gpio_pin: pinmux_P8_45_gpio_pin {
++ pinctrl-single,pins = <0x0a0 0x2F>; }; /* Mode 7, RxActive */
++ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin {
++ pinctrl-single,pins = <0x0a0 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin {
++ pinctrl-single,pins = <0x0a0 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_45_pruout_pin: pinmux_P8_45_pruout_pin {
++ pinctrl-single,pins = <0x0a0 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_45_pruin_pin: pinmux_P8_45_pruin_pin {
++ pinctrl-single,pins = <0x0a0 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_45_pwm_pin: pinmux_P8_45_pwm_pin {
++ pinctrl-single,pins = <0x0a0 0x03>; }; /* Mode 3, Pull-Down*/
++ P8_45_hdmi_pin: pinmux_P8_45_hdmi_pin {
++ pinctrl-single,pins = <0x0a0 0x08>; }; /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
++
+ /* P8_46 (ZCZ ball R2 ) hdmi */
++ P8_46_default_pin: pinmux_P8_46_default_pin {
++ pinctrl-single,pins = <0x0a4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_46_gpio_pin: pinmux_P8_46_gpio_pin {
++ pinctrl-single,pins = <0x0a4 0x2F>; }; /* Mode 7, RxActive */
++ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin {
++ pinctrl-single,pins = <0x0a4 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin {
++ pinctrl-single,pins = <0x0a4 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P8_46_pruout_pin: pinmux_P8_46_pruout_pin {
++ pinctrl-single,pins = <0x0a4 0x05>; }; /* Mode 5, Pull-Down*/
++ P8_46_pruin_pin: pinmux_P8_46_pruin_pin {
++ pinctrl-single,pins = <0x0a4 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P8_46_pwm_pin: pinmux_P8_46_pwm_pin {
++ pinctrl-single,pins = <0x0a4 0x03>; }; /* Mode 3, Pull-Down*/
++ P8_46_hdmi_pin: pinmux_P8_46_hdmi_pin {
++ pinctrl-single,pins = <0x0a4 0x08>; }; /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
+
+ /************************/
+ /* P9 Header */
+@@ -446,6 +713,8 @@
+ pinctrl-single,pins = <0x1ac 0x25>; }; /* Mode 5, Pull-Down, RxActive */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin {
+ pinctrl-single,pins = <0x1ac 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P9_25_audio_pin: pinmux_P9_25_audio_pin {
++ pinctrl-single,pins = <0x1ac (PIN_INPUT_PULLUP | MUX_MODE0)>; }; /* mcasp0_ahclkx.mcasp0_ahclkx */
+
+ /* P9_26 (ZCZ ball D16) */
+ P9_26_default_pin: pinmux_P9_26_default_pin {
+@@ -500,6 +769,8 @@
+ pinctrl-single,pins = <0x19c 0x25>; }; /* Mode 5, Pull-Down, RxActive */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin {
+ pinctrl-single,pins = <0x19c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P9_28_audio_pin: pinmux_P9_28_audio_pin {
++ pinctrl-single,pins = <0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)>; }; /* mcasp0_ahclkr.mcasp0_axr2 */
+
+ /* P9_29 (ZCZ ball B13) Audio */
+ P9_29_default_pin: pinmux_P9_29_default_pin {
+@@ -518,6 +789,8 @@
+ pinctrl-single,pins = <0x194 0x25>; }; /* Mode 5, Pull-Down, RxActive */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin {
+ pinctrl-single,pins = <0x194 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P9_29_audio_pin: pinmux_P9_29_audio_pin {
++ pinctrl-single,pins = <0x194 (PIN_OUTPUT_PULLUP | MUX_MODE0)>; }; /* mcasp0_fsx.mcasp0_fsx */
+
+ /* P9_30 (ZCZ ball D12) */
+ P9_30_default_pin: pinmux_P9_30_default_pin {
+@@ -554,6 +827,8 @@
+ pinctrl-single,pins = <0x190 0x25>; }; /* Mode 5, Pull-Down, RxActive */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin {
+ pinctrl-single,pins = <0x190 0x26>; }; /* Mode 6, Pull-Down, RxActive */
++ P9_31_audio_pin: pinmux_P9_31_audio_pin {
++ pinctrl-single,pins = <0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)>; }; /* mcasp0_aclkx.mcasp0_aclkx */
+
+ /* P9_32 VADC */
+ /* P9_33 (ZCZ ball C8 ) AIN4 */
+@@ -806,32 +1081,263 @@
+ pinctrl-3 = <&P8_26_gpio_pd_pin>;
+ };
+
++ P8_27_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_27_default_pin>;
++ pinctrl-1 = <&P8_27_gpio_pin>;
++ pinctrl-2 = <&P8_27_gpio_pu_pin>;
++ pinctrl-3 = <&P8_27_gpio_pd_pin>;
++ pinctrl-4 = <&P8_27_pruout_pin>;
++ pinctrl-5 = <&P8_27_pruin_pin>;
++ pinctrl-6 = <&P8_27_hdmi_pin>;
++ };
++
++ P8_28_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_28_default_pin>;
++ pinctrl-1 = <&P8_28_gpio_pin>;
++ pinctrl-2 = <&P8_28_gpio_pu_pin>;
++ pinctrl-3 = <&P8_28_gpio_pd_pin>;
++ pinctrl-4 = <&P8_28_pruout_pin>;
++ pinctrl-5 = <&P8_28_pruin_pin>;
++ pinctrl-6 = <&P8_28_hdmi_pin>;
++ };
++
++ P8_29_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_29_default_pin>;
++ pinctrl-1 = <&P8_29_gpio_pin>;
++ pinctrl-2 = <&P8_29_gpio_pu_pin>;
++ pinctrl-3 = <&P8_29_gpio_pd_pin>;
++ pinctrl-4 = <&P8_29_pruout_pin>;
++ pinctrl-5 = <&P8_29_pruin_pin>;
++ pinctrl-6 = <&P8_29_hdmi_pin>;
++ };
++
++ P8_30_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_30_default_pin>;
++ pinctrl-1 = <&P8_30_gpio_pin>;
++ pinctrl-2 = <&P8_30_gpio_pu_pin>;
++ pinctrl-3 = <&P8_30_gpio_pd_pin>;
++ pinctrl-4 = <&P8_30_pruout_pin>;
++ pinctrl-5 = <&P8_30_pruin_pin>;
++ pinctrl-6 = <&P8_30_hdmi_pin>;
++ };
++
++ P8_31_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart", "hdmi";
++ pinctrl-0 = <&P8_31_default_pin>;
++ pinctrl-1 = <&P8_31_gpio_pin>;
++ pinctrl-2 = <&P8_31_gpio_pu_pin>;
++ pinctrl-3 = <&P8_31_gpio_pd_pin>;
++ pinctrl-4 = <&P8_31_uart_pin>;
++ pinctrl-5 = <&P8_31_hdmi_pin>;
++ };
++
++ P8_32_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "hdmi";
++ pinctrl-0 = <&P8_32_default_pin>;
++ pinctrl-1 = <&P8_32_gpio_pin>;
++ pinctrl-2 = <&P8_32_gpio_pu_pin>;
++ pinctrl-3 = <&P8_32_gpio_pd_pin>;
++ pinctrl-4 = <&P8_32_hdmi_pin>;
++ };
++
++ P8_33_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "hdmi";
++ pinctrl-0 = <&P8_33_default_pin>;
++ pinctrl-1 = <&P8_33_gpio_pin>;
++ pinctrl-2 = <&P8_33_gpio_pu_pin>;
++ pinctrl-3 = <&P8_33_gpio_pd_pin>;
++ pinctrl-4 = <&P8_33_hdmi_pin>;
++ };
++
++ P8_34_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","pwm", "hdmi";
++ pinctrl-0 = <&P8_34_default_pin>;
++ pinctrl-1 = <&P8_34_gpio_pin>;
++ pinctrl-2 = <&P8_34_gpio_pu_pin>;
++ pinctrl-3 = <&P8_34_gpio_pd_pin>;
++ pinctrl-4 = <&P8_34_pwm_pin>;
++ pinctrl-5 = <&P8_34_hdmi_pin>;
++ };
++
++ P8_35_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "hdmi";
++ pinctrl-0 = <&P8_35_default_pin>;
++ pinctrl-1 = <&P8_35_gpio_pin>;
++ pinctrl-2 = <&P8_35_gpio_pu_pin>;
++ pinctrl-3 = <&P8_35_gpio_pd_pin>;
++ pinctrl-4 = <&P8_35_hdmi_pin>;
++ };
++
++ P8_36_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","pwm", "hdmi";
++ pinctrl-0 = <&P8_36_default_pin>;
++ pinctrl-1 = <&P8_36_gpio_pin>;
++ pinctrl-2 = <&P8_36_gpio_pu_pin>;
++ pinctrl-3 = <&P8_36_gpio_pd_pin>;
++ pinctrl-4 = <&P8_36_pwm_pin>;
++ pinctrl-5 = <&P8_36_hdmi_pin>;
++ };
++
+ P8_37_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart","pwm";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart","pwm", "hdmi";
+ pinctrl-0 = <&P8_37_default_pin>;
+ pinctrl-1 = <&P8_37_gpio_pin>;
+ pinctrl-2 = <&P8_37_gpio_pu_pin>;
+ pinctrl-3 = <&P8_37_gpio_pd_pin>;
+ pinctrl-4 = <&P8_37_uart_pin>;
+ pinctrl-5 = <&P8_37_pwm_pin>;
++ pinctrl-6 = <&P8_37_hdmi_pin>;
+ };
+
+ P8_38_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart","pwm";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd","uart","pwm", "hdmi";
+ pinctrl-0 = <&P8_38_default_pin>;
+ pinctrl-1 = <&P8_38_gpio_pin>;
+ pinctrl-2 = <&P8_38_gpio_pu_pin>;
+ pinctrl-3 = <&P8_38_gpio_pd_pin>;
+ pinctrl-4 = <&P8_38_uart_pin>;
+ pinctrl-5 = <&P8_38_pwm_pin>;
++ pinctrl-6 = <&P8_38_hdmi_pin>;
++ };
++
++ P8_39_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_39_default_pin>;
++ pinctrl-1 = <&P8_39_gpio_pin>;
++ pinctrl-2 = <&P8_39_gpio_pu_pin>;
++ pinctrl-3 = <&P8_39_gpio_pd_pin>;
++ pinctrl-4 = <&P8_39_pruout_pin>;
++ pinctrl-5 = <&P8_39_pruin_pin>;
++ pinctrl-6 = <&P8_39_hdmi_pin>;
++ };
++
++ P8_40_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_40_default_pin>;
++ pinctrl-1 = <&P8_40_gpio_pin>;
++ pinctrl-2 = <&P8_40_gpio_pu_pin>;
++ pinctrl-3 = <&P8_40_gpio_pd_pin>;
++ pinctrl-4 = <&P8_40_pruout_pin>;
++ pinctrl-5 = <&P8_40_pruin_pin>;
++ pinctrl-6 = <&P8_40_hdmi_pin>;
++ };
++
++ P8_41_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_41_default_pin>;
++ pinctrl-1 = <&P8_41_gpio_pin>;
++ pinctrl-2 = <&P8_41_gpio_pu_pin>;
++ pinctrl-3 = <&P8_41_gpio_pd_pin>;
++ pinctrl-4 = <&P8_41_pruout_pin>;
++ pinctrl-5 = <&P8_41_pruin_pin>;
++ pinctrl-6 = <&P8_41_hdmi_pin>;
++ };
++
++ P8_42_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin", "hdmi";
++ pinctrl-0 = <&P8_42_default_pin>;
++ pinctrl-1 = <&P8_42_gpio_pin>;
++ pinctrl-2 = <&P8_42_gpio_pu_pin>;
++ pinctrl-3 = <&P8_42_gpio_pd_pin>;
++ pinctrl-4 = <&P8_42_pruout_pin>;
++ pinctrl-5 = <&P8_42_pruin_pin>;
++ pinctrl-6 = <&P8_42_hdmi_pin>;
++ };
++
++ P8_43_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin","pwm", "hdmi";
++ pinctrl-0 = <&P8_43_default_pin>;
++ pinctrl-1 = <&P8_43_gpio_pin>;
++ pinctrl-2 = <&P8_43_gpio_pu_pin>;
++ pinctrl-3 = <&P8_43_gpio_pd_pin>;
++ pinctrl-4 = <&P8_43_pruout_pin>;
++ pinctrl-5 = <&P8_43_pruin_pin>;
++ pinctrl-6 = <&P8_43_pwm_pin>;
++ pinctrl-7 = <&P8_43_hdmi_pin>;
++ };
++
++ P8_44_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin","pwm", "hdmi";
++ pinctrl-0 = <&P8_44_default_pin>;
++ pinctrl-1 = <&P8_44_gpio_pin>;
++ pinctrl-2 = <&P8_44_gpio_pu_pin>;
++ pinctrl-3 = <&P8_44_gpio_pd_pin>;
++ pinctrl-4 = <&P8_44_pruout_pin>;
++ pinctrl-5 = <&P8_44_pruin_pin>;
++ pinctrl-6 = <&P8_44_pwm_pin>;
++ pinctrl-7 = <&P8_44_hdmi_pin>;
++ };
++
++ P8_45_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin","pwm", "hdmi";
++ pinctrl-0 = <&P8_45_default_pin>;
++ pinctrl-1 = <&P8_45_gpio_pin>;
++ pinctrl-2 = <&P8_45_gpio_pu_pin>;
++ pinctrl-3 = <&P8_45_gpio_pd_pin>;
++ pinctrl-4 = <&P8_45_pruout_pin>;
++ pinctrl-5 = <&P8_45_pruin_pin>;
++ pinctrl-6 = <&P8_45_pwm_pin>;
++ pinctrl-7 = <&P8_45_hdmi_pin>;
++ };
++
++ P8_46_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pruout", "pruin","pwm", "hdmi";
++ pinctrl-0 = <&P8_46_default_pin>;
++ pinctrl-1 = <&P8_46_gpio_pin>;
++ pinctrl-2 = <&P8_46_gpio_pu_pin>;
++ pinctrl-3 = <&P8_46_gpio_pd_pin>;
++ pinctrl-4 = <&P8_46_pruout_pin>;
++ pinctrl-5 = <&P8_46_pruin_pin>;
++ pinctrl-6 = <&P8_46_pwm_pin>;
++ pinctrl-7 = <&P8_46_hdmi_pin>;
+ };
+
+ /************************/
+- /* P9 Header */
++ /* P9 Header */
+ /************************/
+
+ P9_11_pinmux {
+@@ -985,7 +1491,7 @@
+ P9_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "qep", "pruout", "pruin";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "qep", "pruout", "pruin", "audio";
+ pinctrl-0 = <&P9_25_default_pin>;
+ pinctrl-1 = <&P9_25_gpio_pin>;
+ pinctrl-2 = <&P9_25_gpio_pu_pin>;
+@@ -993,6 +1499,7 @@
+ pinctrl-4 = <&P9_25_qep_pin>;
+ pinctrl-5 = <&P9_25_pruout_pin>;
+ pinctrl-6 = <&P9_25_pruin_pin>;
++ pinctrl-7 = <&P9_25_audio_pin>;
+ };
+
+ P9_26_pinmux {
+@@ -1025,7 +1532,7 @@
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin", "audio";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+@@ -1035,12 +1542,13 @@
+ pinctrl-6 = <&P9_28_pwm2_pin>;
+ pinctrl-7 = <&P9_28_pruout_pin>;
+ pinctrl-8 = <&P9_28_pruin_pin>;
++ pinctrl-9 = <&P9_28_audio_pin>;
+ };
+
+ P9_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin", "audio";
+ pinctrl-0 = <&P9_29_default_pin>;
+ pinctrl-1 = <&P9_29_gpio_pin>;
+ pinctrl-2 = <&P9_29_gpio_pu_pin>;
+@@ -1049,6 +1557,7 @@
+ pinctrl-5 = <&P9_29_spi_pin>;
+ pinctrl-6 = <&P9_29_pruout_pin>;
+ pinctrl-7 = <&P9_29_pruin_pin>;
++ pinctrl-8 = <&P9_29_audio_pin>;
+ };
+
+ P9_30_pinmux {
+@@ -1068,7 +1577,7 @@
+ P9_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin", "audio";
+ pinctrl-0 = <&P9_31_default_pin>;
+ pinctrl-1 = <&P9_31_gpio_pin>;
+ pinctrl-2 = <&P9_31_gpio_pu_pin>;
+@@ -1077,6 +1586,7 @@
+ pinctrl-5 = <&P9_31_spi_pin>;
+ pinctrl-6 = <&P9_31_pruout_pin>;
+ pinctrl-7 = <&P9_31_pruin_pin>;
++ pinctrl-8 = <&P9_31_audio_pin>;
+ };
+
+ P9_41_pinmux {
+@@ -1215,12 +1725,134 @@
+ input;
+ dir-changeable;
+ };
++
+ P8_26 {
+ gpio-name = "P8_26";
+ gpio = <&gpio1 29 0>;
+ input;
+ dir-changeable;
+ };
++ P8_27 {
++ gpio-name = "P8_27";
++ gpio = <&gpio2 22 0>;
++ input;
++ dir-changeable;
++ };
++ P8_28 {
++ gpio-name = "P8_28";
++ gpio = <&gpio2 24 0>;
++ input;
++ dir-changeable;
++ };
++ P8_29 {
++ gpio-name = "P8_29";
++ gpio = <&gpio2 23 0>;
++ input;
++ dir-changeable;
++ };
++ P8_30 {
++ gpio-name = "P8_30";
++ gpio = <&gpio2 25 0>;
++ input;
++ dir-changeable;
++ };
++ P8_31 {
++ gpio-name = "P8_31";
++ gpio = <&gpio0 10 0>;
++ input;
++ dir-changeable;
++ };
++ P8_32 {
++ gpio-name = "P8_32";
++ gpio = <&gpio0 11 0>;
++ input;
++ dir-changeable;
++ };
++ P8_33 {
++ gpio-name = "P8_33";
++ gpio = <&gpio0 9 0>;
++ input;
++ dir-changeable;
++ };
++ P8_34 {
++ gpio-name = "P8_34";
++ gpio = <&gpio2 17 0>;
++ input;
++ dir-changeable;
++ };
++ P8_35 {
++ gpio-name = "P8_35";
++ gpio = <&gpio0 8 0>;
++ input;
++ dir-changeable;
++ };
++ P8_36 {
++ gpio-name = "P8_36";
++ gpio = <&gpio2 16 0>;
++ input;
++ dir-changeable;
++ };
++ P8_37 {
++ gpio-name = "P8_37";
++ gpio = <&gpio2 14 0>;
++ input;
++ dir-changeable;
++ };
++ P8_38 {
++ gpio-name = "P8_38";
++ gpio = <&gpio2 15 0>;
++ input;
++ dir-changeable;
++ };
++ P8_39 {
++ gpio-name = "P8_39";
++ gpio = <&gpio2 12 0>;
++ input;
++ dir-changeable;
++ };
++ P8_40 {
++ gpio-name = "P8_40";
++ gpio = <&gpio2 13 0>;
++ input;
++ dir-changeable;
++ };
++ P8_41 {
++ gpio-name = "P8_41";
++ gpio = <&gpio2 10 0>;
++ input;
++ dir-changeable;
++ };
++ P8_42 {
++ gpio-name = "P8_42";
++ gpio = <&gpio2 11 0>;
++ input;
++ dir-changeable;
++ };
++ P8_43 {
++ gpio-name = "P8_43";
++ gpio = <&gpio2 8 0>;
++ input;
++ dir-changeable;
++ };
++ P8_44 {
++ gpio-name = "P8_44";
++ gpio = <&gpio2 9 0>;
++ input;
++ dir-changeable;
++ };
++ P8_45 {
++ gpio-name = "P8_45";
++ gpio = <&gpio2 6 0>;
++ input;
++ dir-changeable;
++ };
++ P8_46 {
++ gpio-name = "P8_46";
++ gpio = <&gpio2 7 0>;
++ input;
++ dir-changeable;
++ };
++
+
+ P9_11 {
+ gpio-name = "P9_11";
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch b/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch
new file mode 100644
index 000000000..c5f253603
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch
@@ -0,0 +1,27 @@
+From 696aa0f4426c2043b86acaccedf69b26fdb5cab1 Mon Sep 17 00:00:00 2001
+From: Adrian Remonda <adrianremonda@gmail.com>
+Date: Sun, 5 Oct 2014 12:50:46 +0200
+Subject: [PATCH 11/13] pinmux-helper: can1
+
+Signed-off-by: Adrian Remonda <adrianremonda@gmail.com>
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common-universal.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+index 46028cd..e95f578 100644
+--- a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+@@ -728,7 +728,7 @@
+ P9_26_uart_pin: pinmux_P9_26_uart_pin {
+ pinctrl-single,pins = <0x180 0x30>; }; /* Mode 0, Pull-Up, RxActive */
+ P9_26_can_pin: pinmux_P9_26_can_pin {
+- pinctrl-single,pins = <0x180 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ pinctrl-single,pins = <0x180 0x12>; }; /* Mode 2, Pull-Up, RxActive */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin {
+ pinctrl-single,pins = <0x180 0x33>; }; /* Mode 3, Pull-Up, RxActive */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin {
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch b/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
new file mode 100644
index 000000000..8265d7aa5
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
@@ -0,0 +1,32 @@
+From c0e2dce293a9177465f09fa5be153f05dd589d1d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Tobias=20M=C3=BCller?= <Tobias_Mueller@twam.info>
+Date: Wed, 12 Nov 2014 20:10:49 +0100
+Subject: [PATCH 12/13] Remove CONFIG_EXPERIMENTAL dependency on
+ CONFIG_GPIO_OF_HELPER as CONFIG_EXPERIMENTAL has been removed with 3.9
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Tobias Müller <Tobias_Mueller@twam.info>
+---
+ drivers/gpio/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
+index 9cab8f6..a15f182 100644
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -86,8 +86,8 @@ config GPIO_SYSFS
+ exported to userspace; this can be useful when debugging.
+
+ config GPIO_OF_HELPER
+- bool "GPIO OF helper device"
+- depends on OF_GPIO && EXPERIMENTAL
++ bool "GPIO OF helper device (EXPERIMENTAL)"
++ depends on OF_GPIO
+ help
+ Say Y here to add an GPIO OF helper driver
+
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch b/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
new file mode 100644
index 000000000..6614eeee6
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
@@ -0,0 +1,111 @@
+From fa387a8df23d7daf9e5d539c3f7224c8574257f7 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Fri, 5 Dec 2014 11:16:40 -0600
+Subject: [PATCH 13/13] pinmux-helper: add P9_19_pinmux & P9_20_pinmux
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ .../arm/boot/dts/am335x-bone-common-universal.dtsi | 73 ++++++++++++++++++----
+ 1 file changed, 62 insertions(+), 11 deletions(-)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+index e95f578..781e33f 100644
+--- a/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common-universal.dtsi
+@@ -628,9 +628,33 @@
+ P9_18_pwm_pin: pinmux_P9_18_pwm_pin {
+ pinctrl-single,pins = <0x158 0x33>; }; /* Mode 3, Pull-Up, RxActive */
+
+- // Leave the cape I2C EEPROM bus alone
+- /* P9_19 (ZCZ ball D17) I2C */
+- /* P9_20 (ZCZ ball D18) I2C */
++ /* P9_19 (ZCZ ball D17) */
++ P9_19_default_pin: pinmux_P9_19_default_pin {
++ pinctrl-single,pins = <0x17c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_19_gpio_pin: pinmux_P9_19_gpio_pin {
++ pinctrl-single,pins = <0x17c 0x2F>; }; /* Mode 7, RxActive */
++ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin {
++ pinctrl-single,pins = <0x17c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin {
++ pinctrl-single,pins = <0x17c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_19_can_pin: pinmux_P9_19_can_pin {
++ pinctrl-single,pins = <0x17c 0x32>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_19_i2c_pin: pinmux_P9_19_i2c_pin {
++ pinctrl-single,pins = <0x17c 0x73>; }; /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) */
++
++ /* P9_20 (ZCZ ball D18) */
++ P9_20_default_pin: pinmux_P9_20_default_pin {
++ pinctrl-single,pins = <0x178 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_20_gpio_pin: pinmux_P9_20_gpio_pin {
++ pinctrl-single,pins = <0x178 0x2F>; }; /* Mode 7, RxActive */
++ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin {
++ pinctrl-single,pins = <0x178 0x37>; }; /* Mode 7, Pull-Up, RxActive */
++ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin {
++ pinctrl-single,pins = <0x178 0x27>; }; /* Mode 7, Pull-Down, RxActive */
++ P9_20_can_pin: pinmux_P9_20_can_pin {
++ pinctrl-single,pins = <0x178 0x12>; }; /* Mode 2, Pull-Up, RxActive */
++ P9_20_i2c_pin: pinmux_P9_20_i2c_pin {
++ pinctrl-single,pins = <0x178 0x73>; }; /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) */
+
+ /* P9_21 (ZCZ ball B17) */
+ P9_21_default_pin: pinmux_P9_21_default_pin {
+@@ -1431,9 +1455,29 @@
+ pinctrl-6 = <&P9_18_pwm_pin>;
+ };
+
+- // I2C Pins
+- // P9_19_pinmux
+- // P9_20_pinmux
++ P9_19_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "can", "i2c";
++ pinctrl-0 = <&P9_19_default_pin>;
++ pinctrl-1 = <&P9_19_gpio_pin>;
++ pinctrl-2 = <&P9_19_gpio_pu_pin>;
++ pinctrl-3 = <&P9_19_gpio_pd_pin>;
++ pinctrl-4 = <&P9_19_can_pin>;
++ pinctrl-5 = <&P9_19_i2c_pin>;
++ };
++
++ P9_20_pinmux {
++ compatible = "bone-pinmux-helper";
++ status = "okay";
++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "can", "i2c";
++ pinctrl-0 = <&P9_20_default_pin>;
++ pinctrl-1 = <&P9_20_gpio_pin>;
++ pinctrl-2 = <&P9_20_gpio_pu_pin>;
++ pinctrl-3 = <&P9_20_gpio_pd_pin>;
++ pinctrl-4 = <&P9_20_can_pin>;
++ pinctrl-5 = <&P9_20_i2c_pin>;
++ };
+
+ P9_21_pinmux {
+ compatible = "bone-pinmux-helper";
+@@ -1902,11 +1946,18 @@
+ input;
+ dir-changeable;
+ };
+-
+- // I2C pins
+- // P9_19
+- // P9_20
+-
++ P9_19 {
++ gpio-name = "P9_19";
++ gpio = <&gpio0 13 0>;
++ input;
++ dir-changeable;
++ };
++ P9_20 {
++ gpio-name = "P9_20";
++ gpio = <&gpio0 12 0>;
++ input;
++ dir-changeable;
++ };
+ P9_21 {
+ gpio-name = "P9_21";
+ gpio = <&gpio0 3 0>;
+--
+2.1.4
+
diff --git a/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch b/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch
new file mode 100644
index 000000000..5a76103bd
--- /dev/null
+++ b/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch
@@ -0,0 +1,76 @@
+From 4814b43ddb6d5509930776f72d48f3009eb63758 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 2 Jun 2015 13:17:05 -0500
+Subject: [PATCH 14/14] gpio-of-helper: idr_alloc
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/gpio/gpio-of-helper.c | 31 ++++++++++++++++++++++---------
+ 1 file changed, 22 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
+index 1c289b2..a9f260b 100644
+--- a/drivers/gpio/gpio-of-helper.c
++++ b/drivers/gpio/gpio-of-helper.c
+@@ -208,11 +208,13 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ irq_flags |= IRQF_TRIGGER_FALLING;
+ }
+
+- if (!idr_pre_get(&info->idr, GFP_KERNEL)) {
+- dev_err(dev, "Failed on idr_pre_get of '%s'\n", name);
+- err = -ENOMEM;
+- goto err_no_mem;
+- }
++// if (!idr_pre_get(&info->idr, GFP_KERNEL)) {
++// dev_err(dev, "Failed on idr_pre_get of '%s'\n", name);
++// err = -ENOMEM;
++// goto err_no_mem;
++// }
++
++ idr_preload(GFP_KERNEL);
+
+ entry = devm_kzalloc(dev, sizeof(*entry), GFP_KERNEL);
+ if (entry == NULL) {
+@@ -243,8 +245,19 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ }
+
+ /* all done; insert */
+- err = idr_get_new(&info->idr, entry, &entry->id);
+- if (IS_ERR_VALUE(err)) {
++// err = idr_get_new(&info->idr, entry, &entry->id);
++// if (IS_ERR_VALUE(err)) {
++// dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
++// goto err_fail_idr;
++// }
++
++ err = idr_alloc(&info->idr, entry, 0, 0, GFP_NOWAIT);
++ if (err >= 0)
++ entry->id = err;
++
++ idr_preload_end();
++
++ if (err < 0) {
+ dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
+ goto err_fail_idr;
+ }
+@@ -374,7 +387,7 @@ static int gpio_of_helper_remove(struct platform_device *pdev)
+ }
+
+ #ifdef CONFIG_PM
+-#ifdef CONFIG_PM_RUNTIME
++//#ifdef CONFIG_PM_RUNTIME
+ static int gpio_of_helper_runtime_suspend(struct device *dev)
+ {
+ /* place holder */
+@@ -386,7 +399,7 @@ static int gpio_of_helper_runtime_resume(struct device *dev)
+ /* place holder */
+ return 0;
+ }
+-#endif /* CONFIG_PM_RUNTIME */
++//#endif /* CONFIG_PM_RUNTIME */
+
+ static struct dev_pm_ops gpio_of_helper_pm_ops = {
+ SET_RUNTIME_PM_OPS(gpio_of_helper_runtime_suspend,
+--
+2.1.4
+
diff --git a/patches/defconfig b/patches/defconfig
index 85547190b..224dcf5d5 100644
--- a/patches/defconfig
+++ b/patches/defconfig
@@ -1679,6 +1679,7 @@ CONFIG_ALTERA_STAPL=m
# Argus cape driver for beaglebone black
#
CONFIG_CAPE_BONE_ARGUS=y
+CONFIG_BEAGLEBONE_PINMUX_HELPER=y
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
@@ -2616,6 +2617,7 @@ CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
# CONFIG_DEBUG_GPIO is not set
CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_OF_HELPER=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MAX730X=m
diff --git a/patches/ref_omap2plus_defconfig b/patches/ref_omap2plus_defconfig
index d2fc44dea..d8b4a52b8 100644
--- a/patches/ref_omap2plus_defconfig
+++ b/patches/ref_omap2plus_defconfig
@@ -1238,6 +1238,7 @@ CONFIG_SENSORS_LIS3_I2C=m
# Argus cape driver for beaglebone black
#
# CONFIG_CAPE_BONE_ARGUS is not set
+# CONFIG_BEAGLEBONE_PINMUX_HELPER is not set
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
@@ -1841,6 +1842,7 @@ CONFIG_OF_GPIO=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
+# CONFIG_GPIO_OF_HELPER is not set
#
# Memory mapped GPIO drivers
diff --git a/version.sh b/version.sh
index 4b391dd02..312e3e58e 100644
--- a/version.sh
+++ b/version.sh
@@ -14,7 +14,7 @@ toolchain="gcc_linaro_gnueabihf_4_9"
#Kernel/Build
KERNEL_REL=4.1
KERNEL_TAG=${KERNEL_REL}-rc6
-BUILD=bone6
+BUILD=bone6.1
#v3.X-rcX + upto SHA
#prev_KERNEL_SHA=""
--
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