diff --git a/patch.sh b/patch.sh
index f07879c8edc5932fe94bcfed5ef778c641d527b6..059201ba2d6e30148c8de83ef8d70265ac4307b6 100644
--- a/patch.sh
+++ b/patch.sh
@@ -81,6 +81,24 @@ sgx () {
${git} "${DIR}/patches/sgx/0007-Changes-according-to-TI-for-SGX-support.patch"
}
+dts_bone () {
+ echo "dir: dts-bone"
+ ${git} "${DIR}/patches/dts-bone/0001-arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch"
+
+}
+
+dts_bone_capes () {
+ echo "dir: dts-bone-capes"
+ ${git} "${DIR}/patches/dts-bone-capes/0001-capes-ttyO1-ttyO2-ttyO4.patch"
+ ${git} "${DIR}/patches/dts-bone-capes/0002-capes-Makefile.patch"
+}
+
+static_capes () {
+ echo "dir: static-capes"
+ ${git} "${DIR}/patches/static-capes/0001-Added-Argus-UPS-cape-support.patch"
+ ${git} "${DIR}/patches/static-capes/0002-Added-Argus-UPS-cape-support-BBW.patch"
+}
+
saucy () {
echo "dir: saucy"
#Ubuntu Saucy: so Ubuntu decided to enable almost every Warning -> Error option...
@@ -93,6 +111,11 @@ dts
fixes
usb
#sgx
+
+dts_bone
+dts_bone_capes
+static_capes
+
saucy
echo "patch.sh ran successful"
diff --git a/patches/defconfig b/patches/defconfig
index 66044a083c967a0f6a6aa56285135b4152130ce0..f04dd247126ed49a780c8e4604ca8fe3f5045fb9 100644
--- a/patches/defconfig
+++ b/patches/defconfig
@@ -1641,6 +1641,11 @@ CONFIG_SENSORS_LIS3_I2C=m
# Intel MIC Card Driver
#
+#
+# Argus cape driver for beaglebone black
+#
+CONFIG_CAPE_BONE_ARGUS=y
+
#
# SCSI device support
#
diff --git a/patches/dts-bone-capes/0001-capes-ttyO1-ttyO2-ttyO4.patch b/patches/dts-bone-capes/0001-capes-ttyO1-ttyO2-ttyO4.patch
new file mode 100644
index 0000000000000000000000000000000000000000..a68e92d6543a9a560483b8102704f407b775cdda
--- /dev/null
+++ b/patches/dts-bone-capes/0001-capes-ttyO1-ttyO2-ttyO4.patch
@@ -0,0 +1,150 @@
+From f71ac5dd99227a8e233dc1443b0bccebc1496469 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 13 Mar 2014 14:26:18 -0500
+Subject: [PATCH] capes: ttyO1/ttyO2/ttyO4
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-ttyO1.dts | 15 +++++++++++++++
+ arch/arm/boot/dts/am335x-bone-ttyO2.dts | 15 +++++++++++++++
+ arch/arm/boot/dts/am335x-bone-ttyO4.dts | 15 +++++++++++++++
+ arch/arm/boot/dts/am335x-boneblack-ttyO1.dts | 15 +++++++++++++++
+ arch/arm/boot/dts/am335x-boneblack-ttyO2.dts | 15 +++++++++++++++
+ arch/arm/boot/dts/am335x-boneblack-ttyO4.dts | 15 +++++++++++++++
+ 6 files changed, 90 insertions(+)
+ create mode 100644 arch/arm/boot/dts/am335x-bone-ttyO1.dts
+ create mode 100644 arch/arm/boot/dts/am335x-bone-ttyO2.dts
+ create mode 100644 arch/arm/boot/dts/am335x-bone-ttyO4.dts
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-ttyO1.dts
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-ttyO2.dts
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-ttyO4.dts
+
+diff --git a/arch/arm/boot/dts/am335x-bone-ttyO1.dts b/arch/arm/boot/dts/am335x-bone-ttyO1.dts
+new file mode 100644
+index 0000000..7e6a327
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-ttyO1.dts
+@@ -0,0 +1,15 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "am335x-bone.dts"
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/am335x-bone-ttyO2.dts b/arch/arm/boot/dts/am335x-bone-ttyO2.dts
+new file mode 100644
+index 0000000..3e902ce
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-ttyO2.dts
+@@ -0,0 +1,15 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "am335x-bone.dts"
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart2_pins>;
++
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/am335x-bone-ttyO4.dts b/arch/arm/boot/dts/am335x-bone-ttyO4.dts
+new file mode 100644
+index 0000000..915ec74
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-ttyO4.dts
+@@ -0,0 +1,15 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "am335x-bone.dts"
++
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart4_pins>;
++
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-ttyO1.dts b/arch/arm/boot/dts/am335x-boneblack-ttyO1.dts
+new file mode 100644
+index 0000000..2d3a801
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-boneblack-ttyO1.dts
+@@ -0,0 +1,15 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "am335x-boneblack.dts"
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-ttyO2.dts b/arch/arm/boot/dts/am335x-boneblack-ttyO2.dts
+new file mode 100644
+index 0000000..78e383b
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-boneblack-ttyO2.dts
+@@ -0,0 +1,15 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "am335x-boneblack.dts"
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart2_pins>;
++
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-ttyO4.dts b/arch/arm/boot/dts/am335x-boneblack-ttyO4.dts
+new file mode 100644
+index 0000000..5c306af
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-boneblack-ttyO4.dts
+@@ -0,0 +1,15 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "am335x-boneblack.dts"
++
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart4_pins>;
++
++ status = "okay";
++};
+--
+1.9.0
+
diff --git a/patches/dts-bone-capes/0002-capes-Makefile.patch b/patches/dts-bone-capes/0002-capes-Makefile.patch
new file mode 100644
index 0000000000000000000000000000000000000000..aebc586c5437aed0e3534c48714f171d5a7de7a8
--- /dev/null
+++ b/patches/dts-bone-capes/0002-capes-Makefile.patch
@@ -0,0 +1,31 @@
+From 3e4725614008f2e79714d20b0b20c8a25e20e232 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 13 Mar 2014 14:29:32 -0500
+Subject: [PATCH 2/2] capes: Makefile
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/Makefile | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index d57c1a6..a917a9f 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -197,7 +197,13 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
+ am335x-evm.dtb \
+ am335x-evmsk.dtb \
+ am335x-bone.dtb \
++ am335x-bone-ttyO1.dtb \
++ am335x-bone-ttyO2.dtb \
++ am335x-bone-ttyO4.dtb \
+ am335x-boneblack.dtb \
++ am335x-boneblack-ttyO1.dtb \
++ am335x-boneblack-ttyO2.dtb \
++ am335x-boneblack-ttyO4.dtb \
+ am335x-nano.dtb \
+ am335x-base0033.dtb \
+ am3517-evm.dtb \
+--
+1.9.0
+
diff --git a/patches/dts-bone/0001-arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch b/patches/dts-bone/0001-arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch
new file mode 100644
index 0000000000000000000000000000000000000000..ac68629c028c1b93727e3a863c5a96b01e7d6adc
--- /dev/null
+++ b/patches/dts-bone/0001-arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch
@@ -0,0 +1,46 @@
+From b6e2c817edfc6d73874cf833daffe1be6c7ed8bb Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Thu, 13 Mar 2014 14:18:52 -0500
+Subject: [PATCH] arm: dts: am335x-bone-common: add
+ uart2_pins/uart4_pins/uart5_pins
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am335x-bone-common.dtsi | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
+index f85cabc..5270d18 100644
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -105,6 +105,27 @@
+ >;
+ };
+
++ uart2_pins: pinmux_uart2_pins {
++ pinctrl-single,pins = <
++ 0x150 0x21 /* spi0_sclk.uart2_rxd | MODE1 */
++ 0x154 0x01 /* spi0_d0.uart2_txd | MODE1 */
++ >;
++ };
++
++ uart4_pins: pinmux_uart4_pins {
++ pinctrl-single,pins = <
++ 0x070 0x26 /* gpmc_wait0.uart4_rxd | MODE6 */
++ 0x074 0x06 /* gpmc_wpn.uart4_txd | MODE6 */
++ >;
++ };
++
++ uart5_pins: pinmux_uart5_pins {
++ pinctrl-single,pins = <
++ 0x0C4 0x24 /* lcd_data9.uart5_rxd | MODE4 */
++ 0x0C0 0x04 /* lcd_data8.uart5_txd | MODE4 */
++ >;
++ };
++
+ clkout2_pin: pinmux_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+--
+1.9.0
+
diff --git a/patches/ref_omap2plus_defconfig b/patches/ref_omap2plus_defconfig
index 537ae58a6681907082877ea12c6c59114483ccc1..016a8e472bb75fca5c8d9ffaed8b78662d747eda 100644
--- a/patches/ref_omap2plus_defconfig
+++ b/patches/ref_omap2plus_defconfig
@@ -1070,6 +1070,11 @@ CONFIG_SENSORS_LIS3_I2C=m
# Intel MIC Card Driver
#
+#
+# Argus cape driver for beaglebone black
+#
+# CONFIG_CAPE_BONE_ARGUS is not set
+
#
# SCSI device support
#
diff --git a/patches/static-capes/0001-Added-Argus-UPS-cape-support.patch b/patches/static-capes/0001-Added-Argus-UPS-cape-support.patch
new file mode 100644
index 0000000000000000000000000000000000000000..e42357a2c67a2210f579043c1dcb6cdeaf941c17
--- /dev/null
+++ b/patches/static-capes/0001-Added-Argus-UPS-cape-support.patch
@@ -0,0 +1,905 @@
+From 87c723e6bbbdff97cd0ede59b4ea0ef612c25cda Mon Sep 17 00:00:00 2001
+From: Dave Lambert <dave@lambsys.com>
+Date: Wed, 5 Mar 2014 23:31:24 -0600
+Subject: [PATCH 1/2] Added Argus UPS cape support.
+
+Signed-off-by: Dave Lambert <dave@lambsys.com>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ .../boot/dts/am335x-boneblack-cape-bone-argus.dts | 398 ++++++++++++++++++++
+ drivers/misc/Kconfig | 1 +
+ drivers/misc/Makefile | 1 +
+ drivers/misc/cape_bone_argus/Kconfig | 7 +
+ drivers/misc/cape_bone_argus/Makefile | 5 +
+ drivers/misc/cape_bone_argus/cape_bone_argus.c | 415 +++++++++++++++++++++
+ 7 files changed, 828 insertions(+)
+ create mode 100644 arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts
+ create mode 100644 drivers/misc/cape_bone_argus/Kconfig
+ create mode 100644 drivers/misc/cape_bone_argus/Makefile
+ create mode 100644 drivers/misc/cape_bone_argus/cape_bone_argus.c
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index a96c269..2286fb6 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -232,6 +232,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
+ am335x-boneblack-ttyO1.dtb \
+ am335x-boneblack-ttyO2.dtb \
+ am335x-boneblack-ttyO4.dtb \
++ am335x-boneblack-cape-bone-argus.dtb \
+ am335x-nano.dtb \
+ am335x-base0033.dtb \
+ am3517-evm.dtb \
+diff --git a/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts b/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts
+new file mode 100644
+index 0000000..c4c7556
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts
+@@ -0,0 +1,398 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++/dts-v1/;
++
++#include "am33xx.dtsi"
++
++/ {
++ model = "TI AM335x BeagleBone";
++ compatible = "ti,am335x-bone", "ti,am33xx";
++
++ cpus {
++ cpu@0 {
++ cpu0-supply = <&dcdc2_reg>;
++ };
++ };
++
++ memory {
++ device_type = "memory";
++ reg = <0x80000000 0x10000000>; /* 256 MB */
++ };
++
++ leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&user_leds_s0>;
++
++ compatible = "gpio-leds";
++
++ led@2 {
++ label = "beaglebone:green:heartbeat";
++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++
++ led@3 {
++ label = "beaglebone:green:mmc0";
++ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc0";
++ default-state = "off";
++ };
++
++ led@4 {
++ label = "beaglebone:green:usr2";
++ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "cpu0";
++ default-state = "off";
++ };
++
++ led@5 {
++ label = "beaglebone:green:usr3";
++ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc1";
++ default-state = "off";
++ };
++ };
++
++ vmmcsd_fixed: fixedregulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "vmmcsd_fixed";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++};
++
++&am33xx_pinmux {
++ pinctrl-names = "default";
++/* pinctrl-0 = <&clkout2_pin>; clash with argus-ups */
++
++ user_leds_s0: user_leds_s0 {
++ pinctrl-single,pins = <
++ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
++ 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
++ 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
++ 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
++ >;
++ };
++
++ i2c0_pins: pinmux_i2c0_pins {
++ pinctrl-single,pins = <
++ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
++ >;
++ };
++
++ i2c2_pins: pinmux_i2c2_pins {
++ pinctrl-single,pins = <
++ 0x178 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_ctsn.i2c2_sda */
++ 0x17c 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_rtsn.i2c2_scl */
++ >;
++ };
++
++ uart0_pins: pinmux_uart0_pins {
++ pinctrl-single,pins = <
++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
++ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
++ >;
++ };
++
++ uart4_pins: pinmux_uart4_pins {
++ pinctrl-single,pins = <
++ 0x070 0x26 /* gpmc_wait0.uart4_rxd | MODE6 */
++ 0x074 0x06 /* gpmc_wpn.uart4_txd | MODE6 */
++ >;
++ };
++
++ clkout2_pin: pinmux_clkout2_pin {
++ pinctrl-single,pins = <
++ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
++ >;
++ };
++
++ cpsw_default: cpsw_default {
++ pinctrl-single,pins = <
++ /* Slave 1 */
++ 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
++ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
++ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
++ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
++ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
++ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
++ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
++ 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
++ 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
++ 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
++ 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
++ 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
++ 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
++ >;
++ };
++
++ cpsw_sleep: cpsw_sleep {
++ pinctrl-single,pins = <
++ /* Slave 1 reset value */
++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ >;
++ };
++
++ davinci_mdio_default: davinci_mdio_default {
++ pinctrl-single,pins = <
++ /* MDIO */
++ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
++ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
++ >;
++ };
++
++ davinci_mdio_sleep: davinci_mdio_sleep {
++ pinctrl-single,pins = <
++ /* MDIO reset value */
++ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ >;
++ };
++
++ mmc1_pins: pinmux_mmc1_pins {
++ pinctrl-single,pins = <
++ 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
++ >;
++ };
++
++ argus_ups_pins: pinmux_argus_ups_pins { /* Set up pinmux */
++ pinctrl-single,pins = <
++ 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
++ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_cs0.gpio0_5 */
++ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_d1.gpio0_4 */
++ 0x090 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_advn_ale.gpio_2 */
++ 0x094 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
++ 0x09c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
++ 0x098 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_gpmc_wen.gpio2_4 */
++ 0x1b4 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0_20 */
++ 0x164 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
++ >;
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++
++ status = "okay";
++};
++
++/*&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart4_pins>;
++
++ status = "okay";
++};*/
++
++&usb {
++ status = "okay";
++
++ control@44e10000 {
++ status = "okay";
++ };
++
++ usb-phy@47401300 {
++ status = "okay";
++ };
++
++ usb-phy@47401b00 {
++ status = "okay";
++ };
++
++ usb@47401000 {
++ status = "okay";
++ };
++
++ usb@47401800 {
++ status = "okay";
++ dr_mode = "host";
++ };
++
++ dma-controller@07402000 {
++ status = "okay";
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ tps: tps@24 {
++ reg = <0x24>;
++ };
++
++ baseboard_eeprom: baseboard_eeprom@50 {
++ compatible = "at,24c256";
++ reg = <0x50>;
++ };
++};
++
++&i2c2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c2_pins>;
++
++ clock-frequency = <100000>;
++
++ cape_eeprom0: cape_eeprom0@54 {
++ compatible = "at,24c256";
++ reg = <0x54>;
++ };
++
++ cape_eeprom1: cape_eeprom1@55 {
++ compatible = "at,24c256";
++ reg = <0x55>;
++ };
++
++ cape_eeprom2: cape_eeprom2@56 {
++ compatible = "at,24c256";
++ reg = <0x56>;
++ };
++
++ cape_eeprom3: cape_eeprom3@57 {
++ compatible = "at,24c256";
++ reg = <0x57>;
++ };
++};
++
++#include "tps65217.dtsi"
++
++&tps {
++ regulators {
++ dcdc1_reg: regulator@0 {
++ regulator-always-on;
++ };
++
++ dcdc2_reg: regulator@1 {
++ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
++ regulator-name = "vdd_mpu";
++ regulator-min-microvolt = <925000>;
++ regulator-max-microvolt = <1325000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ dcdc3_reg: regulator@2 {
++ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
++ regulator-name = "vdd_core";
++ regulator-min-microvolt = <925000>;
++ regulator-max-microvolt = <1150000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ ldo1_reg: regulator@3 {
++ regulator-always-on;
++ };
++
++ ldo2_reg: regulator@4 {
++ regulator-always-on;
++ };
++
++ ldo3_reg: regulator@5 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ };
++
++ ldo4_reg: regulator@6 {
++ regulator-always-on;
++ };
++ };
++};
++
++&cpsw_emac0 {
++ phy_id = <&davinci_mdio>, <0>;
++ phy-mode = "mii";
++};
++
++&cpsw_emac1 {
++ phy_id = <&davinci_mdio>, <1>;
++ phy-mode = "mii";
++};
++
++&mac {
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&cpsw_default>;
++ pinctrl-1 = <&cpsw_sleep>;
++
++};
++
++&davinci_mdio {
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&davinci_mdio_default>;
++ pinctrl-1 = <&davinci_mdio_sleep>;
++};
++
++
++&mmc1 {
++ status = "okay";
++ bus-width = <0x4>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc1_pins>;
++ cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
++ cd-inverted;
++ vmmc-supply = <&vmmcsd_fixed>;
++};
++
++/ {
++ cpus {
++ cpu@0 {
++ cpu0-supply = <&dcdc2_reg>;
++ /*
++ * To consider voltage drop between PMIC and SoC,
++ * tolerance value is reduced to 2% from 4% and
++ * voltage value is increased as a precaution.
++ */
++ operating-points = <
++ /* kHz uV */
++ 1000000 1325000
++ 800000 1300000
++ 600000 1112000
++ 300000 969000
++ >;
++ };
++ };
++ argus-ups {
++ compatible = "argus-ups";
++ status = "okay";
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&argus_ups_pins>; /* Refer to previous label */
++ /* This section communicates the gpio numbers to the driver module */
++ /* Note that gpio controllers appear to be numbered from 1-n here rather than 0-(n-1)????? */
++ gpios = <&gpio0 30 0>, /* Request */
++ <&gpio0 5 0>, /* Acknowledge */
++ <&gpio0 4 0>, /* Watchdog */
++ <&gpio2 2 0>, /* LED 1 Green */
++ <&gpio2 3 0>, /* LED 1 Red */
++ <&gpio2 5 0>, /* LED 2 Green */
++ <&gpio2 4 0>, /* LED 2 Red */
++ <&gpio0 20 0>, /* General Output #1 */
++ <&gpio0 7 0>; /* General Output #2 */
++ debug = <1>;
++ shutdown = <1>;
++ };
++};
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 6cb388e..4a01031 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -525,5 +525,6 @@ source "drivers/misc/altera-stapl/Kconfig"
+ source "drivers/misc/mei/Kconfig"
+ source "drivers/misc/vmw_vmci/Kconfig"
+ source "drivers/misc/mic/Kconfig"
++source "drivers/misc/cape_bone_argus/Kconfig"
+ source "drivers/misc/genwqe/Kconfig"
+ endmenu
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index 99b9424..a9f4040 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -53,4 +53,5 @@ obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/
+ obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
+ obj-$(CONFIG_SRAM) += sram.o
+ obj-y += mic/
++obj-y += cape_bone_argus/
+ obj-$(CONFIG_GENWQE) += genwqe/
+diff --git a/drivers/misc/cape_bone_argus/Kconfig b/drivers/misc/cape_bone_argus/Kconfig
+new file mode 100644
+index 0000000..1b39661
+--- /dev/null
++++ b/drivers/misc/cape_bone_argus/Kconfig
+@@ -0,0 +1,7 @@
++comment "Argus cape driver for beaglebone black"
++
++config CAPE_BONE_ARGUS
++ tristate "Argus Cape Driver"
++ default M
++ help
++ Argus Cape Driver
+diff --git a/drivers/misc/cape_bone_argus/Makefile b/drivers/misc/cape_bone_argus/Makefile
+new file mode 100644
+index 0000000..5482562
+--- /dev/null
++++ b/drivers/misc/cape_bone_argus/Makefile
+@@ -0,0 +1,5 @@
++#
++# Makefile for Argus cape
++#
++
++obj-$(CONFIG_CAPE_BONE_ARGUS) += cape_bone_argus.o
+diff --git a/drivers/misc/cape_bone_argus/cape_bone_argus.c b/drivers/misc/cape_bone_argus/cape_bone_argus.c
+new file mode 100644
+index 0000000..c434218
+--- /dev/null
++++ b/drivers/misc/cape_bone_argus/cape_bone_argus.c
+@@ -0,0 +1,415 @@
++/* -*- linux-c -*- */
++
++/* Linux Kernel Module for Breakaway Systems UPS control.
++ *
++ * PUBLIC DOMAIN
++ */
++
++#include <linux/syscalls.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/reboot.h>
++#include <linux/fs.h>
++#include <linux/uaccess.h>
++#include <linux/delay.h>
++#include <linux/gpio.h>
++#include <linux/mount.h>
++#include <linux/workqueue.h>
++#include <linux/cdev.h>
++#include <linux/platform_device.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/consumer.h>
++#include <linux/of_gpio.h>
++
++/* Module to sync file systems leaving them mounted read-only,
++ * then signal the UPS that it is safe to remove
++ * power, and finally halt the processor.
++ * Also to allow kicking the watchdog from user mode.
++ */
++#undef DEBUG_ARGUS
++
++#define N_GPIOS 9 /* Total number of GPIOS used */
++
++#define REQ_GPIO_IDX 0 /* Indices got GPIOS */
++#define ACK_GPIO_IDX 1
++#define WDG_GPIO_IDX 2
++#define LED1_GREEN_IDX 3
++#define LED1_RED_IDX 4
++#define LED2_GREEN_IDX 5
++#define LED2_RED_IDX 6
++#define GEN_OUT1_IDX 7
++#define GEN_OUT2_IDX 8
++
++static struct argus_ups_info { /* As there is only one UPS device we can make this static */
++ struct fasync_struct *async_queue; /* asynchronous readers */
++ struct platform_device *pdev;
++ struct pwm_device *pwm_dev;
++ struct gpio gpios[N_GPIOS];
++} info = {NULL, NULL, NULL, /* Some fields filled in by device tree, probe, etc. */
++ {
++ {-1, GPIOF_IN, "Powerdown request"},
++ {-1, GPIOF_OUT_INIT_LOW, "Powerdown acknowledge" },
++ {-1, GPIOF_OUT_INIT_LOW, "Watchdog"},
++ {-1, GPIOF_OUT_INIT_LOW, "LED 1 Green"},
++ {-1, GPIOF_OUT_INIT_LOW, "LED 1 Red"},
++ {-1, GPIOF_OUT_INIT_LOW, "LED 2 Green"},
++ {-1, GPIOF_OUT_INIT_LOW, "LED 2 Red"},
++ {-1, GPIOF_OUT_INIT_LOW, "General Output #1"},
++ {-1, GPIOF_OUT_INIT_LOW, "General Output #2"}
++ },
++};
++
++
++static const struct of_device_id argus_ups_of_ids[] = {
++ { .compatible = "argus-ups" },
++ { }
++};
++
++static int argus_ups_major; /* Major device number */
++
++static struct class *argus_ups_class; /* /sys/class */
++
++dev_t argus_ups_dev; /* Device number */
++
++static struct cdev *argus_ups_cdev; /* Character device details */
++
++static void argus_ups_function(struct work_struct *ignored); /* Work function */
++
++static DECLARE_DELAYED_WORK(argus_ups_work, argus_ups_function); /* Kernel workqueue glue */
++
++static struct workqueue_struct *argus_ups_workqueue; /* Kernel workqueue */
++
++static int debug = 0;
++module_param(debug, int, S_IRUGO);
++MODULE_PARM_DESC(debug, "Debug flag");
++
++static int shutdown = 1;
++module_param(shutdown, int, S_IRUGO);
++MODULE_PARM_DESC(shutdown, "Shutdown flag");
++
++#ifdef DEBUG_ARGUS
++static char* fs_type_names[] = {"vfat", "ext4"}; /* File system names that may need syncing. */
++#endif
++
++/* Just kick watchdog */
++
++static ssize_t argus_ups_write(struct file *filp, const char __user *buf, size_t count,
++ loff_t *f_pos)
++{
++ int i;
++ if (debug >= 3) {
++ printk("Writing to watchdog - count:%d\n", count);
++ }
++ for (i = 0; i < count; i++) {
++ gpio_set_value(info.gpios[WDG_GPIO_IDX].gpio, 1); /* Set it */
++ msleep(10); /* Wait */
++ gpio_set_value(info.gpios[WDG_GPIO_IDX].gpio, 0); /* End clearing it */
++ msleep(10);
++ }
++ return count; /* Always returns what we sent, regardsless */
++}
++
++static long argus_ups_ioctl(struct file *file,
++ unsigned int ioctl,
++ unsigned long param)
++{
++ if (debug >= 4) {
++ printk(KERN_ERR "ioctl: %d, param: %ld\n", ioctl, param);
++ }
++ switch(ioctl) {
++ case 10001: {
++ debug = param;
++ printk("Debug set to %d\n", debug);
++ break;
++ }
++ case 10002: {
++ unsigned char value = param & 0x0F;
++ unsigned char mask = (param >> 4) & 0x0F;
++ int i; /* Loop iterator */
++ if (mask == 0) {
++ printk(KERN_ERR "Pointless mask of zero!\n");
++ }
++ for (i = 0; i < 4; i++) { /* For all four LEDS */
++ if (mask & (1 << i)) { /* Only masked values */
++ if (value & (1 << i)) { /* On - so gpio is hi */
++ if (debug >= 4) {
++ printk("Setting %d hi, ",
++ info.gpios[LED1_GREEN_IDX + i].gpio);
++ }
++ gpio_set_value(info.gpios[LED1_GREEN_IDX + i].gpio, 1);
++ }
++ else { /* Off - so gpio is lo */
++ if (debug >= 4) {
++ printk("Setting %d lo, ",
++ info.gpios[LED1_GREEN_IDX + i].gpio);
++ }
++ gpio_set_value(info.gpios[LED1_GREEN_IDX + i].gpio, 0);
++ }
++ }
++ }
++ if (debug >= 4) {
++ printk("\n");
++ }
++ break;
++ }
++ case 10003: {
++ gpio_set_value(info.gpios[GEN_OUT1_IDX].gpio, param & 1);
++ break;
++ }
++ case 10004: {
++ gpio_set_value(info.gpios[GEN_OUT2_IDX].gpio, param & 1);
++ break;
++ }
++ default:
++ {
++ printk(KERN_ERR "Invalid ioctl %d\n", ioctl);
++ return -1;
++ }
++ }
++ return 0;
++}
++
++static int argus_ups_fasync(int fd, struct file *filp, int mode)
++{
++ printk(KERN_ERR "In argus_ups_fasync() fd:%d, filp:%p, mode:%d\n", fd, filp, mode);
++ return fasync_helper(fd, filp, mode, &info.async_queue);
++}
++
++static struct file_operations argus_ups_fops = { /* Only file operation is to kick watchdog via a write */
++ .owner = THIS_MODULE,
++ .llseek = NULL,
++ .read = NULL,
++ .unlocked_ioctl = argus_ups_ioctl,
++ .write = argus_ups_write,
++ .open = NULL,
++ .release = NULL,
++ .fasync = argus_ups_fasync,
++};
++
++#ifdef DEBUG_ARGUS
++static void remount_sb(struct super_block *sb)
++{
++ int flags = MS_RDONLY;
++ int result = sb->s_op->remount_fs(sb, &flags, "");
++ if (debug) {
++ printk("Processing superblock %p\n", sb);
++ printk("Remount operation returned %d\n", result);
++ }
++}
++#endif
++
++static void argus_ups_function(struct work_struct *ignored)
++{
++ static int testdata = 0; /* Data for test */
++ int i; /* Iterator */
++ testdata++;
++ if (!gpio_get_value(info.gpios[REQ_GPIO_IDX].gpio)) {
++ queue_delayed_work(argus_ups_workqueue, &argus_ups_work, HZ/100); /* Re-queue in 10mS*/
++ return;
++ }
++ printk(KERN_ERR "Request received\n");
++ if (debug) {
++ printk("Shutdown request received from UPS\n");
++ }
++ if (!shutdown) {
++ printk("Shutdown request ignored\n");
++ return;
++ }
++
++ if (debug) {
++ printk("Sending async kill SIGIO to %p\n", info.async_queue);
++ }
++ if (info.async_queue) { /* Try and tell usermode to halt system */
++ kill_fasync(&info.async_queue, SIGIO, POLL_IN);
++ }
++ gpio_set_value(info.gpios[LED1_GREEN_IDX].gpio, 0); /* Turn off green LED1 */
++ for (i = 0; i < 300; i++) { /* Toggle acknowledge at 10 Hz for 15 seconds */
++ if (debug >= 2) {
++ printk("Waiting for first shutdown request:%d\n", i);
++ }
++ gpio_set_value(info.gpios[ACK_GPIO_IDX].gpio, i & 1); /* Toggle acknowledge */
++ gpio_set_value(info.gpios[LED1_RED_IDX].gpio, i & 1); /* and LED1 red */
++ msleep(50); /* Wait in 50ms increments */
++ }
++
++ {
++ char *argv[] = { "/sbin/halt", NULL };
++ static char *envp[] = {
++ "HOME=/",
++ "TERM=linux",
++ "PATH=/usr/local/bin:/usr/bin:/bin:/usr/local/sbin:/usr/sbin:/sbin", NULL };
++
++ call_usermodehelper( argv[0], argv, envp, UMH_WAIT_PROC );
++ }
++ for (i = 0; i < 300; i++) { /* Toggle acknowledge at 10 Hz for 15 more seconds */
++ if (debug >= 2) {
++ printk("Waiting for second shutdown request:%d\n", i);
++ }
++ gpio_set_value(info.gpios[ACK_GPIO_IDX].gpio, i & 1); /* Toggle acknowledge */
++ gpio_set_value(info.gpios[LED1_RED_IDX].gpio, i & 1); /* and LED1 red */
++ msleep(50); /* Wait in 50ms increments */
++ }
++ printk(KERN_ERR "Usermode failed to halt system\n");
++ kernel_halt(); /* Last resort - may give some oopss */
++}
++
++
++static int argus_ups_probe(struct platform_device *pdev) /* Entry point */
++{
++ struct pinctrl *pinctrl;
++ struct device_node *pnode = pdev->dev.of_node;
++ int i;
++ int ret;
++ printk("Init UPS module - debug=%d, shutdown=%d\n",
++ debug, shutdown);
++ platform_set_drvdata(pdev, &info);
++ info.pdev = pdev;
++ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
++ if (IS_ERR(pinctrl)) {
++ dev_warn(&pdev->dev,
++ "pins are not configured from the driver\n");
++ return -1;
++ }
++ ret = of_property_read_u32(pnode, "debug", &debug);
++ if (ret != 0) {
++ dev_err(&pdev->dev, "Unable to read debug parameter\n");
++ }
++ else {
++ printk("Debug parameter read from DT:%d\n", debug);
++ }
++
++ ret = of_property_read_u32(pnode, "shutdown", &shutdown);
++ if (ret != 0) {
++ dev_err(&pdev->dev, "Unable to read shutdown parameter\n");
++ }
++ else {
++ printk("Shutdown parameter read from DT:%d\n", shutdown);
++ }
++
++ ret = of_gpio_count(pnode);
++
++ if (ret != N_GPIOS) {
++ printk(KERN_ERR "Wrong number of gpios");
++ return -1;
++ }
++
++ for (i = 0; i < of_gpio_count(pnode); i++) {
++ ret = of_get_gpio_flags(pnode, i, NULL);
++ if (debug) {
++ printk("GPIO#%d:%d\n", i, ret);
++ }
++ if (IS_ERR_VALUE(ret)) {
++ dev_err(&pdev->dev, "unable to get GPIO %d\n", i);
++ goto err_no_gpio;
++ }
++ info.gpios[i].gpio = ret;
++ }
++
++
++ ret = alloc_chrdev_region(&argus_ups_dev, 0, 2, "argus_ups");
++ argus_ups_major = MAJOR(argus_ups_dev);
++ if (ret) {
++ printk(KERN_ERR "Error %d adding argus_ups\n", ret);
++ return -1;
++ }
++ if (debug) {
++ printk("argus_ups major: %d\n", argus_ups_major);
++ }
++ argus_ups_cdev = cdev_alloc(); /* Make this a character device */
++ argus_ups_cdev->ops = &argus_ups_fops; /* File operations */
++ argus_ups_cdev->owner = THIS_MODULE; /* Top level device */
++ ret = cdev_add(argus_ups_cdev, argus_ups_dev, 1); /* Add it to the kernel */
++ if (ret) {
++ printk(KERN_ERR "cdev_add returned %d\n", ret);
++ unregister_chrdev_region(0, 1);
++ return -1;
++ }
++ ret = gpio_request_array(info.gpios, N_GPIOS);
++ if (ret) {
++ printk(KERN_ERR "Error %d requesting GPIOs\n", ret);
++ unregister_chrdev_region(0, 1);
++ return -1;
++ }
++
++ argus_ups_class = class_create(THIS_MODULE, "argus_ups"); /* /sys/class entry for udev */
++ if (IS_ERR(argus_ups_class)) {
++ printk(KERN_ERR "Error creating argus_ups_class\n");
++ unregister_chrdev_region(0, 1);
++ return -1;
++ }
++ device_create(argus_ups_class, NULL, MKDEV(argus_ups_major, 0), NULL, "argus_ups");
++ argus_ups_workqueue = create_singlethread_workqueue("argus_ups");
++ INIT_DELAYED_WORK(&argus_ups_work, argus_ups_function);
++ queue_delayed_work(argus_ups_workqueue, &argus_ups_work, 0); /* Start work immediately */
++
++ return 0;
++err_no_gpio:
++ return ret;
++
++}
++
++
++static void argus_ups_cleanup(void)
++{
++ printk("Module cleanup called\n");
++ while (cancel_delayed_work(&argus_ups_work) == 0) {
++ flush_workqueue(argus_ups_workqueue); /* Make sure all work is completed */
++ }
++ destroy_workqueue(argus_ups_workqueue);
++ gpio_free_array(info.gpios, N_GPIOS);
++ device_destroy(argus_ups_class, argus_ups_dev);
++ class_destroy(argus_ups_class);
++ unregister_chrdev_region(argus_ups_dev, 1);
++ cdev_del(argus_ups_cdev);
++}
++
++
++
++static int argus_ups_remove(struct platform_device *pdev)
++{
++ printk("In argus_ups_remove()\n");
++ argus_ups_cleanup();
++ printk("After cleanup\n");
++ return 0;
++}
++
++#define ARGUS_UPS_PM_OPS NULL
++
++struct platform_driver argus_ups_driver = {
++ .probe = argus_ups_probe,
++ .remove = argus_ups_remove,
++ .driver = {
++ .name = "argus-ups",
++ .owner = THIS_MODULE,
++ .pm = ARGUS_UPS_PM_OPS,
++ .of_match_table = argus_ups_of_ids,
++ },
++};
++
++
++static int __init argus_ups_init(void)
++{
++ return platform_driver_probe(&argus_ups_driver,
++ argus_ups_probe);
++}
++
++static void __exit argus_ups_exit(void)
++{
++ platform_driver_unregister(&argus_ups_driver);
++ printk("After driver unregister\n");
++}
++
++module_init(argus_ups_init);
++module_exit(argus_ups_exit);
++
++/*
++ * Get rid of taint message.
++ */
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("David Lambert"); /* Who wrote this module? */
++MODULE_DESCRIPTION("Argus UPS control"); /* What does this module do */
++MODULE_ALIAS("platform:argus-ups");
++MODULE_DEVICE_TABLE(of, argus_ups_of_ids);
+--
+1.9.1
+
diff --git a/patches/static-capes/0002-Added-Argus-UPS-cape-support-BBW.patch b/patches/static-capes/0002-Added-Argus-UPS-cape-support-BBW.patch
new file mode 100644
index 0000000000000000000000000000000000000000..a9ba4289794e8814d90ceafe507a47b269ff8c99
--- /dev/null
+++ b/patches/static-capes/0002-Added-Argus-UPS-cape-support-BBW.patch
@@ -0,0 +1,553 @@
+From 4cfd2047da77b176e909bbe945c1488688cff1b5 Mon Sep 17 00:00:00 2001
+From: Dave Lambert <dave@lambsys.com>
+Date: Fri, 21 Mar 2014 11:31:20 -0500
+Subject: [PATCH 2/2] Added Argus UPS cape support BBW.
+
+Signed-off-by: Dave Lambert <dave@lambsys.com>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/am335x-bone-cape-bone-argus.dts | 520 ++++++++++++++++++++++
+ 2 files changed, 521 insertions(+)
+ create mode 100644 arch/arm/boot/dts/am335x-bone-cape-bone-argus.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 2286fb6..edd15f9 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -228,6 +228,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
+ am335x-bone-ttyO1.dtb \
+ am335x-bone-ttyO2.dtb \
+ am335x-bone-ttyO4.dtb \
++ am335x-bone-cape-bone-argus.dtb \
+ am335x-boneblack.dtb \
+ am335x-boneblack-ttyO1.dtb \
+ am335x-boneblack-ttyO2.dtb \
+diff --git a/arch/arm/boot/dts/am335x-bone-cape-bone-argus.dts b/arch/arm/boot/dts/am335x-bone-cape-bone-argus.dts
+new file mode 100644
+index 0000000..d098545
+--- /dev/null
++++ b/arch/arm/boot/dts/am335x-bone-cape-bone-argus.dts
+@@ -0,0 +1,520 @@
++/*
++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/dts-v1/;
++
++#include "am33xx.dtsi"
++
++/ {
++ model = "TI AM335x BeagleBone";
++ compatible = "ti,am335x-bone", "ti,am33xx";
++
++ cpus {
++ cpu@0 {
++ cpu0-supply = <&dcdc2_reg>;
++ };
++ };
++
++ memory {
++ device_type = "memory";
++ reg = <0x80000000 0x10000000>; /* 256 MB */
++ };
++
++ leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&user_leds_s0>;
++
++ compatible = "gpio-leds";
++
++ led@2 {
++ label = "beaglebone:green:heartbeat";
++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ default-state = "off";
++ };
++
++ led@3 {
++ label = "beaglebone:green:mmc0";
++ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc0";
++ default-state = "off";
++ };
++
++ led@4 {
++ label = "beaglebone:green:usr2";
++ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "cpu0";
++ default-state = "off";
++ };
++
++ led@5 {
++ label = "beaglebone:green:usr3";
++ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "mmc1";
++ default-state = "off";
++ };
++ };
++
++ vmmcsd_fixed: fixedregulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "vmmcsd_fixed";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++};
++
++&am33xx_pinmux {
++ pinctrl-names = "default";
++/* pinctrl-0 = <&clkout2_pin>; clashes with argus-ups */
++
++ user_leds_s0: user_leds_s0 {
++ pinctrl-single,pins = <
++ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
++ 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
++ 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
++ 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
++ >;
++ };
++
++ i2c0_pins: pinmux_i2c0_pins {
++ pinctrl-single,pins = <
++ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
++ >;
++ };
++
++ i2c2_pins: pinmux_i2c2_pins {
++ pinctrl-single,pins = <
++ 0x178 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_ctsn.i2c2_sda */
++ 0x17c 0x73 /* (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) uart1_rtsn.i2c2_scl */
++ >;
++ };
++
++ uart0_pins: pinmux_uart0_pins {
++ pinctrl-single,pins = <
++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
++ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
++ >;
++ };
++
++ uart1_pins: pinmux_uart1_pins {
++ pinctrl-single,pins = <
++ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
++ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
++ >;
++ };
++
++ uart2_pins: pinmux_uart2_pins {
++ pinctrl-single,pins = <
++ 0x150 0x21 /* spi0_sclk.uart2_rxd | MODE1 */
++ 0x154 0x01 /* spi0_d0.uart2_txd | MODE1 */
++ >;
++ };
++
++ uart4_pins: pinmux_uart4_pins {
++ pinctrl-single,pins = <
++ 0x070 0x26 /* gpmc_wait0.uart4_rxd | MODE6 */
++ 0x074 0x06 /* gpmc_wpn.uart4_txd | MODE6 */
++ >;
++ };
++
++ uart5_pins: pinmux_uart5_pins {
++ pinctrl-single,pins = <
++ 0x0C4 0x24 /* lcd_data9.uart5_rxd | MODE4 */
++ 0x0C0 0x04 /* lcd_data8.uart5_txd | MODE4 */
++ >;
++ };
++
++ clkout2_pin: pinmux_clkout2_pin {
++ pinctrl-single,pins = <
++ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
++ >;
++ };
++
++ cpsw_default: cpsw_default {
++ pinctrl-single,pins = <
++ /* Slave 1 */
++ 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
++ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
++ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
++ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
++ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
++ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
++ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
++ 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
++ 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
++ 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
++ 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
++ 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
++ 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
++ >;
++ };
++
++ cpsw_sleep: cpsw_sleep {
++ pinctrl-single,pins = <
++ /* Slave 1 reset value */
++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ >;
++ };
++
++ davinci_mdio_default: davinci_mdio_default {
++ pinctrl-single,pins = <
++ /* MDIO */
++ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
++ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
++ >;
++ };
++
++ davinci_mdio_sleep: davinci_mdio_sleep {
++ pinctrl-single,pins = <
++ /* MDIO reset value */
++ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
++ >;
++ };
++
++ mmc1_pins: pinmux_mmc1_pins {
++ pinctrl-single,pins = <
++ 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
++ >;
++ };
++
++ emmc_pins: pinmux_emmc_pins {
++ pinctrl-single,pins = <
++ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
++ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
++ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
++ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
++ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
++ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
++ 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
++ 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
++ 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
++ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
++ >;
++ };
++
++ spi0_pins: pinmux_spi0_pins {
++ pinctrl-single,pins = <
++ 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
++ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
++ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
++ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
++ >;
++ };
++
++ ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
++ pinctrl-single,pins = <
++ 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */
++ >;
++ };
++
++ ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
++ pinctrl-single,pins = <
++ 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */
++ >;
++ };
++
++ ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
++ pinctrl-single,pins = <
++ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */
++ >;
++ };
++ argus_ups_pins: pinmux_argus_ups_pins { /* Set up pinmux */
++ pinctrl-single,pins = <
++ 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
++ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_cs0.gpio0_5 */
++ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_d1.gpio0_4 */
++ 0x090 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_advn_ale.gpio_2 */
++ 0x094 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
++ 0x09c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
++ 0x098 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_gpmc_wen.gpio2_4 */
++ 0x1b4 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0_20 */
++ 0x164 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
++ >;
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++
++ status = "okay";
++};
++
++&usb {
++ status = "okay";
++
++ control@44e10000 {
++ status = "okay";
++ };
++
++ usb-phy@47401300 {
++ status = "okay";
++ };
++
++ usb-phy@47401b00 {
++ status = "okay";
++ };
++
++ usb@47401000 {
++ status = "okay";
++ };
++
++ usb@47401800 {
++ status = "okay";
++ dr_mode = "host";
++ };
++
++ dma-controller@07402000 {
++ status = "okay";
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ tps: tps@24 {
++ reg = <0x24>;
++ };
++
++ baseboard_eeprom: baseboard_eeprom@50 {
++ compatible = "at,24c256";
++ reg = <0x50>;
++ };
++};
++
++&i2c2 {
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c2_pins>;
++
++ clock-frequency = <100000>;
++
++ cape_eeprom0: cape_eeprom0@54 {
++ compatible = "at,24c256";
++ reg = <0x54>;
++ };
++
++ cape_eeprom1: cape_eeprom1@55 {
++ compatible = "at,24c256";
++ reg = <0x55>;
++ };
++
++ cape_eeprom2: cape_eeprom2@56 {
++ compatible = "at,24c256";
++ reg = <0x56>;
++ };
++
++ cape_eeprom3: cape_eeprom3@57 {
++ compatible = "at,24c256";
++ reg = <0x57>;
++ };
++};
++
++
++&epwmss1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <
++ &ehrpwm1_pin_p9_14
++ &ehrpwm1_pin_p9_16
++ >;
++
++ status = "okay";
++
++ ehrpwm@48302200 {
++ status = "okay";
++ };
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins>;
++ status = "okay";
++
++ spidev0: spi@0 {
++ compatible = "spidev";
++ reg = <0>;
++ spi-max-frequency = <16000000>;
++ spi-cpha;
++ };
++
++ spidev1: spi@1 {
++ compatible = "spidev";
++ reg = <1>;
++ spi-max-frequency = <16000000>;
++ };
++};
++
++&tscadc {
++ status = "okay";
++ adc {
++ ti,adc-channels = <4 5 6>;
++ };
++};
++
++/include/ "tps65217.dtsi"
++
++&tps {
++ regulators {
++ dcdc1_reg: regulator@0 {
++ regulator-always-on;
++ };
++
++ dcdc2_reg: regulator@1 {
++ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
++ regulator-name = "vdd_mpu";
++ regulator-min-microvolt = <925000>;
++ regulator-max-microvolt = <1325000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ dcdc3_reg: regulator@2 {
++ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
++ regulator-name = "vdd_core";
++ regulator-min-microvolt = <925000>;
++ regulator-max-microvolt = <1150000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ ldo1_reg: regulator@3 {
++ regulator-always-on;
++ };
++
++ ldo2_reg: regulator@4 {
++ regulator-always-on;
++ };
++
++ ldo3_reg: regulator@5 {
++ regulator-always-on;
++ };
++
++ ldo4_reg: regulator@6 {
++ regulator-always-on;
++ };
++ };
++};
++
++&cpsw_emac0 {
++ phy_id = <&davinci_mdio>, <0>;
++ phy-mode = "mii";
++};
++
++&cpsw_emac1 {
++ phy_id = <&davinci_mdio>, <1>;
++ phy-mode = "mii";
++};
++
++&mac {
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&cpsw_default>;
++ pinctrl-1 = <&cpsw_sleep>;
++
++};
++
++&davinci_mdio {
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&davinci_mdio_default>;
++ pinctrl-1 = <&davinci_mdio_sleep>;
++};
++
++&mmc1 {
++ status = "okay";
++ bus-width = <0x4>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc1_pins>;
++ cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
++ cd-inverted;
++};
++
++/ {
++ ocp {
++ //FIXME: these pwm's still need work, this guild isn't working..
++ //http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation
++ pwm_test_P9_14@0 {
++ compatible = "pwm_test";
++ pwms = <&ehrpwm1 0 500000 1>;
++ pwm-names = "PWM_P9_14";
++ pinctrl-names = "default";
++ pinctrl-0 = <&ehrpwm1_pin_p9_14>;
++ enabled = <1>;
++ duty = <0>;
++ status = "okay";
++ };
++
++ pwm_test_P9_16@0 {
++ compatible = "pwm_test";
++ pwms = <&ehrpwm1 0 500000 1>;
++ pwm-names = "PWM_P9_16";
++ pinctrl-names = "default";
++ pinctrl-0 = <&ehrpwm1_pin_p9_16>;
++ enabled = <1>;
++ duty = <0>;
++ status = "okay";
++ };
++
++ pwm_test_P9_42 {
++ compatible = "pwm_test";
++ pwms = <&ecap0 0 500000 1>;
++ pwm-names = "PWM_P9_42";
++ pinctrl-names = "default";
++ pinctrl-0 = <&ecap0_pin_p9_42>;
++ enabled = <1>;
++ duty = <0>;
++ status = "okay";
++ };
++ };
++};
++
++/ {
++ argus-ups {
++ compatible = "argus-ups";
++ status = "okay";
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&argus_ups_pins>; /* Refer to previous label */
++ /* This section communicates the gpio numbers to the driver module */
++ /* Note that gpio controllers appear to be numbered from 1-n here rather than 0-(n-1)????? */
++ gpios = <&gpio0 30 0>, /* Request */
++ <&gpio0 5 0>, /* Acknowledge */
++ <&gpio0 4 0>, /* Watchdog */
++ <&gpio2 2 0>, /* LED 1 Green */
++ <&gpio2 3 0>, /* LED 1 Red */
++ <&gpio2 5 0>, /* LED 2 Green */
++ <&gpio2 4 0>, /* LED 2 Red */
++ <&gpio0 20 0>, /* General Output #1 */
++ <&gpio0 7 0>; /* General Output #2 */
++ debug = <1>;
++ shutdown = <1>;
++ };
++};
+--
+1.9.1
+
diff --git a/version.sh b/version.sh
index 92cef8360d9c9d9a3129213ccd8722739ff6d837..7d7c22af6c5027817cb656d134ad392e405a4b19 100644
--- a/version.sh
+++ b/version.sh
@@ -29,7 +29,7 @@ toolchain="gcc_linaro_gnueabihf_4_8"
#Kernel/Build
KERNEL_REL=3.14
KERNEL_TAG=${KERNEL_REL}
-BUILD=bone0.1
+BUILD=bone0.2
#v3.X-rcX + upto SHA
#KERNEL_SHA="e6036c0b88962df82a8853971b86a55f09faef40"