diff --git a/patch.sh b/patch.sh
index ac8fe79379102d7bd21958bbd3b15cda5e69f99b..c37fadbf85685f301b33a31fdcd7db8d16c29268 100644
--- a/patch.sh
+++ b/patch.sh
@@ -250,6 +250,7 @@ wireguard () {
 }
 
 ti_pm_firmware () {
+	#http://git.ti.com/gitweb/?p=processor-firmware/ti-amx3-cm3-pm-firmware.git;a=shortlog;h=refs/heads/ti-v4.1.y-next
 	echo "dir: drivers/ti/firmware"
 	#regenerate="enable"
 	if [ "x${regenerate}" = "xenable" ] ; then
diff --git a/patches/WireGuard/0001-merge-WireGuard.patch b/patches/WireGuard/0001-merge-WireGuard.patch
index 8b5b2d112c8522b58533c6087da3a81eb9daeef7..8671b40c86e9d995193aa93880736b61d1d16872 100644
--- a/patches/WireGuard/0001-merge-WireGuard.patch
+++ b/patches/WireGuard/0001-merge-WireGuard.patch
@@ -1,6 +1,6 @@
-From d2e5711d56fd69b50d8bbb833e710bd1def03b45 Mon Sep 17 00:00:00 2001
+From 53cef4353034a20dd8953b7b6dd9b941e1ae7aff Mon Sep 17 00:00:00 2001
 From: Robert Nelson <robertcnelson@gmail.com>
-Date: Mon, 15 Oct 2018 09:28:59 -0500
+Date: Mon, 22 Oct 2018 11:08:30 -0500
 Subject: [PATCH] merge: WireGuard
 
 Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
@@ -49617,11 +49617,11 @@ index 000000000000..0203f2c30260
 +#endif /* _WG_UAPI_WIREGUARD_H */
 diff --git a/net/wireguard/version.h b/net/wireguard/version.h
 new file mode 100644
-index 000000000000..6e0da0dd454e
+index 000000000000..bbf71294d163
 --- /dev/null
 +++ b/net/wireguard/version.h
 @@ -0,0 +1 @@
-+#define WIREGUARD_VERSION "0.0.20181007"
++#define WIREGUARD_VERSION "0.0.20181018"
 -- 
 2.19.1
 
diff --git a/patches/defconfig b/patches/defconfig
index 966675fbcf20626e8e383a04fc5293f60cd8c90f..83d0548e3b935c12bb342cda9c6dfa1a2fa1a1c6 100644
--- a/patches/defconfig
+++ b/patches/defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.19.0-rc8 Kernel Configuration
+# Linux/arm 4.19.0 Kernel Configuration
 #
 
 #
@@ -20,7 +20,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # CONFIG_COMPILE_TEST is not set
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_BUILD_SALT="4.19-rc8-bone3"
+CONFIG_BUILD_SALT="4.19-bone3"
 CONFIG_HAVE_KERNEL_GZIP=y
 CONFIG_HAVE_KERNEL_LZMA=y
 CONFIG_HAVE_KERNEL_XZ=y
diff --git a/patches/ref_omap2plus_defconfig b/patches/ref_omap2plus_defconfig
index e950688c875f701591be89e9aea8b1df1de0c457..c7ed15f01ed805adc92f2284a76a765dce760ac6 100644
--- a/patches/ref_omap2plus_defconfig
+++ b/patches/ref_omap2plus_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm 4.19.0-rc8 Kernel Configuration
+# Linux/arm 4.19.0 Kernel Configuration
 #
 
 #
diff --git a/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch b/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch
index 1dbeb4a8eec5828d8f556ef52febb32c800df71f..a4aa2e37c6a2d017bceaa9a6bc0a9ec78882472b 100644
--- a/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch
+++ b/patches/soc/ti/pocketbeagle/0001-am335x-pocketbeagle.dtb-config-pin.patch
@@ -1,6 +1,6 @@
-From 5ccfeb93c470cf6df90ccec99b3739cd64ad1cd6 Mon Sep 17 00:00:00 2001
+From 851a44e8d5c0a64051cd8b1e41cea3a53e03262c Mon Sep 17 00:00:00 2001
 From: Robert Nelson <robertcnelson@gmail.com>
-Date: Tue, 12 Jun 2018 11:06:44 -0500
+Date: Mon, 22 Oct 2018 11:00:23 -0500
 Subject: [PATCH] am335x-pocketbeagle.dtb: config-pin
 
 Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
@@ -9,7 +9,7 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
  1 file changed, 1992 insertions(+), 43 deletions(-)
 
 diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
-index 62fe5cab9fae..c5ffd7d8979d 100644
+index 62fe5cab9fae..a1b6a637d993 100644
 --- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
 +++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
 @@ -60,24 +60,24 @@
@@ -575,7 +575,7 @@ index 62fe5cab9fae..c5ffd7d8979d 100644
 +
 +	/* P2_08 (ZCZ ball U18) gpio1_28 */
 +	P2_08_default_pin: pinmux_P2_08_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be1n.gpio1_28 */
++		AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be1n.gpio1_28 */
 +	P2_08_gpio_pin: pinmux_P2_08_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_be1n.gpio1_28 */
 +	P2_08_gpio_pu_pin: pinmux_P2_08_gpio_pu_pin { pinctrl-single,pins = <
@@ -699,7 +699,7 @@ index 62fe5cab9fae..c5ffd7d8979d 100644
 +
 +	/* P2_20 (ZCZ ball T13) gpio2_0 */
 +	P2_20_default_pin: pinmux_P2_20_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_csn3.gpio2_0 */
++		AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_csn3.gpio2_0 */
 +	P2_20_gpio_pin: pinmux_P2_20_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0888, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_csn3.gpio2_0 */
 +	P2_20_gpio_pu_pin: pinmux_P2_20_gpio_pu_pin { pinctrl-single,pins = <
@@ -2112,5 +2112,5 @@ index 62fe5cab9fae..c5ffd7d8979d 100644
 +	};
 +};
 -- 
-2.17.1
+2.19.1
 
diff --git a/patches/soc/ti/uboot_univ/0001-uboot-cape-universal-enablement.patch b/patches/soc/ti/uboot_univ/0001-uboot-cape-universal-enablement.patch
index 210d31146b331aa64c658339d193e0a0036a1e77..742d9339c5bff701bf290bfe446f0be4e453564f 100644
--- a/patches/soc/ti/uboot_univ/0001-uboot-cape-universal-enablement.patch
+++ b/patches/soc/ti/uboot_univ/0001-uboot-cape-universal-enablement.patch
@@ -1,6 +1,6 @@
-From fff31b59b0f760268bffa5474f9f0e2c9a5fd1b5 Mon Sep 17 00:00:00 2001
+From 586cacffeab94b2c70efd062a3a0be60749aee56 Mon Sep 17 00:00:00 2001
 From: Robert Nelson <robertcnelson@gmail.com>
-Date: Fri, 27 Jul 2018 15:50:33 -0500
+Date: Mon, 22 Oct 2018 11:04:45 -0500
 Subject: [PATCH] uboot: cape-universal enablement
 
 Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
@@ -19,7 +19,7 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
 
 diff --git a/arch/arm/boot/dts/am335x-bone-common-univ.dtsi b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
 new file mode 100644
-index 000000000000..aa69240257aa
+index 000000000000..cdc9a971f717
 --- /dev/null
 +++ b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
 @@ -0,0 +1,2919 @@
@@ -91,7 +91,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P8_07 (ZCZ ball R7) gpio2_2 */
 +	P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_advn_ale.gpio2_2 */
++		AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_advn_ale.gpio2_2 */
 +	P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_advn_ale.gpio2_2 */
 +	P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
@@ -105,7 +105,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P8_08 (ZCZ ball T7) gpio2_3 */
 +	P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_oen_ren.gpio2_3 */
++		AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_oen_ren.gpio2_3 */
 +	P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_oen_ren.gpio2_3 */
 +	P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
@@ -119,7 +119,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P8_09 (ZCZ ball T6) gpio2_5 */
 +	P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be0n_cle.gpio2_5 */
++		AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be0n_cle.gpio2_5 */
 +	P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_be0n_cle.gpio2_5 */
 +	P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
@@ -133,7 +133,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P8_10 (ZCZ ball U6) gpio2_4 */
 +	P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wen.gpio2_4 */
++		AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wen.gpio2_4 */
 +	P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_wen.gpio2_4 */
 +	P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
@@ -361,7 +361,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P8_26 (ZCZ ball V6) gpio1_29 */
 +	P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_csn0.gpio1_29 */
++		AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_csn0.gpio1_29 */
 +	P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x087c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_csn0.gpio1_29 */
 +	P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
@@ -723,7 +723,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_11 (ZCZ ball T17) gpio0_30 */
 +	P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wait0.gpio0_30 */
++		AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wait0.gpio0_30 */
 +	P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_wait0.gpio0_30 */
 +	P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
@@ -737,7 +737,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_12 (ZCZ ball U18) gpio1_28 */
 +	P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be1n.gpio1_28 */
++		AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be1n.gpio1_28 */
 +	P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_be1n.gpio1_28 */
 +	P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
@@ -749,7 +749,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_13 (ZCZ ball U17) gpio0_31 */
 +	P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wpn.gpio0_31 */
++		AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wpn.gpio0_31 */
 +	P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_wpn.gpio0_31 */
 +	P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
@@ -805,7 +805,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_17 (ZCZ ball A16) gpio0_5 */
 +	P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_cs0.gpio0_5 */
++		AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_cs0.gpio0_5 */
 +	P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_cs0.gpio0_5 */
 +	P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
@@ -825,7 +825,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_18 (ZCZ ball B16) gpio0_4 */
 +	P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_d1.gpio0_4 */
++		AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_d1.gpio0_4 */
 +	P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_d1.gpio0_4 */
 +	P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
@@ -889,7 +889,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_21 (ZCZ ball B17) gpio0_3 */
 +	P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_d0.gpio0_3 */
++		AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_d0.gpio0_3 */
 +	P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_d0.gpio0_3 */
 +	P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
@@ -911,7 +911,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_22 (ZCZ ball A17) gpio0_2 */
 +	P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_sclk.gpio0_2 */
++		AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_sclk.gpio0_2 */
 +	P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_sclk.gpio0_2 */
 +	P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
@@ -947,7 +947,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_24 (ZCZ ball D15) gpio0_15 */
 +	P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* uart1_txd.gpio0_15 */
++		AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* uart1_txd.gpio0_15 */
 +	P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* uart1_txd.gpio0_15 */
 +	P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
@@ -987,7 +987,7 @@ index 000000000000..aa69240257aa
 +
 +	/* P9_26 (ZCZ ball D16) gpio0_14 */
 +	P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* uart1_rxd.gpio0_14 */
++		AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* uart1_rxd.gpio0_14 */
 +	P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* uart1_rxd.gpio0_14 */
 +	P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
@@ -3021,7 +3021,7 @@ index 000000000000..7b4bf9641b26
 +};
 diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
 new file mode 100644
-index 000000000000..61c0361938fe
+index 000000000000..ae2f79a78c3f
 --- /dev/null
 +++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
 @@ -0,0 +1,2793 @@
@@ -3093,7 +3093,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P8_07 (ZCZ ball R7) gpio2_2 */
 +	P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_advn_ale.gpio2_2 */
++		AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_advn_ale.gpio2_2 */
 +	P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_advn_ale.gpio2_2 */
 +	P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
@@ -3107,7 +3107,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P8_08 (ZCZ ball T7) gpio2_3 */
 +	P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_oen_ren.gpio2_3 */
++		AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_oen_ren.gpio2_3 */
 +	P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_oen_ren.gpio2_3 */
 +	P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
@@ -3121,7 +3121,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P8_09 (ZCZ ball T6) gpio2_5 */
 +	P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be0n_cle.gpio2_5 */
++		AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be0n_cle.gpio2_5 */
 +	P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_be0n_cle.gpio2_5 */
 +	P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
@@ -3135,7 +3135,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P8_10 (ZCZ ball U6) gpio2_4 */
 +	P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wen.gpio2_4 */
++		AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wen.gpio2_4 */
 +	P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_wen.gpio2_4 */
 +	P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
@@ -3691,7 +3691,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_11 (ZCZ ball T17) gpio0_30 */
 +	P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wait0.gpio0_30 */
++		AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wait0.gpio0_30 */
 +	P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_wait0.gpio0_30 */
 +	P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
@@ -3705,7 +3705,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_12 (ZCZ ball U18) gpio1_28 */
 +	P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be1n.gpio1_28 */
++		AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_be1n.gpio1_28 */
 +	P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_be1n.gpio1_28 */
 +	P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
@@ -3717,7 +3717,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_13 (ZCZ ball U17) gpio0_31 */
 +	P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wpn.gpio0_31 */
++		AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* gpmc_wpn.gpio0_31 */
 +	P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* gpmc_wpn.gpio0_31 */
 +	P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
@@ -3773,7 +3773,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_17 (ZCZ ball A16) gpio0_5 */
 +	P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_cs0.gpio0_5 */
++		AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_cs0.gpio0_5 */
 +	P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_cs0.gpio0_5 */
 +	P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
@@ -3793,7 +3793,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_18 (ZCZ ball B16) gpio0_4 */
 +	P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_d1.gpio0_4 */
++		AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_d1.gpio0_4 */
 +	P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_d1.gpio0_4 */
 +	P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
@@ -3857,7 +3857,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_21 (ZCZ ball B17) gpio0_3 */
 +	P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_d0.gpio0_3 */
++		AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_d0.gpio0_3 */
 +	P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_d0.gpio0_3 */
 +	P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
@@ -3879,7 +3879,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_22 (ZCZ ball A17) gpio0_2 */
 +	P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* spi0_sclk.gpio0_2 */
++		AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* spi0_sclk.gpio0_2 */
 +	P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* spi0_sclk.gpio0_2 */
 +	P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
@@ -3915,7 +3915,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_24 (ZCZ ball D15) gpio0_15 */
 +	P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* uart1_txd.gpio0_15 */
++		AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* uart1_txd.gpio0_15 */
 +	P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* uart1_txd.gpio0_15 */
 +	P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
@@ -3955,7 +3955,7 @@ index 000000000000..61c0361938fe
 +
 +	/* P9_26 (ZCZ ball D16) gpio0_14 */
 +	P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
-+		AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; };	/* uart1_rxd.gpio0_14 */
++		AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };	/* uart1_rxd.gpio0_14 */
 +	P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
 +		AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; };		/* uart1_rxd.gpio0_14 */
 +	P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
@@ -5878,5 +5878,5 @@ index 000000000000..5d87c70b45b3
 +	};
 +};
 -- 
-2.18.0
+2.19.1
 
diff --git a/version.sh b/version.sh
index 3a3f1bb9cdd16c0dd69286a36dab68d197c7abc6..c2f05bd622607c7d9e787a61548561bf7b5dd095 100644
--- a/version.sh
+++ b/version.sh
@@ -31,7 +31,7 @@ toolchain="gcc_arm_gnueabihf_8"
 
 #Kernel
 KERNEL_REL=4.19
-KERNEL_TAG=${KERNEL_REL}-rc8
+KERNEL_TAG=${KERNEL_REL}
 #kernel_rt="-rc8-rt1"
 #Kernel Build
 BUILD=${build_prefix}3