diff --git a/patch.sh b/patch.sh
index a87e1c88c0c12887e2b08ce453b5cb9c47c0456b..0746487800e99c0fb2555a75782097e679228a1b 100644
--- a/patch.sh
+++ b/patch.sh
@@ -22,6 +22,8 @@
# Split out, so build_kernel.sh and build_deb.sh can share..
+shopt -s nullglob
+
. ${DIR}/version.sh
if [ -f ${DIR}/system.sh ] ; then
. ${DIR}/system.sh
@@ -64,6 +66,28 @@ cleanup () {
exit 2
}
+dir () {
+ wdir="$1"
+ if [ -d "${DIR}/patches/$wdir" ]; then
+ echo "dir: $wdir"
+
+ if [ "x${regenerate}" = "xenable" ] ; then
+ start_cleanup
+ fi
+
+ number=
+ for p in "${DIR}/patches/$wdir/"*.patch; do
+ ${git} "$p"
+ number=$(( $number + 1 ))
+ done
+
+ if [ "x${regenerate}" = "xenable" ] ; then
+ cleanup
+ fi
+ fi
+ unset wdir
+}
+
cherrypick () {
if [ ! -d ../patches/${cherrypick_dir} ] ; then
mkdir -p ../patches/${cherrypick_dir}
@@ -261,9 +285,17 @@ reverts () {
${git} "${DIR}/patches/reverts/0001-Revert-eeprom-at24-check-if-the-chip-is-functional-i.patch"
+ #https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/log/drivers/net/wireless/ti
+# ${git} "${DIR}/patches/reverts/0002-Revert-wlcore-sdio-drop-kfree-for-memory-allocated-w.patch"
+ ${git} "${DIR}/patches/reverts/0003-Revert-wlcore-wl18xx-Use-chip-specific-configuration.patch"
+ ${git} "${DIR}/patches/reverts/0004-Revert-wlcore-Fix-config-firmware-loading-issues.patch"
+ ${git} "${DIR}/patches/reverts/0005-Revert-wlcore-spi-Populate-config-firmware-data.patch"
+ ${git} "${DIR}/patches/reverts/0006-Revert-wlcore-sdio-Populate-config-firmware-data.patch"
+ ${git} "${DIR}/patches/reverts/0007-Revert-wlcore-Prepare-family-to-fix-nvs-file-handlin.patch"
+
if [ "x${regenerate}" = "xenable" ] ; then
wdir="reverts"
- number=1
+ number=7
cleanup
fi
}
@@ -275,33 +307,18 @@ fixes () {
start_cleanup
fi
- ${git} "${DIR}/patches/fixes/0001-kbuild-add-fno-PIE.patch"
- ${git} "${DIR}/patches/fixes/0002-kbuild-modversions-for-EXPORT_SYMBOL-for-asm.patch"
- ${git} "${DIR}/patches/fixes/0003-kbuild-provide-include-asm-asm-prototypes.h-for-ARM.patch"
- #v4.9.0-rc3:
${git} "${DIR}/patches/fixes/0004-ARM-wire-up-new-pkey-syscalls.patch"
if [ "x${regenerate}" = "xenable" ] ; then
wdir="fixes"
- number=4
+ number=1
cleanup
fi
}
drivers () {
- echo "dir: drivers/spi"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/drivers/spi/0001-NFM-spi-spidev-allow-use-of-spidev-in-DT.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="drivers/spi"
- number=1
- cleanup
- fi
+ dir 'drivers/spi'
+ dir 'drivers/pm_bus'
echo "dir: drivers/pm_opp"
#regenerate="enable"
@@ -371,34 +388,6 @@ drivers () {
cleanup
fi
- echo "dir: drivers/ti/uio"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/drivers/ti/uio/0001-Making-the-uio-pruss-driver-work.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="drivers/ti/uio"
- number=1
- cleanup
- fi
-
- echo "dir: drivers/ti/rpmsg"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/drivers/ti/rpmsg/0001-ARM-samples-seccomp-no-m32.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="drivers/ti/rpmsg"
- number=1
- cleanup
- fi
-
#https://github.com/pantoniou/linux-beagle-track-mainline/tree/bbb-overlays
echo "dir: drivers/ti/bbb_overlays"
#regenerate="enable"
@@ -460,228 +449,55 @@ drivers () {
cleanup
fi
- echo "dir: drivers/ti/cpsw"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/drivers/ti/cpsw/0001-cpsw-search-for-phy.patch"
+ dir 'drivers/ti/cpsw'
+ dir 'drivers/ti/eqep'
+ dir 'drivers/ti/mmc'
+ dir 'drivers/ti/rpmsg'
+ dir 'drivers/ti/rtc'
+ dir 'drivers/ti/spi'
+ dir 'drivers/ti/uio'
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="drivers/ti/cpsw"
- number=1
- cleanup
- fi
+ dir 'drivers/ti/gpio'
}
soc () {
- echo "dir: soc/exynos"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/exynos/0001-exynos5422-artik10.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/exynos"
- number=1
- cleanup
- fi
+# dir 'soc/exynos'
+# dir 'soc/imx/udoo'
+# dir 'soc/imx/wandboard'
+# dir 'soc/imx'
+# dir 'soc/sunxi'
+ dir 'soc/ti'
+ dir 'soc/ti/bone_common'
+ dir 'soc/ti/bbg'
+ dir 'soc/ti/bbgw'
+ dir 'soc/ti/bbbw'
+ dir 'soc/ti/blue'
+ dir 'soc/ti/sancloud'
+ dir 'soc/ti/tre'
+ dir 'soc/ti/abbbi'
+ dir 'soc/ti/am335x_olimex_som'
- echo "dir: soc/imx/udoo"
+ echo "dir: soc/ti/opp"
#regenerate="enable"
if [ "x${regenerate}" = "xenable" ] ; then
start_cleanup
fi
- ${git} "${DIR}/patches/soc/imx/udoo/0001-binding-doc-power-pwrseq-generic-add-binding-doc-for.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0002-power-add-power-sequence-library.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0003-binding-doc-usb-usb-device-add-optional-properties-f.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0004-usb-core-add-power-sequence-handling-for-USB-devices.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0005-usb-chipidea-let-chipidea-core-device-of_node-equal-.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0006-ARM-dts-imx6qdl-Enable-usb-node-children-with-reg.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0007-ARM-dts-imx6qdl-udoo.dtsi-fix-onboard-USB-HUB-proper.patch"
- ${git} "${DIR}/patches/soc/imx/udoo/0008-ARM-dts-imx6q-evi-Fix-onboard-hub-reset-line.patch"
+ #https://github.com/dgerlach/linux-pm/commits/upstream/v4.9/ti-cpufreq-driver-v3
+ ${git} "${DIR}/patches/soc/ti/opp/0001-PM-OPP-Expose-_of_get_opp_desc_node-as-dev_pm_opp-AP.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0002-Documentation-dt-add-bindings-for-ti-cpufreq.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0003-cpufreq-ti-Add-cpufreq-driver-to-determine-available.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0004-cpufreq-dt-Don-t-use-generic-platdev-driver-for-ti-c.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0005-ARM-dts-am33xx-Add-updated-operating-points-v2-table.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0006-ARM-dts-am335x-boneblack-Enable-1GHz-OPP-for-cpu.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0007-ARM-dts-am4372-Update-operating-points-v2-table-for-.patch"
+ ${git} "${DIR}/patches/soc/ti/opp/0008-ARM-dts-dra7-Add-updated-operating-points-v2-table-f.patch"
if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/imx/udoo"
+ wdir="soc/ti/opp"
number=8
cleanup
fi
-
- echo "dir: soc/imx/wandboard"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/imx/wandboard/0001-ARM-i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch"
- ${git} "${DIR}/patches/soc/imx/wandboard/0002-ARM-dts-wandboard-add-binding-for-wand-rfkill-driver.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/imx/wandboard"
- number=2
- cleanup
- fi
-
- echo "dir: soc/imx"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/imx/0001-first-pass-imx6q-ccimx6sbc.patch"
- ${git} "${DIR}/patches/soc/imx/0002-mcimx6ul-bb-and-ism43362-b81-evb.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/imx"
- number=2
- cleanup
- fi
-
- echo "dir: soc/sunxi"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/sunxi/0001-ethernet-add-sun8i-emac-driver.patch"
- ${git} "${DIR}/patches/soc/sunxi/0002-MAINTAINERS-Add-myself-as-maintainers-of-sun8i-emac.patch"
- ${git} "${DIR}/patches/soc/sunxi/0003-ARM-sun8i-dt-Add-DT-bindings-documentation-for-Allwi.patch"
- ${git} "${DIR}/patches/soc/sunxi/0004-ARM-dts-sun8i-h3-add-sun8i-emac-ethernet-driver.patch"
- ${git} "${DIR}/patches/soc/sunxi/0005-ARM-dts-sun8i-Enable-sun8i-emac-on-the-Orange-PI-PC.patch"
- ${git} "${DIR}/patches/soc/sunxi/0006-ARM-dts-sun8i-Enable-sun8i-emac-on-the-Orange-PI-One.patch"
- ${git} "${DIR}/patches/soc/sunxi/0007-ARM-dts-sun8i-Add-ethernet0-alias-for-h3-emac.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/sunxi"
- number=7
- cleanup
- fi
-
- echo "dir: soc/ti"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/0001-sync-with-ti-4.4.patch"
- ${git} "${DIR}/patches/soc/ti/0002-ARM-dts-omap3-beagle-add-i2c2.patch"
- ${git} "${DIR}/patches/soc/ti/0003-ARM-dts-omap3-beagle-xm-spidev.patch"
- ${git} "${DIR}/patches/soc/ti/0004-ARM-DTS-omap3-beagle.dts-enable-twl4030-power-reset.patch"
- ${git} "${DIR}/patches/soc/ti/0005-arm-dts-omap4-move-emif-so-panda-es-b3-now-boots.patch"
- ${git} "${DIR}/patches/soc/ti/0006-omap3-beagle-fixes.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti"
- number=6
- cleanup
- fi
-
- echo "dir: soc/ti/bone_common"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/bone_common/0001-ARM-dts-am335x-bone-common-update-leds-to-match-3.8..patch"
- ${git} "${DIR}/patches/soc/ti/bone_common/0002-ARM-dts-am335x-bone-common-add-collision-and-carrier.patch"
- ${git} "${DIR}/patches/soc/ti/bone_common/0003-ARM-dts-am335x-bone-common-disable-running-JTAG.patch"
- ${git} "${DIR}/patches/soc/ti/bone_common/0004-ARM-dts-am335x-bone-common-overlays.patch"
- ${git} "${DIR}/patches/soc/ti/bone_common/0005-ARM-dts-am335x-bone-common-rtc-defined-in-common.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/bone_common"
- number=5
- cleanup
- fi
-
- echo "dir: soc/ti/bbg"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/bbg/0001-NFM-ARM-dts-am335x-bonegreen.dts-disable-usart-for-o.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/bbg"
- number=1
- cleanup
- fi
-
- echo "dir: soc/ti/bbgw"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/bbgw/0001-ARM-dts-add-am335x-bonegreen-wireless.dtb.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/bbgw"
- number=1
- cleanup
- fi
-
- echo "dir: soc/ti/bbbw"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/bbbw/0001-ARM-dts-add-am335x-boneblack-wireless.dtb.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/bbbw"
- number=1
- cleanup
- fi
-
- echo "dir: soc/ti/blue"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/blue/0001-ARM-dts-add-am335x-boneblue.dtb.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/blue"
- number=1
- cleanup
- fi
-
- echo "dir: soc/ti/sancloud"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/sancloud/0001-add-am335x-sancloud-bbe.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/sancloud"
- number=1
- cleanup
- fi
-
- echo "dir: soc/ti/tre"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/soc/ti/tre/0001-add-am335x-arduino-tre.dts.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="soc/ti/tre"
- number=1
- cleanup
- fi
-
}
dtb_makefile_append () {
@@ -689,64 +505,6 @@ dtb_makefile_append () {
}
beaglebone () {
- echo "dir: beaglebone/pinmux-helper"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch"
- ${git} "${DIR}/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- wdir="beaglebone/pinmux-helper"
- number=14
- cleanup
- fi
-
- echo "dir: beaglebone/abbbi"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/beaglebone/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch"
- ${git} "${DIR}/patches/beaglebone/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch"
- ${git} "${DIR}/patches/beaglebone/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch"
- ${git} "${DIR}/patches/beaglebone/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch"
- ${git} "${DIR}/patches/beaglebone/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch"
- ${git} "${DIR}/patches/beaglebone/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- number=6
- cleanup
- fi
-
- echo "dir: beaglebone/am335x_olimex_som"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/beaglebone/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- number=1
- cleanup
- fi
-
echo "dir: beaglebone/capes"
#regenerate="enable"
if [ "x${regenerate}" = "xenable" ] ; then
@@ -887,30 +645,17 @@ quieter () {
fi
}
-more_fixes () {
- echo "dir: more_fixes"
- #regenerate="enable"
- if [ "x${regenerate}" = "xenable" ] ; then
- start_cleanup
- fi
-
- ${git} "${DIR}/patches/more_fixes/0001-slab-gcc5-fixes.patch"
-
- if [ "x${regenerate}" = "xenable" ] ; then
- number=1
- cleanup
- fi
-}
-
###
#backports
reverts
fixes
+dir 'build/kbuild'
drivers
soc
beaglebone
quieter
-more_fixes
+dir 'build/gcc'
+dir 'local'
packaging () {
echo "dir: packaging"
diff --git a/patches/beaglebone/dtbs/0001-sync-am335x-peripheral-pinmux.patch b/patches/beaglebone/dtbs/0001-sync-am335x-peripheral-pinmux.patch
index 2a20c811f351008feab1614a7a4913caefeac073..3c2faf8c1e46ea1b36320552c0f9181917eba46e 100644
--- a/patches/beaglebone/dtbs/0001-sync-am335x-peripheral-pinmux.patch
+++ b/patches/beaglebone/dtbs/0001-sync-am335x-peripheral-pinmux.patch
@@ -1,6 +1,6 @@
-From a3aa7009f8f04465fad4dfc7d61e99bcbce97874 Mon Sep 17 00:00:00 2001
+From 9b0a79978bf294597057ddba8e40319737e191fb Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
-Date: Wed, 12 Oct 2016 11:35:36 -0500
+Date: Tue, 1 Nov 2016 16:45:50 -0500
Subject: [PATCH] sync: am335x-peripheral/pinmux
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
@@ -14,12 +14,15 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
arch/arm/boot/dts/am335x-bone-pinmux-spi1.dtsi | 27 +++++
arch/arm/boot/dts/am335x-bone-pinmux-spi1a.dtsi | 28 +++++
arch/arm/boot/dts/am335x-bone-pinmux-ttyS5.dtsi | 48 +++++++++
- arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts | 4 -
- arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts | 4 -
- arch/arm/boot/dts/am335x-boneblack-bbbmini.dts | 4 -
- .../boot/dts/am335x-boneblack-cape-bone-argus.dts | 4 -
- arch/arm/boot/dts/am335x-boneblack-overlay.dts | 13 ++-
- arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts | 4 -
+ arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts | 11 +-
+ arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts | 11 +-
+ arch/arm/boot/dts/am335x-boneblack-bbbmini.dts | 15 ++-
+ .../boot/dts/am335x-boneblack-cape-bone-argus.dts | 15 ++-
+ .../arm/boot/dts/am335x-boneblack-emmc-overlay.dts | 11 ++
+ .../arm/boot/dts/am335x-boneblack-hdmi-overlay.dts | 11 ++
+ .../boot/dts/am335x-boneblack-nhdmi-overlay.dts | 11 ++
+ arch/arm/boot/dts/am335x-boneblack-overlay.dts | 11 +-
+ arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts | 15 ++-
arch/arm/boot/dts/am335x-boneblue.dts | 82 +++++++-------
arch/arm/boot/dts/am335x-cape-rtc-ds1307.dtsi | 31 ++++++
arch/arm/boot/dts/am335x-peripheral-can1.dtsi | 13 +++
@@ -30,7 +33,7 @@ Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
arch/arm/boot/dts/am335x-peripheral-spi1.dtsi | 13 +++
arch/arm/boot/dts/am335x-peripheral-spi1a.dtsi | 13 +++
arch/arm/boot/dts/am335x-peripheral-ttyS5.dtsi | 13 +++
- 25 files changed, 674 insertions(+), 64 deletions(-)
+ 28 files changed, 757 insertions(+), 59 deletions(-)
create mode 100644 arch/arm/boot/dts/am335x-bone-emmc-in-reset.dtsi
create mode 100644 arch/arm/boot/dts/am335x-bone-pinmux-can1.dtsi
create mode 100644 arch/arm/boot/dts/am335x-bone-pinmux-emmc.dtsi
@@ -575,36 +578,72 @@ index 0000000..01d0aec
+ pinctrl-0 = <&uart5_pins>;
+};
diff --git a/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts
-index 857c21e..30667ee 100644
+index 857c21e..8d795c0 100644
--- a/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-c.dts
-@@ -33,8 +33,4 @@
+@@ -33,8 +33,15 @@
status = "okay";
};
-&rtc {
- system-power-controller;
--};
--
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
+ };
+
#include "am335x-cape-bbb-exp-c.dtsi"
diff --git a/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts
-index b834fa2..8bfba37 100644
+index b834fa2..5df881e 100644
--- a/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-bbb-exp-r.dts
-@@ -33,8 +33,4 @@
+@@ -33,8 +33,15 @@
status = "okay";
};
-&rtc {
- system-power-controller;
--};
--
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
+ };
+
#include "am335x-cape-bbb-exp-r.dtsi"
diff --git a/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts b/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts
-index adb317c..d267689 100644
+index adb317c..5ed89a2 100644
--- a/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-bbbmini.dts
-@@ -194,7 +194,3 @@
+@@ -37,6 +37,17 @@
+ status = "okay";
+ };
+
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
+ &am33xx_pinmux {
+ dcan1_pins: pinmux_dcan1_pins {
+ pinctrl-single,pins = <
+@@ -194,7 +205,3 @@
pinctrl-0 = <&uart5_pins>;
status = "okay";
};
@@ -613,10 +652,28 @@ index adb317c..d267689 100644
- system-power-controller;
-};
diff --git a/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts b/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts
-index cecb0fcc..7318ac6 100644
+index cecb0fcc..c97c912 100644
--- a/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-cape-bone-argus.dts
-@@ -91,8 +91,4 @@
+@@ -33,6 +33,17 @@
+ status = "okay";
+ };
+
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
+ &am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+ pinctrl-single,pins = <
+@@ -91,8 +102,4 @@
};
};
@@ -625,8 +682,71 @@ index cecb0fcc..7318ac6 100644
-};
-
#include "am335x-bone-argus.dtsi"
+diff --git a/arch/arm/boot/dts/am335x-boneblack-emmc-overlay.dts b/arch/arm/boot/dts/am335x-boneblack-emmc-overlay.dts
+index f3eeb88..ccd358e 100644
+--- a/arch/arm/boot/dts/am335x-boneblack-emmc-overlay.dts
++++ b/arch/arm/boot/dts/am335x-boneblack-emmc-overlay.dts
+@@ -34,3 +34,14 @@
+ bus-width = <8>;
+ status = "okay";
+ };
++
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
+diff --git a/arch/arm/boot/dts/am335x-boneblack-hdmi-overlay.dts b/arch/arm/boot/dts/am335x-boneblack-hdmi-overlay.dts
+index 4875da9..0582e572 100644
+--- a/arch/arm/boot/dts/am335x-boneblack-hdmi-overlay.dts
++++ b/arch/arm/boot/dts/am335x-boneblack-hdmi-overlay.dts
+@@ -37,6 +37,17 @@
+ };
+ };
+
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
+ &am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+ pinctrl-single,pins = <
+diff --git a/arch/arm/boot/dts/am335x-boneblack-nhdmi-overlay.dts b/arch/arm/boot/dts/am335x-boneblack-nhdmi-overlay.dts
+index 361b78b..c166c90 100644
+--- a/arch/arm/boot/dts/am335x-boneblack-nhdmi-overlay.dts
++++ b/arch/arm/boot/dts/am335x-boneblack-nhdmi-overlay.dts
+@@ -37,6 +37,17 @@
+ };
+ };
+
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
+ &am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+ pinctrl-single,pins = <
diff --git a/arch/arm/boot/dts/am335x-boneblack-overlay.dts b/arch/arm/boot/dts/am335x-boneblack-overlay.dts
-index f4f0c10..11df99b 100644
+index f4f0c10..e9bbd93 100644
--- a/arch/arm/boot/dts/am335x-boneblack-overlay.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-overlay.dts
@@ -37,6 +37,13 @@
@@ -635,19 +755,18 @@ index f4f0c10..11df99b 100644
-&rtc {
- system-power-controller;
--};
-+//&cpu0_opp_table {
-+// /*
-+// * All PG 2.0 silicon may not support 1GHz but some of the early
-+// * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
-+// * to support 1GHz OPP so enable it for PG 2.0 on this board.
-+// */
-+// oppnitro@1000000000 {
-+// opp-supported-hw = <0x06 0x0100>;
-+// };
-+//};
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
+ };
diff --git a/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts b/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts
-index e376613..cf1e3a9 100644
+index e376613..f35b64a 100644
--- a/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-wl1835mod.dts
@@ -25,10 +25,6 @@
@@ -661,6 +780,22 @@ index e376613..cf1e3a9 100644
/* EMMC in reset */
&gpio1 {
emmc_rst {
+@@ -39,4 +35,15 @@
+ };
+ };
+
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
+ #include "am335x-boneblack-wl1835mod-cape.dtsi"
diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
index 10db73a..8a853d6 100644
--- a/arch/arm/boot/dts/am335x-boneblue.dts
@@ -962,5 +1097,5 @@ index 0000000..8b42fb0
+ status = "okay";
+};
--
-2.9.3
+2.10.1
diff --git a/patches/more_fixes/0001-slab-gcc5-fixes.patch b/patches/build/gcc/0001-slab-gcc5-fixes.patch
similarity index 100%
rename from patches/more_fixes/0001-slab-gcc5-fixes.patch
rename to patches/build/gcc/0001-slab-gcc5-fixes.patch
diff --git a/patches/fixes/0001-kbuild-add-fno-PIE.patch b/patches/build/kbuild/0001-kbuild-add-fno-PIE.patch
similarity index 100%
rename from patches/fixes/0001-kbuild-add-fno-PIE.patch
rename to patches/build/kbuild/0001-kbuild-add-fno-PIE.patch
diff --git a/patches/fixes/0002-kbuild-modversions-for-EXPORT_SYMBOL-for-asm.patch b/patches/build/kbuild/0002-kbuild-modversions-for-EXPORT_SYMBOL-for-asm.patch
similarity index 100%
rename from patches/fixes/0002-kbuild-modversions-for-EXPORT_SYMBOL-for-asm.patch
rename to patches/build/kbuild/0002-kbuild-modversions-for-EXPORT_SYMBOL-for-asm.patch
diff --git a/patches/fixes/0003-kbuild-provide-include-asm-asm-prototypes.h-for-ARM.patch b/patches/build/kbuild/0003-kbuild-provide-include-asm-asm-prototypes.h-for-ARM.patch
similarity index 100%
rename from patches/fixes/0003-kbuild-provide-include-asm-asm-prototypes.h-for-ARM.patch
rename to patches/build/kbuild/0003-kbuild-provide-include-asm-asm-prototypes.h-for-ARM.patch
diff --git a/patches/defconfig b/patches/defconfig
index b1fea91f79870e3f04cf1e48b9b9c52a23739996..0b24b9461a93e83c45edf71b2879ea70ad53be36 100644
--- a/patches/defconfig
+++ b/patches/defconfig
@@ -636,6 +636,7 @@ CONFIG_CPUFREQ_DT=m
CONFIG_CPUFREQ_DT_PLATDEV=y
# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
+CONFIG_ARM_TI_CPUFREQ=y
# CONFIG_QORIQ_CPUFREQ is not set
#
@@ -1607,6 +1608,7 @@ CONFIG_CMA_ALIGNMENT=8
# CONFIG_BRCMSTB_GISB_ARB is not set
CONFIG_OMAP_INTERCONNECT=y
CONFIG_OMAP_OCP2SCP=y
+CONFIG_SIMPLE_PM_BUS=y
CONFIG_VEXPRESS_CONFIG=y
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
@@ -1782,6 +1784,7 @@ CONFIG_SRAM=y
CONFIG_VEXPRESS_SYSCFG=y
CONFIG_BONE_CAPEMGR=y
# CONFIG_DEV_OVERLAYMGR is not set
+CONFIG_TIEQEP=m
CONFIG_C2PORT=m
#
@@ -2990,14 +2993,6 @@ CONFIG_W1_SLAVE_DS2781=m
CONFIG_W1_SLAVE_DS28E04=m
CONFIG_W1_SLAVE_BQ27000=m
CONFIG_POWER_AVS=y
-CONFIG_POWER_SEQUENCE=y
-
-#
-# Power Sequence Support
-#
-CONFIG_PWRSEQ_GENERIC=y
-CONFIG_PWRSEQ_GENERIC_INSTANCE_NUMBER=2
-# CONFIG_PWRSEQ_SAMPLE is not set
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_AS3722=y
# CONFIG_POWER_RESET_BRCMKONA is not set
@@ -4249,6 +4244,7 @@ CONFIG_SND_SOC_SGTL5000=m
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
# CONFIG_SND_SOC_TAS5720 is not set
+# CONFIG_SND_SOC_TDM is not set
# CONFIG_SND_SOC_TFA9879 is not set
CONFIG_SND_SOC_TLV320AIC23=m
CONFIG_SND_SOC_TLV320AIC23_I2C=m
diff --git a/patches/defconfig-bone b/patches/defconfig-bone
index d5c19775c36fbccc14e5039a51e27fa463a34633..02115095339bf7bf04d69b030fe6acaa5dff453d 100644
--- a/patches/defconfig-bone
+++ b/patches/defconfig-bone
@@ -273,7 +273,7 @@ CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_MODVERSIONS is not set
+CONFIG_MODVERSIONS=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
@@ -636,6 +636,7 @@ CONFIG_CPUFREQ_DT=m
CONFIG_CPUFREQ_DT_PLATDEV=y
# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
+CONFIG_ARM_TI_CPUFREQ=y
# CONFIG_QORIQ_CPUFREQ is not set
#
@@ -1607,6 +1608,7 @@ CONFIG_CMA_ALIGNMENT=8
# CONFIG_BRCMSTB_GISB_ARB is not set
CONFIG_OMAP_INTERCONNECT=y
CONFIG_OMAP_OCP2SCP=y
+CONFIG_SIMPLE_PM_BUS=y
CONFIG_VEXPRESS_CONFIG=y
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
@@ -1782,6 +1784,7 @@ CONFIG_SRAM=y
CONFIG_VEXPRESS_SYSCFG=y
CONFIG_BONE_CAPEMGR=y
# CONFIG_DEV_OVERLAYMGR is not set
+CONFIG_TIEQEP=m
CONFIG_C2PORT=m
#
@@ -4249,6 +4252,7 @@ CONFIG_SND_SOC_SGTL5000=m
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
# CONFIG_SND_SOC_TAS5720 is not set
+# CONFIG_SND_SOC_TDM is not set
# CONFIG_SND_SOC_TFA9879 is not set
CONFIG_SND_SOC_TLV320AIC23=m
CONFIG_SND_SOC_TLV320AIC23_I2C=m
diff --git a/patches/drivers/pm_bus/0004-bus-simple-pm-bus-don-t-depend-on-specific-arch.patch b/patches/drivers/pm_bus/0004-bus-simple-pm-bus-don-t-depend-on-specific-arch.patch
new file mode 100644
index 0000000000000000000000000000000000000000..0790f31ebc57acf0e885d25389538dc27b7ab387
--- /dev/null
+++ b/patches/drivers/pm_bus/0004-bus-simple-pm-bus-don-t-depend-on-specific-arch.patch
@@ -0,0 +1,25 @@
+From 4227df2d815630f4b2e73360c6a59b7a5ba95a02 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Thu, 27 Oct 2016 09:50:31 +0200
+Subject: [PATCH] bus: simple-pm-bus: don't depend on specific arch
+
+This driver is also useful on e.g. TI SoCs.
+---
+ drivers/bus/Kconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
+index 3b205e212337..d0e0ed8fb502 100644
+--- a/drivers/bus/Kconfig
++++ b/drivers/bus/Kconfig
+@@ -111,7 +111,6 @@ config OMAP_OCP2SCP
+ config SIMPLE_PM_BUS
+ bool "Simple Power-Managed Bus Driver"
+ depends on OF && PM
+- depends on ARCH_RENESAS || COMPILE_TEST
+ help
+ Driver for transparent busses that don't need a real driver, but
+ where the bus controller is part of a PM domain, or under the control
+--
+2.9.3
+
diff --git a/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch b/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch
new file mode 100644
index 0000000000000000000000000000000000000000..77c7b48e62266882a346dc8401e40b65bee9df4c
--- /dev/null
+++ b/patches/drivers/ti/eqep/0001-tieqep-forward-port-of-Nathaniel-Lewis-eQEP-driver.patch
@@ -0,0 +1,851 @@
+From 4242860c4fc7ce2f17b7a90411c1f2712ccef03c Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Wed, 2 Nov 2016 11:11:27 -0500
+Subject: [PATCH] tieqep: forward port of Nathaniel Lewis eQEP driver
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ arch/arm/boot/dts/am33xx.dtsi | 31 ++
+ drivers/misc/Kconfig | 11 +
+ drivers/misc/Makefile | 1 +
+ drivers/misc/tieqep.c | 738 ++++++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 781 insertions(+)
+ create mode 100644 drivers/misc/tieqep.c
+
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index 771fc0a..20ccf52 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -701,6 +701,16 @@
+ status = "disabled";
+ };
+
++ eqep0: eqep@0x48300180 {
++ compatible = "ti,am33xx-eqep";
++ reg = <0x48300180 0x80>;
++ clocks = <&l4ls_gclk>;
++ clock-names = "fck";
++ interrupt-parent = <&intc>;
++ interrupts = <79>;
++ status = "disabled";
++ };
++
+ ehrpwm0: pwm@48300200 {
+ compatible = "ti,am3352-ehrpwm",
+ "ti,am33xx-ehrpwm";
+@@ -735,6 +745,17 @@
+ status = "disabled";
+ };
+
++
++ eqep1: eqep@0x48302180 {
++ compatible = "ti,am33xx-eqep";
++ reg = <0x48302180 0x80>;
++ clocks = <&l4ls_gclk>;
++ clock-names = "fck";
++ interrupt-parent = <&intc>;
++ interrupts = <88>;
++ status = "disabled";
++ };
++
+ ehrpwm1: pwm@48302200 {
+ compatible = "ti,am3352-ehrpwm",
+ "ti,am33xx-ehrpwm";
+@@ -769,6 +790,16 @@
+ status = "disabled";
+ };
+
++ eqep2: eqep@0x48304180 {
++ compatible = "ti,am33xx-eqep";
++ reg = <0x48304180 0x80>;
++ clocks = <&l4ls_gclk>;
++ clock-names = "fck";
++ interrupt-parent = <&intc>;
++ interrupts = <89>;
++ status = "disabled";
++ };
++
+ ehrpwm2: pwm@48304200 {
+ compatible = "ti,am3352-ehrpwm",
+ "ti,am33xx-ehrpwm";
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index e3c6a92..b444d1db 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -785,6 +785,17 @@ config DEV_OVERLAYMGR
+ Say Y here to include support for the automagical dev
+ overlay manager.
+
++config TIEQEP
++ tristate "EQEP Hardware quadrature encoder controller"
++ depends on SOC_AM33XX
++ select PWM_TIPWMSS
++ help
++ Driver support for the EQEP quadrature encoder controller AM33XX
++ TI SOC
++
++ To compile this driver as a module, choose M here: the module
++ will be called tieqep.
++
+ source "drivers/misc/c2port/Kconfig"
+ source "drivers/misc/eeprom/Kconfig"
+ source "drivers/misc/cb710/Kconfig"
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index 9df0a01..a84dde4 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -53,6 +53,7 @@ obj-$(CONFIG_ECHO) += echo/
+ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
+ obj-$(CONFIG_CXL_BASE) += cxl/
+ obj-$(CONFIG_PANEL) += panel.o
++obj-$(CONFIG_TIEQEP) += tieqep.o
+ obj-$(CONFIG_BONE_CAPEMGR) += bone_capemgr.o
+ obj-$(CONFIG_DEV_OVERLAYMGR) += devovmgr.o
+
+diff --git a/drivers/misc/tieqep.c b/drivers/misc/tieqep.c
+new file mode 100644
+index 0000000..d2628847
+--- /dev/null
++++ b/drivers/misc/tieqep.c
+@@ -0,0 +1,738 @@
++/*
++ * TI eQEP driver for AM33xx devices
++ *
++ * Copyright (C) 2013 Nathaniel R. Lewis - http://teknoman117.wordpress.com/
++ * Copyright (C) 2015 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ *
++ * sysfs entries
++ * - position = absolute - current position; relative - last latched value
++ * - mode => 0 - absolute; 1 - relative
++ * - period => sampling period for the hardware
++ * - enable => 0 - eQEP disabled, 1 - eQEP enabled
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/pm_runtime.h>
++#include <linux/of_device.h>
++#include <linux/pinctrl/consumer.h>
++#include <linux/input.h>
++
++/* eQEP register offsets from its base IO address */
++#define QPOSCNT 0x0000
++#define QPOSINIT 0x0004
++#define QPOSMAX 0x0008
++#define QPOSCMP 0x000C
++#define QPOSILAT 0x0010
++#define QPOSSLAT 0x0014
++#define QPOSLAT 0x0018
++#define QUTMR 0x001C
++#define QUPRD 0x0020
++#define QWDTMR 0x0024
++#define QWDPRD 0x0026
++#define QDECCTL 0x0028
++#define QEPCTL 0x002A
++#define QCAPCTL 0x002C
++#define QPOSCTL 0x002E
++#define QEINT 0x0030
++#define QFLG 0x0032
++#define QCLR 0x0034
++#define QFRC 0x0036
++#define QEPSTS 0x0038
++#define QCTMR 0x003A
++#define QCPRD 0x003C
++#define QCTMRLAT 0x003E
++#define QCPRDLAT 0x0040
++#define QREVID 0x005C
++
++#if 0 /* if you wanted another way to modify IP registers... */
++typedef volatile u32 REG32;
++typedef volatile u16 REG16;
++struct EQEP_REGS {
++ REG32 q_poscnt; /* 0x00 position counter */
++ REG32 q_posinit; /* 0x04 position counter initialization */
++ REG32 q_posmax; /* 0x08 maximum position count */
++ REG32 q_poscmp; /* 0x0C position compare */
++ REG32 q_posilat; /* 0x10 index position latch */
++ REG32 q_posslat; /* 0x14 strobe position latch */
++ REG32 q_poslat; /* 0x18 position counter latch */
++ REG32 q_utmr; /* 0x1C unit timer */
++ REG32 q_uprd; /* 0x20 unit period */
++ REG16 q_wdtmr; /* 0x24 watchdog timer */
++ REG16 q_wdprd; /* 0x26 watchdog period */
++ REG16 q_decctl; /* 0x28 decoder control */
++ REG16 q_epctl; /* 0x2A control register */
++ REG16 q_capctl; /* 0x2C capture control */
++ REG16 q_posctl; /* 0x2E position compare control */
++ REG16 q_eint; /* 0x30 interrupt enable */
++ REG16 q_flg; /* 0x32 interrupt flag */
++ REG16 q_clr; /* 0x34 interrupt clear */
++ REG16 q_frc; /* 0x36 interrupt force */
++ REG16 q_epsts; /* 0x38 status */
++ REG16 q_ctmr; /* 0x3A capture timer */
++ REG16 q_cprd; /* 0x3C capture period */
++ REG16 q_ctmrlat; /* 0x3E capture timer latch */
++ REG16 q_prdlat; /* 0x40 capture period latch */
++ char q_fill1[0x5c-0x40];
++ REG32 q_revid; /* 0x5C revision id */
++};
++#endif
++
++
++/* Bits for the QDECTL register */
++#define QSRC1 (1 << 15)
++#define QSRC0 (1 << 14)
++#define SOEN (1 << 13)
++#define SPSEL (1 << 12)
++#define XCR (1 << 11)
++#define SWAP (1 << 10)
++#define IGATE (1 << 9)
++#define QAP (1 << 8)
++#define QBP (1 << 7)
++#define QIP (1 << 6)
++#define QSP (1 << 5)
++
++/* Bits for the QEPCTL register */
++#define FREESOFT1 (1 << 15)
++#define FREESOFT0 (1 << 14)
++#define PCRM1 (1 << 13)
++#define PCRM0 (1 << 12)
++#define SEI1 (1 << 11)
++#define SEI0 (1 << 10)
++#define IEI1 (1 << 9)
++#define IEI0 (1 << 8)
++#define SWI (1 << 7)
++#define SEL (1 << 6)
++#define IEL1 (1 << 5)
++#define IEL0 (1 << 4)
++#define PHEN (1 << 3)
++#define QCLM (1 << 2)
++#define UTE (1 << 1)
++#define WDE (1 << 0)
++
++/* Bits for the QCAPCTL register */
++#define CEN (1 << 15)
++#define CCPS2 (1 << 6)
++#define CCPS0 (1 << 5)
++#define CCPS1 (1 << 4)
++#define UPPS3 (1 << 3)
++#define UPPS2 (1 << 2)
++#define UPPS1 (1 << 1)
++#define UPPS0 (1 << 0)
++
++/* Bits for the QPOSCTL register */
++#define PCSHDW (1 << 15)
++#define PCLOAD (1 << 14)
++#define PCPOL (1 << 13)
++#define PCE (1 << 12)
++#define PCSPW11 (1 << 11)
++#define PCSPW10 (1 << 10)
++#define PCSPW9 (1 << 9)
++#define PCSPW8 (1 << 8)
++#define PCSPW7 (1 << 7)
++#define PCSPW6 (1 << 6)
++#define PCSPW5 (1 << 5)
++#define PCSPW4 (1 << 4)
++#define PCSPW3 (1 << 3)
++#define PCSPW2 (1 << 2)
++#define PCSPW1 (1 << 1)
++#define PCSPW0 (1 << 0)
++
++/* Bits for the interrupt registers */
++#define EQEP_INTERRUPT_MASK 0x0FFF
++#define UTOF (1 << 11)
++
++/* Bits to control the clock in the PWMSS subsystem */
++#define PWMSS_EQEPCLK_EN BIT(4)
++#define PWMSS_EQEPCLK_STOP_REQ BIT(5)
++#define PWMSS_EQEPCLK_EN_ACK BIT(4)
++
++/*
++ * Modes for the eQEP unit
++ * Absolute - the position entry represents the current position of the encoder.
++ * Poll this value and it will be notified every period nanoseconds
++ * Relative - the position entry represents the last latched position of the encoder
++ * This value is latched every period nanoseconds and the internal counter
++ * is subsequenty reset
++ */
++#define TIEQEP_MODE_ABSOLUTE 0
++#define TIEQEP_MODE_RELATIVE 1
++
++/* Structure defining the characteristics of the eQEP unit */
++struct eqep_chip
++{
++ /* Platform device for this eQEP unit */
++ struct platform_device *pdev;
++
++ /* Pointer to the base of the memory of the eQEP unit */
++ void __iomem *mmio_base;
++
++ /* SYSCLKOUT to the eQEP unit */
++ u32 clk_rate;
++
++ /* IRQ for the eQEP unit */
++ u16 irq;
++
++ /* Mode of the eQEP unit */
++ u8 op_mode;
++
++ /* work stuct for the notify userspace work */
++ struct work_struct notify_work;
++
++ /* Backup for driver suspension */
++ u16 prior_qepctl;
++ u16 prior_qeint;
++};
++
++/* Notify userspace work */
++static void notify_handler(struct work_struct *work)
++{
++ /* Get a reference to the eQEP driver */
++ struct eqep_chip *eqep = container_of(work, struct eqep_chip, notify_work);
++
++ /* Notify the userspace */
++ sysfs_notify(&eqep->pdev->dev.kobj, NULL, "position");
++}
++
++/* eQEP Interrupt handler */
++static irqreturn_t eqep_irq_handler(int irq, void *dev_id)
++{
++ /* Get the instance information */
++ struct platform_device *pdev = dev_id;
++ struct eqep_chip *eqep = platform_get_drvdata(pdev);
++
++ /* Get the interrupt flags */
++ u16 iflags = readw(eqep->mmio_base + QFLG) & EQEP_INTERRUPT_MASK;
++
++ /* Check the interrupt source(s) */
++ if (iflags & UTOF) {
++ /* Handle the unit timer overflow interrupt by notifying any potential pollers */
++ schedule_work(&eqep->notify_work);
++ }
++
++ /* Clear interrupt flags (write back triggered flags to the clear register) */
++ writew(iflags, eqep->mmio_base + QCLR);
++
++ /* Return that the IRQ was handled successfully */
++ return IRQ_HANDLED;
++}
++
++/* Function to read whether the eQEP unit is enabled or disabled */
++static ssize_t eqep_get_enabled(struct device *dev, struct device_attribute *attr, char *buf)
++{
++ /* Get the instance structure */
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ /* Read the qep control register and mask all but the enabled bit */
++ u16 enabled = readw(eqep->mmio_base + QEPCTL) & PHEN;
++
++ /* Return the target in string format */
++ return sprintf(buf, "%u\n", (enabled) ? 1 : 0);
++}
++
++/* Function to set if the eQEP is enabled */
++static ssize_t eqep_set_enabled(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
++{
++ /* Get the instance structure */
++ int rc;
++ u16 val;
++ u8 enabled;
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ /* Convert the input string to an 8 bit uint */
++ if ((rc = kstrtou8(buf, 0, &enabled)))
++ return rc;
++
++ /* Get the existing state of QEPCTL */
++ val = readw(eqep->mmio_base + QEPCTL);
++
++ /* If we passed a number that is not 0, enable the eQEP */
++ if (enabled)
++ /* Enable the eQEP (Set PHEN in QEPCTL) */
++ val |= PHEN;
++ else
++ /* Disable the eQEP (Clear PHEN in QEPCTL) */
++ val &= ~PHEN;
++
++ /* Write flags back to control register */
++ writew(val, eqep->mmio_base + QEPCTL);
++
++ /* Return buffer length consumed (all) */
++ return count;
++}
++
++/* Function to read the current position of the eQEP */
++static ssize_t eqep_get_position(struct device *dev, struct device_attribute *attr, char *buf)
++{
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ s32 position = 0;
++
++ if (eqep->op_mode == TIEQEP_MODE_ABSOLUTE) {
++ position = readl(eqep->mmio_base + QPOSCNT);
++ } else if (eqep->op_mode == TIEQEP_MODE_RELATIVE) {
++ /* in relative mode, use the last latched value of the eQEP hardware */
++ position = readl(eqep->mmio_base + QPOSLAT);
++ dev_dbg(dev, "get_position:0x%08x\n", position);
++ }
++
++ return sprintf(buf, "%d\n", position);
++}
++
++/* Function to set the position of the eQEP hardware */
++static ssize_t eqep_set_position(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
++{
++ int rc;
++ s32 position;
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ if ((rc = kstrtos32(buf, 0, &position)))
++ return rc;
++
++ /*
++ * If we are in absolute mode, set the position of the encoder,
++ * discard relative mode because thats pointless
++ */
++ if (eqep->op_mode == TIEQEP_MODE_ABSOLUTE) {
++ /* If absolute mode, set the current value of the eQEP hardware */
++ writel(position, eqep->mmio_base + QPOSCNT);
++ }
++
++ /* Return buffer length consumed (all) */
++ return count;
++}
++
++/* Function to read the period of the unit time event timer */
++static ssize_t eqep_get_timer_period(struct device *dev, struct device_attribute *attr, char *buf)
++{
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++ u64 period;
++
++ /* Convert from counts per interrupt back into period_ns */
++ period = readl(eqep->mmio_base + QUPRD);
++ period = period * NSEC_PER_SEC;
++ do_div(period, eqep->clk_rate);
++
++ /* Otherwise write out the data */
++ return sprintf(buf, "%llu\n", period);
++}
++
++/* Function to set the unit timer period. 0 = off, greater than zero sets the period */
++static ssize_t eqep_set_timer_period(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
++{
++ int rc;
++ u16 tmp;
++ u64 period;
++
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ if ((rc = kstrtou64(buf, 0, &period)))
++ return rc;
++
++ /* Disable the unit timer before modifying its period register */
++ tmp = readw(eqep->mmio_base + QEPCTL);
++ tmp &= ~(UTE | QCLM);
++ writew(tmp, eqep->mmio_base + QEPCTL);
++
++ /* Zero the unit timer counter register */
++ writel(0, eqep->mmio_base + QUTMR);
++
++ /* If the timer is enabled (a non-zero period has been passed) */
++ if (period) {
++ /* update the period */
++ period = period * eqep->clk_rate;
++ do_div(period, NSEC_PER_SEC);
++
++ dev_dbg(dev, "eqep_set_timer_period:%llu\n", period);
++
++ writel(period, eqep->mmio_base + QUPRD);
++
++ /* Enable unit timer, and latch QPOSLAT to QPOSCNT on timer expiration */
++ tmp |= UTE | QCLM;
++ writew(tmp, eqep->mmio_base + QEPCTL);
++ }
++
++ return count;
++}
++
++/* Function to read the mode of the eQEP hardware */
++static ssize_t eqep_get_mode(struct device *dev, struct device_attribute *attr, char *buf)
++{
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ return sprintf(buf, "%u\n", eqep->op_mode);
++}
++
++/* Function to set the mode of the eQEP hardware */
++static ssize_t eqep_set_mode(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
++{
++ int rc;
++ u16 val;
++ u8 tmp_mode;
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ if ((rc = kstrtou8(buf, 0, &tmp_mode)))
++ return rc;
++
++ dev_dbg(dev, "eqep_set_mode:%d\n", tmp_mode);
++
++ val = readw(eqep->mmio_base + QEPCTL);
++
++ if (tmp_mode == TIEQEP_MODE_ABSOLUTE) {
++ /*
++ * In absolute mode, don't reset the hardware based on time,
++ * so disable the unit timer position reset (Set PCRM[1:0] = 0)
++ */
++ val &= ~(PCRM1 | PCRM0);
++
++ eqep->op_mode = TIEQEP_MODE_ABSOLUTE;
++ } else if (tmp_mode == TIEQEP_MODE_RELATIVE) {
++ /*
++ * In relative mode, latch the value of the eQEP hardware on the
++ * overflow of the unit timer. So enable the unit timer position reset
++ * (Set PCRM[1:0] = 3)
++ */
++ val |= PCRM1 | PCRM0;
++
++ eqep->op_mode = TIEQEP_MODE_RELATIVE;
++ }
++
++ writew(val, eqep->mmio_base + QEPCTL);
++
++ return count;
++}
++
++/* Bind read/write functions to sysfs entries */
++static DEVICE_ATTR(enabled, 0644, eqep_get_enabled, eqep_set_enabled);
++static DEVICE_ATTR(position, 0644, eqep_get_position, eqep_set_position);
++static DEVICE_ATTR(period, 0644, eqep_get_timer_period, eqep_set_timer_period);
++static DEVICE_ATTR(mode, 0644, eqep_get_mode, eqep_set_mode);
++
++/* Array holding all of the sysfs entries */
++static const struct attribute *eqep_attrs[] = {
++ &dev_attr_enabled.attr,
++ &dev_attr_position.attr,
++ &dev_attr_period.attr,
++ &dev_attr_mode.attr,
++ NULL,
++};
++
++/* Driver function group */
++static const struct attribute_group eqep_device_attr_group = {
++ .attrs = (struct attribute **) eqep_attrs,
++};
++
++/* Driver compatibility list */
++static struct of_device_id eqep_of_match[] =
++{
++ { .compatible = "ti,am33xx-eqep" },
++ { }
++};
++
++/* Register our compatibilities for device trees */
++MODULE_DEVICE_TABLE(of, eqep_of_match);
++
++/* Create an instance of the eQEP driver */
++static int eqep_probe(struct platform_device *pdev)
++{
++ struct resource *r;
++ struct clk *clk;
++ struct eqep_chip *eqep;
++ struct pinctrl *pinctrl;
++
++ u64 period;
++ u16 status;
++ u32 value;
++
++ dev_info(&pdev->dev, "ver. 1.0\n");
++
++ /* Select pins provided through the device tree */
++ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
++ if (IS_ERR(pinctrl))
++ {
++ dev_warn(&pdev->dev, "unable to select pin group\n");
++ }
++
++ /* Allocate a eqep_driver object */
++ eqep = devm_kzalloc(&pdev->dev, sizeof(struct eqep_chip), GFP_KERNEL);
++ if (!eqep) {
++ dev_err(&pdev->dev, "failed to allocate memory\n");
++ return -ENOMEM;
++ }
++
++ /* Get a handle to the system clock object */
++ clk = devm_clk_get(pdev->dev.parent, "fck");
++ if (IS_ERR(clk)) {
++ dev_err(&pdev->dev, "failed to get clock\n");
++ return PTR_ERR(clk);
++ }
++
++ /* Get the frequency of the system clock */
++ eqep->clk_rate = clk_get_rate(clk);
++ if (!eqep->clk_rate) {
++ dev_err(&pdev->dev, "failed to get clock rate\n");
++ return -EINVAL;
++ }
++
++ /* Get a resource containing the IRQ for this eQEP controller */
++ r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
++ if (unlikely(!r)) {
++ dev_err(&pdev->dev, "Invalid IRQ resource\n");
++ return -ENODEV;
++ }
++
++ /* Store the irq */
++ eqep->irq = r->start;
++
++ /* Get a resource containing the requested (from DT) memory address and range of eQEP controller */
++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (!r) {
++ dev_err(&pdev->dev, "no memory resource defined\n");
++ return -ENODEV;
++ }
++
++ /* Remap the eQEP controller memory into our own memory space */
++ eqep->mmio_base = devm_ioremap_resource(&pdev->dev, r);
++ if (IS_ERR(eqep->mmio_base))
++ return PTR_ERR(eqep->mmio_base);
++
++ /* Store the platform device in our eQEP data structure for later usage */
++ eqep->pdev = pdev;
++
++ /* Subscribe to the eQEP interrupt */
++ if (request_irq(eqep->irq, eqep_irq_handler, IRQF_IRQPOLL, "eqep_interrupt", pdev))
++ {
++ dev_err(&pdev->dev, "unable to request irq for eQEP\n");
++ return -ENODEV;
++ }
++
++ /* Register controls to sysfs */
++ if (sysfs_create_group(&pdev->dev.kobj, &eqep_device_attr_group))
++ {
++ dev_err(&pdev->dev, "sysfs creation failed\n");
++ return -EINVAL;
++ }
++
++ /* set QDECCTL */
++ status = 0; /* default to Quadrature count mode, QSRC1 & QSRC0 = 0 */
++
++ /* set QSRC1 & QSRC0 bits, one of 4 count_modes. */
++ if (!of_property_read_u32(pdev->dev.of_node, "count_mode", &value) && value <= 3) {
++ status |= value << 14;
++
++ /*
++ * in count up or count down mode, count on rising edge only
++ * not on both edges.
++ */
++ if (value >= 2)
++ status |= XCR;
++ }
++ dev_info(&pdev->dev, "count_mode:%d\n", value);
++
++ /* Should we invert the qa input */
++ if (!of_property_read_u32(pdev->dev.of_node, "invert_qa", &value))
++ status = value ? status | QAP : status & ~QAP;
++ dev_info(&pdev->dev, "invert_qa:%d\n", value);
++
++ /* Should we invert the qb input */
++ if (!of_property_read_u32(pdev->dev.of_node, "invert_qb", &value))
++ status = value ? status | QBP : status & ~QBP;
++ dev_info(&pdev->dev, "invert_qb:%d\n", value);
++
++ /* Should we invert the index input */
++ if (!of_property_read_u32(pdev->dev.of_node, "invert_qi", &value))
++ status = value ? status | QIP : status & ~QIP;
++ dev_info(&pdev->dev, "invert_qi:%d\n", value);
++
++ /* Should we invert the strobe input */
++ if (!of_property_read_u32(pdev->dev.of_node, "invert_qs", &value))
++ status = value ? status | QSP : status & ~QSP;
++ dev_info(&pdev->dev, "invert_qs:%d\n", value);
++
++ /* Should we swap the cha and chb inputs */
++ if (!of_property_read_u32(pdev->dev.of_node, "swap_inputs", &value))
++ status = value ? status | SWAP : status & ~SWAP;
++ dev_info(&pdev->dev, "swap_inputs:%d\n", value);
++
++ dev_info(&pdev->dev, "QDECCTL:0x%04x\n", status);
++
++ /* Write the decoder control settings back to the control register */
++ writew(status, eqep->mmio_base + QDECCTL);
++
++ writel( 0, eqep->mmio_base + QPOSINIT);
++ writel(~0, eqep->mmio_base + QPOSMAX);
++ writel( 0, eqep->mmio_base + QPOSCNT);
++
++ dev_info(&pdev->dev, "QPOSINIT:0x%08x\n", readl(eqep->mmio_base + QPOSINIT));
++ dev_info(&pdev->dev, "QPOSMAX:0x%08x\n", readl(eqep->mmio_base + QPOSMAX));
++ dev_info(&pdev->dev, "QPOSCNT:0x%08x\n", readl(eqep->mmio_base + QPOSCNT));
++
++ status = UTOF; /* Enable Unit Time Period interrupt. */
++ if (!of_property_read_u32(pdev->dev.of_node, "omit_interrupt", &value) && value) {
++ status = 0; /* no interrupt */
++ }
++ writew(status, eqep->mmio_base + QEINT);
++ dev_info(&pdev->dev, "omit_interrupt:%d\n", value);
++ dev_info(&pdev->dev, "QEINT:0x%04x\n", status);
++
++ /* Calculate the timer ticks per second */
++ period = 1000000000;
++ period = period * eqep->clk_rate;
++ do_div(period, NSEC_PER_SEC);
++
++ /* Set this period into the unit timer period register */
++ writel(period, eqep->mmio_base + QUPRD);
++ dev_info(&pdev->dev, "QUPRD:0x%08x\n", (u32) period);
++
++ /*
++ * Enable the eQEP with basic position counting turned on
++ * PHEN - Quadrature position counter enable bit
++ * UTE - unit timer enable
++ * QCLM - latch QPOSLAT to QPOSCNT upon unit timer overflow
++ * IEL0 - Latch QPOSILAT on index signal. Rising or falling, IEL[1:0] = 0 is reserved
++ * SWI - Software initialization of position count register, i.e. set QPOSCNT <= QPOSINIT,
++ * but this bit was not being reset by hardware as advertised in TRM,
++ * (so omit & clear QPOSCNT manually elsewhere?)
++ */
++ status = PHEN | UTE | QCLM | IEL0 | SWI;
++ writew(status, eqep->mmio_base + QEPCTL);
++ dev_info(&pdev->dev, "QEPCTL:0x%04x write\n", status);
++ dev_info(&pdev->dev, "QEPCTL:0x%04x read\n", readw(eqep->mmio_base + QEPCTL));
++
++ /* We default to absolute mode */
++ eqep->op_mode = TIEQEP_MODE_ABSOLUTE;
++
++ /* Enable the power management runtime */
++ pm_runtime_enable(&pdev->dev);
++
++ /* Increment the device usage count and run pm_runtime_resume() */
++ pm_runtime_get_sync(&pdev->dev);
++
++ /* Initialize the notify work struture */
++ INIT_WORK(&eqep->notify_work, notify_handler);
++
++ /* Decrement the device usage count (twice) and run pm_runtime_idle() if zero */
++ pm_runtime_put_sync(&pdev->dev);
++
++ /* Set the platform driver data to the data object we've been creating for the eQEP unit */
++ platform_set_drvdata(pdev, eqep);
++
++ /* Success! */
++ dev_info(&pdev->dev, "irq:%d, clk_rate:%u\n", eqep->irq, eqep->clk_rate);
++ return 0;
++}
++
++/* Remove an instance of the eQEP driver */
++static int eqep_remove(struct platform_device *pdev)
++{
++ /* Get the eQEP driver data from the platform device structure */
++ struct eqep_chip *eqep = platform_get_drvdata(pdev);
++
++ /* Cancel work */
++ cancel_work_sync(&eqep->notify_work);
++
++ /* Unmap from sysfs */
++ sysfs_remove_group(&pdev->dev.kobj, &eqep_device_attr_group);
++
++ /* Release important assets */
++ free_irq(eqep->irq, pdev);
++
++ /* Increment the device usage count and run pm_runtime_resume() */
++ pm_runtime_get_sync(&pdev->dev);
++
++ /* Decrement the device usage count (twice) and run pm_runtime_idle() if zero */
++ pm_runtime_put_sync(&pdev->dev);
++ pm_runtime_put_sync(&pdev->dev);
++
++ /* Disable the runtime power management of this device */
++ pm_runtime_disable(&pdev->dev);
++
++ /* Return success */
++ return 0;
++}
++
++/* Power management suspend device */
++static int eqep_suspend(struct device *dev)
++{
++ /* Get the eqep driver information */
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++ u16 tmp;
++
++ /* Shut down interrupts */
++ eqep->prior_qeint = readw(eqep->mmio_base + QEINT);
++ tmp = eqep->prior_qeint & ~UTOF;
++ writew(tmp, eqep->mmio_base + QEINT);
++
++ /* Get the existing state of QEPCTL */
++ eqep->prior_qepctl = readw(eqep->mmio_base + QEPCTL);
++
++ /* Disable eQEP controller */
++ writew(eqep->prior_qepctl & ~PHEN, eqep->mmio_base + QEPCTL);
++
++ /* Decrement the device usage count and run pm_runtime_idle() if zero */
++ pm_runtime_put_sync(dev);
++
++ /* Return success */
++ return 0;
++}
++
++/* Power management wake device back up */
++static int eqep_resume(struct device *dev)
++{
++ /* Get the eqep driver information */
++ struct eqep_chip *eqep = dev_get_drvdata(dev);
++
++ /* Restore interrupt enabled register */
++ writew(eqep->prior_qeint, eqep->mmio_base + QEINT);
++
++ /* Restore prior qep control register */
++ writew(eqep->prior_qepctl, eqep->mmio_base + QEPCTL);
++
++ /* Increment the device usage count and run pm_runtime_resume() */
++ pm_runtime_get_sync(dev);
++
++ /* Success */
++ return 0;
++}
++
++/* create pm functions object */
++static SIMPLE_DEV_PM_OPS(eqep_pm_ops, eqep_suspend, eqep_resume);
++
++/* Platform driver information */
++static struct platform_driver eqep_driver = {
++ .driver = {
++ .name = "eqep",
++ .owner = THIS_MODULE,
++ .pm = &eqep_pm_ops,
++ .of_match_table = eqep_of_match,
++ },
++ .probe = eqep_probe,
++ .remove = eqep_remove,
++};
++
++/* Register this platform driver */
++module_platform_driver(eqep_driver);
++
++/* Module information */
++MODULE_DESCRIPTION("TI eQEP driver");
++MODULE_AUTHOR("Nathaniel R. Lewis");
++MODULE_LICENSE("GPL");
+--
+2.10.1
+
diff --git a/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch b/patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch
similarity index 96%
rename from patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch
rename to patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch
index 21dff951efb63ed9f4b40e7c9671bb3594b82cb8..6e2dc228fcc93e9fabe3573d1dbb371617473a9c 100644
--- a/patches/beaglebone/pinmux-helper/0001-BeagleBone-pinmux-helper.patch
+++ b/patches/drivers/ti/gpio/0001-BeagleBone-pinmux-helper.patch
@@ -1,7 +1,7 @@
-From 5d40500333db123d3e94484d89554c2afbce768b Mon Sep 17 00:00:00 2001
+From 83ae4d24a6775500ae0dc4c9dddb5e10b2b9aacf Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Fri, 28 Dec 2012 20:56:48 +0200
-Subject: [PATCH 01/14] BeagleBone pinmux helper
+Subject: [PATCH 01/19] BeagleBone pinmux helper
This patch was derived from 2 commits, but I removed the non-pinmux-helper portions
and added the helper to the bb.org_defconfig:
@@ -50,10 +50,10 @@ Pinmux helper driver.
create mode 100644 drivers/misc/cape/beaglebone/bone-pinmux-helper.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
-index e3c6a92..d6409ad 100644
+index b444d1db..edca585 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
-@@ -795,6 +795,7 @@ source "drivers/misc/mei/Kconfig"
+@@ -806,6 +806,7 @@ source "drivers/misc/mei/Kconfig"
source "drivers/misc/vmw_vmci/Kconfig"
source "drivers/misc/mic/Kconfig"
source "drivers/misc/genwqe/Kconfig"
@@ -62,7 +62,7 @@ index e3c6a92..d6409ad 100644
source "drivers/misc/cxl/Kconfig"
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
-index 9df0a01..db3854f 100644
+index a84dde4..92ca06f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
@@ -201,5 +201,5 @@ index 0000000..ba3922d
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:bone-pinmux-helper");
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch b/patches/drivers/ti/gpio/0002-pinmux-helper-Add-runtime-configuration-capability.patch
similarity index 97%
rename from patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch
rename to patches/drivers/ti/gpio/0002-pinmux-helper-Add-runtime-configuration-capability.patch
index b4fba0a2e13151c56375746252a6f486e27b2339..0865394c7afc54db703b1479c09dcace8a3462a6 100644
--- a/patches/beaglebone/pinmux-helper/0002-pinmux-helper-Add-runtime-configuration-capability.patch
+++ b/patches/drivers/ti/gpio/0002-pinmux-helper-Add-runtime-configuration-capability.patch
@@ -1,7 +1,7 @@
-From 345acaf3b25d7daa4921b05b8901fbe121fd7dbf Mon Sep 17 00:00:00 2001
+From 8e29ec6457e29e1d9b7dab750962494c440d1b54 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Wed, 6 Mar 2013 19:37:53 +0200
-Subject: [PATCH 02/14] pinmux-helper: Add runtime configuration capability
+Subject: [PATCH 02/19] pinmux-helper: Add runtime configuration capability
Pinctrl already supports multiple states. Just make them visible.
---
@@ -171,5 +171,5 @@ index ba3922d..84058e1 100644
}
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch b/patches/drivers/ti/gpio/0003-pinmux-helper-Switch-to-using-kmalloc.patch
similarity index 94%
rename from patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch
rename to patches/drivers/ti/gpio/0003-pinmux-helper-Switch-to-using-kmalloc.patch
index c84d76c4b5e0dd957cbd30d98f99a3c7975cd540..2dd5c8b715ec5be9af8a0f1d59574a5b9b96ac31 100644
--- a/patches/beaglebone/pinmux-helper/0003-pinmux-helper-Switch-to-using-kmalloc.patch
+++ b/patches/drivers/ti/gpio/0003-pinmux-helper-Switch-to-using-kmalloc.patch
@@ -1,7 +1,7 @@
-From 0cf9cdf0039f6c4c5f08a7240517b2b0cae2b391 Mon Sep 17 00:00:00 2001
+From e6d9e2b67707d7ab26d75dd9cb4377a28121697b Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Thu, 7 Mar 2013 09:54:38 +0200
-Subject: [PATCH 03/14] pinmux-helper: Switch to using kmalloc
+Subject: [PATCH 03/19] pinmux-helper: Switch to using kmalloc
devm_kfree warned out... why? no idea.
---
@@ -64,5 +64,5 @@ index 84058e1..5074365 100644
devm_kfree(dev, data);
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch b/patches/drivers/ti/gpio/0004-gpio-Introduce-GPIO-OF-helper.patch
similarity index 98%
rename from patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch
rename to patches/drivers/ti/gpio/0004-gpio-Introduce-GPIO-OF-helper.patch
index 21b95a327c9ba9026ab61232e2dc245294bac6a2..aaf94d36fd82c9d41553aeaa8406e16c7b609f26 100644
--- a/patches/beaglebone/pinmux-helper/0004-gpio-Introduce-GPIO-OF-helper.patch
+++ b/patches/drivers/ti/gpio/0004-gpio-Introduce-GPIO-OF-helper.patch
@@ -1,7 +1,7 @@
-From 8e21fcff3ad2fcf1059abed1dba6bc4b17b5aa87 Mon Sep 17 00:00:00 2001
+From 61eb266b75a14087c7595c050a88015a0d7f601d Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Tue, 4 Jun 2013 16:23:59 +0300
-Subject: [PATCH 04/14] gpio: Introduce GPIO OF helper
+Subject: [PATCH 04/19] gpio: Introduce GPIO OF helper
A gpio OF helper driver that allows configuration to be done via
DT.
@@ -13,7 +13,7 @@ DT.
create mode 100644 drivers/gpio/gpio-of-helper.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
-index 26ee00f..25e9b24 100644
+index d011cb8..09da39c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -65,6 +65,20 @@ config GPIO_SYSFS
@@ -470,5 +470,5 @@ index 0000000..16a607f
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-of-helper");
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch b/patches/drivers/ti/gpio/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
similarity index 84%
rename from patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
rename to patches/drivers/ti/gpio/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
index d4738926736f263177bc24e10d12c26c22dfad14..93cde14e042574f17f0224562c9b4a7e5c95737f 100644
--- a/patches/beaglebone/pinmux-helper/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
+++ b/patches/drivers/ti/gpio/0005-Add-dir-changeable-property-to-gpio-of-helper.patch
@@ -1,7 +1,7 @@
-From c83bfebc7559ab873954ba65d12da55b3d93a23b Mon Sep 17 00:00:00 2001
+From 84f4c68448943819e2603fc99b5a873d0e64c5b9 Mon Sep 17 00:00:00 2001
From: Charles Steinkuehler <charles@steinkuehler.net>
Date: Sun, 26 Jan 2014 16:17:09 +0100
-Subject: [PATCH 05/14] Add dir-changeable property to gpio-of-helper
+Subject: [PATCH 05/19] Add dir-changeable property to gpio-of-helper
Signed-off-by: Charles Steinkuehler <charles@steinkuehler.net>
---
@@ -22,5 +22,5 @@ index 16a607f..1c289b2 100644
/* request the gpio */
err = devm_gpio_request_one(dev, gpio, req_flags, name);
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch b/patches/drivers/ti/gpio/0006-am33xx.dtsi-add-ocp-label.patch
similarity index 76%
rename from patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch
rename to patches/drivers/ti/gpio/0006-am33xx.dtsi-add-ocp-label.patch
index e4f60c4db92eb40a2de5507c1c5855f644486652..357171e900bd48d9b41503c33cc9a9d7cb62fa83 100644
--- a/patches/beaglebone/pinmux-helper/0006-am33xx.dtsi-add-ocp-label.patch
+++ b/patches/drivers/ti/gpio/0006-am33xx.dtsi-add-ocp-label.patch
@@ -1,7 +1,7 @@
-From 7fa4be0cc1d5c75afb4b7693a7df022842a299fe Mon Sep 17 00:00:00 2001
+From a708dd0f44f2a32df6a8596993c0037a8e1403a4 Mon Sep 17 00:00:00 2001
From: Jason Kridner <jdk@ti.com>
Date: Thu, 4 Sep 2014 18:45:39 +0000
-Subject: [PATCH 06/14] am33xx.dtsi: add ocp label
+Subject: [PATCH 06/19] am33xx.dtsi: add ocp label
Signed-off-by: Jason Kridner <jdk@ti.com>
---
@@ -9,10 +9,10 @@ Signed-off-by: Jason Kridner <jdk@ti.com>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
-index 386d044..1e588c4 100644
+index ac4f749..8b0eda9 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
-@@ -152,7 +152,7 @@
+@@ -95,7 +95,7 @@
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
@@ -22,5 +22,5 @@ index 386d044..1e588c4 100644
#address-cells = <1>;
#size-cells = <1>;
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch b/patches/drivers/ti/gpio/0007-beaglebone-added-expansion-header-to-dtb.patch
similarity index 99%
rename from patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch
rename to patches/drivers/ti/gpio/0007-beaglebone-added-expansion-header-to-dtb.patch
index 76a6c5d4f155acb371c3031414d366e1f7ad76a6..83e5c6d9ed9f32e0da42ae07f48454f5ddc52020 100644
--- a/patches/beaglebone/pinmux-helper/0007-beaglebone-added-expansion-header-to-dtb.patch
+++ b/patches/drivers/ti/gpio/0007-beaglebone-added-expansion-header-to-dtb.patch
@@ -1,7 +1,7 @@
-From 5b22faddcdb728ab309cd29fafc63c57b01e87fd Mon Sep 17 00:00:00 2001
+From 2d746cb6d9ad722ad89ad47008a25bcb9c98dc03 Mon Sep 17 00:00:00 2001
From: Jason Kridner <jdk@ti.com>
Date: Thu, 4 Sep 2014 18:53:16 +0000
-Subject: [PATCH 07/14] beaglebone: added expansion header to dtb
+Subject: [PATCH 07/19] beaglebone: added expansion header to dtb
This adds gpio and pinmux helpers to the majority of available expansion header pins
based on the cape-universal work from Charles Steinkuehler making them userspace
@@ -1347,5 +1347,5 @@ index 0000000..8bddcd2
+ };
+};
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch b/patches/drivers/ti/gpio/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
similarity index 96%
rename from patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
rename to patches/drivers/ti/gpio/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
index e7ba455b2cf9dcefd5e093d84d6a4d0ca6cc7cbe..c3d2aca06ea451e7036c62acd8309335f6d2172c 100644
--- a/patches/beaglebone/pinmux-helper/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
+++ b/patches/drivers/ti/gpio/0008-bone-pinmux-helper-Add-support-for-mode-device-tree-.patch
@@ -1,7 +1,7 @@
-From f4cc8cdf3ce556036c8f3e8aacdaed312ccd756c Mon Sep 17 00:00:00 2001
+From 09fc2898db65eb52d0928440aa8dd20776227bef Mon Sep 17 00:00:00 2001
From: Charles Steinkuehler <charles@steinkuehler.net>
Date: Tue, 16 Sep 2014 20:42:56 +0000
-Subject: [PATCH 08/14] bone-pinmux-helper: Add support for "mode" device-tree
+Subject: [PATCH 08/19] bone-pinmux-helper: Add support for "mode" device-tree
parameter
The new mode parameter is used to set the initial pinmux mode to
@@ -115,5 +115,5 @@ index 5074365..d81363a 100644
err_no_mem:
return err;
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch b/patches/drivers/ti/gpio/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
similarity index 95%
rename from patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
rename to patches/drivers/ti/gpio/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
index 6c03e7bca987176d7579aed7092e215763d1b600..0a3cacfb4e98aabc684164509fe0ab3e8821a646 100644
--- a/patches/beaglebone/pinmux-helper/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
+++ b/patches/drivers/ti/gpio/0009-pinmux-helper-add-P8_37_pinmux-P8_38_pinmux.patch
@@ -1,7 +1,7 @@
-From a6bd2acc28974907729b5d5435ac1b7a7ce50c5c Mon Sep 17 00:00:00 2001
+From 05f5b4bfb5a249da17c3c11b2c1fae0f2fb7972a Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Fri, 19 Sep 2014 08:49:29 -0500
-Subject: [PATCH 09/14] pinmux-helper: add P8_37_pinmux & P8_38_pinmux
+Subject: [PATCH 09/19] pinmux-helper: add P8_37_pinmux & P8_38_pinmux
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
@@ -78,5 +78,5 @@ index 8bddcd2..e00bab9 100644
/* P9 Header */
/************************/
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch b/patches/drivers/ti/gpio/0010-pinmux-helper-hdmi.patch
similarity index 99%
rename from patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch
rename to patches/drivers/ti/gpio/0010-pinmux-helper-hdmi.patch
index ea89cd8637e64c62e1ce6498b182cfde2f323e89..1668c2e1078df2c3444da9a6d001e60d1f91eb5d 100644
--- a/patches/beaglebone/pinmux-helper/0010-pinmux-helper-hdmi.patch
+++ b/patches/drivers/ti/gpio/0010-pinmux-helper-hdmi.patch
@@ -1,7 +1,7 @@
-From 64a62a479fe4ad96e6d867b9ebf28825e7615189 Mon Sep 17 00:00:00 2001
+From 445dc0842667e0b3d9c5e72776a4d5ea4272a182 Mon Sep 17 00:00:00 2001
From: Charles Steinkuehler <charles@steinkuehler.net>
Date: Sun, 28 Sep 2014 12:16:16 +0000
-Subject: [PATCH 10/14] pinmux-helper: hdmi
+Subject: [PATCH 10/19] pinmux-helper: hdmi
BeagleBone DTS : Enable run-time pinmux for HDMI Add cape-universal-hdmi pin
info to am335x-bone-common-universal.dtsi Edit hdmi dtsi include files to use
@@ -854,5 +854,5 @@ index e00bab9..46028cd 100644
P9_11 {
gpio-name = "P9_11";
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch b/patches/drivers/ti/gpio/0011-pinmux-helper-can1.patch
similarity index 90%
rename from patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch
rename to patches/drivers/ti/gpio/0011-pinmux-helper-can1.patch
index 4ccc08d8a6a88b012572889e9316c2b0e30cae7d..752a9e034a6f63c2cea875fc83d1caa63a7a4d35 100644
--- a/patches/beaglebone/pinmux-helper/0011-pinmux-helper-can1.patch
+++ b/patches/drivers/ti/gpio/0011-pinmux-helper-can1.patch
@@ -1,7 +1,7 @@
-From 44d64c002b608a7f6f4295ed004fc9ee41b132eb Mon Sep 17 00:00:00 2001
+From c91cd0a56a6fee12213e9248c0d64e8244f7a0cb Mon Sep 17 00:00:00 2001
From: Adrian Remonda <adrianremonda@gmail.com>
Date: Sun, 5 Oct 2014 12:50:46 +0200
-Subject: [PATCH 11/14] pinmux-helper: can1
+Subject: [PATCH 11/19] pinmux-helper: can1
Signed-off-by: Adrian Remonda <adrianremonda@gmail.com>
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
@@ -23,5 +23,5 @@ index 46028cd..e95f578 100644
pinctrl-single,pins = <0x180 0x33>; }; /* Mode 3, Pull-Up, RxActive */
P9_26_pruin_pin: pinmux_P9_26_pruin_pin {
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch b/patches/drivers/ti/gpio/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
similarity index 80%
rename from patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
rename to patches/drivers/ti/gpio/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
index afb6c7021afbb57f938486cb4017841be1f18f43..b86b2f474e35a20b413d15333bf593cee64313fa 100644
--- a/patches/beaglebone/pinmux-helper/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
+++ b/patches/drivers/ti/gpio/0012-Remove-CONFIG_EXPERIMENTAL-dependency-on-CONFIG_GPIO.patch
@@ -1,7 +1,7 @@
-From 46837821662fecc8e93233abd3cc7c97f85ae94c Mon Sep 17 00:00:00 2001
+From 59776a5040d0b1fabf4c9f76b893fcef9a2aabdc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tobias=20M=C3=BCller?= <Tobias_Mueller@twam.info>
Date: Wed, 12 Nov 2014 20:10:49 +0100
-Subject: [PATCH 12/14] Remove CONFIG_EXPERIMENTAL dependency on
+Subject: [PATCH 12/19] Remove CONFIG_EXPERIMENTAL dependency on
CONFIG_GPIO_OF_HELPER as CONFIG_EXPERIMENTAL has been removed with 3.9
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@@ -13,10 +13,10 @@ Signed-off-by: Tobias Müller <Tobias_Mueller@twam.info>
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
-index 356d77e..47de741 100644
+index 09da39c..afe9f07 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -87,8 +87,8 @@ config GPIO_SYSFS
+@@ -66,8 +66,8 @@ config GPIO_SYSFS
exported to userspace; this can be useful when debugging.
config GPIO_OF_HELPER
@@ -28,5 +28,5 @@ index 356d77e..47de741 100644
Say Y here to add an GPIO OF helper driver
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch b/patches/drivers/ti/gpio/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
similarity index 96%
rename from patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
rename to patches/drivers/ti/gpio/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
index e49369dff12dda67535ed757b4b821330319a2c2..b74aebf982bc2f8f30f83ea7b44d7e762f93a509 100644
--- a/patches/beaglebone/pinmux-helper/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
+++ b/patches/drivers/ti/gpio/0013-pinmux-helper-add-P9_19_pinmux-P9_20_pinmux.patch
@@ -1,7 +1,7 @@
-From 64b068eddd2c1635f05b808a1ffd8d4c47156894 Mon Sep 17 00:00:00 2001
+From 7d3537b4c4173e200fce2bd89da02214c3f70c51 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Fri, 5 Dec 2014 11:16:40 -0600
-Subject: [PATCH 13/14] pinmux-helper: add P9_19_pinmux & P9_20_pinmux
+Subject: [PATCH 13/19] pinmux-helper: add P9_19_pinmux & P9_20_pinmux
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
@@ -107,5 +107,5 @@ index e95f578..781e33f 100644
gpio-name = "P9_21";
gpio = <&gpio0 3 0>;
--
-2.9.3
+2.10.1
diff --git a/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch b/patches/drivers/ti/gpio/0014-gpio-of-helper-idr_alloc.patch
similarity index 94%
rename from patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch
rename to patches/drivers/ti/gpio/0014-gpio-of-helper-idr_alloc.patch
index 3eb61583c10f68e2e77bb33c6a6db8447d1ad3cb..93bd381501749544fe8302dcd3de40ffd92aad99 100644
--- a/patches/beaglebone/pinmux-helper/0014-gpio-of-helper-idr_alloc.patch
+++ b/patches/drivers/ti/gpio/0014-gpio-of-helper-idr_alloc.patch
@@ -1,7 +1,7 @@
-From cbfb46cceaab08c8faf76d60ff568fb6c61ddd18 Mon Sep 17 00:00:00 2001
+From ccd7d7f570c948ced7753b15a443bb0577a2cd2e Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 2 Jun 2015 13:17:05 -0500
-Subject: [PATCH 14/14] gpio-of-helper: idr_alloc
+Subject: [PATCH 14/19] gpio-of-helper: idr_alloc
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
@@ -72,5 +72,5 @@ index 1c289b2..a9f260b 100644
static struct dev_pm_ops gpio_of_helper_pm_ops = {
SET_RUNTIME_PM_OPS(gpio_of_helper_runtime_suspend,
--
-2.9.3
+2.10.1
diff --git a/patches/drivers/ti/gpio/0015-gpio-of-helper-avoid-pointless-redundancy-in-DT.patch b/patches/drivers/ti/gpio/0015-gpio-of-helper-avoid-pointless-redundancy-in-DT.patch
new file mode 100644
index 0000000000000000000000000000000000000000..ff1f36d476a563465f6d66b98cb7357853bd2a33
--- /dev/null
+++ b/patches/drivers/ti/gpio/0015-gpio-of-helper-avoid-pointless-redundancy-in-DT.patch
@@ -0,0 +1,49 @@
+From c85f588e23676f86d2168443b79291e55f341728 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Wed, 3 Aug 2016 12:21:06 +0200
+Subject: [PATCH 15/19] gpio-of-helper: avoid pointless redundancy in DT
+
+If 'init-low' or 'init-high' is specified, 'output' is implicit.
+
+As in gpio hogs, use an optional 'line-name' property to label the gpio,
+defaulting to the DT node name. The previous 'gpio-name' property is
+still supported for backwards compatibility.
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/gpio/gpio-of-helper.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
+index a9f260b..a7e85f3 100644
+--- a/drivers/gpio/gpio-of-helper.c
++++ b/drivers/gpio/gpio-of-helper.c
+@@ -139,7 +139,9 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ /* get the type of the node first */
+ if (of_property_read_bool(node, "input"))
+ type = GPIO_TYPE_INPUT;
+- else if (of_property_read_bool(node, "output"))
++ else if (of_property_read_bool(node, "output")
++ || of_property_read_bool(node, "init-low")
++ || of_property_read_bool(node, "init-high"))
+ type = GPIO_TYPE_OUTPUT;
+ else {
+ dev_err(dev, "Not valid gpio node type\n");
+@@ -148,11 +150,9 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ }
+
+ /* get the name */
+- err = of_property_read_string(node, "gpio-name", &name);
+- if (err != 0) {
+- dev_err(dev, "Failed to get name property\n");
+- goto err_bad_node;
+- }
++ if (of_property_read_string(node, "line-name", &name))
++ if (of_property_read_string(node, "gpio-name", &name))
++ name = node->name;
+
+ err = of_get_named_gpio_flags(node, "gpio", 0, &gpio_flags);
+ if (IS_ERR_VALUE(err)) {
+--
+2.10.1
+
diff --git a/patches/drivers/ti/gpio/0016-gpio-of-helper-reduce-kernel-log-noise.patch b/patches/drivers/ti/gpio/0016-gpio-of-helper-reduce-kernel-log-noise.patch
new file mode 100644
index 0000000000000000000000000000000000000000..daf7c1c9b5ea1bf2c762ec09ccb7f2b4f71f18c0
--- /dev/null
+++ b/patches/drivers/ti/gpio/0016-gpio-of-helper-reduce-kernel-log-noise.patch
@@ -0,0 +1,37 @@
+From 430eceaa4443cc3617290d6c6b6c3d674a2cfdc1 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Fri, 9 Sep 2016 18:44:56 +0200
+Subject: [PATCH 16/19] gpio-of-helper: reduce kernel log noise
+
+And make it at least *slightly* informative for debugging.
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/gpio/gpio-of-helper.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
+index a7e85f3..33415b1 100644
+--- a/drivers/gpio/gpio-of-helper.c
++++ b/drivers/gpio/gpio-of-helper.c
+@@ -262,7 +262,7 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ goto err_fail_idr;
+ }
+
+- dev_info(dev, "Allocated GPIO id=%d\n", entry->id);
++ dev_dbg(dev, "Allocated GPIO id=%d name='%s'\n", entry->id, name);
+
+ return entry;
+
+@@ -283,7 +283,7 @@ static int gpio_of_entry_destroy(struct gpio_of_entry *entry)
+ struct platform_device *pdev = info->pdev;
+ struct device *dev = &pdev->dev;
+
+- dev_info(dev, "Destroying GPIO id=%d\n", entry->id);
++ dev_dbg(dev, "Destroying GPIO id=%d\n", entry->id);
+
+ /* remove from the IDR */
+ idr_remove(&info->idr, entry->id);
+--
+2.10.1
+
diff --git a/patches/drivers/ti/gpio/0017-gpio-of-helper-pass-of_gpio_flags-to-request.patch b/patches/drivers/ti/gpio/0017-gpio-of-helper-pass-of_gpio_flags-to-request.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b6c0aab5aec4b2e9f6287cd6194e686c23f8021a
--- /dev/null
+++ b/patches/drivers/ti/gpio/0017-gpio-of-helper-pass-of_gpio_flags-to-request.patch
@@ -0,0 +1,48 @@
+From b8653b428ea80478516751d46a4bfe6114c2b096 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Sat, 10 Sep 2016 20:42:42 +0200
+Subject: [PATCH 17/19] gpio-of-helper: pass of_gpio_flags to request
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/gpio/gpio-of-helper.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
+index 33415b1..83f362f 100644
+--- a/drivers/gpio/gpio-of-helper.c
++++ b/drivers/gpio/gpio-of-helper.c
+@@ -57,7 +57,6 @@ struct gpio_of_entry {
+ struct device_node *node;
+ enum gpio_type type;
+ int gpio;
+- enum of_gpio_flags gpio_flags;
+ int irq;
+ const char *name;
+ atomic64_t counter;
+@@ -183,6 +182,14 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ }
+ if (of_property_read_bool(node, "dir-changeable"))
+ req_flags |= GPIOF_EXPORT_CHANGEABLE;
++ if (gpio_flags & OF_GPIO_ACTIVE_LOW)
++ req_flags |= GPIOF_ACTIVE_LOW;
++ if (gpio_flags & OF_GPIO_SINGLE_ENDED) {
++ if (gpio_flags & OF_GPIO_ACTIVE_LOW)
++ req_flags |= GPIOF_OPEN_DRAIN;
++ else
++ req_flags |= GPIOF_OPEN_SOURCE;
++ }
+
+ /* request the gpio */
+ err = devm_gpio_request_one(dev, gpio, req_flags, name);
+@@ -228,7 +235,6 @@ gpio_of_entry_create(struct gpio_of_helper_info *info,
+ entry->node = of_node_get(node); /* get node reference */
+ entry->type = type;
+ entry->gpio = gpio;
+- entry->gpio_flags = gpio_flags;
+ entry->irq = irq;
+ entry->name = name;
+
+--
+2.10.1
+
diff --git a/patches/drivers/ti/gpio/0018-gpio-show-label-in-sysfs.patch b/patches/drivers/ti/gpio/0018-gpio-show-label-in-sysfs.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b845e46656c19f622611aa8c400cdff115b2160e
--- /dev/null
+++ b/patches/drivers/ti/gpio/0018-gpio-show-label-in-sysfs.patch
@@ -0,0 +1,69 @@
+From d97f8d345f4dfae2f20bd02bee74f5bf96955236 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Fri, 9 Sep 2016 01:51:44 +0200
+Subject: [PATCH 18/19] gpio: show label in sysfs
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/gpio/gpiolib-sysfs.c | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
+index 4b44dd9..d0cd822 100644
+--- a/drivers/gpio/gpiolib-sysfs.c
++++ b/drivers/gpio/gpiolib-sysfs.c
+@@ -51,6 +51,8 @@ static DEFINE_MUTEX(sysfs_lock);
+ * * is read/write as zero/nonzero
+ * * also affects existing and subsequent "falling" and "rising"
+ * /edge configuration
++ * /label
++ * * descriptor label
+ */
+
+ static ssize_t direction_show(struct device *dev,
+@@ -350,6 +352,23 @@ static ssize_t active_low_store(struct device *dev,
+ }
+ static DEVICE_ATTR_RW(active_low);
+
++static ssize_t label_show(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ struct gpiod_data *data = dev_get_drvdata(dev);
++ struct gpio_desc *desc = data->desc;
++ ssize_t status;
++
++ mutex_lock(&data->mutex);
++
++ status = sprintf(buf, "%s\n", desc->label);
++
++ mutex_unlock(&data->mutex);
++
++ return status;
++}
++static DEVICE_ATTR_RO(label);
++
+ static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
+ int n)
+ {
+@@ -377,6 +396,7 @@ static struct attribute *gpio_attrs[] = {
+ &dev_attr_edge.attr,
+ &dev_attr_value.attr,
+ &dev_attr_active_low.attr,
++ &dev_attr_label.attr,
+ NULL,
+ };
+
+@@ -390,6 +410,10 @@ static const struct attribute_group *gpio_groups[] = {
+ NULL
+ };
+
++/* bwlegh, a second device in the same file... get out of my namespace! */
++#define dev_attr_label dev_attr_chip_label
++#define label_show chip_label_show
++
+ /*
+ * /sys/class/gpio/gpiochipN/
+ * /base ... matching gpio_chip.base (N)
+--
+2.10.1
+
diff --git a/patches/drivers/ti/gpio/0019-gpio-always-show-direction-in-sysfs.patch b/patches/drivers/ti/gpio/0019-gpio-always-show-direction-in-sysfs.patch
new file mode 100644
index 0000000000000000000000000000000000000000..8ac35a1f911fc432d546f6b476ab4a3b49167be4
--- /dev/null
+++ b/patches/drivers/ti/gpio/0019-gpio-always-show-direction-in-sysfs.patch
@@ -0,0 +1,60 @@
+From 85c0fd66ad53e9ee0876a278c3516395092f0dd7 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Sat, 10 Sep 2016 21:25:08 +0200
+Subject: [PATCH 19/19] gpio: always show direction in sysfs
+
+but read-only if it cannot be changed. Also make value read-only if
+gpio is immutably input.
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/gpio/gpiolib-sysfs.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
+index d0cd822..9c6de28 100644
+--- a/drivers/gpio/gpiolib-sysfs.c
++++ b/drivers/gpio/gpiolib-sysfs.c
+@@ -35,10 +35,10 @@ static DEFINE_MUTEX(sysfs_lock);
+ /*
+ * /sys/class/gpio/gpioN... only for GPIOs that are exported
+ * /direction
+- * * MAY BE OMITTED if kernel won't allow direction changes
+ * * is read/write as "in" or "out"
+ * * may also be written as "high" or "low", initializing
+ * output value as specified ("out" implies "low")
++ * * read-only if kernel won't allow direction changes
+ * /value
+ * * always readable, subject to hardware behavior
+ * * may be writable, as zero/nonzero
+@@ -83,7 +83,9 @@ static ssize_t direction_store(struct device *dev,
+
+ mutex_lock(&data->mutex);
+
+- if (sysfs_streq(buf, "high"))
++ if (!data->direction_can_change)
++ status = -EPERM;
++ else if (sysfs_streq(buf, "high"))
+ status = gpiod_direction_output_raw(desc, 1);
+ else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
+ status = gpiod_direction_output_raw(desc, 0);
+@@ -380,12 +382,15 @@ static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
+
+ if (attr == &dev_attr_direction.attr) {
+ if (!show_direction)
+- mode = 0;
++ mode &= 0444;
+ } else if (attr == &dev_attr_edge.attr) {
+ if (gpiod_to_irq(desc) < 0)
+ mode = 0;
+ if (!show_direction && test_bit(FLAG_IS_OUT, &desc->flags))
+ mode = 0;
++ } else if (attr == &dev_attr_value.attr) {
++ if (!show_direction && !test_bit(FLAG_IS_OUT, &desc->flags))
++ mode &= 0444;
+ }
+
+ return mode;
+--
+2.10.1
+
diff --git a/patches/drivers/ti/mmc/0001-mmc-use-of_alias-for-device-numbering.patch b/patches/drivers/ti/mmc/0001-mmc-use-of_alias-for-device-numbering.patch
new file mode 100644
index 0000000000000000000000000000000000000000..2bb8fb9da0a9e44190402c6d3c09468f5dd0bb5f
--- /dev/null
+++ b/patches/drivers/ti/mmc/0001-mmc-use-of_alias-for-device-numbering.patch
@@ -0,0 +1,79 @@
+From 95d0b1a5b4812fd58b38140f98679a07fbc2267a Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Sat, 9 Jul 2016 19:12:42 +0200
+Subject: [PATCH] mmc: use of_alias for device numbering
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/mmc/card/block.c | 10 +++++++++-
+ drivers/mmc/core/host.c | 13 ++++++++++++-
+ 2 files changed, 21 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
+index c5472e3..f87c8dc 100644
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -36,6 +36,7 @@
+ #include <linux/compat.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/idr.h>
++#include <linux/of.h>
+
+ #include <linux/mmc/ioctl.h>
+ #include <linux/mmc/card.h>
+@@ -2216,13 +2217,20 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card,
+ {
+ struct mmc_blk_data *md;
+ int devidx, ret;
++ int mindynidx = max(0, of_alias_get_highest_id("mmc") + 1);
++ int reqidx = card->host->index;
+
+ again:
+ if (!ida_pre_get(&mmc_blk_ida, GFP_KERNEL))
+ return ERR_PTR(-ENOMEM);
+
+ spin_lock(&mmc_blk_lock);
+- ret = ida_get_new(&mmc_blk_ida, &devidx);
++ ret = ida_get_new_above(&mmc_blk_ida, reqidx, &devidx);
++ if (!ret && devidx < mindynidx && devidx != reqidx) {
++ // requested index in use, fall back to dynamic
++ ida_remove(&mmc_blk_ida, devidx);
++ ret = ida_get_new_above(&mmc_blk_ida, mindynidx, &devidx);
++ }
+ spin_unlock(&mmc_blk_lock);
+
+ if (ret == -EAGAIN)
+diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
+index 1be42fa..b9e2365 100644
+--- a/drivers/mmc/core/host.c
++++ b/drivers/mmc/core/host.c
+@@ -338,6 +338,8 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev)
+ {
+ int err;
+ struct mmc_host *host;
++ int mindynidx = max(0, of_alias_get_highest_id("mmc") + 1);
++ int reqidx = dev->of_node ? of_alias_get_id(dev->of_node, "mmc") : -1;
+
+ host = kzalloc(sizeof(struct mmc_host) + extra, GFP_KERNEL);
+ if (!host)
+@@ -353,7 +355,16 @@ again:
+ }
+
+ spin_lock(&mmc_host_lock);
+- err = ida_get_new(&mmc_host_ida, &host->index);
++ if (reqidx >= 0) {
++ err = ida_get_new_above(&mmc_host_ida, reqidx, &host->index);
++ if (!err && host->index != reqidx) {
++ // requested index in use, fall back to dynamic
++ ida_remove(&mmc_host_ida, host->index);
++ reqidx = -1;
++ }
++ }
++ if (reqidx < 0)
++ err = ida_get_new_above(&mmc_host_ida, mindynidx, &host->index);
+ spin_unlock(&mmc_host_lock);
+
+ if (err == -EAGAIN) {
+--
+2.8.1
+
diff --git a/patches/drivers/ti/mmc/0002-ARM-am33xx.dtsi-fix-mmc-device-numbering-via-DT.patch b/patches/drivers/ti/mmc/0002-ARM-am33xx.dtsi-fix-mmc-device-numbering-via-DT.patch
new file mode 100644
index 0000000000000000000000000000000000000000..78ca9e9242eac3b830faff568cfd42dedadfbf56
--- /dev/null
+++ b/patches/drivers/ti/mmc/0002-ARM-am33xx.dtsi-fix-mmc-device-numbering-via-DT.patch
@@ -0,0 +1,27 @@
+From e5706ac66aabe41842b96b7725aa645c411c4400 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Wed, 3 Aug 2016 06:56:03 +0200
+Subject: [PATCH] ARM: am33xx.dtsi: fix mmc device numbering via DT
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ arch/arm/boot/dts/am33xx.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index 53e0806..4e42c4f 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -35,6 +35,9 @@
+ phy1 = &usb1_phy;
+ ethernet0 = &cpsw_emac0;
+ ethernet1 = &cpsw_emac1;
++ mmc0 = &mmc1;
++ mmc1 = &mmc2;
++ mmc2 = &mmc3;
+ };
+
+ cpus {
+--
+2.10.1
+
diff --git a/patches/drivers/ti/rtc/0001-ARM-am335x-don-t-reset-or-idle-the-rtc-on-init.patch b/patches/drivers/ti/rtc/0001-ARM-am335x-don-t-reset-or-idle-the-rtc-on-init.patch
new file mode 100644
index 0000000000000000000000000000000000000000..12e2e4fe73abd3f0f00db8cee3e977e371694229
--- /dev/null
+++ b/patches/drivers/ti/rtc/0001-ARM-am335x-don-t-reset-or-idle-the-rtc-on-init.patch
@@ -0,0 +1,30 @@
+From 6e7d33d02124e52978748ddd9627fdea21ac7d92 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Fri, 9 Sep 2016 18:51:21 +0200
+Subject: [PATCH] ARM: am335x: don't reset or idle the rtc on init
+
+This fixes a bus error in omap_hwmod_read called from
+omap_rtc_wait_not_busy. The root cause probably lies elsewhere however
+and should be investigated.
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ arch/arm/boot/dts/am33xx.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index 2bbfa1fe9e93..5b31a06b2fe8 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -583,6 +583,8 @@
+ interrupts = <75
+ 76>;
+ ti,hwmods = "rtc";
++ ti,no-reset-on-init;
++ ti,no-idle-on-init;
+ };
+
+ spi0: spi@48030000 {
+--
+2.9.3
+
diff --git a/patches/drivers/ti/spi/0001-spi-omap2-mcspi-leave-bus_num-allocation-to-spi-core.patch b/patches/drivers/ti/spi/0001-spi-omap2-mcspi-leave-bus_num-allocation-to-spi-core.patch
new file mode 100644
index 0000000000000000000000000000000000000000..ed8c05fbe08ba9ceb1f4d7c29269b57845c445b8
--- /dev/null
+++ b/patches/drivers/ti/spi/0001-spi-omap2-mcspi-leave-bus_num-allocation-to-spi-core.patch
@@ -0,0 +1,33 @@
+From 37b12cd97e6d96d4f343ad0ddbe8077f8e99763d Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Wed, 18 May 2016 08:53:49 +0200
+Subject: [PATCH] spi-omap2-mcspi: leave bus_num allocation to spi core
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ drivers/spi/spi-omap2-mcspi.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
+index 0caa3c8..620f6ee 100644
+--- a/drivers/spi/spi-omap2-mcspi.c
++++ b/drivers/spi/spi-omap2-mcspi.c
+@@ -1358,7 +1358,6 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
+ struct resource *r;
+ int status = 0, i;
+ u32 regs_offset = 0;
+- static int bus_num = 1;
+ struct device_node *node = pdev->dev.of_node;
+ const struct of_device_id *match;
+
+@@ -1393,7 +1392,6 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
+
+ of_property_read_u32(node, "ti,spi-num-cs", &num_cs);
+ master->num_chipselect = num_cs;
+- master->bus_num = bus_num++;
+ if (of_get_property(node, "ti,pindir-d0-out-d1-in", NULL))
+ mcspi->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
+ } else {
+--
+2.6.4
+
diff --git a/patches/drivers/ti/spi/0002-ARM-am33xx.dtsi-fix-spi-dev-numbering-via-DT.patch b/patches/drivers/ti/spi/0002-ARM-am33xx.dtsi-fix-spi-dev-numbering-via-DT.patch
new file mode 100644
index 0000000000000000000000000000000000000000..18cda6ab808629581f58fc420d07326cb582a89c
--- /dev/null
+++ b/patches/drivers/ti/spi/0002-ARM-am33xx.dtsi-fix-spi-dev-numbering-via-DT.patch
@@ -0,0 +1,26 @@
+From 27c245ef4672553f5c6d050f6ca9e6cdb1ea2675 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Wed, 3 Aug 2016 06:51:26 +0200
+Subject: [PATCH] ARM: am33xx.dtsi: fix spi dev numbering via DT
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ arch/arm/boot/dts/am33xx.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index 4e42c4f..3a6af1c 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -38,6 +38,8 @@
+ mmc0 = &mmc1;
+ mmc1 = &mmc2;
+ mmc2 = &mmc3;
++ spi0 = &spi0;
++ spi1 = &spi1;
+ };
+
+ cpus {
+--
+2.10.1
+
diff --git a/patches/local/0001-ASoC-add-generic-TDM-codec.patch b/patches/local/0001-ASoC-add-generic-TDM-codec.patch
new file mode 100644
index 0000000000000000000000000000000000000000..7a26170e75895954f2ed04753a32e4a191d56d1c
--- /dev/null
+++ b/patches/local/0001-ASoC-add-generic-TDM-codec.patch
@@ -0,0 +1,174 @@
+From c91761fab292fe91583b9b597d431d088d123336 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Mon, 1 Feb 2016 08:21:08 +0100
+Subject: [PATCH 1/2] ASoC: add generic TDM codec
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ sound/soc/codecs/Kconfig | 4 ++
+ sound/soc/codecs/Makefile | 2 +
+ sound/soc/codecs/tdm.c | 110 ++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 116 insertions(+)
+ create mode 100644 sound/soc/codecs/tdm.c
+
+diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
+index cfdafc4..917cc40 100644
+--- a/sound/soc/codecs/Kconfig
++++ b/sound/soc/codecs/Kconfig
+@@ -112,6 +112,7 @@ config SND_SOC_ALL_CODECS
+ select SND_SOC_TAS5086 if I2C
+ select SND_SOC_TAS571X if I2C
+ select SND_SOC_TAS5720 if I2C
++ select SND_SOC_TDM
+ select SND_SOC_TFA9879 if I2C
+ select SND_SOC_TLV320AIC23_I2C if I2C
+ select SND_SOC_TLV320AIC23_SPI if SPI_MASTER
+@@ -656,6 +657,9 @@ config SND_SOC_TAS5720
+ Enable support for Texas Instruments TAS5720L/M high-efficiency mono
+ Class-D audio power amplifiers.
+
++config SND_SOC_TDM
++ tristate "Generic TDM codec"
++
+ config SND_SOC_TFA9879
+ tristate "NXP Semiconductors TFA9879 amplifier"
+ depends on I2C
+diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
+index f632fc4..a47d48d 100644
+--- a/sound/soc/codecs/Makefile
++++ b/sound/soc/codecs/Makefile
+@@ -115,6 +115,7 @@ snd-soc-sti-sas-objs := sti-sas.o
+ snd-soc-tas5086-objs := tas5086.o
+ snd-soc-tas571x-objs := tas571x.o
+ snd-soc-tas5720-objs := tas5720.o
++snd-soc-tdm-objs := tdm.o
+ snd-soc-tfa9879-objs := tfa9879.o
+ snd-soc-tlv320aic23-objs := tlv320aic23.o
+ snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
+@@ -307,6 +308,7 @@ obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
+ obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
+ obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
+ obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc-tas5720.o
++obj-$(CONFIG_SND_SOC_TDM) += snd-soc-tdm.o
+ obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o
+ obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
+ obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
+diff --git a/sound/soc/codecs/tdm.c b/sound/soc/codecs/tdm.c
+new file mode 100644
+index 0000000..f20d3e2
+--- /dev/null
++++ b/sound/soc/codecs/tdm.c
+@@ -0,0 +1,110 @@
++/*
++ * ALSA SoC generic TDM codec driver
++ *
++ * Author: Matthijs van Duin <matthijsvanduin@gmail.com>
++ * Copyright: (C) 2016 Dutch & Dutch
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * TODO Allow customization via device tree.
++ */
++
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/slab.h>
++#include <sound/soc.h>
++#include <sound/pcm.h>
++#include <sound/initval.h>
++#include <linux/of.h>
++
++#define DRV_NAME "tdm-audio"
++
++/* As far as I can tell the LE/3LE/BE/3BE suffix merely indicates how the data
++ * was represented in memory, so why would the codec care? On the other hand,
++ * how do you indicate the bit-endianness on wire? */
++
++#define TDM_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
++ SNDRV_PCM_FMTBIT_U8 | \
++ SNDRV_PCM_FMTBIT_S16_LE | \
++ SNDRV_PCM_FMTBIT_U16_LE | \
++ SNDRV_PCM_FMTBIT_S20_3LE | \
++ SNDRV_PCM_FMTBIT_U20_3LE | \
++ SNDRV_PCM_FMTBIT_S24_3LE | \
++ SNDRV_PCM_FMTBIT_U24_3LE | \
++ SNDRV_PCM_FMTBIT_S24_LE | \
++ SNDRV_PCM_FMTBIT_U24_LE | \
++ SNDRV_PCM_FMTBIT_S32_LE | \
++ SNDRV_PCM_FMTBIT_U32_LE)
++
++static const struct snd_soc_dapm_widget tdm_audio_widgets[] = {
++ SND_SOC_DAPM_OUTPUT("Sink"),
++ SND_SOC_DAPM_INPUT("Source"),
++};
++
++static const struct snd_soc_dapm_route tdm_audio_routes[] = {
++ { "Sink", NULL, "Playback" },
++ { "Capture", NULL, "Source" },
++};
++
++static struct snd_soc_codec_driver soc_codec_tdm_audio = {
++ .dapm_widgets = tdm_audio_widgets,
++ .num_dapm_widgets = ARRAY_SIZE(tdm_audio_widgets),
++ .dapm_routes = tdm_audio_routes,
++ .num_dapm_routes = ARRAY_SIZE(tdm_audio_routes),
++};
++
++static struct snd_soc_dai_driver tdm_audio_dai = {
++ .name = "tdm_audio",
++ .playback = {
++ .stream_name = "Playback",
++ .channels_min = 1,
++ .channels_max = 16,
++ .rates = SNDRV_PCM_RATE_CONTINUOUS,
++ .formats = TDM_FORMATS,
++ },
++ .capture = {
++ .stream_name = "Capture",
++ .channels_min = 1,
++ .channels_max = 16,
++ .rates = SNDRV_PCM_RATE_CONTINUOUS,
++ .formats = TDM_FORMATS,
++ },
++};
++
++static int tdm_audio_probe(struct platform_device *pdev)
++{
++ return snd_soc_register_codec(&pdev->dev, &soc_codec_tdm_audio,
++ &tdm_audio_dai, 1);
++}
++
++static int tdm_audio_remove(struct platform_device *pdev)
++{
++ snd_soc_unregister_codec(&pdev->dev);
++ return 0;
++}
++
++#ifdef CONFIG_OF
++static const struct of_device_id tdm_audio_dt_ids[] = {
++ { .compatible = "linux,tdm-audio", },
++ { }
++};
++MODULE_DEVICE_TABLE(of, tdm_audio_dt_ids);
++#endif
++
++static struct platform_driver tdm_audio_driver = {
++ .probe = tdm_audio_probe,
++ .remove = tdm_audio_remove,
++ .driver = {
++ .name = DRV_NAME,
++ .of_match_table = of_match_ptr(tdm_audio_dt_ids),
++ },
++};
++
++module_platform_driver(tdm_audio_driver);
++
++MODULE_AUTHOR("Matthijs van Duin <matthijs@dutchdutch.com>");
++MODULE_DESCRIPTION("Generic TDM codec driver");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("platform:" DRV_NAME);
+--
+2.6.4
+
diff --git a/patches/local/0002-ASoC-davinci_mcasp-20-bit-word-support.patch b/patches/local/0002-ASoC-davinci_mcasp-20-bit-word-support.patch
new file mode 100644
index 0000000000000000000000000000000000000000..194d034028e8ced4c30a9fae53f110e1449db578
--- /dev/null
+++ b/patches/local/0002-ASoC-davinci_mcasp-20-bit-word-support.patch
@@ -0,0 +1,34 @@
+From c43054edee87d4c7e849c12cb7438fe0a43456dc Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Mon, 1 Feb 2016 08:27:15 +0100
+Subject: [PATCH 2/2] ASoC: davinci_mcasp: 20-bit word support
+
+Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
+---
+ sound/soc/davinci/davinci-mcasp.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
+index 2ccb8bc..916544d 100644
+--- a/sound/soc/davinci/davinci-mcasp.c
++++ b/sound/soc/davinci/davinci-mcasp.c
+@@ -1073,11 +1073,13 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
+ word_length = 16;
+ break;
+
+- case SNDRV_PCM_FORMAT_U24_3LE:
+- case SNDRV_PCM_FORMAT_S24_3LE:
+- word_length = 24;
++ case SNDRV_PCM_FORMAT_U20_3LE:
++ case SNDRV_PCM_FORMAT_S20_3LE:
++ word_length = 20;
+ break;
+
++ case SNDRV_PCM_FORMAT_U24_3LE:
++ case SNDRV_PCM_FORMAT_S24_3LE:
+ case SNDRV_PCM_FORMAT_U24_LE:
+ case SNDRV_PCM_FORMAT_S24_LE:
+ word_length = 24;
+--
+2.6.4
+
diff --git a/patches/local/0003-ASoC-davinci-mcasp-DIT-and-other-fixes-work-in-progr.patch b/patches/local/0003-ASoC-davinci-mcasp-DIT-and-other-fixes-work-in-progr.patch
new file mode 100644
index 0000000000000000000000000000000000000000..8a121fe7b0ef7bd57baa368b9d08dad625f4ed52
--- /dev/null
+++ b/patches/local/0003-ASoC-davinci-mcasp-DIT-and-other-fixes-work-in-progr.patch
@@ -0,0 +1,382 @@
+From 7b1bdb6848f87eac4cb7822e09c177010d79ad02 Mon Sep 17 00:00:00 2001
+From: Matthijs van Duin <matthijsvanduin@gmail.com>
+Date: Mon, 19 Sep 2016 11:36:36 +0200
+Subject: [PATCH] ASoC: davinci-mcasp: DIT and other fixes (work in progress)
+
+---
+ sound/soc/codecs/spdif_transmitter.c | 4 +-
+ sound/soc/davinci/davinci-mcasp.c | 137 +++++++++++++++++------------------
+ sound/soc/davinci/davinci-mcasp.h | 36 ++++-----
+ 3 files changed, 89 insertions(+), 88 deletions(-)
+
+diff --git a/sound/soc/codecs/spdif_transmitter.c b/sound/soc/codecs/spdif_transmitter.c
+index ef634a9ad673..adb46b7df509 100644
+--- a/sound/soc/codecs/spdif_transmitter.c
++++ b/sound/soc/codecs/spdif_transmitter.c
+@@ -27,7 +27,9 @@
+ #define STUB_RATES SNDRV_PCM_RATE_8000_192000
+ #define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_3LE | \
+- SNDRV_PCM_FMTBIT_S24_LE)
++ SNDRV_PCM_FMTBIT_S24_3LE | \
++ SNDRV_PCM_FMTBIT_S24_LE | \
++ SNDRV_PCM_FMTBIT_S32_LE)
+
+ static const struct snd_soc_dapm_widget dit_widgets[] = {
+ SND_SOC_DAPM_OUTPUT("spdif-out"),
+diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
+index 0362c1a74014..e0f8f3cfd230 100644
+--- a/sound/soc/davinci/davinci-mcasp.c
++++ b/sound/soc/davinci/davinci-mcasp.c
+@@ -151,6 +151,8 @@ static void mcasp_set_ctl_reg(struct davinci_mcasp *mcasp, u32 ctl_reg, u32 val)
+ mcasp_set_bits(mcasp, ctl_reg, val);
+
+ /* programming GBLCTL needs to read back from GBLCTL and verfiy */
++ ctl_reg = DAVINCI_MCASP_GBLCTL_REG;
++
+ /* loop count is to avoid the lock-up */
+ for (i = 0; i < 1000; i++) {
+ if ((mcasp_get_reg(mcasp, ctl_reg) & val) == val)
+@@ -572,6 +574,12 @@ static int __davinci_mcasp_set_clkdiv(struct davinci_mcasp *mcasp, int div_id,
+ * tdm_slot width by dividing the the ratio by the
+ * number of configured tdm slots.
+ */
++ if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) {
++ if (div != 128)
++ dev_warn(mcasp->dev,
++ "%s(): BCLK/LRCLK %d requested, must be 128 for DIT mode", __func__, div);
++ break;
++ }
+ mcasp->slot_width = div / mcasp->tdm_slots;
+ if (div % mcasp->tdm_slots)
+ dev_warn(mcasp->dev,
+@@ -696,56 +704,59 @@ static int davinci_mcasp_set_tdm_slot(struct snd_soc_dai *dai,
+ }
+
+ static int davinci_config_channel_size(struct davinci_mcasp *mcasp,
+- int sample_width)
++ u32 sample_width)
+ {
+- u32 fmt;
+- u32 tx_rotate = (sample_width / 4) & 0x7;
+- u32 mask = (1ULL << sample_width) - 1;
+- u32 slot_width = sample_width;
++ u32 mask, tx_rotate, rx_rotate;
++ u32 slot_width, fmt;
+
+ /*
+- * For captured data we should not rotate, inversion and masking is
+- * enoguh to get the data to the right position:
+- * Format data from bus after reverse (XRBUF)
+- * S16_LE: |LSB|MSB|xxx|xxx| |xxx|xxx|MSB|LSB|
+- * S24_3LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB|
+- * S24_LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB|
+- * S32_LE: |LSB|DAT|DAT|MSB| |MSB|DAT|DAT|LSB|
++ * Sample data is always right-justified. Apply mask and rotate right
++ * to left-justified. For receive the steps are in reverse order (but
++ * still rotates right).
+ */
+- u32 rx_rotate = 0;
++ mask = GENMASK(sample_width, 0);
++ mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, mask);
++ mcasp_set_reg(mcasp, DAVINCI_MCASP_RXMASK_REG, mask);
++
++ tx_rotate = sample_width;
++ rx_rotate = -sample_width;
+
+ /*
+- * Setting the tdm slot width either with set_clkdiv() or
+- * set_tdm_slot() allows us to for example send 32 bits per
+- * channel to the codec, while only 16 of them carry audio
+- * payload.
++ * For big-endian formats (everything except DIT), McASP needs the slot
++ * data to be left-aligned for transmit, whereas received slot data is
++ * delivered right-aligned:
++ *
++ * +-----------------------------------------------+---------------+
++ * <--shift-out- slot data | |
++ * +-----------------------------------------------+---------------+
++ *
++ * +---------------+-----------------------------------------------+
++ * | | slot data <--shift-in--
++ * +---------------+-----------------------------------------------+
++ *
++ * For little-endian formats (DIT only) the reverse is true.
+ */
+- if (mcasp->slot_width) {
+- /*
+- * When we have more bclk then it is needed for the
+- * data, we need to use the rotation to move the
+- * received samples to have correct alignment.
+- */
+- slot_width = mcasp->slot_width;
+- rx_rotate = (slot_width - sample_width) / 4;
++ if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) {
++ tx_rotate -= 24;
++ slot_width = 32;
++ fmt = 0; /* little endian */
++ } else {
++ slot_width = mcasp->slot_width ?: sample_width;
++ rx_rotate += slot_width;
++ fmt = TXORD; /* big endian */
+ }
+
+ /* mapping of the XSSZ bit-field as described in the datasheet */
+- fmt = (slot_width >> 1) - 1;
++ fmt |= TXSSZ((slot_width >> 1) - 1);
+
+- if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) {
+- mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXSSZ(fmt),
+- RXSSZ(0x0F));
+- mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSSZ(fmt),
+- TXSSZ(0x0F));
+- mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(tx_rotate),
+- TXROT(7));
+- mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXROT(rx_rotate),
+- RXROT(7));
+- mcasp_set_reg(mcasp, DAVINCI_MCASP_RXMASK_REG, mask);
+- }
++ tx_rotate = TXROT((tx_rotate & 31) >> 2);
++ rx_rotate = TXROT((rx_rotate & 31) >> 2);
+
+- mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, mask);
++ if (!mcasp->dat_port)
++ fmt |= TXSEL;
++
++ mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, fmt | tx_rotate, 0xffff);
++ mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, fmt | rx_rotate, 0xffff);
+
+ return 0;
+ }
+@@ -866,7 +877,6 @@ static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream,
+ int total_slots;
+ int active_serializers;
+ u32 mask = 0;
+- u32 busel = 0;
+
+ total_slots = mcasp->tdm_slots;
+
+@@ -902,17 +912,12 @@ static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream,
+ }
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
+
+- if (!mcasp->dat_port)
+- busel = TXSEL;
+-
+ if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, mask);
+- mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD);
+ mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG,
+ FSXMOD(total_slots), FSXMOD(0x1FF));
+ } else if (stream == SNDRV_PCM_STREAM_CAPTURE) {
+ mcasp_set_reg(mcasp, DAVINCI_MCASP_RXTDM_REG, mask);
+- mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD);
+ mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG,
+ FSRMOD(total_slots), FSRMOD(0x1FF));
+ /*
+@@ -935,23 +940,13 @@ static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp,
+ u32 cs_value = 0;
+ u8 *cs_bytes = (u8*) &cs_value;
+
+- /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0
+- and LSB first */
+- mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15));
+-
+ /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */
+ mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE | FSXMOD(0x180));
+
+ /* Set the TX tdm : for all the slots */
+ mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF);
+
+- /* Set the TX clock controls : div = 1 and internal */
+- mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC);
+-
+- mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);
+-
+- /* Only 44100 and 48000 are valid, both have the same setting */
+- mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3));
++ mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
+
+ /* Enable the DIT */
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN);
+@@ -1049,6 +1044,15 @@ static int davinci_mcasp_calc_clk_div(struct davinci_mcasp *mcasp,
+ return error_ppm;
+ }
+
++static uint mcasp_clocks_per_slot(struct davinci_mcasp *mcasp, uint width)
++{
++ if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE)
++ return 64;
++ if (mcasp->slot_width)
++ return mcasp->slot_width;
++ return width;
++}
++
+ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *cpu_dai)
+@@ -1068,12 +1072,9 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
+ * the machine driver, we need to calculate the ratio.
+ */
+ if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) {
+- int slots = mcasp->tdm_slots;
+- int rate = params_rate(params);
+- int sbits = params_width(params);
+-
+- if (mcasp->slot_width)
+- sbits = mcasp->slot_width;
++ uint slots = mcasp->tdm_slots;
++ uint rate = params_rate(params);
++ uint sbits = mcasp_clocks_per_slot(mcasp, params_width(params));
+
+ davinci_mcasp_calc_clk_div(mcasp, rate * sbits * slots, true);
+ }
+@@ -1171,14 +1172,11 @@ static int davinci_mcasp_hw_rule_rate(struct snd_pcm_hw_params *params,
+ struct davinci_mcasp_ruledata *rd = rule->private;
+ struct snd_interval *ri =
+ hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
+- int sbits = params_width(params);
+- int slots = rd->mcasp->tdm_slots;
++ uint sbits = mcasp_clocks_per_slot(rd->mcasp, params_width(params));
++ uint slots = rd->mcasp->tdm_slots;
+ struct snd_interval range;
+ int i;
+
+- if (rd->mcasp->slot_width)
+- sbits = rd->mcasp->slot_width;
+-
+ snd_interval_any(&range);
+ range.empty = 1;
+
+@@ -1225,8 +1223,7 @@ static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
+ uint sbits = snd_pcm_format_width(i);
+ int ppm;
+
+- if (rd->mcasp->slot_width)
+- sbits = rd->mcasp->slot_width;
++ sbits = mcasp_clocks_per_slot(rd->mcasp, sbits);
+
+ ppm = davinci_mcasp_calc_clk_div(rd->mcasp,
+ sbits * slots * rate,
+@@ -1836,7 +1833,9 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
+
+ mcasp->op_mode = pdata->op_mode;
+ /* sanity check for tdm slots parameter */
+- if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) {
++ if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) {
++ mcasp->tdm_slots = 2;
++ } else {
+ if (pdata->tdm_slots < 2) {
+ dev_err(&pdev->dev, "invalid tdm slots: %d\n",
+ pdata->tdm_slots);
+diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h
+index afddc8010c54..ecc33cb675af 100644
+--- a/sound/soc/davinci/davinci-mcasp.h
++++ b/sound/soc/davinci/davinci-mcasp.h
+@@ -82,12 +82,12 @@
+ /* Serializer n Control Register */
+ #define DAVINCI_MCASP_XRSRCTL_BASE_REG 0x180
+ #define DAVINCI_MCASP_XRSRCTL_REG(n) (DAVINCI_MCASP_XRSRCTL_BASE_REG + \
+- (n << 2))
++ ((n) << 2))
+
+ /* Transmit Buffer for Serializer n */
+-#define DAVINCI_MCASP_TXBUF_REG(n) (0x200 + (n << 2))
++#define DAVINCI_MCASP_TXBUF_REG(n) (0x200 + ((n) << 2))
+ /* Receive Buffer for Serializer n */
+-#define DAVINCI_MCASP_RXBUF_REG(n) (0x280 + (n << 2))
++#define DAVINCI_MCASP_RXBUF_REG(n) (0x280 + ((n) << 2))
+
+ /* McASP FIFO Registers */
+ #define DAVINCI_MCASP_V2_AFIFO_BASE (0x1010)
+@@ -109,7 +109,7 @@
+ /*
+ * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits
+ */
+-#define AXR(n) (1<<n)
++#define AXR(n) (1<<(n))
+ #define PFUNC_AMUTE BIT(25)
+ #define ACLKX BIT(26)
+ #define AHCLKX BIT(27)
+@@ -121,7 +121,7 @@
+ /*
+ * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits
+ */
+-#define AXR(n) (1<<n)
++#define AXR(n) (1<<(n))
+ #define PDIR_AMUTE BIT(25)
+ #define ACLKX BIT(26)
+ #define AHCLKX BIT(27)
+@@ -142,22 +142,22 @@
+ */
+ #define TXROT(val) (val)
+ #define TXSEL BIT(3)
+-#define TXSSZ(val) (val<<4)
+-#define TXPBIT(val) (val<<8)
+-#define TXPAD(val) (val<<13)
++#define TXSSZ(val) ((val)<<4)
++#define TXPBIT(val) ((val)<<8)
++#define TXPAD(val) ((val)<<13)
+ #define TXORD BIT(15)
+-#define FSXDLY(val) (val<<16)
++#define FSXDLY(val) ((val)<<16)
+
+ /*
+ * DAVINCI_MCASP_RXFMT_REG - Receive Bitstream Format Register Bits
+ */
+ #define RXROT(val) (val)
+ #define RXSEL BIT(3)
+-#define RXSSZ(val) (val<<4)
+-#define RXPBIT(val) (val<<8)
+-#define RXPAD(val) (val<<13)
++#define RXSSZ(val) ((val)<<4)
++#define RXPBIT(val) ((val)<<8)
++#define RXPAD(val) ((val)<<13)
+ #define RXORD BIT(15)
+-#define FSRDLY(val) (val<<16)
++#define FSRDLY(val) ((val)<<16)
+
+ /*
+ * DAVINCI_MCASP_TXFMCTL_REG - Transmit Frame Control Register Bits
+@@ -165,7 +165,7 @@
+ #define FSXPOL BIT(0)
+ #define AFSXE BIT(1)
+ #define FSXDUR BIT(4)
+-#define FSXMOD(val) (val<<7)
++#define FSXMOD(val) ((val)<<7)
+
+ /*
+ * DAVINCI_MCASP_RXFMCTL_REG - Receive Frame Control Register Bits
+@@ -173,7 +173,7 @@
+ #define FSRPOL BIT(0)
+ #define AFSRE BIT(1)
+ #define FSRDUR BIT(4)
+-#define FSRMOD(val) (val<<7)
++#define FSRMOD(val) ((val)<<7)
+
+ /*
+ * DAVINCI_MCASP_ACLKXCTL_REG - Transmit Clock Control Register Bits
+@@ -229,17 +229,17 @@
+ */
+ #define LBEN BIT(0)
+ #define LBORD BIT(1)
+-#define LBGENMODE(val) (val<<2)
++#define LBGENMODE(val) ((val)<<2)
+
+ /*
+ * DAVINCI_MCASP_TXTDMSLOT_REG - Transmit TDM Slot Register configuration
+ */
+-#define TXTDMS(n) (1<<n)
++#define TXTDMS(n) (1<<(n))
+
+ /*
+ * DAVINCI_MCASP_RXTDMSLOT_REG - Receive TDM Slot Register configuration
+ */
+-#define RXTDMS(n) (1<<n)
++#define RXTDMS(n) (1<<(n))
+
+ /*
+ * DAVINCI_MCASP_GBLCTL_REG - Global Control Register Bits
+--
+2.9.3
+
diff --git a/patches/ref_omap2plus_defconfig b/patches/ref_omap2plus_defconfig
index c6b725bb1855269895df6725279c7de2ff061d2c..09ec16efa0b968f93dd55a0d0aedf06bad626e07 100644
--- a/patches/ref_omap2plus_defconfig
+++ b/patches/ref_omap2plus_defconfig
@@ -682,6 +682,7 @@ CONFIG_CPUFREQ_DT_PLATDEV=y
# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
+# CONFIG_ARM_TI_CPUFREQ is not set
# CONFIG_QORIQ_CPUFREQ is not set
#
@@ -1093,6 +1094,7 @@ CONFIG_CMA_ALIGNMENT=8
# CONFIG_BRCMSTB_GISB_ARB is not set
CONFIG_OMAP_INTERCONNECT=y
CONFIG_OMAP_OCP2SCP=y
+# CONFIG_SIMPLE_PM_BUS is not set
# CONFIG_VEXPRESS_CONFIG is not set
CONFIG_CONNECTOR=m
CONFIG_MTD=y
@@ -1261,6 +1263,7 @@ CONFIG_SENSORS_TSL2550=m
CONFIG_SRAM=y
# CONFIG_BONE_CAPEMGR is not set
# CONFIG_DEV_OVERLAYMGR is not set
+# CONFIG_TIEQEP is not set
# CONFIG_C2PORT is not set
#
@@ -2099,12 +2102,6 @@ CONFIG_HDQ_MASTER_OMAP=m
# CONFIG_W1_SLAVE_DS28E04 is not set
# CONFIG_W1_SLAVE_BQ27000 is not set
CONFIG_POWER_AVS=y
-
-#
-# Power Sequence Support
-#
-# CONFIG_PWRSEQ_GENERIC is not set
-# CONFIG_PWRSEQ_SAMPLE is not set
CONFIG_POWER_RESET=y
# CONFIG_POWER_RESET_BRCMKONA is not set
# CONFIG_POWER_RESET_BRCMSTB is not set
@@ -2983,6 +2980,7 @@ CONFIG_SND_SOC_DMIC=m
# CONFIG_SND_SOC_TAS5086 is not set
# CONFIG_SND_SOC_TAS571X is not set
# CONFIG_SND_SOC_TAS5720 is not set
+# CONFIG_SND_SOC_TDM is not set
# CONFIG_SND_SOC_TFA9879 is not set
# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
diff --git a/patches/reverts/0001-Revert-eeprom-at24-check-if-the-chip-is-functional-i.patch b/patches/reverts/0001-Revert-eeprom-at24-check-if-the-chip-is-functional-i.patch
index 82934eec4ea2b6b17990b80d9b7f662f1c1da28f..22e17dceb6c99c77c8dbe4b55bb68ac00946cd60 100644
--- a/patches/reverts/0001-Revert-eeprom-at24-check-if-the-chip-is-functional-i.patch
+++ b/patches/reverts/0001-Revert-eeprom-at24-check-if-the-chip-is-functional-i.patch
@@ -1,7 +1,7 @@
-From 561187dce699d85f1a5b482d78aeba945b53a0d3 Mon Sep 17 00:00:00 2001
+From 0a23040ef1b180a686ec7da7e39a093507ccbea6 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 1 Nov 2016 12:21:19 -0500
-Subject: [PATCH] Revert "eeprom: at24: check if the chip is functional in
+Subject: [PATCH 1/7] Revert "eeprom: at24: check if the chip is functional in
probe()"
This reverts commit 00f0ea70d2b82b7d7afeb1bdedc9169eb8ea6675.
diff --git a/patches/reverts/0002-Revert-wlcore-sdio-drop-kfree-for-memory-allocated-w.patch b/patches/reverts/0002-Revert-wlcore-sdio-drop-kfree-for-memory-allocated-w.patch
new file mode 100644
index 0000000000000000000000000000000000000000..fe47ef8c59d744cdec294647561ff46e9f7c701e
--- /dev/null
+++ b/patches/reverts/0002-Revert-wlcore-sdio-drop-kfree-for-memory-allocated-w.patch
@@ -0,0 +1,28 @@
+From 895700c01da6b1c3db4acbcbea649e6e57a81714 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 1 Nov 2016 15:27:20 -0500
+Subject: [PATCH 2/7] Revert "wlcore: sdio: drop kfree for memory allocated
+ with devm_kzalloc"
+
+This reverts commit f38b7c2547537a8219d273e20eb3b88e6fc6b764.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/net/wireless/ti/wlcore/sdio.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/net/wireless/ti/wlcore/sdio.c b/drivers/net/wireless/ti/wlcore/sdio.c
+index 47fe7f9..a6e94b1 100644
+--- a/drivers/net/wireless/ti/wlcore/sdio.c
++++ b/drivers/net/wireless/ti/wlcore/sdio.c
+@@ -391,6 +391,7 @@ static void wl1271_remove(struct sdio_func *func)
+ pm_runtime_get_noresume(&func->dev);
+
+ platform_device_unregister(glue->core);
++ kfree(glue);
+ }
+
+ #ifdef CONFIG_PM
+--
+2.10.1
+
diff --git a/patches/reverts/0003-Revert-wlcore-wl18xx-Use-chip-specific-configuration.patch b/patches/reverts/0003-Revert-wlcore-wl18xx-Use-chip-specific-configuration.patch
new file mode 100644
index 0000000000000000000000000000000000000000..5d67f0b859538b87d917ee8418f26fd0f3528d3a
--- /dev/null
+++ b/patches/reverts/0003-Revert-wlcore-wl18xx-Use-chip-specific-configuration.patch
@@ -0,0 +1,71 @@
+From 2d09dc711d030c7d66569786801c9a6c195ae621 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 1 Nov 2016 15:27:26 -0500
+Subject: [PATCH 3/7] Revert "wlcore: wl18xx: Use chip specific configuration
+ firmware"
+
+This reverts commit 33e40d025ed82fcab102035db38a727c914399a4.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/net/wireless/ti/wl18xx/main.c | 19 +++++++++----------
+ 1 file changed, 9 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/net/wireless/ti/wl18xx/main.c b/drivers/net/wireless/ti/wl18xx/main.c
+index 06d6943..00a04df 100644
+--- a/drivers/net/wireless/ti/wl18xx/main.c
++++ b/drivers/net/wireless/ti/wl18xx/main.c
+@@ -1397,24 +1397,25 @@ static int wl18xx_get_pg_ver(struct wl1271 *wl, s8 *ver)
+ return ret;
+ }
+
++#define WL18XX_CONF_FILE_NAME "ti-connectivity/wl18xx-conf.bin"
++
+ static int wl18xx_load_conf_file(struct device *dev, struct wlcore_conf *conf,
+- struct wl18xx_priv_conf *priv_conf,
+- const char *file)
++ struct wl18xx_priv_conf *priv_conf)
+ {
+ struct wlcore_conf_file *conf_file;
+ const struct firmware *fw;
+ int ret;
+
+- ret = request_firmware(&fw, file, dev);
++ ret = request_firmware(&fw, WL18XX_CONF_FILE_NAME, dev);
+ if (ret < 0) {
+ wl1271_error("could not get configuration binary %s: %d",
+- file, ret);
++ WL18XX_CONF_FILE_NAME, ret);
+ return ret;
+ }
+
+ if (fw->size != WL18XX_CONF_SIZE) {
+- wl1271_error("%s configuration binary size is wrong, expected %zu got %zu",
+- file, WL18XX_CONF_SIZE, fw->size);
++ wl1271_error("configuration binary file size is wrong, expected %zu got %zu",
++ WL18XX_CONF_SIZE, fw->size);
+ ret = -EINVAL;
+ goto out_release;
+ }
+@@ -1447,12 +1448,9 @@ static int wl18xx_load_conf_file(struct device *dev, struct wlcore_conf *conf,
+
+ static int wl18xx_conf_init(struct wl1271 *wl, struct device *dev)
+ {
+- struct platform_device *pdev = wl->pdev;
+- struct wlcore_platdev_data *pdata = dev_get_platdata(&pdev->dev);
+ struct wl18xx_priv *priv = wl->priv;
+
+- if (wl18xx_load_conf_file(dev, &wl->conf, &priv->conf,
+- pdata->family->cfg_name) < 0) {
++ if (wl18xx_load_conf_file(dev, &wl->conf, &priv->conf) < 0) {
+ wl1271_warning("falling back to default config");
+
+ /* apply driver default configuration */
+@@ -2143,3 +2141,4 @@ MODULE_PARM_DESC(num_rx_desc_param,
+ MODULE_LICENSE("GPL v2");
+ MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
+ MODULE_FIRMWARE(WL18XX_FW_NAME);
++MODULE_FIRMWARE(WL18XX_CONF_FILE_NAME);
+--
+2.10.1
+
diff --git a/patches/reverts/0004-Revert-wlcore-Fix-config-firmware-loading-issues.patch b/patches/reverts/0004-Revert-wlcore-Fix-config-firmware-loading-issues.patch
new file mode 100644
index 0000000000000000000000000000000000000000..c7874d866aaaf6b8d30cb773737d79ec8ed72ba9
--- /dev/null
+++ b/patches/reverts/0004-Revert-wlcore-Fix-config-firmware-loading-issues.patch
@@ -0,0 +1,157 @@
+From a44cadc3e42e13e68c79d745345ab02ad4414e9c Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 1 Nov 2016 15:27:28 -0500
+Subject: [PATCH 4/7] Revert "wlcore: Fix config firmware loading issues"
+
+This reverts commit 3e1ac932682b1377ae1c9d6283f0b88e28fb227d.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/net/wireless/ti/wlcore/boot.c | 15 ++++---------
+ drivers/net/wireless/ti/wlcore/main.c | 36 +++++++++++--------------------
+ drivers/net/wireless/ti/wlcore/wlcore_i.h | 7 ++++++
+ 3 files changed, 23 insertions(+), 35 deletions(-)
+
+diff --git a/drivers/net/wireless/ti/wlcore/boot.c b/drivers/net/wireless/ti/wlcore/boot.c
+index f00509e..f75d304 100644
+--- a/drivers/net/wireless/ti/wlcore/boot.c
++++ b/drivers/net/wireless/ti/wlcore/boot.c
+@@ -282,9 +282,6 @@ EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
+
+ int wlcore_boot_upload_nvs(struct wl1271 *wl)
+ {
+- struct platform_device *pdev = wl->pdev;
+- struct wlcore_platdev_data *pdev_data = dev_get_platdata(&pdev->dev);
+- const char *nvs_name = "unknown";
+ size_t nvs_len, burst_len;
+ int i;
+ u32 dest_addr, val;
+@@ -296,9 +293,6 @@ int wlcore_boot_upload_nvs(struct wl1271 *wl)
+ return -ENODEV;
+ }
+
+- if (pdev_data && pdev_data->family)
+- nvs_name = pdev_data->family->nvs_name;
+-
+ if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
+ struct wl1271_nvs_file *nvs =
+ (struct wl1271_nvs_file *)wl->nvs;
+@@ -316,9 +310,8 @@ int wlcore_boot_upload_nvs(struct wl1271 *wl)
+ if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
+ (wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
+ wl->enable_11a)) {
+- wl1271_error("%s size is not as expected: %zu != %zu",
+- nvs_name, wl->nvs_len,
+- sizeof(struct wl1271_nvs_file));
++ wl1271_error("nvs size is not as expected: %zu != %zu",
++ wl->nvs_len, sizeof(struct wl1271_nvs_file));
+ kfree(wl->nvs);
+ wl->nvs = NULL;
+ wl->nvs_len = 0;
+@@ -335,8 +328,8 @@ int wlcore_boot_upload_nvs(struct wl1271 *wl)
+ if (nvs->general_params.dual_mode_select)
+ wl->enable_11a = true;
+ } else {
+- wl1271_error("%s size is not as expected: %zu != %zu",
+- nvs_name, wl->nvs_len,
++ wl1271_error("nvs size is not as expected: %zu != %zu",
++ wl->nvs_len,
+ sizeof(struct wl128x_nvs_file));
+ kfree(wl->nvs);
+ wl->nvs = NULL;
+diff --git a/drivers/net/wireless/ti/wlcore/main.c b/drivers/net/wireless/ti/wlcore/main.c
+index 471521a..ef6c15b 100644
+--- a/drivers/net/wireless/ti/wlcore/main.c
++++ b/drivers/net/wireless/ti/wlcore/main.c
+@@ -6413,12 +6413,9 @@ static void wlcore_nvs_cb(const struct firmware *fw, void *context)
+ goto out;
+ }
+ wl->nvs_len = fw->size;
+- } else if (pdev_data->family->nvs_name) {
+- wl1271_debug(DEBUG_BOOT, "Could not get nvs file %s",
+- pdev_data->family->nvs_name);
+- wl->nvs = NULL;
+- wl->nvs_len = 0;
+ } else {
++ wl1271_debug(DEBUG_BOOT, "Could not get nvs file %s",
++ WL12XX_NVS_NAME);
+ wl->nvs = NULL;
+ wl->nvs_len = 0;
+ }
+@@ -6513,29 +6510,21 @@ static void wlcore_nvs_cb(const struct firmware *fw, void *context)
+
+ int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev)
+ {
+- struct wlcore_platdev_data *pdev_data = dev_get_platdata(&pdev->dev);
+- const char *nvs_name;
+- int ret = 0;
++ int ret;
+
+- if (!wl->ops || !wl->ptable || !pdev_data)
++ if (!wl->ops || !wl->ptable)
+ return -EINVAL;
+
+ wl->dev = &pdev->dev;
+ wl->pdev = pdev;
+ platform_set_drvdata(pdev, wl);
+
+- if (pdev_data->family && pdev_data->family->nvs_name) {
+- nvs_name = pdev_data->family->nvs_name;
+- ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
+- nvs_name, &pdev->dev, GFP_KERNEL,
+- wl, wlcore_nvs_cb);
+- if (ret < 0) {
+- wl1271_error("request_firmware_nowait failed for %s: %d",
+- nvs_name, ret);
+- complete_all(&wl->nvs_loading_complete);
+- }
+- } else {
+- wlcore_nvs_cb(NULL, wl);
++ ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
++ WL12XX_NVS_NAME, &pdev->dev, GFP_KERNEL,
++ wl, wlcore_nvs_cb);
++ if (ret < 0) {
++ wl1271_error("request_firmware_nowait failed: %d", ret);
++ complete_all(&wl->nvs_loading_complete);
+ }
+
+ return ret;
+@@ -6544,11 +6533,9 @@ EXPORT_SYMBOL_GPL(wlcore_probe);
+
+ int wlcore_remove(struct platform_device *pdev)
+ {
+- struct wlcore_platdev_data *pdev_data = dev_get_platdata(&pdev->dev);
+ struct wl1271 *wl = platform_get_drvdata(pdev);
+
+- if (pdev_data->family && pdev_data->family->nvs_name)
+- wait_for_completion(&wl->nvs_loading_complete);
++ wait_for_completion(&wl->nvs_loading_complete);
+ if (!wl->initialized)
+ return 0;
+
+@@ -6585,3 +6572,4 @@ MODULE_PARM_DESC(no_recovery, "Prevent HW recovery. FW will remain stuck.");
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
+ MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
++MODULE_FIRMWARE(WL12XX_NVS_NAME);
+diff --git a/drivers/net/wireless/ti/wlcore/wlcore_i.h b/drivers/net/wireless/ti/wlcore/wlcore_i.h
+index e840985..f68280d 100644
+--- a/drivers/net/wireless/ti/wlcore/wlcore_i.h
++++ b/drivers/net/wireless/ti/wlcore/wlcore_i.h
+@@ -35,6 +35,13 @@
+ #include "conf.h"
+ #include "ini.h"
+
++/*
++ * wl127x and wl128x are using the same NVS file name. However, the
++ * ini parameters between them are different. The driver validates
++ * the correct NVS size in wl1271_boot_upload_nvs().
++ */
++#define WL12XX_NVS_NAME "ti-connectivity/wl1271-nvs.bin"
++
+ struct wilink_family_data {
+ const char *name;
+ const char *nvs_name; /* wl12xx nvs file */
+--
+2.10.1
+
diff --git a/patches/reverts/0005-Revert-wlcore-spi-Populate-config-firmware-data.patch b/patches/reverts/0005-Revert-wlcore-spi-Populate-config-firmware-data.patch
new file mode 100644
index 0000000000000000000000000000000000000000..6b3b7b9e40d510f7e913a81d6cc4431fbc42ad65
--- /dev/null
+++ b/patches/reverts/0005-Revert-wlcore-spi-Populate-config-firmware-data.patch
@@ -0,0 +1,119 @@
+From 2d7bdfa56e2c97cf60ec8ebd8dbe5fab674cf9b5 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 1 Nov 2016 15:27:30 -0500
+Subject: [PATCH 5/7] Revert "wlcore: spi: Populate config firmware data"
+
+This reverts commit c815fdebef444d591f57a1e90dcfa0e2f8112e10.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/net/wireless/ti/wlcore/spi.c | 42 ++++++++++++++++--------------------
+ 1 file changed, 18 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/net/wireless/ti/wlcore/spi.c b/drivers/net/wireless/ti/wlcore/spi.c
+index f949ad2b..a336493 100644
+--- a/drivers/net/wireless/ti/wlcore/spi.c
++++ b/drivers/net/wireless/ti/wlcore/spi.c
+@@ -79,19 +79,15 @@
+ #define WSPI_MAX_NUM_OF_CHUNKS \
+ ((SPI_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE) + 1)
+
+-static const struct wilink_family_data wl127x_data = {
+- .name = "wl127x",
+- .nvs_name = "ti-connectivity/wl127x-nvs.bin",
+-};
+
+-static const struct wilink_family_data wl128x_data = {
+- .name = "wl128x",
+- .nvs_name = "ti-connectivity/wl128x-nvs.bin",
+-};
++static const struct wilink_family_data *wilink_data;
+
+ static const struct wilink_family_data wl18xx_data = {
+ .name = "wl18xx",
+- .cfg_name = "ti-connectivity/wl18xx-conf.bin",
++};
++
++static const struct wilink_family_data wl12xx_data = {
++ .name = "wl12xx",
+ };
+
+ struct wl12xx_spi_glue {
+@@ -429,10 +425,10 @@ static struct wl1271_if_operations spi_ops = {
+ };
+
+ static const struct of_device_id wlcore_spi_of_match_table[] = {
+- { .compatible = "ti,wl1271", .data = &wl127x_data},
+- { .compatible = "ti,wl1273", .data = &wl127x_data},
+- { .compatible = "ti,wl1281", .data = &wl128x_data},
+- { .compatible = "ti,wl1283", .data = &wl128x_data},
++ { .compatible = "ti,wl1271", .data = &wl12xx_data},
++ { .compatible = "ti,wl1273", .data = &wl12xx_data},
++ { .compatible = "ti,wl1281", .data = &wl12xx_data},
++ { .compatible = "ti,wl1283", .data = &wl12xx_data},
+ { .compatible = "ti,wl1801", .data = &wl18xx_data},
+ { .compatible = "ti,wl1805", .data = &wl18xx_data},
+ { .compatible = "ti,wl1807", .data = &wl18xx_data},
+@@ -460,9 +456,9 @@ static int wlcore_probe_of(struct spi_device *spi, struct wl12xx_spi_glue *glue,
+ if (!of_id)
+ return -ENODEV;
+
+- pdev_data->family = of_id->data;
++ wilink_data = of_id->data;
+ dev_info(&spi->dev, "selected chip family is %s\n",
+- pdev_data->family->name);
++ wilink_data->name);
+
+ if (of_find_property(dt_node, "clock-xtal", NULL))
+ pdev_data->ref_clock_xtal = true;
+@@ -479,15 +475,13 @@ static int wlcore_probe_of(struct spi_device *spi, struct wl12xx_spi_glue *glue,
+ static int wl1271_probe(struct spi_device *spi)
+ {
+ struct wl12xx_spi_glue *glue;
+- struct wlcore_platdev_data *pdev_data;
++ struct wlcore_platdev_data pdev_data;
+ struct resource res[1];
+ int ret;
+
+- pdev_data = devm_kzalloc(&spi->dev, sizeof(*pdev_data), GFP_KERNEL);
+- if (!pdev_data)
+- return -ENOMEM;
++ memset(&pdev_data, 0x00, sizeof(pdev_data));
+
+- pdev_data->if_ops = &spi_ops;
++ pdev_data.if_ops = &spi_ops;
+
+ glue = devm_kzalloc(&spi->dev, sizeof(*glue), GFP_KERNEL);
+ if (!glue) {
+@@ -511,7 +505,7 @@ static int wl1271_probe(struct spi_device *spi)
+ return PTR_ERR(glue->reg);
+ }
+
+- ret = wlcore_probe_of(spi, glue, pdev_data);
++ ret = wlcore_probe_of(spi, glue, &pdev_data);
+ if (ret) {
+ dev_err(glue->dev,
+ "can't get device tree parameters (%d)\n", ret);
+@@ -524,7 +518,7 @@ static int wl1271_probe(struct spi_device *spi)
+ return ret;
+ }
+
+- glue->core = platform_device_alloc(pdev_data->family->name,
++ glue->core = platform_device_alloc(wilink_data->name,
+ PLATFORM_DEVID_AUTO);
+ if (!glue->core) {
+ dev_err(glue->dev, "can't allocate platform_device\n");
+@@ -545,8 +539,8 @@ static int wl1271_probe(struct spi_device *spi)
+ goto out_dev_put;
+ }
+
+- ret = platform_device_add_data(glue->core, pdev_data,
+- sizeof(*pdev_data));
++ ret = platform_device_add_data(glue->core, &pdev_data,
++ sizeof(pdev_data));
+ if (ret) {
+ dev_err(glue->dev, "can't add platform data\n");
+ goto out_dev_put;
+--
+2.10.1
+
diff --git a/patches/reverts/0006-Revert-wlcore-sdio-Populate-config-firmware-data.patch b/patches/reverts/0006-Revert-wlcore-sdio-Populate-config-firmware-data.patch
new file mode 100644
index 0000000000000000000000000000000000000000..f05f7a6154a69736ef2da356320b6b141e8a1c63
--- /dev/null
+++ b/patches/reverts/0006-Revert-wlcore-sdio-Populate-config-firmware-data.patch
@@ -0,0 +1,161 @@
+From b035d8fcee7d99662a2bcadf3f414070cdd42223 Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 1 Nov 2016 15:27:32 -0500
+Subject: [PATCH 6/7] Revert "wlcore: sdio: Populate config firmware data"
+
+This reverts commit d776fc86b82ffd7cfe9eb4182cc398cb8ab4199c.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/net/wireless/ti/wlcore/sdio.c | 76 +++++++++++++----------------------
+ 1 file changed, 29 insertions(+), 47 deletions(-)
+
+diff --git a/drivers/net/wireless/ti/wlcore/sdio.c b/drivers/net/wireless/ti/wlcore/sdio.c
+index a6e94b1..5839acb 100644
+--- a/drivers/net/wireless/ti/wlcore/sdio.c
++++ b/drivers/net/wireless/ti/wlcore/sdio.c
+@@ -216,33 +216,17 @@ static struct wl1271_if_operations sdio_ops = {
+ };
+
+ #ifdef CONFIG_OF
+-
+-static const struct wilink_family_data wl127x_data = {
+- .name = "wl127x",
+- .nvs_name = "ti-connectivity/wl127x-nvs.bin",
+-};
+-
+-static const struct wilink_family_data wl128x_data = {
+- .name = "wl128x",
+- .nvs_name = "ti-connectivity/wl128x-nvs.bin",
+-};
+-
+-static const struct wilink_family_data wl18xx_data = {
+- .name = "wl18xx",
+- .cfg_name = "ti-connectivity/wl18xx-conf.bin",
+-};
+-
+ static const struct of_device_id wlcore_sdio_of_match_table[] = {
+- { .compatible = "ti,wl1271", .data = &wl127x_data },
+- { .compatible = "ti,wl1273", .data = &wl127x_data },
+- { .compatible = "ti,wl1281", .data = &wl128x_data },
+- { .compatible = "ti,wl1283", .data = &wl128x_data },
+- { .compatible = "ti,wl1801", .data = &wl18xx_data },
+- { .compatible = "ti,wl1805", .data = &wl18xx_data },
+- { .compatible = "ti,wl1807", .data = &wl18xx_data },
+- { .compatible = "ti,wl1831", .data = &wl18xx_data },
+- { .compatible = "ti,wl1835", .data = &wl18xx_data },
+- { .compatible = "ti,wl1837", .data = &wl18xx_data },
++ { .compatible = "ti,wl1271" },
++ { .compatible = "ti,wl1273" },
++ { .compatible = "ti,wl1281" },
++ { .compatible = "ti,wl1283" },
++ { .compatible = "ti,wl1801" },
++ { .compatible = "ti,wl1805" },
++ { .compatible = "ti,wl1807" },
++ { .compatible = "ti,wl1831" },
++ { .compatible = "ti,wl1835" },
++ { .compatible = "ti,wl1837" },
+ { }
+ };
+
+@@ -250,13 +234,9 @@ static int wlcore_probe_of(struct device *dev, int *irq,
+ struct wlcore_platdev_data *pdev_data)
+ {
+ struct device_node *np = dev->of_node;
+- const struct of_device_id *of_id;
+-
+- of_id = of_match_node(wlcore_sdio_of_match_table, np);
+- if (!of_id)
+- return -ENODEV;
+
+- pdev_data->family = of_id->data;
++ if (!np || !of_match_node(wlcore_sdio_of_match_table, np))
++ return -ENODATA;
+
+ *irq = irq_of_parse_and_map(np, 0);
+ if (!*irq) {
+@@ -283,7 +263,7 @@ static int wlcore_probe_of(struct device *dev, int *irq,
+ static int wl1271_probe(struct sdio_func *func,
+ const struct sdio_device_id *id)
+ {
+- struct wlcore_platdev_data *pdev_data;
++ struct wlcore_platdev_data pdev_data;
+ struct wl12xx_sdio_glue *glue;
+ struct resource res[1];
+ mmc_pm_flag_t mmcflags;
+@@ -295,15 +275,14 @@ static int wl1271_probe(struct sdio_func *func,
+ if (func->num != 0x02)
+ return -ENODEV;
+
+- pdev_data = devm_kzalloc(&func->dev, sizeof(*pdev_data), GFP_KERNEL);
+- if (!pdev_data)
+- return -ENOMEM;
+-
+- pdev_data->if_ops = &sdio_ops;
++ memset(&pdev_data, 0x00, sizeof(pdev_data));
++ pdev_data.if_ops = &sdio_ops;
+
+- glue = devm_kzalloc(&func->dev, sizeof(*glue), GFP_KERNEL);
+- if (!glue)
+- return -ENOMEM;
++ glue = kzalloc(sizeof(*glue), GFP_KERNEL);
++ if (!glue) {
++ dev_err(&func->dev, "can't allocate glue\n");
++ goto out;
++ }
+
+ glue->dev = &func->dev;
+
+@@ -313,16 +292,16 @@ static int wl1271_probe(struct sdio_func *func,
+ /* Use block mode for transferring over one block size of data */
+ func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
+
+- ret = wlcore_probe_of(&func->dev, &irq, pdev_data);
++ ret = wlcore_probe_of(&func->dev, &irq, &pdev_data);
+ if (ret)
+- goto out;
++ goto out_free_glue;
+
+ /* if sdio can keep power while host is suspended, enable wow */
+ mmcflags = sdio_get_host_pm_caps(func);
+ dev_dbg(glue->dev, "sdio PM caps = 0x%x\n", mmcflags);
+
+ if (mmcflags & MMC_PM_KEEP_POWER)
+- pdev_data->pwr_in_suspend = true;
++ pdev_data.pwr_in_suspend = true;
+
+ sdio_set_drvdata(func, glue);
+
+@@ -344,7 +323,7 @@ static int wl1271_probe(struct sdio_func *func,
+ if (!glue->core) {
+ dev_err(glue->dev, "can't allocate platform_device");
+ ret = -ENOMEM;
+- goto out;
++ goto out_free_glue;
+ }
+
+ glue->core->dev.parent = &func->dev;
+@@ -362,8 +341,8 @@ static int wl1271_probe(struct sdio_func *func,
+ goto out_dev_put;
+ }
+
+- ret = platform_device_add_data(glue->core, pdev_data,
+- sizeof(*pdev_data));
++ ret = platform_device_add_data(glue->core, &pdev_data,
++ sizeof(pdev_data));
+ if (ret) {
+ dev_err(glue->dev, "can't add platform data\n");
+ goto out_dev_put;
+@@ -379,6 +358,9 @@ static int wl1271_probe(struct sdio_func *func,
+ out_dev_put:
+ platform_device_put(glue->core);
+
++out_free_glue:
++ kfree(glue);
++
+ out:
+ return ret;
+ }
+--
+2.10.1
+
diff --git a/patches/reverts/0007-Revert-wlcore-Prepare-family-to-fix-nvs-file-handlin.patch b/patches/reverts/0007-Revert-wlcore-Prepare-family-to-fix-nvs-file-handlin.patch
new file mode 100644
index 0000000000000000000000000000000000000000..e9832a003375a1b150378be90f712706cbcf7c39
--- /dev/null
+++ b/patches/reverts/0007-Revert-wlcore-Prepare-family-to-fix-nvs-file-handlin.patch
@@ -0,0 +1,75 @@
+From f8a2991acba62b3725df706a279c4afd71fcae5a Mon Sep 17 00:00:00 2001
+From: Robert Nelson <robertcnelson@gmail.com>
+Date: Tue, 1 Nov 2016 15:27:34 -0500
+Subject: [PATCH 7/7] Revert "wlcore: Prepare family to fix nvs file handling"
+
+This reverts commit a762bb8ecb899d1e058b51f3daba4e1ed42b3479.
+
+Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
+---
+ drivers/net/wireless/ti/wlcore/spi.c | 12 ++++++++----
+ drivers/net/wireless/ti/wlcore/wlcore_i.h | 7 -------
+ 2 files changed, 8 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/net/wireless/ti/wlcore/spi.c b/drivers/net/wireless/ti/wlcore/spi.c
+index a336493..0ed526e 100644
+--- a/drivers/net/wireless/ti/wlcore/spi.c
++++ b/drivers/net/wireless/ti/wlcore/spi.c
+@@ -80,13 +80,17 @@
+ ((SPI_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE) + 1)
+
+
+-static const struct wilink_family_data *wilink_data;
++struct wilink_familiy_data {
++ char name[8];
++};
++
++static const struct wilink_familiy_data *wilink_data;
+
+-static const struct wilink_family_data wl18xx_data = {
++static const struct wilink_familiy_data wl18xx_data = {
+ .name = "wl18xx",
+ };
+
+-static const struct wilink_family_data wl12xx_data = {
++static const struct wilink_familiy_data wl12xx_data = {
+ .name = "wl12xx",
+ };
+
+@@ -457,7 +461,7 @@ static int wlcore_probe_of(struct spi_device *spi, struct wl12xx_spi_glue *glue,
+ return -ENODEV;
+
+ wilink_data = of_id->data;
+- dev_info(&spi->dev, "selected chip family is %s\n",
++ dev_info(&spi->dev, "selected chip familiy is %s\n",
+ wilink_data->name);
+
+ if (of_find_property(dt_node, "clock-xtal", NULL))
+diff --git a/drivers/net/wireless/ti/wlcore/wlcore_i.h b/drivers/net/wireless/ti/wlcore/wlcore_i.h
+index f68280d..0277ae5 100644
+--- a/drivers/net/wireless/ti/wlcore/wlcore_i.h
++++ b/drivers/net/wireless/ti/wlcore/wlcore_i.h
+@@ -42,12 +42,6 @@
+ */
+ #define WL12XX_NVS_NAME "ti-connectivity/wl1271-nvs.bin"
+
+-struct wilink_family_data {
+- const char *name;
+- const char *nvs_name; /* wl12xx nvs file */
+- const char *cfg_name; /* wl18xx cfg file */
+-};
+-
+ #define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
+ #define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
+ #define WL1271_TX_SQN_POST_RECOVERY_PADDING 0xff
+@@ -214,7 +208,6 @@ struct wl1271_if_operations {
+
+ struct wlcore_platdev_data {
+ struct wl1271_if_operations *if_ops;
+- const struct wilink_family_data *family;
+
+ bool ref_clock_xtal; /* specify whether the clock is XTAL or not */
+ u32 ref_clock_freq; /* in Hertz */
+--
+2.10.1
+
diff --git a/patches/beaglebone/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch b/patches/soc/ti/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch
similarity index 99%
rename from patches/beaglebone/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch
rename to patches/soc/ti/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch
index 413a1cc5efc757af164969ee3921345018c2b721..d76b97fba96969fb7b708e62ef6ead61dde77ab7 100644
--- a/patches/beaglebone/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch
+++ b/patches/soc/ti/abbbi/0001-gpu-drm-i2c-add-alternative-adv7511-driver-with-audi.patch
@@ -1,7 +1,7 @@
-From d0a8974579747b7df2578e7d0065460b401caa38 Mon Sep 17 00:00:00 2001
+From d62b841d3f2e9346b31d6509c78c44c530c5e457 Mon Sep 17 00:00:00 2001
From: Jason Kridner <jdk@ti.com>
Date: Thu, 10 Sep 2015 23:39:40 +0000
-Subject: [PATCH 1/5] gpu: drm: i2c: add alternative adv7511 driver with audio
+Subject: [PATCH 1/6] gpu: drm: i2c: add alternative adv7511 driver with audio
support
Hacked driver that has audio support. Use this temporarily until
@@ -20,7 +20,7 @@ Signed-off-by: Matt Porter <mporter@konsulko.com>
create mode 100644 drivers/gpu/drm/i2c/adihdmi_drv.c
diff --git a/drivers/gpu/drm/i2c/Kconfig b/drivers/gpu/drm/i2c/Kconfig
-index 4d341db..808a6fb 100644
+index a6c92be..66ff8e3f 100644
--- a/drivers/gpu/drm/i2c/Kconfig
+++ b/drivers/gpu/drm/i2c/Kconfig
@@ -1,6 +1,12 @@
@@ -1437,5 +1437,5 @@ index 0000000..8ffef6c
+MODULE_DESCRIPTION("ADIHDMI HDMI transmitter driver");
+MODULE_LICENSE("GPL");
--
-2.8.1
+2.10.1
diff --git a/patches/beaglebone/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch b/patches/soc/ti/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch
similarity index 99%
rename from patches/beaglebone/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch
rename to patches/soc/ti/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch
index 726d34b290a32dafa16a03f2b9e1c88c2c508bda..e57bada410bb57772f8be90bfa12a272f397e583 100644
--- a/patches/beaglebone/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch
+++ b/patches/soc/ti/abbbi/0002-gpu-drm-i2c-adihdmi-componentize-driver-and-huge-ref.patch
@@ -1,7 +1,7 @@
-From 7d0feaf770e78e2179f1dd152bc9f714ccb0ea16 Mon Sep 17 00:00:00 2001
+From 78bdd1402e80e93693632748c84843d96cffc8ab Mon Sep 17 00:00:00 2001
From: Matt Porter <mporter@konsulko.com>
Date: Fri, 6 Nov 2015 09:00:09 -0500
-Subject: [PATCH 2/5] gpu: drm: i2c: adihdmi: componentize driver and huge
+Subject: [PATCH 2/6] gpu: drm: i2c: adihdmi: componentize driver and huge
reformat/cleanup
Convert the driver over the the device model component framework, making
@@ -2123,5 +2123,5 @@ index 8ffef6c..907bdf9 100644
module_exit(adihdmi_exit);
--
-2.8.0.rc3
+2.10.1
diff --git a/patches/beaglebone/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch b/patches/soc/ti/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
similarity index 97%
rename from patches/beaglebone/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
rename to patches/soc/ti/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
index 1f83a54886ad4e84601b25a6c2a16de65d1f24fb..4381b35123d758c35776ae44d93505d77bb311aa 100644
--- a/patches/beaglebone/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
+++ b/patches/soc/ti/abbbi/0003-ARM-dts-add-Arrow-BeagleBone-Black-Industrial-dts.patch
@@ -1,7 +1,7 @@
-From 6552929440f2b2578d7359152796166996284324 Mon Sep 17 00:00:00 2001
+From 839b8b704296985d1d436b523814d5417a7a1d56 Mon Sep 17 00:00:00 2001
From: Matt Porter <mporter@konsulko.com>
Date: Tue, 3 Nov 2015 15:37:54 -0500
-Subject: [PATCH 3/5] ARM: dts: add Arrow BeagleBone Black Industrial dts
+Subject: [PATCH 3/6] ARM: dts: add Arrow BeagleBone Black Industrial dts
Adds a dts file for the Arrow BeagleBone Black Industrial board.
This BBB variant differs in that it uses an industrial temp rated
@@ -16,7 +16,7 @@ Signed-off-by: Matt Porter <mporter@konsulko.com>
diff --git a/arch/arm/boot/dts/am335x-abbbi.dts b/arch/arm/boot/dts/am335x-abbbi.dts
new file mode 100644
-index 0000000..cc9b1f4
+index 0000000..43efead
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-abbbi.dts
@@ -0,0 +1,163 @@
@@ -184,5 +184,5 @@ index 0000000..cc9b1f4
+ system-power-controller;
+};
--
-2.8.0.rc3
+2.10.1
diff --git a/patches/beaglebone/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch b/patches/soc/ti/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch
similarity index 92%
rename from patches/beaglebone/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch
rename to patches/soc/ti/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch
index e734293f45107253357e60cac4ce5c0d2b49a565..a2b0265f5f3381fdee690cc22c4c6fc3c6da587b 100644
--- a/patches/beaglebone/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch
+++ b/patches/soc/ti/abbbi/0004-drm-adihdmi-Drop-dummy-save-restore-hooks.patch
@@ -1,7 +1,7 @@
-From 3cbf130a3a6cd479ae00e6996d971402e22106f8 Mon Sep 17 00:00:00 2001
+From 49b5222e340d52f3a92066a00c45280c70c2c7b1 Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 26 Jan 2016 10:39:31 -0600
-Subject: [PATCH 4/5] drm/adihdmi: Drop dummy save/restore hooks
+Subject: [PATCH 4/6] drm/adihdmi: Drop dummy save/restore hooks
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
@@ -48,5 +48,5 @@ index 907bdf9..dd25f7d 100644
.set_property = adihdmi_encoder_set_property,
};
--
-2.8.0.rc3
+2.10.1
diff --git a/patches/beaglebone/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch b/patches/soc/ti/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch
similarity index 85%
rename from patches/beaglebone/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch
rename to patches/soc/ti/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch
index d9c707799a5697ffc29211429ec986500d331167..ebe86f1dacae748b7de37c09083ea1947d798e7c 100644
--- a/patches/beaglebone/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch
+++ b/patches/soc/ti/abbbi/0005-drm-adihdmi-Pass-name-to-drm_encoder_init.patch
@@ -1,7 +1,7 @@
-From f6d8de96b48881da9766ee7b34fb7e69c420d3c2 Mon Sep 17 00:00:00 2001
+From c65a30f9f3a074d396f71a26ed0de41c1573f60f Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 26 Jan 2016 10:44:46 -0600
-Subject: [PATCH 5/5] drm/adihdmi: Pass 'name' to drm_encoder_init()
+Subject: [PATCH 5/6] drm/adihdmi: Pass 'name' to drm_encoder_init()
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
@@ -22,5 +22,5 @@ index dd25f7d..3d38626 100644
goto err_encoder;
--
-2.8.0.rc3
+2.10.1
diff --git a/patches/beaglebone/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch b/patches/soc/ti/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch
similarity index 91%
rename from patches/beaglebone/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch
rename to patches/soc/ti/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch
index 5769859e9b8d444a19017b25995ea881a30872ce..98a017c8dfbecae24394776206a05e14c0708fc3 100644
--- a/patches/beaglebone/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch
+++ b/patches/soc/ti/abbbi/0006-adihdmi_drv-reg_default-reg_sequence.patch
@@ -1,4 +1,4 @@
-From 176e4ccdd6d9e1be62d7400c49c4203d195bb788 Mon Sep 17 00:00:00 2001
+From 2e9ff71126b781d23652853564be04bdd1ca796f Mon Sep 17 00:00:00 2001
From: Robert Nelson <robertcnelson@gmail.com>
Date: Mon, 28 Mar 2016 09:16:04 -0500
Subject: [PATCH 6/6] adihdmi_drv: reg_default -> reg_sequence
@@ -22,5 +22,5 @@ index 3d38626..6792224 100644
{ 0x9a, 0xe0 },
{ 0x9c, 0x30 },
--
-2.8.0.rc3
+2.10.1
diff --git a/patches/beaglebone/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch b/patches/soc/ti/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch
similarity index 99%
rename from patches/beaglebone/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch
rename to patches/soc/ti/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch
index bfc1f0b0df6eb7009901de14609457dc6be15973..1662aac813ba4ac526863951db3d4fe8f968ceed 100644
--- a/patches/beaglebone/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch
+++ b/patches/soc/ti/am335x_olimex_som/0001-ARM-dts-Add-support-for-Olimex-AM3352-SOM.patch
@@ -1,4 +1,4 @@
-From 4cad97599f922f9e5c53c9748786559f728adc65 Mon Sep 17 00:00:00 2001
+From 378182724a74bb7f4b5c656b264be7e24eb30ab5 Mon Sep 17 00:00:00 2001
From: vinifr <viniciusfre@gmail.com>
Date: Sun, 6 Dec 2015 15:08:04 -0300
Subject: [PATCH] ARM: dts: Add support for Olimex AM3352-SOM
@@ -691,5 +691,5 @@ index 0000000..fb4399b
+ };
+};
--
-2.7.0.rc3
+2.10.1
diff --git a/patches/soc/ti/opp/0001-PM-OPP-Expose-_of_get_opp_desc_node-as-dev_pm_opp-AP.patch b/patches/soc/ti/opp/0001-PM-OPP-Expose-_of_get_opp_desc_node-as-dev_pm_opp-AP.patch
new file mode 100644
index 0000000000000000000000000000000000000000..6509841b8d5d65d711f5f1b3cb2fc31f1815947c
--- /dev/null
+++ b/patches/soc/ti/opp/0001-PM-OPP-Expose-_of_get_opp_desc_node-as-dev_pm_opp-AP.patch
@@ -0,0 +1,95 @@
+From bb150b12dd4a75e06d9bca4a4d5688137eb2a9d2 Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Thu, 22 Sep 2016 13:36:15 -0500
+Subject: [PATCH 1/8] PM / OPP: Expose _of_get_opp_desc_node as dev_pm_opp API
+
+Move _of_get_opp_desc_node into include/linux/pm_opp.h and rename it
+dev_pm_opp_of_get_opp_desc_node to allow other drivers, such as platform
+OPP and cpufreq drivers, to make use of it.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ drivers/base/power/opp/of.c | 8 ++++----
+ drivers/base/power/opp/opp.h | 1 -
+ include/linux/pm_opp.h | 6 ++++++
+ 3 files changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/base/power/opp/of.c b/drivers/base/power/opp/of.c
+index 5552211..215f5a5 100644
+--- a/drivers/base/power/opp/of.c
++++ b/drivers/base/power/opp/of.c
+@@ -198,7 +198,7 @@ void dev_pm_opp_of_remove_table(struct device *dev)
+ EXPORT_SYMBOL_GPL(dev_pm_opp_of_remove_table);
+
+ /* Returns opp descriptor node for a device, caller must do of_node_put() */
+-struct device_node *_of_get_opp_desc_node(struct device *dev)
++struct device_node *dev_pm_opp_of_get_opp_desc_node(struct device *dev)
+ {
+ /*
+ * TODO: Support for multiple OPP tables.
+@@ -450,7 +450,7 @@ int dev_pm_opp_of_add_table(struct device *dev)
+ * OPPs have two version of bindings now. The older one is deprecated,
+ * try for the new binding first.
+ */
+- opp_np = _of_get_opp_desc_node(dev);
++ opp_np = dev_pm_opp_of_get_opp_desc_node(dev);
+ if (!opp_np) {
+ /*
+ * Try old-deprecated bindings for backward compatibility with
+@@ -560,7 +560,7 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev,
+ int cpu, ret = 0;
+
+ /* Get OPP descriptor node */
+- np = _of_get_opp_desc_node(cpu_dev);
++ np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
+ if (!np) {
+ dev_dbg(cpu_dev, "%s: Couldn't find cpu_dev node.\n", __func__);
+ return -ENOENT;
+@@ -585,7 +585,7 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev,
+ }
+
+ /* Get OPP descriptor node */
+- tmp_np = _of_get_opp_desc_node(tcpu_dev);
++ tmp_np = dev_pm_opp_of_get_opp_desc_node(tcpu_dev);
+ if (!tmp_np) {
+ dev_err(tcpu_dev, "%s: Couldn't find tcpu_dev node.\n",
+ __func__);
+diff --git a/drivers/base/power/opp/opp.h b/drivers/base/power/opp/opp.h
+index fabd5ca..96cd30a 100644
+--- a/drivers/base/power/opp/opp.h
++++ b/drivers/base/power/opp/opp.h
+@@ -190,7 +190,6 @@ struct opp_table {
+ /* Routines internal to opp core */
+ struct opp_table *_find_opp_table(struct device *dev);
+ struct opp_device *_add_opp_dev(const struct device *dev, struct opp_table *opp_table);
+-struct device_node *_of_get_opp_desc_node(struct device *dev);
+ void _dev_pm_opp_remove_table(struct device *dev, bool remove_all);
+ struct dev_pm_opp *_allocate_opp(struct device *dev, struct opp_table **opp_table);
+ int _opp_add(struct device *dev, struct dev_pm_opp *new_opp, struct opp_table *opp_table);
+diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
+index bca2615..9e8c138 100644
+--- a/include/linux/pm_opp.h
++++ b/include/linux/pm_opp.h
+@@ -208,6 +208,7 @@ void dev_pm_opp_of_remove_table(struct device *dev);
+ int dev_pm_opp_of_cpumask_add_table(const struct cpumask *cpumask);
+ void dev_pm_opp_of_cpumask_remove_table(const struct cpumask *cpumask);
+ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, struct cpumask *cpumask);
++struct device_node *dev_pm_opp_of_get_opp_desc_node(struct device *dev);
+ #else
+ static inline int dev_pm_opp_of_add_table(struct device *dev)
+ {
+@@ -231,6 +232,11 @@ static inline int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, struct
+ {
+ return -ENOTSUPP;
+ }
++
++static inline struct device_node *dev_pm_opp_of_get_opp_desc_node(struct device *dev)
++{
++ return NULL;
++}
+ #endif
+
+ #endif /* __LINUX_OPP_H__ */
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0002-Documentation-dt-add-bindings-for-ti-cpufreq.patch b/patches/soc/ti/opp/0002-Documentation-dt-add-bindings-for-ti-cpufreq.patch
new file mode 100644
index 0000000000000000000000000000000000000000..1e45bcd37ab38a58d120f119dbeb8e06634a9675
--- /dev/null
+++ b/patches/soc/ti/opp/0002-Documentation-dt-add-bindings-for-ti-cpufreq.patch
@@ -0,0 +1,160 @@
+From f4017ebf14cde6458738ef7680c9ddc52e34928a Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Wed, 24 Feb 2016 09:35:30 -0600
+Subject: [PATCH 2/8] Documentation: dt: add bindings for ti-cpufreq
+
+Add the device tree bindings document for the TI CPUFreq/OPP driver
+on AM33xx and AM43xx SoCs. The operating-points-v2 binding allows us
+to provide an opp-supported-hw property for each OPP to define when
+it is available. This driver is responsible for reading and parsing
+registers to determine which OPPs can be selectively enabled based
+on the specific SoC in use by matching against the opp-supported-hw
+data.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ .../devicetree/bindings/cpufreq/ti-cpufreq.txt | 132 +++++++++++++++++++++
+ 1 file changed, 132 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
+
+diff --git a/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
+new file mode 100644
+index 0000000..7a31864
+--- /dev/null
++++ b/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
+@@ -0,0 +1,132 @@
++TI CPUFreq and OPP bindings
++================================
++
++Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
++families support different OPPs depending on the silicon variant in use.
++The ti_cpufreq driver can use revision and an efuse value from the SoC to
++provide the OPP framework with supported hardware information. This is
++used to determine which OPPs from the operating-points-v2 table get enabled
++when it is parsed by the OPP framework.
++
++Required properties:
++--------------------
++In 'cpus' nodes:
++- operating-points-v2: Phandle to the operating-points-v2 table to use.
++
++In 'operating-points-v2' table:
++- compatible: Should be
++ - 'operating-points-v2-ti' for am335x, am43xx, and dra7xx/am57xx SoCs
++- ti,syscon-efuse: Syscon phandle, offset to efuse register, efuse register
++ mask, and efuse register shift to get the relevant bits
++ that describe OPP availability.
++- ti,syscon-rev: Syscon and offset used to look up revision value on SoC.
++
++Optional properties:
++--------------------
++For each opp entry in 'operating-points-v2' table:
++- opp-supported-hw: Two bitfields indicating:
++ 1. Which revision of the SoC the OPP is supported by
++ 2. Which eFuse bits indicate this OPP is available
++
++ A bitwise AND is performed against these values and if any bit
++ matches, the OPP gets enabled. Not providing the property for an
++ entry indicates that an OPP is always supported.
++
++Example:
++--------
++
++/* From arch/arm/boot/dts/am33xx.dtsi */
++cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ cpu@0 {
++ compatible = "arm,cortex-a8";
++ device_type = "cpu";
++ reg = <0>;
++
++ operating-points-v2 = <&cpu0_opp_table>;
++
++ clocks = <&dpll_mpu_ck>;
++ clock-names = "cpu";
++
++ clock-latency = <300000>; /* From omap-cpufreq driver */
++ };
++};
++
++/*
++ * cpu0 has different OPPs depending on SoC revision and some on revisions
++ * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
++ */
++cpu0_opp_table: opp_table0 {
++ compatible = "operating-points-v2-ti-am3352-cpu";
++ ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>;
++ ti,syscon-rev = <&scm_conf 0x600>;
++
++ /*
++ * The three following nodes are marked with opp-suspend
++ * because they can not be enabled simultaneously on a
++ * single SoC.
++ */
++ opp50@300000000 {
++ opp-hz = /bits/ 64 <300000000>;
++ opp-microvolt = <950000 931000 969000>;
++ opp-supported-hw = <0x06 0x0010>;
++ opp-suspend;
++ };
++
++ opp100@275000000 {
++ opp-hz = /bits/ 64 <275000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x01 0x00FF>;
++ opp-suspend;
++ };
++
++ opp100@300000000 {
++ opp-hz = /bits/ 64 <300000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x06 0x0020>;
++ opp-suspend;
++ };
++
++ opp100@500000000 {
++ opp-hz = /bits/ 64 <500000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x01 0xFFFF>;
++ };
++
++ opp100@600000000 {
++ opp-hz = /bits/ 64 <600000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x06 0x0040>;
++ };
++
++ opp120@600000000 {
++ opp-hz = /bits/ 64 <600000000>;
++ opp-microvolt = <1200000 1176000 1224000>;
++ opp-supported-hw = <0x01 0xFFFF>;
++ };
++
++ opp120@720000000 {
++ opp-hz = /bits/ 64 <720000000>;
++ opp-microvolt = <1200000 1176000 1224000>;
++ opp-supported-hw = <0x06 0x0080>;
++ };
++
++ oppturbo@720000000 {
++ opp-hz = /bits/ 64 <720000000>;
++ opp-microvolt = <1260000 1234800 1285200>;
++ opp-supported-hw = <0x01 0xFFFF>;
++ };
++
++ oppturbo@800000000 {
++ opp-hz = /bits/ 64 <800000000>;
++ opp-microvolt = <1260000 1234800 1285200>;
++ opp-supported-hw = <0x06 0x0100>;
++ };
++
++ oppnitro@1000000000 {
++ opp-hz = /bits/ 64 <1000000000>;
++ opp-microvolt = <1325000 1298500 1351500>;
++ opp-supported-hw = <0x04 0x0200>;
++ };
++};
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0003-cpufreq-ti-Add-cpufreq-driver-to-determine-available.patch b/patches/soc/ti/opp/0003-cpufreq-ti-Add-cpufreq-driver-to-determine-available.patch
new file mode 100644
index 0000000000000000000000000000000000000000..1c5d4db382b6fc390fec20887912d5bdba12630d
--- /dev/null
+++ b/patches/soc/ti/opp/0003-cpufreq-ti-Add-cpufreq-driver-to-determine-available.patch
@@ -0,0 +1,361 @@
+From 292f02ea7be0303c5aec4b3576dc810fc74b4415 Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Wed, 24 Feb 2016 09:35:30 -0600
+Subject: [PATCH 3/8] cpufreq: ti: Add cpufreq driver to determine available
+ OPPs at runtime
+
+Some TI SoCs, like those in the AM335x, AM437x, DRA7x, and AM57x families,
+have different OPPs available for the MPU depending on which specific
+variant of the SoC is in use. This can be determined through use of the
+revision and an eFuse register present in the silicon. Introduce a
+ti-cpufreq driver that can read the aformentioned values and provide
+them as version matching data to the opp framework. Through this the
+opp-supported-hw dt binding that is part of the operating-points-v2
+table can be used to indicate availability of OPPs for each device.
+
+This driver also creates the "cpufreq-dt" platform_device after passing
+the version matching data to the OPP framework so that the cpufreq-dt
+handles the actual cpufreq implementation. Even without the necessary
+data to pass the version matching data the driver will still create this
+device to maintain backwards compatibility with operating-points v1
+tables.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ drivers/cpufreq/Kconfig.arm | 11 ++
+ drivers/cpufreq/Makefile | 1 +
+ drivers/cpufreq/ti-cpufreq.c | 288 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 300 insertions(+)
+ create mode 100644 drivers/cpufreq/ti-cpufreq.c
+
+diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
+index d89b8af..665f11d 100644
+--- a/drivers/cpufreq/Kconfig.arm
++++ b/drivers/cpufreq/Kconfig.arm
+@@ -234,6 +234,17 @@ config ARM_TEGRA124_CPUFREQ
+ help
+ This adds the CPUFreq driver support for Tegra124 SOCs.
+
++config ARM_TI_CPUFREQ
++ bool "Texas Instruments CPUFreq support"
++ depends on ARCH_OMAP2PLUS
++ help
++ This driver enables valid OPPs on the running platform based on
++ values contained within the SoC in use. Enable this in order to
++ use the cpufreq-dt driver on all Texas Instruments platforms that
++ provide dt based operating-points-v2 tables with opp-supported-hw
++ data provided. Required for cpufreq support on AM335x, AM437x,
++ DRA7x, and AM57x platforms.
++
+ config ARM_PXA2xx_CPUFREQ
+ tristate "Intel PXA2xx CPUfreq driver"
+ depends on PXA27x || PXA25x
+diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
+index 0a9b6a09..5b1b6ec 100644
+--- a/drivers/cpufreq/Makefile
++++ b/drivers/cpufreq/Makefile
+@@ -77,6 +77,7 @@ obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
+ obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o
+ obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
+ obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o
++obj-$(CONFIG_ARM_TI_CPUFREQ) += ti-cpufreq.o
+ obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o
+ obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o
+ obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cpufreq.o
+diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
+new file mode 100644
+index 0000000..afbaef9
+--- /dev/null
++++ b/drivers/cpufreq/ti-cpufreq.c
+@@ -0,0 +1,288 @@
++/*
++ * TI CPUFreq/OPP hw-supported driver
++ *
++ * Copyright (C) 2016 Texas Instruments, Inc.
++ * Dave Gerlach <d-gerlach@ti.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/cpu.h>
++#include <linux/io.h>
++#include <linux/mfd/syscon.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/pm_opp.h>
++#include <linux/regmap.h>
++#include <linux/slab.h>
++
++#define REVISION_MASK 0xF
++#define REVISION_SHIFT 28
++
++#define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
++#define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
++
++#define DRA7_EFUSE_HAS_OD_MPU_OPP 11
++#define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15
++#define DRA7_EFUSE_HAS_ALL_MPU_OPP 23
++
++#define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
++#define DRA7_EFUSE_OD_MPU_OPP BIT(1)
++#define DRA7_EFUSE_HIGH_MPU_OPP BIT(2)
++
++#define VERSION_COUNT 2
++
++struct ti_cpufreq_data;
++
++struct ti_cpufreq_soc_data {
++ unsigned long (*efuse_xlate)(struct ti_cpufreq_data *opp_data,
++ unsigned long efuse);
++ unsigned long efuse_fallback;
++};
++
++struct ti_cpufreq_data {
++ struct device *cpu_dev;
++ struct device_node *opp_node;
++ struct regmap *opp_efuse;
++ struct regmap *revision;
++ const struct ti_cpufreq_soc_data *soc_data;
++};
++
++static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
++ unsigned long efuse)
++{
++ if (!efuse)
++ efuse = opp_data->soc_data->efuse_fallback;
++ /* AM335x and AM437x use "OPP disable" bits, so invert */
++ return ~efuse;
++}
++
++static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
++ unsigned long efuse)
++{
++ unsigned long calculated_efuse = DRA7_EFUSE_NOM_MPU_OPP;
++
++ /*
++ * The efuse on dra7 and am57 parts contains a specific
++ * value indicating the highest available OPP.
++ */
++
++ switch (efuse) {
++ case DRA7_EFUSE_HAS_ALL_MPU_OPP:
++ case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
++ calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
++ case DRA7_EFUSE_HAS_OD_MPU_OPP:
++ calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
++ }
++
++ return calculated_efuse;
++}
++
++static struct ti_cpufreq_soc_data am3x_soc_data = {
++ .efuse_xlate = amx3_efuse_xlate,
++ .efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
++};
++
++static struct ti_cpufreq_soc_data am4x_soc_data = {
++ .efuse_xlate = amx3_efuse_xlate,
++ .efuse_fallback = AM43XX_600M_ARM_MPU_MAX_FREQ,
++};
++
++static struct ti_cpufreq_soc_data dra7_soc_data = {
++ .efuse_xlate = dra7_efuse_xlate,
++};
++
++/**
++ * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
++ * @opp_data: pointer to ti_cpufreq_data context
++ * @efuse_value: Set to the value parsed from efuse
++ *
++ * Returns error code if efuse not read properly.
++ */
++static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
++ u32 *efuse_value)
++{
++ struct device *dev = opp_data->cpu_dev;
++ struct device_node *np = opp_data->opp_node;
++ unsigned int efuse_offset;
++ u32 efuse, efuse_mask, efuse_shift, vals[4];
++ int ret;
++
++ ret = of_property_read_u32_array(np, "ti,syscon-efuse", vals, 4);
++ if (ret) {
++ dev_err(dev, "ti,syscon-efuse cannot be read %s: %d\n",
++ np->full_name, ret);
++ return ret;
++ }
++
++ efuse_offset = vals[1];
++ efuse_mask = vals[2];
++ efuse_shift = vals[3];
++
++ ret = regmap_read(opp_data->opp_efuse, efuse_offset, &efuse);
++ if (ret) {
++ dev_err(dev,
++ "Failed to read the efuse value from syscon: %d\n",
++ ret);
++ return ret;
++ }
++
++ efuse = (efuse & efuse_mask) >> efuse_shift;
++
++ *efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse);
++
++ return 0;
++}
++
++/**
++ * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
++ * @opp_data: pointer to ti_cpufreq_data context
++ * @revision_value: Set to the value parsed from revision register
++ *
++ * Returns error code if revision not read properly.
++ */
++static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
++ u32 *revision_value)
++{
++ struct device *dev = opp_data->cpu_dev;
++ struct device_node *np = opp_data->opp_node;
++ unsigned int revision_offset;
++ u32 revision;
++ int ret;
++
++ ret = of_property_read_u32_index(np, "ti,syscon-rev",
++ 1, &revision_offset);
++ if (ret) {
++ dev_err(dev,
++ "No revision offset provided %s [%d]\n",
++ np->full_name, ret);
++ return ret;
++ }
++
++ ret = regmap_read(opp_data->revision, revision_offset, &revision);
++ if (ret) {
++ dev_err(dev,
++ "Failed to read the revision number from syscon: %d\n",
++ ret);
++ return ret;
++ }
++
++ *revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
++
++ return 0;
++}
++
++static int ti_cpufreq_setup_syscon_registers(struct ti_cpufreq_data *opp_data)
++{
++ struct device *dev = opp_data->cpu_dev;
++ struct device_node *np = opp_data->opp_node;
++
++ opp_data->opp_efuse = syscon_regmap_lookup_by_phandle(np,
++ "ti,syscon-efuse");
++ if (IS_ERR(opp_data->opp_efuse)) {
++ dev_err(dev,
++ "\"ti,syscon-efuse\" is missing, cannot use OPPv2 table.\n");
++ return PTR_ERR(opp_data->opp_efuse);
++ }
++
++ opp_data->revision = syscon_regmap_lookup_by_phandle(np,
++ "ti,syscon-rev");
++ if (IS_ERR(opp_data->revision)) {
++ dev_err(dev,
++ "\"ti,syscon-rev\" is missing, cannot use OPPv2 table.\n");
++ return PTR_ERR(opp_data->revision);
++ }
++
++ return 0;
++}
++
++static const struct of_device_id ti_cpufreq_of_match[] = {
++ { .compatible = "ti,am33xx", .data = &am3x_soc_data, },
++ { .compatible = "ti,am4372", .data = &am4x_soc_data, },
++ { .compatible = "ti,dra7", .data = &dra7_soc_data },
++ {},
++};
++
++static int ti_cpufreq_init(void)
++{
++ u32 version[VERSION_COUNT];
++ struct device_node *np;
++ const struct of_device_id *match;
++ struct ti_cpufreq_data *opp_data;
++ int ret;
++
++ np = of_find_node_by_path("/");
++ match = of_match_node(ti_cpufreq_of_match, np);
++ if (!match)
++ return -ENODEV;
++
++ opp_data = kzalloc(sizeof(*opp_data), GFP_KERNEL);
++ if (!opp_data)
++ return -ENOMEM;
++
++ opp_data->soc_data = match->data;
++
++ opp_data->cpu_dev = get_cpu_device(0);
++ if (!opp_data->cpu_dev) {
++ pr_err("%s: Failed to get device for CPU0\n", __func__);
++ return -ENODEV;
++ }
++
++ opp_data->opp_node = dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_dev);
++ if (!opp_data->opp_node) {
++ dev_info(opp_data->cpu_dev,
++ "OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.\n");
++ goto register_cpufreq_dt;
++ }
++
++ ret = ti_cpufreq_setup_syscon_registers(opp_data);
++ if (ret)
++ goto fail_put_node;
++
++ /*
++ * OPPs determine whether or not they are supported based on
++ * two metrics:
++ * 0 - SoC Revision
++ * 1 - eFuse value
++ */
++ ret = ti_cpufreq_get_rev(opp_data, &version[0]);
++ if (ret)
++ goto fail_put_node;
++
++ ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
++ if (ret)
++ goto fail_put_node;
++
++ of_node_put(opp_data->opp_node);
++
++ ret = dev_pm_opp_set_supported_hw(opp_data->cpu_dev, version,
++ VERSION_COUNT);
++ if (ret) {
++ dev_err(opp_data->cpu_dev,
++ "Failed to set supported hardware\n");
++ goto fail_put_node;
++ }
++
++register_cpufreq_dt:
++ platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
++
++ return 0;
++
++fail_put_node:
++ of_node_put(opp_data->opp_node);
++
++ return ret;
++}
++module_init(ti_cpufreq_init);
++
++MODULE_DESCRIPTION("TI CPUFreq/OPP hw-supported driver");
++MODULE_AUTHOR("Dave Gerlach <d-gerlach@ti.com>");
++MODULE_LICENSE("GPL v2");
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0004-cpufreq-dt-Don-t-use-generic-platdev-driver-for-ti-c.patch b/patches/soc/ti/opp/0004-cpufreq-dt-Don-t-use-generic-platdev-driver-for-ti-c.patch
new file mode 100644
index 0000000000000000000000000000000000000000..7735a5b415e92bde86973f4bb548236031446f20
--- /dev/null
+++ b/patches/soc/ti/opp/0004-cpufreq-dt-Don-t-use-generic-platdev-driver-for-ti-c.patch
@@ -0,0 +1,34 @@
+From 38b596c188dc693625eabe55a53f5898aec735a7 Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Wed, 5 Oct 2016 11:13:18 -0500
+Subject: [PATCH 4/8] cpufreq: dt: Don't use generic platdev driver for
+ ti-cpufreq platforms
+
+Some TI platforms, specifically those in the am33xx, am43xx, dra7xx, and
+am57xx families of SoCs can make use of the ti-cpufreq driver to
+selectively enable OPPs based on the exact configuration in use. The
+ti-cpufreq is given the responsibility of creating the cpufreq-dt
+platform device when the driver is in use so drop am33xx and dra7xx
+from the cpufreq-dt-platdev driver so it is not created twice.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ drivers/cpufreq/cpufreq-dt-platdev.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
+index 7126762..d2637e1 100644
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -72,8 +72,6 @@ static const struct of_device_id machines[] __initconst = {
+
+ { .compatible = "sigma,tango4" },
+
+- { .compatible = "ti,am33xx", },
+- { .compatible = "ti,dra7", },
+ { .compatible = "ti,omap2", },
+ { .compatible = "ti,omap3", },
+ { .compatible = "ti,omap4", },
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0005-ARM-dts-am33xx-Add-updated-operating-points-v2-table.patch b/patches/soc/ti/opp/0005-ARM-dts-am33xx-Add-updated-operating-points-v2-table.patch
new file mode 100644
index 0000000000000000000000000000000000000000..47444b93e7f217b98891306efccc7c4954fea482
--- /dev/null
+++ b/patches/soc/ti/opp/0005-ARM-dts-am33xx-Add-updated-operating-points-v2-table.patch
@@ -0,0 +1,130 @@
+From b9216db186d14ae49e3302c0b719cb599b10a43f Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Tue, 2 Aug 2016 13:53:03 -0500
+Subject: [PATCH 5/8] ARM: dts: am33xx: Add updated operating-points-v2 table
+ for cpu
+
+After the ti-cpufreq driver has been added, we can now drop the
+operating-points table present in am33xx.dtsi for the cpu and add an
+operating-points-v2 table with all OPPs available for all silicon
+revisions. Also add necessary data for use by ti-cpufreq to selectively
+enable the appropriate OPPs at runtime as part of the operating-points
+table.
+
+Information from AM335x Data Manual, SPRS717i, Revised December 2015,
+Table 5-7.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ arch/arm/boot/dts/am33xx.dtsi | 88 ++++++++++++++++++++++++++++++++++++-------
+ 1 file changed, 75 insertions(+), 13 deletions(-)
+
+diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
+index 194d884..b379c24 100644
+--- a/arch/arm/boot/dts/am33xx.dtsi
++++ b/arch/arm/boot/dts/am33xx.dtsi
+@@ -45,19 +45,7 @@
+ device_type = "cpu";
+ reg = <0>;
+
+- /*
+- * To consider voltage drop between PMIC and SoC,
+- * tolerance value is reduced to 2% from 4% and
+- * voltage value is increased as a precaution.
+- */
+- operating-points = <
+- /* kHz uV */
+- 720000 1285000
+- 600000 1225000
+- 500000 1125000
+- 275000 1125000
+- >;
+- voltage-tolerance = <2>; /* 2 percentage */
++ operating-points-v2 = <&cpu0_opp_table>;
+
+ clocks = <&dpll_mpu_ck>;
+ clock-names = "cpu";
+@@ -66,6 +54,80 @@
+ };
+ };
+
++ cpu0_opp_table: opp_table0 {
++ compatible = "operating-points-v2-ti-cpu";
++ ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>;
++ ti,syscon-rev = <&scm_conf 0x600>;
++
++ /*
++ * The three following nodes are marked with opp-suspend
++ * because the can not be enabled simultaneously on a
++ * single SoC.
++ */
++ opp50@300000000 {
++ opp-hz = /bits/ 64 <300000000>;
++ opp-microvolt = <950000 931000 969000>;
++ opp-supported-hw = <0x06 0x0010>;
++ opp-suspend;
++ };
++
++ opp100@275000000 {
++ opp-hz = /bits/ 64 <275000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x01 0x00FF>;
++ opp-suspend;
++ };
++
++ opp100@300000000 {
++ opp-hz = /bits/ 64 <300000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x06 0x0020>;
++ opp-suspend;
++ };
++
++ opp100@500000000 {
++ opp-hz = /bits/ 64 <500000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x01 0xFFFF>;
++ };
++
++ opp100@600000000 {
++ opp-hz = /bits/ 64 <600000000>;
++ opp-microvolt = <1100000 1078000 1122000>;
++ opp-supported-hw = <0x06 0x0040>;
++ };
++
++ opp120@600000000 {
++ opp-hz = /bits/ 64 <600000000>;
++ opp-microvolt = <1200000 1176000 1224000>;
++ opp-supported-hw = <0x01 0xFFFF>;
++ };
++
++ opp120@720000000 {
++ opp-hz = /bits/ 64 <720000000>;
++ opp-microvolt = <1200000 1176000 1224000>;
++ opp-supported-hw = <0x06 0x0080>;
++ };
++
++ oppturbo@720000000 {
++ opp-hz = /bits/ 64 <720000000>;
++ opp-microvolt = <1260000 1234800 1285200>;
++ opp-supported-hw = <0x01 0xFFFF>;
++ };
++
++ oppturbo@800000000 {
++ opp-hz = /bits/ 64 <800000000>;
++ opp-microvolt = <1260000 1234800 1285200>;
++ opp-supported-hw = <0x06 0x0100>;
++ };
++
++ oppnitro@1000000000 {
++ opp-hz = /bits/ 64 <1000000000>;
++ opp-microvolt = <1325000 1298500 1351500>;
++ opp-supported-hw = <0x04 0x0200>;
++ };
++ };
++
+ pmu {
+ compatible = "arm,cortex-a8-pmu";
+ interrupts = <3>;
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0006-ARM-dts-am335x-boneblack-Enable-1GHz-OPP-for-cpu.patch b/patches/soc/ti/opp/0006-ARM-dts-am335x-boneblack-Enable-1GHz-OPP-for-cpu.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b1075c76c7bdaa0bc8ffd54405c4ba1c4041b97b
--- /dev/null
+++ b/patches/soc/ti/opp/0006-ARM-dts-am335x-boneblack-Enable-1GHz-OPP-for-cpu.patch
@@ -0,0 +1,40 @@
+From 92b0b6fc50b2fcfc2805c5e910f238f218bb08fd Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Wed, 18 May 2016 18:36:28 -0500
+Subject: [PATCH 6/8] ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
+
+Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
+Beaglebone Blacks may have PG2.0 silicon populated and these particular
+parts are guaranteed to support the OPP, so enable it for PG2.0 on
+am335x-boneblack only.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
+index 6bbb1fe..528559b 100644
+--- a/arch/arm/boot/dts/am335x-boneblack.dts
++++ b/arch/arm/boot/dts/am335x-boneblack.dts
+@@ -34,6 +34,17 @@
+ status = "okay";
+ };
+
++&cpu0_opp_table {
++ /*
++ * All PG 2.0 silicon may not support 1GHz but some of the early
++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
++ * to support 1GHz OPP so enable it for PG 2.0 on this board.
++ */
++ oppnitro@1000000000 {
++ opp-supported-hw = <0x06 0x0100>;
++ };
++};
++
+ &am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+ pinctrl-single,pins = <
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0007-ARM-dts-am4372-Update-operating-points-v2-table-for-.patch b/patches/soc/ti/opp/0007-ARM-dts-am4372-Update-operating-points-v2-table-for-.patch
new file mode 100644
index 0000000000000000000000000000000000000000..01701c9436a5baaee54681518a5a30953f23b6c7
--- /dev/null
+++ b/patches/soc/ti/opp/0007-ARM-dts-am4372-Update-operating-points-v2-table-for-.patch
@@ -0,0 +1,41 @@
+From 3894e03ba1a570e763d91e3e2c5bd5735ea3a4ae Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Tue, 2 Aug 2016 13:53:49 -0500
+Subject: [PATCH 7/8] ARM: dts: am4372: Update operating-points-v2 table for
+ cpu
+
+The new ti-cpufreq driver expects the platform specific properties to be
+part of the operating-points-v2 table rather than the cpu node so let's
+move them there as the only user is the ti-cpufreq driver.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ arch/arm/boot/dts/am4372.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
+index a275fa9..8bdb299 100644
+--- a/arch/arm/boot/dts/am4372.dtsi
++++ b/arch/arm/boot/dts/am4372.dtsi
+@@ -49,15 +49,15 @@
+ clock-names = "cpu";
+
+ operating-points-v2 = <&cpu0_opp_table>;
+- ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
+- ti,syscon-rev = <&scm_conf 0x600>;
+
+ clock-latency = <300000>; /* From omap-cpufreq driver */
+ };
+ };
+
+ cpu0_opp_table: opp_table0 {
+- compatible = "operating-points-v2";
++ compatible = "operating-points-v2-ti-cpu";
++ ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
++ ti,syscon-rev = <&scm_conf 0x600>;
+
+ opp50@300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+--
+2.10.1
+
diff --git a/patches/soc/ti/opp/0008-ARM-dts-dra7-Add-updated-operating-points-v2-table-f.patch b/patches/soc/ti/opp/0008-ARM-dts-dra7-Add-updated-operating-points-v2-table-f.patch
new file mode 100644
index 0000000000000000000000000000000000000000..5298c1151e78454fe412be1457e27ad9bc521dc7
--- /dev/null
+++ b/patches/soc/ti/opp/0008-ARM-dts-dra7-Add-updated-operating-points-v2-table-f.patch
@@ -0,0 +1,99 @@
+From e94f79fb1dbf22fa17158f60b11ff34849a5a34d Mon Sep 17 00:00:00 2001
+From: Dave Gerlach <d-gerlach@ti.com>
+Date: Tue, 2 Aug 2016 13:54:14 -0500
+Subject: [PATCH 8/8] ARM: dts: dra7: Add updated operating-points-v2 table for
+ cpu
+
+After the ti-cpufreq driver has been added, we can now drop the
+operating-points table present in dra7.dtsi for the cpu and add an
+operating-points-v2 table with all OPPs available for all silicon
+revisions. Also add necessary data for use by ti-cpufreq to selectively
+enable the appropriate OPPs at runtime as part of the operating-points
+table.
+
+As we now need to define voltage ranges for each OPP, we define the
+minimum and maximum voltage to match the ranges possible for AVS class0
+voltage as defined by the DRA7/AM57 Data Manual, with the exception of
+using a range for OPP_OD based on historical data to ensure that SoCs
+from older lots still continue to boot, even though more optimal voltages
+are now the standard. Once an AVS Class0 driver is in place it will be
+possible for these OPP voltages to be adjusted to any voltage within the
+provided range.
+
+Information from SPRS953, Revised December 2015.
+
+Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
+---
+ arch/arm/boot/dts/dra7.dtsi | 25 ++++++++++++++++++++-----
+ arch/arm/boot/dts/dra74x.dtsi | 5 +++++
+ 2 files changed, 25 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
+index d4fcd68..e5031fa 100644
+--- a/arch/arm/boot/dts/dra7.dtsi
++++ b/arch/arm/boot/dts/dra7.dtsi
+@@ -80,11 +80,7 @@
+ compatible = "arm,cortex-a15";
+ reg = <0>;
+
+- operating-points = <
+- /* kHz uV */
+- 1000000 1060000
+- 1176000 1160000
+- >;
++ operating-points-v2 = <&cpu0_opp_table>;
+
+ clocks = <&dpll_mpu_ck>;
+ clock-names = "cpu";
+@@ -98,6 +94,25 @@
+ };
+ };
+
++ cpu0_opp_table: opp_table0 {
++ compatible = "operating-points-v2-ti-cpu";
++ ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>;
++ ti,syscon-rev = <&scm_wkup 0x204>;
++
++ opp_nom@1000000000 {
++ opp-hz = /bits/ 64 <1000000000>;
++ opp-microvolt = <1060000 850000 1150000>;
++ opp-supported-hw = <0xFF 0x01>;
++ opp-suspend;
++ };
++
++ opp_od@1176000000 {
++ opp-hz = /bits/ 64 <1176000000>;
++ opp-microvolt = <1160000 885000 1160000>;
++ opp-supported-hw = <0xFF 0x02>;
++ };
++ };
++
+ /*
+ * The soc node represents the soc top level view. It is used for IPs
+ * that are not memory mapped in the MPU view or for the MPU itself.
+diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
+index 0a78347..24e6746 100644
+--- a/arch/arm/boot/dts/dra74x.dtsi
++++ b/arch/arm/boot/dts/dra74x.dtsi
+@@ -17,6 +17,7 @@
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <1>;
++ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
+@@ -79,6 +80,10 @@
+ };
+ };
+
++&cpu0_opp_table {
++ opp-shared;
++};
++
+ &dss {
+ reg = <0x58000000 0x80>,
+ <0x58004054 0x4>,
+--
+2.10.1
+
diff --git a/tools/host_det.sh b/tools/host_det.sh
index 59367d4d95fad2ad29abad7498fcb41dcb62d30e..d8d42c15c50f24a156b8e3e319b156e1acd0801c 100755
--- a/tools/host_det.sh
+++ b/tools/host_det.sh
@@ -130,8 +130,10 @@ debian_regs () {
check_dpkg
pkg="build-essential"
check_dpkg
- pkg="device-tree-compiler"
- check_dpkg
+ if ! type dtc >/dev/null; then
+ pkg="device-tree-compiler"
+ check_dpkg
+ fi
pkg="fakeroot"
check_dpkg
pkg="lsb-release"
diff --git a/version.sh b/version.sh
index f878941449a02db49653b8331f89cdcf624cab76..9db121afd117eb8280a098141b4145b111d13d9e 100644
--- a/version.sh
+++ b/version.sh
@@ -28,7 +28,7 @@ toolchain="gcc_linaro_gnueabihf_6"
#Kernel/Build
KERNEL_REL=4.9
KERNEL_TAG=${KERNEL_REL}-rc3
-BUILD=${build_prefix}1
+BUILD=${build_prefix}1.1
kernel_rt=".X-rtY"
#v4.X-rcX + upto SHA