From 5dbe519ee90abd5b5da3f035f4d4dccde4a68b74 Mon Sep 17 00:00:00 2001 From: vauban353 <vauban353@gmail.com> Date: Fri, 7 Oct 2022 20:06:44 +0100 Subject: [PATCH] Libero version: Update CSI and high speed interface for Libero 2022.2. --- B_V_F_REFERENCE_DESIGN.tcl | 4 +++- .../components/MIPI_CSI/IO_STUB/MIPI_CSI2_RX_IOD.tcl | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/B_V_F_REFERENCE_DESIGN.tcl b/B_V_F_REFERENCE_DESIGN.tcl index a20f8c4..fc6e76b 100644 --- a/B_V_F_REFERENCE_DESIGN.tcl +++ b/B_V_F_REFERENCE_DESIGN.tcl @@ -149,7 +149,9 @@ download_core -vlnv {Actel:Simulation:RESET_GEN:1.0.1} -location {www.microchip- download_core -vlnv {Actel:DirectCore:corepwm:4.5.100} -location {www.microchip-ip.com/repositories/DirectCore} download_core -vlnv {Actel:DirectCore:COREI2C:7.2.101} -location {www.microchip-ip.com/repositories/DirectCore} download_core -vlnv {Actel:DirectCore:CoreUARTapb:5.7.100} -location {www.microchip-ip.com/repositories/DirectCore} -download_core -vlnv {Actel:SystemBuilder:PF_IOD_GENERIC_RX:2.1.106} -location {www.microchip-ip.com/repositories/SgCore} +download_core -vlnv {Actel:SystemBuilder:PF_IOD_GENERIC_RX:2.1.109} -location {www.microchip-ip.com/repositories/SgCore} +download_core -vlnv {Actel:SgCore:PF_IO:2.0.104} -location {www.microchip-ip.com/repositories/SgCore} +download_core -vlnv {Actel:SystemBuilder:PF_XCVR_ERM:3.1.200} -location {www.microchip-ip.com/repositories/SgCore} # # // Generate base design diff --git a/script_support/components/MIPI_CSI/IO_STUB/MIPI_CSI2_RX_IOD.tcl b/script_support/components/MIPI_CSI/IO_STUB/MIPI_CSI2_RX_IOD.tcl index f73b9ed..793e9dc 100644 --- a/script_support/components/MIPI_CSI/IO_STUB/MIPI_CSI2_RX_IOD.tcl +++ b/script_support/components/MIPI_CSI/IO_STUB/MIPI_CSI2_RX_IOD.tcl @@ -2,7 +2,7 @@ # Family: PolarFireSoC # Part Number: MPFS250T-FCVG484E # Create and Configure the core component MIPI_CSI2_RX_IOD -create_and_configure_core -core_vlnv {Actel:SystemBuilder:PF_IOD_GENERIC_RX:2.1.106} -component_name {MIPI_CSI2_RX_IOD} -params {\ +create_and_configure_core -core_vlnv {Actel:SystemBuilder:PF_IOD_GENERIC_RX:2.1.109} -component_name {MIPI_CSI2_RX_IOD} -params {\ "CLOCK_DELAY_VALUE:0" \ "DATA_RATE:250" \ "DATA_RATIO:2" \ -- GitLab